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Technology Day: Mentor Custom IC Design Agenda & Speaker Biographies September 2018 Last edited 4/9/18 1 of 9 Technology Day details for Cambridge & Leuven End-user case studies and factory updates on Mentor's design solutions for analog and mixed signal, MEMS & photonics IC's for process nodes to 28nm Ø Agendas Cambridge Leuven Ø Presentation abstracts & speaker biographies Guest companies End-users Mentor speakers As presentation & speaker details become available, this document will be updated. Last update 4/9/18

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Page 1: Technology Day details for Cambridge & LeuvenTechnology Day details for Cambridge & Leuven End-user case studies and factory updates on ... speaker 1 TBC -Design to Spec with IPKISS.eda

Technology Day: Mentor Custom IC Design Agenda & Speaker Biographies September 2018 Last edited 4/9/18

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Technology Day details for Cambridge & Leuven End-user case studies and factory updates on Mentor's design solutions for analog and mixed signal, MEMS & photonics IC's for process nodes to 28nm

Ø Agendas

– Cambridge – Leuven Ø Presentation abstracts & speaker biographies

– Guest companies – End-users – Mentor speakers

As presentation & speaker details become available, this document will be updated. Last update 4/9/18

Page 2: Technology Day details for Cambridge & LeuvenTechnology Day details for Cambridge & Leuven End-user case studies and factory updates on ... speaker 1 TBC -Design to Spec with IPKISS.eda

Technology Day: Mentor Custom IC Design Agenda & Speaker Biographies September 2018 Last edited 4/9/18

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Technology Day: Mentor Custom IC Design End-user case studies and factory updates on Mentor's design solutions for analog and mixed signal, MEMS & photonics IC's for process nodes to 28nm 11th & 13th September 2018 Cambridge, UK and Leuven, Belgium

Share best practise experiences on design and verification challenges with fellow users of Mentor's IC design solutions

Whether you are a long-time customer of Mentor's design solutions for analog and mixed signal, MEMS & photonics IC's, or exploring alternative options for your environment, this is a very valuable event to attend

And round off the day with some lovely summer food and drink care of EDA Solutions

Page 3: Technology Day details for Cambridge & LeuvenTechnology Day details for Cambridge & Leuven End-user case studies and factory updates on ... speaker 1 TBC -Design to Spec with IPKISS.eda

Technology Day: Mentor Custom IC Design Agenda & Speaker Biographies September 2018 Last edited 4/9/18

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CAMBRIDGE, UK – September 11th, 2018

1200

Registration Light lunch

1300

Mentor Custom IC Design developments and vision John Stabenow, Director of Marketing, ICDS Division – Mentor

1400

End User Presentations - Design to Spec with IPKISS.eda and Tanner Tools

Pierre Wahl, Founder, Luceda Photonics NV - Upgraded to Custom IC – Right first time

Stephen Fincham, Senior Design Engineer, Pickering - Electronics for a Flexible World

Paul Mookherjee, IC Design Engineer, PragmatIC - Developing robust, 5V tolerant analog IO libraries for CMOS processes & FinFET

technologies to 16nm Vera Vingerhoets, Technical Marketing Engineer, Sofics

1545

Break

1600

Certified Foundry PDKs made EASY! Mohammed Youssef, IC Design Solutions Foundry Enablement Manager - Mentor

1630

Solutions for AMS circuit verification challenges Ayman Mounir, European Technical Director – AMS Solutions – Mentor

1700

Panel discussion All presenters available to respond to questions

1715

The machine ate my lunch A brief look at the state of AI today and future challenges Noel Hurley, VP Strategy, IP Product Groups, Arm

1745

Close Paul Double, CEO, EDA Solutions

1800 2100

Dinner @ venue TBC – EDA Solutions invites all delegates to join! End

Page 4: Technology Day details for Cambridge & LeuvenTechnology Day details for Cambridge & Leuven End-user case studies and factory updates on ... speaker 1 TBC -Design to Spec with IPKISS.eda

Technology Day: Mentor Custom IC Design Agenda & Speaker Biographies September 2018 Last edited 4/9/18

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LEUVEN, BELGIUM – September 13th, 2018

1200

Registration Light lunch

1300

Mentor Custom IC Design developments and vision John Stabenow, Director of Marketing, ICDS Division – Mentor

1345

End User Presentations - Presentation I, speaker 1 TBC - Design to Spec with IPKISS.eda and Tanner Tools

Pierre Wahl, Founder, Luceda Photonics NV - Developing robust, 5V tolerant analog IO libraries for CMOS processes & FinFET

technologies to 16nm Bart Keppens, Director of Technical Marketing, Sofics

1445

Break

1515

Certified Foundry PDKs made EASY! Mohammed Youssef, IC Design Solutions Foundry Enablement Manager - Mentor

1545

Solutions for AMS circuit verification challenges Ayman Mounir, European Technical Director – AMS Solutions – Mentor

1630

Understanding IC manufacturing options A design engineers guide to technical and commercial considerations Paul Malisse, Business Development Director, imec

1700

Panel discussion All presenters available to respond to questions

1730

Close Paul Double, CEO, EDA Solutions

1800 1900

Canapes and drinks End

Company logo 20 x 40mm

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Presentation Abstracts & Speaker Biographies All presentations/presenters are included on both Leuven and Cambridge agendas unless otherwise noted

End-User Papers

Design to Spec with IPKISS.eda and Tanner Tools Photonics IC (PIC) design blends specialist photonics knowledge with traditional IC design discipline. IPKISS.eda is used to ensure a PIC design matches both design intent and foundry spec. Pierre will describe an effective PIC design process based on IPKISS.eda / Tanner design & simulation environment and targeting a process technology from AMF (a silicon photonics foundry based in Singapore). The presentation will also illustrate how to create photonics design building blocks to accelerate overall design completion. An arrayed waveguide grating (AWG) will be used as an example. Pierre Wahl, Founder, Luceda Photonics NV Pierre Wahl co-founded Luceda Photonics in 2014 where he is in charge of sales, support and training operations. Wahl trains and supports R&D teams of major corporations, research institutes, foundries and universities in China, North America and Europe. He completed a PhD in opto-electronics at the Free University of Brussels and Stanford University on ultra-low energy optical interconnects in 2014. He has a master degree in photonics from the University of Gent and the Free University of Brussels in 2010. Wahl has co-authored multiple journal publications and delivered various talks on specialized design, simulation and optimization techniques used in integrated photonics.

Upgraded to Custom IC – Right first time [ CAMBRIDGE ONLY] Pickering Interfaces made an investment decision in 2016 to implement a special relay driver using custom ASIC technology. This was to be their first foray in ASIC. The driving cell had to be custom made to achieve required drive and ESD performance. In early 2018, 100 test chips from an MPW run were received and the device worked first time. The chip is now going to manufacture. Stephen will present the main steps in his solo project touching planning, design and principle challenges. He will conclude with a summary of lessons learnt.

Stephen Fincham, Senior Design Engineer, Pickering Interfaces Stephen started in electronics with an apprenticeship at Marconi Chelmsford. Then moved to Consumer Microcircuits Ltd for 31 years where he designed mixed signal CMOS IC’s in 7um down to 0.18um, experiencing all aspects of IC design. He then moved to Bosch Lawn and Garden where he headed an international electronics team designing the Bosch Indego robot mower. Presently Stephen works for Pickering Interfaces designing new, advanced IP to strengthen their product range.

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Electronics for a Flexible World [CAMBRIDGE ONLY] PragmatIC's flexible electronic technology presents considerable challenges to established EDA tools. Our rapid development from small prototype circuits containing only a few transistors to the current RFID tag system-on-chips has not been easy, needing leading edge tools and expert support from Tanner. In this talk, we will introduce our technology and show how we have evolved our capabilities using Tanner's EDA flow.

Paul Mookherjee, IC Design Engineer, PragmatIC Paul, who joined PragmatIC in 2015, is a senior modelling engineer with experience in the Si, III-V and metal oxide semiconductor technologies. Prior to PragmatIC he worked for 20 years in positions covering design, device development, modelling and simulation, for companies in the UK, US, Germany and France. Paul holds a Diploma of the Imperial College (DIC) and PhD from Imperial College London in a field of solid-state physics and he is a member of the IET and is a Chartered Engineer.

Developing robust, 5V tolerant analog IO libraries for CMOS processes & FinFET technologies to 16nm In advanced technology nodes, fabless design companies save time by integrating re-usable IP blocks. Some libraries, such as General Purpose IO (GPIO), are made available free-of-charge by foundries. Frequently GPIO libraries can provide interface pads for 90% of the IO’s. The remaining interfaces need special analog IO’s with reduced leakage, ultra-low parasitic capacitance, 5V tolerant operation or enhanced ESD/EOS robustness. The presentation will show examples, using Tanner design tools, on projects developing custom analog IO libraries for different CMOS process nodes down to 16nm. Bart Keppens, Director of Technical Marketing, Sofics [PRESENTING IN LEUVEN]

Bart received his engineering degree in Electronics from Groep T, Leuven in 1996. In 1996 Bart joined Imec responsible for device electrical characterization, support for the ESD group and for the Non-Volatile Memories group for layout and testing. In May 2002 he joined Sarnoff Europe, solving ESD problems for customers worldwide, first as ESD engineer, later as technical leader, ESD design specialist. From 2006, Bart supported the Business Development initiatives as Technical Director. After a management buy-out in June 2009, Sarnoff Europe became 'SOFICS - Solutions for ICs' where Bart is currently Technical Marketing Director. Bart (co-) authored more than 40 peer-reviewed published articles. Several invited papers and

tutorials on ESD design and analysis have been delivered at the RCJ ESD symposium in Japan and the Taiwan ESD conference. He is member of the Technical Program Committee (‘TPC’) of the EOS/ESD symposium since 2003. Bart holds several on-chip ESD protection design patents.

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Vera Vingerhoets, Technical Marketing Engineer, Sofics [PRESENTING IN CAMBRIDGE] Vera Vingerhoets received her M.Sc. degree in Industrial Sciences option Electronics-ICT engineering in 2010 from College PXL in Diepenbeek. In 2012, she received her MEng. degree in Electrical Engineering option Electronic circuits and systems from the University of Ghent, Belgium. Vera joined Sofics in July 2012 solving ESD related problems for customers worldwide as ESD Design Engineer. She supported customers on challenging analog interfaces like applying 16V on 90nm CMOS pads. She is involved in the development of a software platform to analyse ESD relevant measurements at Sofics.

5 years later, she now splits her time as an ESD design engineer and as a Technical Marketing Engineer supporting Business Development.

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Guest Speakers Noel Hurley, VP Strategy, IP Product Groups, Arm [Cambridge only]

The machine ate my lunch A brief look at the state of AI today and future challenges Biography Noel Hurley is VP of Strategy for Arm's IP Products Group. Prior, he was general manager of the Business Segments Group responsible for product strategy and ecosystem development for sectors including servers, network infrastructure and mobile computing. He originally joined the company in 1994, performing a number of technical marketing, segment marketing, product marketing and commercial roles. In 2005, Noel became the founder and vice president of marketing for XMOS Semiconductors, a VC-funded fabless semiconductor company. He joined Toumaz Technology as COO in 2010, before re-joining ARM at the end of 2011.

Paul Malisse, Business Development Director, imec [Leuven only]

Understanding IC manufacturing options A design engineers guide to technical and commercial considerations Biography Paul Malisse is employed at imec for 27 years. He started as Field technical support engineer in 1991, has been Team Leader of Asic Services and participates in the Europractice project (supporting European emerging/start-up companies and academic institutes worldwide to get easy access to world leading Semiconductor Foundries). As Business Manager he is in contact with hundreds of large and small companies to provide them with the technical know-how, prototype and wafer production access so they can be successful in their application field.

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Mentor Speakers

Solutions for AMS circuit verification challenges The mixed-signal domain continues to be a growth area in semiconductor; mobile, medical, imaging, automotive and multiple IoT applications to list a few. Challenges for AMS (analog mixed-signal) verification are varied and many. Mentor has delivered powerful solutions in this domain for over 20 years. And it invests heavily in technology development and acquisition. Ayman’s presentation will discuss Mentor’s AMS verification technologies to help the audience understand which products solve which challenges. It will explain which technology acquisitions fit to which parts of the solution domain including Berkley Design Automations Analog Fast Spice (AFS) and the recent SolidoDesign Automation investment. Ayman Mounir, European Technical Director – AMS Solutions – Mentor With 20 years of EDA experience in the Analog and Mixed Signal verification domain, Ayman is responsible for developing Mentor’s Analog and Mixed Signal verification business in Europe. He has held a variety of R&D, marketing and sales roles with increasing responsibilities. Ayman was awarded an engineering degree from Cairo University and a business degree from Grenoble Business School.

Mentor Custom IC Design developments and vision Now fully assimilated into Mentor and Siemens, the Tanner custom IC design product group maintains its entrepreneurial spirit but as part of this bigger and stronger family. The opening address outlines new product developments and introduces the team's vision for the near term future. The presentation features Mentor’s DAC 2018 highlights for designers of complex analog / mixed signal and MEMS designs. It will explain Mentor's design flow with best-in-class technology from its semiconductor design portfolio. John Stabenow, Director of Marketing, ICDS Division – Mentor Mr. Stabenow has worked in a variety of roles in IC layout design, CAD and manufacturing at semiconductor suppliers Micro Linear, National Semiconductor, Information Storage Devices, and Advanced System Products. In addition, Mr. Stabenow has held roles in Applications Engineering, Sales and Marketing at Cadence Design Systems and Synopsys. He now manages the Mentor’s ICDS technical marketing engineering team.

Certified Foundry PDKs made EASY! The rising pressure of innovating technologies has kept the semiconductor industry at a challenge that led to the creation of the fabless-foundry model. Certified foundry process design kits are a key guarantee for a designer leading to a successful manufacturing result. The presentation will cover how Mentor IC Design Solutions Foundry Enablement team deployed automation to enable and certify foundry PDKs with a fast time-to-market. Mohammed Youssef, IC Design Solutions Foundry Enablement Manager - Mentor Mohamed Youssef is the Mentor, a Siemens Business, IC Design Solutions Foundry Enablement Manager. Youssef joined Mentor’s IC Design Solutions team in 2000 as a software engineering manager for its custom IC tools. Youssef was also a member in Si2 OpenPDK and led the Tools Interface WG. Youssef holds a Bachelor of Science degree in Electrical Engineering and Communications from Ain Shams University, Cairo Egypt.