tech roadmap update (flash). charge #: 47043 flash memory roadmap introduction nand flash is a...
TRANSCRIPT
Tech Roadmap Update(Flash)
Charge #: 47043Flash memory Roadmap
Introduction• NAND Flash is a rapidly changing technology and market, and
promises to be very interesting as the process node approaches 10 nm. At this point, physical constraints will begin to limit the performance of the basic memory cell design.
• As a result, looking more the two years into the future becomes a purely speculative exercise and we limit our projections to 2014.
• Contact us for more information:• http://www.techinsights.com/company/contact-us/• 1-613-599-6500
2
Charge #: 47043Flash memory Roadmap
Overall (Tech. Node @Mass-Production)
3
Manufacturer 2010 2011 2012 2013 2014
ITRS Flash Roadmap (2011 Updated Ver.)
32 nm 22 nm 20 nm 18 nm 16 nm
35 nm32 nm
27 nm21 nm (1)
(MLC, TLC)
16 nm (7,8)
(eMMC 4.5)
16 nm (8)
(@China)3D: TCAT
34 nm25 nm
25 nm20 nm (6)
(MLC, HKMG)
20 nm (4)
(TLC)18 nm (8)
N/A
43 nm32 nm
24 nm19 nm(MLC, TLC)
2D: 1Y nm(256 Gb) (3,5)
3D: BiCS (128 Gb, 32 layers,
PTS) (3)
2D: 1Z nm (512 Gb)
3D: BiCS (256Gb, 32 layers, ES) (3)
46 nm35 nm
26 nm20 nm (2)
(MLC)15 nm (8,9)
(MLC)N/A
Charge #: 47043Flash memory Roadmap
ITRS Tech. Roadmap (2011 Updated ver.)
4
Source: ITRS
Charge #: 47043Flash memory Roadmap
Overall (Tech. Node @Mass-Production)
5
Source: Chinamarket.com
Charge #: 47043Flash memory Roadmap
Overall (Current Mass-Production Situation)
6
Source: Chinamarket.com
Charge #: 47043Flash memory Roadmap
Overall (Current Mass-Production Situation)
7
Source: Micron, Aug. 2012
Charge #: 47043Flash memory Roadmap
Samsung _ I
8
In 2009, Samsung described its 3D NAND technology based on a terabit cell array transistor (TCAT). A year later, Macronix talked about a BE-SONOS charge-trapping technology. And Hynix is developing a 3D dual control-gate with a surrounding floating-gate.http://semimd.com/blog/2012/08/16/what%E2%80%99s-after-nand-flash/
Charge #: 47043Flash memory Roadmap
Samsung _ II
9
Samsung Electronics Comp., Ltd. offered up some exciting news today, revealing that it had started production of 10 nm-class (10-19 nm) NAND for eMMC, taking mobile storage to new levels of "tiny". The new 64 GB NAND Flash storage chips, which are built on the eMMC 4.5 standard, which Samsung basically wrote itself, offer random writes of 2,000 IOPS (input-output operations per second), random reads of 5,000 IOPS, sequential reads at 260 MB/s, and sequential write speeds of 50 MB/s. Those stats are about 30 percent up from the first-generation eMMC 4.5 devices (mature 20 nm product). More good news for Samsung is that it was able to repurpose its 20 nm lines to produce the 10 nm-class chips. It says the process compatibility is expected to increase its manufacturing yields around 30 percent.
http://www.dailytech.com/Samsung+Starts+Production+of+10+nmClass+Tablet+Smartphone+Flash+Chips/article29202.htm
Charge #: 47043Flash memory Roadmap
Samsung _ III
10
Source: Nikkei BP, 2011
Charge #: 47043Flash memory Roadmap
IMFT (Micron/Intel) _ I
11
SandForce's controllers have fairly broad compatibility with NAND available on the market today. It shouldn't be a surprise that the first demo we saw of Toshiba's 19nm and Intel/Micron's 20nm NAND was at the SandForce/LSI suite in the Grand Hyatt in Taipei.
Even though 19nm/20nm 64Gbit devices aren't very different from their predecessors, they still require custom firmware support for many reasons including dealing with different program times. Intel and Micron have told us that they expect similar endurance from their 20nm NAND as we currently see with their 25nm offerings.
The demo we saw was a simple Iometer test on both platforms. SandForce built SF-2000 drives using NAND from Intel, Micron and Toshiba. The Intel part number hasn't changed much from the 25nm generation. The table below highlights the differences:The last F actually indicates that we're looking at a 20nm part, while the 3 actually refers to generation which seems to have been incremented along with the process node identifier.
http://www.anandtech.com/show/5960/sandforce-demos-19nm-toshiba-20nm-imft-nand-flash
Charge #: 47043Flash memory Roadmap
NAND Flash Roadmap
12
Charge #: 47043Flash memory Roadmap
Toshiba/Sandisk _ I
13
The 3D NAND industry emerged in 2007, when Toshiba unveiled its Bit Cost Scalable (BiCS) technology. BiCs makes use of a “punch-and plug” structure and charge trap memory films. Toshiba has fabricated a prototype 32-Gbit BiCS flash memory test array with a 16-layer memory cell using 60nm design rules.http://semimd.com/blog/2012/08/16/what%E2%80%99s-after-nand-flash/
Toshiba plans to ship 128-Gbit or 256-Gbit prototype samples (PTSes) in 2013 and engineering samples (ESes) in 2014 and start volume production in 2015. The company intends to realize a 512-Gbit product in 2015 and continue the development in the aim of realizing 1 Tbit or higher capacity. At the same time, Toshiba will scale down its process technology for NAND flash memories having a two-dimensional structure, planning to ship samples of 1Ynm products in 2012 and 1Znm products in 2013. http://techon.nikkeibp.co.jp/english/NEWS_EN/20120713/228338/
Charge #: 47043Flash memory Roadmap
Toshiba/Sandisk _ II
14
http://savolainen.wordpress.com/
Charge #: 47043Flash memory Roadmap
Toshiba/Sandisk _ III
15
http://savolainen.wordpress.com/
Charge #: 47043Flash memory Roadmap
Toshiba/Sandisk _ III
16
Source: Nikkei BP, 2011
Charge #: 47043Flash memory Roadmap
SK-Hynix _ I
17
SK-Hynix takes NAND to 15-nm
While many experts have expressed doubts about the ability of flash memory to scale and indicated the need for an alternative non-volatile memory technology, SK-Hynix has just gone ahead and produced a 15-nm NAND flash memory cell which it plans to unveil at this year's International Electron Devices Meeting (IEDM).http://www.eetimes.com/electronics-news/4227389/Hynix-NAND-flash-memory-IEDM
Charge #: 47043Flash memory Roadmap
SK-Hynix _ II
18
MLC NAND Mass-Products (Schedule)
Source: SK-Hynix
Charge #: 47043Flash memory Roadmap
Glossary• BiCS- pipe-shaped Bit Cost Scalable flash. A 3D NAND cell being
developed by Toshiba.• eMMC- Embedded Multimedia Card. A 1997 standard combining
NAND Flash and Controller.• HKMG- High K Metal Gate. An advance technology designed to
replace silicon dioxide and at small process nodes.• ITRS- International Technology Roadmap for Semiconductors.• MLC- Multilevel Cell. A NAND memory cell that stores more than one
bit of information.• TCAT- Terabit Array Transistor. A 3D NAND cell architecture.• TLC- Triple Level Cell. A NAND memory cell that stores three bits of
information.
19
Charge #: 47043Flash memory Roadmap
Sources
20
(1) http://www.xbitlabs.com/news/storage/display/
20120925215333_Samsung_Reveals_Solid_State_Drives_Based_on_21nm_NAND
_Flash_Memory.html
(2) http://en.chinaflashmarket.com/Uploads/file/2012%20NAND%20Flash%20market
%20annual%20report.pdf
(3) http://techon.nikkeibp.co.jp/english/NEWS_EN/20120713/228338/
(4) http://www.eetimes.com/design/memory-design/4407053/Micron-launches-128-Gbit-
NAND-flash
(5) http://savolainen.wordpress.com/2011/07/03/nand-technology-roadmap/
(6) http://www.techspot.com/news/50643-intel-begins-shipping-335-series-ssds-with-
20nm-mlc-nand.html
(7) http://www.dailytech.com/
Samsung+Starts+Production+of+10+nmClass+Tablet+Smartphone+Flash+Chips/
article29202.htm
(8) www.chinaflashmarket.com
(9) http://www.eetimes.com/electronics-news/4227389/Hynix-NAND-flash-memory-
IEDM
Charge #: 47043Flash memory Roadmap21
•