teaching guide: basic electronics
TRANSCRIPT
prof.ssa S. Rocchiing. M. Poli
Teaching guide: basic electronics2008-09
Contents
Introduzione . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Ringraziamenti . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Link a equazioni, figure, lavagne, parti e riferimenti bibliografici . . . . . . . . . . . . . . . . . . . . . . . . 2NOTA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Summary 4Part T1: Notes on Electricity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Part T2: Semiconductor physics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Part T3: Diode as non-linear device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Part A1: Diode applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Part T4: MOSFET device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Part T5: Bipolar Junction Transistor (BJT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Part T6: MOSFET and BJT as non-linear devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Part N1: Basics of Electrical Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Part A2: Single stage MOSFET and BJT configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Part E1: Esempio di progettazione di un amplificatore CS . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Part A3: Basic MOSFET-based configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Part T7: Amplifiers’ frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Part A4: Time-constant method application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Part T8: Ideal voltage amplifier and feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Part A5: Ideal voltage amplifier and feedback applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Part T9: Stability analysis of feedback amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Part E2: Compensation examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Part T10: Techniques used to analyze feedback amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Part E3: Examples of the Rosenstark and Blackman formulas . . . . . . . . . . . . . . . . . . . . . . . . . 7Part E4: Esercizi su amplificatori, retroazione e compensazione . . . . . . . . . . . . . . . . . . . . . . . . 7
T1 Notes on Electricity 8Electric field E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Flux of E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Gauss law in vacuum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Meaning of ǫ0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9permittivity ǫ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Electric displacement field (or electric flux density) D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Electrostatic potential V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Electrostatic potential property (I) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Electrostatic potential property (II) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9E → V on x dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Potential energy U . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Energy conservation law . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Example: potential energy barrier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Metal conductivity schematic picture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10µ (mobility) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11J (current density) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Conductivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Resistivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CONTENTS II
T2 Semiconductor physics 12Band Theory of Solids . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Conduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Insulators, semiconductors and conductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Fermi-Dirac statistics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Electrical conductivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Semiconductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Semiconductors current pictures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Doped semiconductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Conductivity for semiconductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Intrinsic semiconductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Doped semiconductors n-type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Doped semiconductors p-type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15p-n junction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Reverse bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Forward bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17p-n diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Diode equation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Diode dynamic effects: transaction capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Diode dynamic effects: diffusion capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Actual diode maximum limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Breakdown effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Zener diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
T3 Diode as non-linear device 20Diode as non-linear device: circuit analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Linear piecewise (OFF region) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Equivalent resistance and equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Graphic picture of the diode linear piecewise in OFF region . . . . . . . . . . . . . . . . . . . . . . . . . . 21Linear piecewise (ON region) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Differential conductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Differential resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21iD in forward region and small signal conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22Norton equivalent circuit (ON region) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22vD in forward region and small signal conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22Thevenin equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22Graphic picture of the diode linear piecewise in ON region . . . . . . . . . . . . . . . . . . . . . . . . . . . 23Graphic picture of the diode linear piecewise in breakdown region . . . . . . . . . . . . . . . . . . . . . . . 24Zener voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24Zener resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24Zener diode equivalent circuit in breakdown region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24Linear piecewise approximation (LPA) for diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25LPA for Zener diodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25Zener diode equivalent circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25How to choose the right region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
A1 Diode applications 27Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27Bridge rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27Rectifier with filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28Amplitude-modulation detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28Zener regulated power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28Zener limiter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
CONTENTS III
T4 MOSFET device 30MOSFET as capacitor with capacitance depending on gate voltage . . . . . . . . . . . . . . . . . . . . . . 30MOSFET device structure when inversion layer is present . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Charge in the inversion layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Medium charge density . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Current iD when inversion layer is present . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Validity field of (T4.5): triode region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33Graphics of iD vs. vDS in triode region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34MOSFET as Voltage Controlled Resistor (VCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34MOSFET in saturation region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34Pinch-off point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35Saturation region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36MOSFET is a voltage-controlled current generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36Channel modulation effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36Body effect (substrate bias effect) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36Extension to p-channel MOSFETs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37MOSFET-p triode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37MOSFET-p saturation current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37MOSFET: limits of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
T5 Bipolar Junction Transistor (BJT) 38Bipolar Junction Transistor (BJT): physical structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38Conduction when B-E is forward biased and B-C is reverse biased (graphic picture) . . . . . . . . . . . . 38BJT current when vBE 6= 0 and vBC = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39iB current when vBE 6= 0 and vBC = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39iC current when vBE 6= 0 and vBC = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39iE current when vBE 6= 0 and vBC = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39BJT current when vBE = 0 and vBC 6= 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39iB current when vBE = 0 and vBC 6= 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39iE current when vBE = 0 and vBC 6= 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39iC current when vBE = 0 and vBC 6= 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40BJT current when vBE 6= 0 and vBC 6= 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40iC current when vBE 6= 0 and vBC 6= 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40iE current when vBE 6= 0 and vBC 6= 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40iB current when vBE 6= 0 and vBC 6= 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40BJT non-linear circuit model: transport model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40Forward Active Region (FAR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41Reverse Active Region (RAR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41BJT: Saturation Region (SR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41BJT: Interdiction Region (IR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41Graphics pictures of iC vs. iB and vCE in FAR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42Early effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43BJT physical limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
T6 MOSFET and BJT as non-linear devices 44MOSFET: LPA with vBS = 0 in triode region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44MOSFET: LPA with vBS = 0 in saturation region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45Geometric interpretation of g0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45Geometric interpretation of gm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45MOSFET: LPA conditions in saturation region (small signal) . . . . . . . . . . . . . . . . . . . . . . . . . 46MOSFET equivalent circuit for id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46MOSFET equivalent circuit when vBS 6= 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46Evaluation of iD by means of circuit theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46MOSFET parasitic capacitances: triode region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46MOSFET parasitic capacitances: saturation region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47MOSFET linear equivalent circuit in high frequency condition . . . . . . . . . . . . . . . . . . . . . . . . . 48When can parasitic capacitors be neglected? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48BJT: LPA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49BJT equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49BJT: Evaluation of ic and ib by circuit theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49BJT: LPA conditions in FAR region (small signal) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
CONTENTS IV
N1 Basics of Electrical Theory 51Quadripoles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51Differential input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51Single input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51Differential output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52Single output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52Single-input, single-output linear quadripoles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52Input and output impedances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52Voltage, current and power gains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53Differential-input single-output linear quadripoles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53Common mode and differential mode voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53Common mode and differential mode gains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53Common-mode rejection ratio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54Differential mode and common mode input impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54Unidirectional Linear Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55Voltage amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55Trans-impedance amplifier (current-to-voltage converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56Trans-conductance amplifier (voltage-to-current converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . 56Current amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57Maximum voltage transfer to the input impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57Maximum current transfer to the input impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57Maximum voltage transfer to the load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58Maximum current transfer to the load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58Maximum voltage transfer from the input to the load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59Maximum current transfer from the input to the load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59The Miller theorem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60Miller theorem demonstration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60Miller effect for capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
A2 Single stage MOSFET and BJT configurations 62Common source (CS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62CS: biasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63Sensitivity (definition) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63CS: The design problem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64CS: Small-signal (LPA) equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64CS: Norton equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65CS: equivalent conductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66CS: voltage amplification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66CS: simplifying hypotheses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66CS: estimation of the maximum voltage amplification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67Common drain (CD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67CD: biasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67CD: small-signal equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68CD: short-circuit id = ieq . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68CD: output equivalent conductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68CD: voltage amplification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69Common gate (CG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69CG: biasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69CG: small-signal equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70CG: short-circuit id = ieq . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70CG: output equivalent conductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71CG: current amplification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71CG: input conductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72CG: voltage amplification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72MOSFET configurations summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72Common emitter (CE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73CE: Biasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73CE: The design problem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74CE: Small-signal circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
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CONTENTS V
E1 Esempio di progettazione di un amplificatore CS 76Specifiche di progetto . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76Dati . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77Analisi preliminare del circuito . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77Circuito equivalente per lo studio della polarizzazione . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77Corrente erogata dai generatori di polarizzazione . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78Circuito equivalente di piccolo segnale . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78Guadagno di tensione . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79Conversione delle specifiche . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79Verifica di centro banda . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80Sommario . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
A3 Basic MOSFET-based configurations 82Diode-connected MOSFET connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82Current mirror . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82Current mirrors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83Differential amplifier (DA): large differential signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83DA: iD1 = f1(vd)iD2 = f2(vd) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84DA: plots of iD1 and iD2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85DA: plots of vO1 and vO2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85DA: verification of the saturation region for M1 and M2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86DA: evaluation of vO1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86DA: biasing equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86DA: biasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86DA: small signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87DA: common-mode small signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87DA: differential-mode small signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88DA: complete vo1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88DA: CMRR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89DA: common source configuration with RS = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
T7 Amplifiers’ frequency response 90Frequency response (definition) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90Bode plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91Band-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91Reduction of a third order system to first order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92Reduction of a n-th order system to first order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92Time-constant method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93Note on time-constant method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
A4 Time-constant method application 94Time-constant method example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94Output short-circuit current of circuit in Fig. A4.1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94Output equivalent impedance of circuit in Fig. A4.1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95Norton equivalent of circuit in Fig. A4.1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96Transfer function of circuit in Fig. A4.1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96Time-constant method applied to circuit in Fig. A4.1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96Evaluation of R0
1 by means of the time-constant method . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96Evaluation of R0
2 by means of the time-constant method . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97Evaluation of R1
2 by means of the time-constant method . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97Evaluation of coefficient a1 by means of the time-constant method . . . . . . . . . . . . . . . . . . . . . . 98Evaluation of coefficient a2 by means of the time-constant method . . . . . . . . . . . . . . . . . . . . . . 98
T8 Ideal voltage amplifier and feedback 99Basic configuration of actual operation amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99Ideal operation amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99Ideal operation amplifier: parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99Ideal operation amplifier: virtual short circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100Feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100Negative feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100Closed-loop gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
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Negative feedback circuits based on the ideal operation amplifier . . . . . . . . . . . . . . . . . . . . . . . 101Feedback analysis of circuits based on the ideal operation amplifier . . . . . . . . . . . . . . . . . . . . . . 101Closed-loop ideal gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101Sensitivity of AV0 with respect to A0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101Sensitivity of AV0 with respect to B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101Noise suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102Feedback with non-linear amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102Bandwidth extension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103Gain-bandwidth product . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103Transition angular frequency and gain-bandwidth product . . . . . . . . . . . . . . . . . . . . . . . . . . . 103The bifilar model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104Voltage (shunt) sampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104Current (series) sampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105Voltage (series) mixing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105Current (shunt) mixing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
A5 Ideal voltage amplifier and feedback applications 106Voltage follower based on OA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106Non-inverting amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107Inverting amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107Inverting adder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108Subtractor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
T9 Stability analysis of feedback amplifiers 109Stability analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109Single-pole amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109Two-pole amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109Amplifiers with at least three poles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110The loop gain modulus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110The loop gain phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110Characteristic equation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110Loop gain phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111Loop gain modulus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111Gain and phase margins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112System with phase margin equal to 90 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112System with phase margin equal to 60 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113System with phase margin equal to 30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113What is the best phase margin? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114Compensation by reduction of the loop gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114Narrow-banding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115Pole dominant compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116Miller compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117Comparing the effectiveness of the pole dominant compensantion and the Miller compensantion . . . . . . 119
E2 Compensation examples 121Compensation example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121Bode plots for the original and compensated systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122Compensation example on a simple 3-stage amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122Miller compensation example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
T10 Techniques used to analyze feedback amplifiers 125Rosenstark’s formula . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125Return ratio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125Asymptotic gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126Direct gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126Blackman’s formula . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
CONTENTS VII
E3 Examples of the Rosenstark and Blackman formulas 127Return ratio example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127Asymptotic gain example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127Direct gain example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128Rosenstark’s formula example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128Blackman’s formula example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128Blackman’s formula example: evaluation of Tsc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128Blackman’s formula example: evaluation of Toc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129Blackman’s formula example: evaluation of R0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129Blackman’s formula example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
E4 Esercizi su amplificatori, retroazione e compensazione 130Esercizio A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130Esercizio B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130Esercizio C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131Esercizio D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131Esercizio E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131Esercizio F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132Esercizio G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Teaching guide: basic electronicsAnno 2007-08
Introduzione
Il materiale di studio e sostanzialmente un ipertesto organizzato in “lavagne” dovela parte descrittiva e essenziale, sono stati introdotti alcuni commenti raggiungibiliattraverso link.Fa parte del materiale una versione stampabile dell’ipertesto (in formato PDF) incui i commenti sono evidenti.Nel quadro 1 e riportata una sintesi del percorso didattico organizzato secondo un“filo logico” in cui le singole parti sono numerate e richiamate con il corrispondentenumero scritto sopra e sotto la freccia quando da queste occorre “prelevare” concetti enozioni utili alla comprensione della parte considerata. Per esempio per comprenderela parte 4 sulla struttura e funzionamento del MOSFET occorre conoscere la fisicadei semiconduttori trattata nella parte 2.Si differenziano le parti applicative (app*,*) in cui sono riportate tipologie di circuitiper riflettere svolgendo esercizi.L’ipertesto e organizzato secondo lo stesso “filo logico”, sopra le frecce che sisusseguono lungo il percorso sono riportate le formule e/o le figure utili per compren-dere i diversi passaggi. Le definizioni, le dimostrazioni iniziano con un quadratinonero e terminano con le definizioni, le tesi, i commenti finali evidenziati con unrettangolo di contorno.
Lo studente, a lezione, dovrebbe avere una stampa delle lavagne, in cui volu-tamente sono lasciati spazi bianchi per commenti. Comunque si suggerisce diassociare ad ogni lavagna una o piu pagine di commenti desunti dalla lezione deldocente o da integrazioni e riflessioni in fase di studio. In questo modo lo studentepotra costruire un proprio libro per Elettronica I.
Ringraziamenti
La prima versione dell’ipertesto di Elettronica I (elettronicaI 2007.*), sviluppato sec-ondo il “filo logico” descritto, e frutto di incontri e letture di documenti sugli strumentidella Ricerca Metodologica Disciplinare sviluppati dal Prof. Filippo Ciampolini (Uni-versita di Bologna) al quale sono rivolti i nostri piu sentiti ringraziamenti.
Istruzioni per l’utilizzo dell’ipertesto
Link aequazioni,
figure,lavagne, partie riferimentibibliografici
Il materiale di studio e consultabile come un qualsiasi ipertesto. Le equazioni, lefigure, i riferimenti a lavagne, i riferimenti a parti e i riferimenti bibliografici sono linkper consentire una navigazione dinamica e interattiva. Il seguente simbolo rappresentaun link a lavagna.
Dopo aver fatto click su un link e sufficiente premere il tasto “BACKSPACE”(versione HTML) o il pulsante “INDIETRO” del browser (versione HTML) o iltasto “VISTA PRECEDENTE” (versione PDF) per tornare alla pagina che si stavaconsultando prima della pressione sul link.
Istruzioni per l’utilizzo dell’ipertesto 3
Inoltre per alcune “lavagne” sono presenti dei commenti in piu lingue identificati dabandiere in fondo alle lavagne stesse (si guardi la figura sottostante). Basta fare clicksulla bandiera della lingua voluta per far apparire o scomparire il commento.
Nella versione PDF i commenti iniziano con il simbolo
e sono scritti in corsivo.
NOTA
“”
A causa delle nuove politiche di protezione di Internet Explorer, gli studentiche usano tale browser devono autorizzare la visualizzazione del contenuto bloccatofacendo click sulla barra gialla che compare in alto alla pagina e selezionando“Consenti contenuto bloccato...” (si guardi l’immagine sottostante).
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Summary
Part T1:Notes onElectricity
E (Electric Field),V (Electrostatic Potential),J (Current Density),σ (Conductivity),ρ (Resistivity).
Part T2: Se-miconductor
physics
T1−−→ Band Theory, Conductivity of Doped Semiconductors, p-n Junction, Diode,Zener Diode.
Part T3:Diode asnon-linear
device
T2−−→ Diode Equation Approximation, Linear Circuit Models of two terminals’ device.Analysis methodology of circuits with diodes.
Part A1:Diode
applications
T3−−→ Diode applications.
Part T4:MOSFET
device
T2−−→ MOSFET as capacitor, Ohmic and Saturation Regions, Modulation channeleffect, Body effect.
Part T5:BipolarJunctionTransistor
(BJT)
T2−−→T4
Bipolar Junction Transistor (BJT), Forward and Reverse Active Regions, Satu-ration Region... Base width modulation effect parasitic capacitors. Comparisonwith MOSFET.
Summary 5
Part T6:MOSFET
and BJT asnon-lineardevices
T2,T4−−−−−→T5
MOSFET equations’ approximations, Linear Circuit Models, Analysis method-ology of circuits with MOSFET (CS configuration as example of biasing circuitand small signal equivalent circuits). Parasitic capacitors. BJT equations’approximations, Linear Circuit Models, Analysis methodology of circuits withBJT (CE configuration as example of biasing circuit and small signal equivalentcircuits).
Part N1:Basics ofElectricalTheory
Notes on two-port networks (Quadripoles). The Miller theorem.
Part A2:Single stageMOSFETand BJTconfigura-
tions
T6−−→N1
MOSFET: CS, CD and CG configurations: voltage gain, current gain, inputand output conductances. BJT: CE configuration: voltage gain, current gain,input and output conductances.
Part E1:Esempio di
proget-tazione di unamplificatore
CS
T6−−→A2
Esempio di progettazione con MOSFET.
Part A3:Basic
MOSFET-based
configura-tions
T6,A2−−−−−→N1
MOSFET: diode configuration, current mirror, differential amplifier.
Part T7:Amplifiers’frequencyresponse
T4−−→T5
Bandwidth, pole-dominant approximation, time-constant method.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Summary 6
Part A4:Time-
constantmethod
application
T7−−→ Example of the time-constant method.
Part T8:Ideal voltageamplifier and
feedback
A3−−→Ideal parameters, circuit model, comparison with CS, CD, CG configurations,introduction of multi-stage amplifiers, active load. Feedback, unifilar model:advantages and disadvantages in amplifiers. Feedback topologies.
Part A5:Ideal voltageamplifier and
feedbackapplications
T8−−→ Ideal voltage amplifier and feedback applications
Part T9:Stability
analysis offeedbackamplifiers
N1,T7−−−−−→T8
Stability analysis: gain and phase margins, compensation techniques.
Part E2:Compensa-
tionexamples
T9−−→ Compensation examples.
Part T10:Techniques
used toanalyzefeedbackamplifiers
T7−−→T8
Rosenstark and Blackman techniques.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Summary 7
Part E3:Examples of
theRosenstark
andBlackmanformulas
T10−−−→ Examples of the Rosenstark and Blackman formulas.
Part E4:Esercizi su
amplificatori,retroazione e
compen-sazione
T7,T8−−−−−−→T9,T10
Esercizi su amplificatori, retroazione e compensazione.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part T1
Notes on ElectricitySee [?]
Electric fieldE
E = lim∆Q→0
∆F
∆Q
∆F
∆Q
P
(Static conditions)
The electric field vector E in a point is the electric force per unit charge exerted on
a probe placed in the same point and whose charge tend to 0.
Flux of E(T1.1) ΦSclosed
=
∫
Sclosed
E × ndS
Gauss law invacuum
ΦSclosed
(E
)=
Q
ǫ0
experimentallyassumed
∆S
E
n
Q2
Q1
Q3
Q5
Q4 Q6
Q7
Figure T1.1
where the electrical permittivity in vacuum (ǫ0) is equal to ǫ0 = 8.85412 · 1012[
Fm
]
Example (Fig. T1.1)∑
Sclosed
E × n ∆S =∑
Sclosed
En · ∆S =Q1 + Q2 + Q3 + Q5
ǫ0
Notes on Electricity 9
Meaning of ǫ0
Joint constant between dimensions of ΦSclosed
(E
)and Q
(T1.1)−−−−→ [Force] · [Surface]
[Charge]=
[Charge]
[ǫ0]⇒ [ǫ0] =
[C2
]
[N · m2]
permittivity ǫ
for homogeneous and infinite (i.e., unbounded) media
(T1.2) ΦSclosed
(ǫE
)= Q ΦSclosed
(E
)=
Q
ǫ
where ǫ = ǫr · ǫ0 ǫr > 1
Electricdisplacement
field (orelectric fluxdensity) D
In most “ordinary” materials D = ǫE
Electrostaticpotential V
(T1.3) VP = WP→O
(E
)
where WP→O
(E
)is the work (the amount of energy) transferred by E along an arbitrary
path connecting points P and O .
Electrostaticpotential
property (I)
WP ′→O
+ WO→P ′
= 0
WP ′→O
= − WO→P ′
VP ′O = −VOP ′
O
P ′
Figure T1.2
Electrostaticpotential
property (II)
(T1.4) WP→P ′
= VPO + VOP ′
(T1.4)−−−−→ WP→P ′
= VPO − VP ′O (T1.5)
O
P
P ′
b
c
a
Figure T1.3
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Notes on Electricity 10
E → V on x
dimension
(T1.5)−−−−→ WP→P ′ = V − (V + ∆V )
(T1.3)−−−−→ WP→P ′ = Ex · ∆x
WP→P ′ = Ex∆x
⇒ Ex = −∆V
∆x
(T1.6) Ex = lim∆x→0
−∆V
∆x= −d V
dx
V
P xP ′
V +∆V
E
Ex
Figure T1.4
Potentialenergy U
U = qV
if q = −qel = 1.6 · 10−19 C
q · 1 V = 1 eV = 1.6 · 10−19 J(1 eV is a very small amount of energy)
Energyconservation
law
W = U + EC where EC =1
2mv2
Example:potential
energy barrier
(T1.6)−−−−→ V (x) = −E x+CONST
U (x) = −q V (x)
U (0) = 0
U (0) +1
2mv2
0 = W
x0 : vx0 = 0
U (x0) + 0 = W
Ec must be positive so U (x) is a potentialenergy barrier for electrons; in the figure elec-trons cannot be at a distance greater than x0
from electrode P .
x0
d
P P ′
.
E
V
x
V (x)
x
U (x)
W
x0
P
EC
Figure T1.5
Metalconductivityschematicpicture
+ + + + +
+ + + + +
Bound iones
Free electrons
+ + + + +
+ + + + +
..
.
Figure T1.6
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Notes on Electricity 11
µ (mobility)
In the steady state
(T1.7) vd = −µ E
where vd is the drift velocity.
µ =vd
E [µ] =m2
V · s
J (currentdensity)
One dimensional example (Fig. T1.7) A
wire
xL
E
vol=L·A
e−J
O P
.
.
Figure T1.7
(T1.8) |vd| =L
T
I = electric charge flowing through any cross section of the wire in the time unitN = number of electrons in volume L · A
∣∣I
∣∣ =
q N
T
(T1.8)−−−−→ I =q N vd
L
J =I
A=
q N vd
L A
setting ρ =q N
L A=
q N
volwe have:
(T1.9) J = ρ vd
(T1.7)−−−−→ J = ρ µ E
Conductivity
J = σE
σ = ρµ
(T1.6)−−−−−−→Fig. T1.7
V = −∫ xP
0
E dx = −E L
Resistivity
I = J · A = σV
LA =
V
R(expressed in module)
ρ =R A
Land ρ =
1
σ
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part T2
Semiconductor physicsSee [?]
Band Theoryof Solids
Plot of the available energies for electrons in the materials. The available energylevels form bands instead of discrete energies.
Conduction
For the conduction process is crucial whether or not electrons are in the con-duction band and the energy gap amplitude (Eg) between the valence band and theconduction band.
Insulators, se-miconductors
andconductors
Valence band
Conduction band
Eg ≈ 5 eV
Insulators
Valence band
Conduction band
Eg ≈ 1 eV
Semiconductors
Valence band
Conduction band
Conductors.
.
Eg = 4 eV is the energy threshold between insulators and semiconductors.
Semiconductor physics 13
Fermi-Diracstatistics
Conduction band and Valence band
Although the number of states in the bands is actually infinite, in an unchargedmaterial the number of electrons is equal to the number of protons in the atoms, i.e.not all the possible states are occupied by electrons at any time.The probability of a given energy level to be occupied by an electron is given by:
(T2.1) f (E) =1
1 + eE−EF
kT
f (E) =1
1 + e
(E
EF−1
)EFkT
0 1 2 3 4 5 60
1
2
3
4
5
6
0 1 2 3 4 5 6
0.2
0.4
0.6
0.8
1.0
1.2EF /kT = 100
EF /kT = 0.1
EF /kT = 1
E/EF
f(E
)where k is the Boltzmann constant (k = 1.380 · 10−23 J/K), T is the temper-ature in Kelvin, EF is the Fermi energy.
Electricalconductivity
Electrons must move between states to conduct an electrical current, so due tothe Pauli exclusion principle full bands do not contribute to the electrical conductivity.
Semiconduc-tors
(T2.1)−−−−→
E
EF
Valenceband
Conductionband
T = 0 K
f (E)
E
EF
Valenceband
Conductionband
Medium temp.
f (E)
E
EF
Valenceband
Conductionband
High temp.
f (E)
The electrons’ population in a given energy state depends on the Fermi function andon the electrons’ density in that state. In the gap there are no electrons because thedensity state is zero. At T = 0 K and for energies higher than the Fermi level, theFermi function is zero (see figure) and so there are no electrons in the conductionband even though many free states are available.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Semiconductor physics 14
Semiconduc-tors current
pictures
If a voltage is applied to the semiconductor, for T > 0 K we have:
Si Si Si SiSi
Si Si
Electrons current
Holes current
Si SiSi
Si Si Si SiSi
e− hole+
.
.
+ −
V.B.+ + + + + +
holes
C.B. − − − − − −
electrons
⇒ ⇒ ⇒ ⇒
.
.
Doped semi-conductors
.
.
n-type
P
Si
SiSi
Si
donor impuritycontributes to free
electrons
p-type
B
Si
SiSi
Si
acceptor impuritycreates holes
FL
Valenceband
Conductionband
FLValenceband
Conductionband
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Semiconductor physics 15
Symbols
p = holes’ concentration
n = electrons’ concentration
Conductivityfor semicon-
ductors
(T1.7)−−−−→ J = ρ µ E = (nµn + pµp) q E (J and E are expressed in module)
σ = ρ µ = (nµn + pµp) q
Intrinsic semi-conductors
p = n = ni
e.g. for silicon ni =1022
cm3at T = 25 C and increases as temperature increases.
σ = ρ µ = (µn + µp) ni q
µn = 1350cm2
V · s
µp = 500cm2
V · s
Doped semi-conductors
n-type
Introduction of DONOR atoms leads to a donor concentration
ND = 1014 ÷ 1021 atoms
cm3.
For charge neutrality
(T2.2) N+D + p = n
n ≫ p (T2.2)−−−−→ n ≈ ND at T = 25 C
Doped semi-conductors
p-type
Introduction of ACCEPTOR atoms leads to an acceptor concentration
NA = 1014 ÷ 1021 atoms
cm3.
For charge neutrality
(T2.3) N−A + n = p
p ≫ n (T2.3)−−−−→ p ≈ NA at T = 25 C
Often semiconductors are doped with two types of doping atoms ND, NA with con-centrations strongly different, ND ≫ NA for n-type semiconductors and NA ≫ ND
for p-type semiconductors
for p-type p ≈ NA − ND
for n-type n ≈ ND − NA
Conductivity can be controlled by introducing specific concentration of doping atoms.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Semiconductor physics 16
p-n junction
When a p-n junction is formed, someof the free electrons in the n-region diffuseacross the junction and combine with holesforming negative ions. A space charge re-gion builds up and a depletion region iscreated: the equilibrium is reached whenthe Coulomb force from ions inhibits anyfurther transfer of electrons, in this con-dition the n-type and the p-type have thesame Fermi level.
.
.
p
nEF
E
p n or p n
.
.
p-type n-type
.
.
p-type n-type
.
.
----
----
p-type
+
++
+
+
+
++
n-type
depletion region (W )
.
.electrons holes
- filled holes + removed electrons
Reverse bias
.
.
p
n
E
p n +−
-
- +
+
p n
- +
p n
+
+
+
+
+--
-
-
-
thermal current
Figure T2.1
(T1.6)−−−−→ U = −qV = Epotential of electrons in equilibrium condition. The appliedvoltage impedes the flow across the junction. For conduction in the device, electronsfrom the n region must move to the junction and combine with holes in the p region.The reverse voltage drives the electrons away from the junction.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Semiconductor physics 17
Forward bias
.
.
p
n
E
p n −+
-
- +
+
p n
- +
p n
+
+
+
--
-
The applied voltage assists electrons in overcoming the Coulomb barrier in depletionregion. At the junction electrons and holes combine so that a continuous current canbe maintained.
p-n diode
Non-linear relation between current iD and voltage vD.
.
.
1·10−3
0.2 0.4 0.6
iD [A]
vD [V ]forward biasreverse bias
reverse current (IS)
-+
iD
vD
Figure T2.2
Diodeequation
(T2.4) iD = IS
(
evDVT − 1
)
where VT =kT
qel=
T
11600VT = 25mV at T = 25 C
for vD > 5 VT iD ≈ IS evDVT
for vD < −5 VT iD ≈ −IS
Diodedynamiceffects:
transactioncapacitance
Reverse biasing voltage drives electrons and holes away from the junction,consequently the depletion region (positive and negative ions) increases with reversevoltage.
(T2.5) CT =∆Q
∆v=
ǫA
W
where A is the diode section area, W is thewidth of the depletion region and ǫ is the di-electric constant of the depletion region. .
.
----
----
p-type++++
++++
n-type
Wabsence of free chagers≈insulator
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Semiconductor physics 18
Diodedynamiceffects:
diffusioncapacitance
Forward biasing: the number of electrons crossing the junction depends on theforward voltage and the time before an electron recombines with a hole is finite,conseguently a capacitive effect arises.
CD =∆Q
∆vQ = iDτT
where τT is the time before an electron recombines with a hole.
CD =τT ∆iD
∆v= τT
TSevDVT
VT
(T2.6) CD ≈ τT iDVT
Actual diodemaximum
limits
Maximum reverse voltage: vbreakdown (reverse biasing)
Maximum power dissipation: PD = vD iD (forward biasing)
Breakdowneffect
Breakdown effect is due to two different phenomena:• Zener breakdown occurs predominantly with heavily doped junction regions and alow reverse voltage (< 6 V ). The high E removes electrons that can pass throughthe junction [?].
• Avalanche breakdown occurs at high reverse voltage (≥ 6 V ): free electronsnear the junction acquire high kinetic energy (being in a uniform acceleration field)and so a high speed. As these high-speed electrons move through the material theyinevitably strike atoms knocking an electron free from it. Both electrons are thenaccelerated by the electric field and strike other atoms knocking additional electronsfree and so on. In this way the reverse current rapidly increases [?].
Reverse bias
.
.
- +
p n+
+
-
-
+-+
E
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Semiconductor physics 19
Zener diode
From a technological point of view, the Zener diodes are built so that thebreakdown effect is possible at a sufficiently low reverse voltage thus preventing theovercoming of the maximum PD.
.
.
iD [A]
vD [V ]
≈forward biasreverse bias
breakdownregion
-+
iD
vD
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part T3
Diode as non-linear device
Diode asnon-linear
device: circuitanalysis
The diode equation (T2.4) can be expanded in Taylor series, linear circuit lawsare usable when the series can be limited to the first order:
(T2.4)−−−−→ iD = iD0 +d iDd vD
∣∣∣∣vD=VD0
(vD − VD0) +1
2
d2 iDd v2
D
∣∣∣∣vD=VD0
(vD − VD0)2
+ · · ·
Linearpiecewise
(OFF region)
VD0 = V ′D0
= 0V ⇒ vD − VD0 = ∆vD = vd = vD
iD = 0 +
a︷ ︸︸ ︷
IS
VTvD +
b︷ ︸︸ ︷
1
2
IS
V 2T
v2D
if a ≫ b (i.e., a ≥ 10 b ⇒ IS
VTvD ≥ 10
2
IS
V 2T
v2D ⇒ vD ≤ VT
5= 5mV ) then
(T3.1) iD ≈ IS
VTvD
Equivalentresistance and
equivalentcircuit
(T3.1)−−−−→ rOFF =vD
iD=
VT
IS
rOFFiD
vD
Diode as non-linear device 21
Graphicpicture of thediode linearpiecewise inOFF region
Fig. T2.2−−−−−−→
.
.
1·10−3
0.6
iD [A]
vD [V ]
2·10−12
iD [A]
vD [mV ]1 2 3 4 5
Figure T3.1
Linearpiecewise (ON
region)
vD ≥ 5VT = 125mV = V ′′D0
VD0 = V ′′D0
= 5VT = 125mV (25C)
(T2.4)−−−−→ iD ≈ ISevD/VT = ISe(V ′′D0
+∆vD)/VT
(T3.2)
∆vD=vd
∆iD=idvD=V ′′
D0+ vd
(T3.2)−−−−→ iD = ISeV ′′D0
/VT
︸ ︷︷ ︸
I′′D0
·e∆vD/VT = I ′′D0evd/VT
Taylor−−−−−→approx. iD = I ′′D0
+
a︷ ︸︸ ︷
I ′′D0
VTvd +
b︷ ︸︸ ︷
1
2
I ′′D0
V 2T
v2d + · · ·
ifI ′′D0
VTvd ≥ 10
1
2
I ′′D0
V 2T
v2d ⇒ vd ≤ VT
5= 5mV then (small signal conditions)
(T3.3) iD = I ′′D0+
I ′′D0
VTvd
Differentialconductance
(T3.4) g =∂iD∂vD
∣∣∣∣vD=V ′′
D0
=d iDd vd
=I ′′D0
VT
Differentialresistance
(T3.5) rON =1
g
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Diode as non-linear device 22
iD in forwardregion andsmall signalconditions
(T3.2)−−−−→ vd = vD − V ′′D0
(T3.3)−−−−→ iD = I ′′D0+
I ′′D0
VT
(vD − V ′′
D0
)
iD = I ′′D0
(
1 −V ′′
D0
VT
)
+ g vD
Nortonequivalentcircuit (ON
region)
Ieq = I ′′D0
(
1 −V ′′
D0
VT
)
.
.
1
gvDIeq
iD
vD in forwardregion andsmall signalconditions
Thevenin−−−−−−→theorem
Veq = −Ieq
g= −I ′′D0
(
1 −V ′′
D0
VT
)1
g
Veq = −I ′′D0
(VT − V ′′
D0
VT
)VT
I ′′D0
= V ′′D0
− VT
(T3.6) vD = Veq +iDg
Theveninequivalent
circuit
(T3.6)−−−−→
.
.
−+
Veq
1/g
iD
vD
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Diode as non-linear device 23
Graphicpicture of thediode linearpiecewise inON region
.
.
A ≡(
V′′
d0; I
′′
d0
)
B ≡ (Vγ ; 0)
2·10−3
0.5·10−3
1·10−3
A
B
0.62 0.65
α
iD [A]
vD [V ]
iD (A) vD [V ]
5 · 10−4 0.621 · 10−3 0.632 · 10−3 0.655 · 10−3 0.67
Figure T3.2
(T3.7) tgα ≈ ∆iD∆vD
≈ ∂iD∂vD
∣∣∣∣V ′′
D0
= g
(T3.6),Fig. T3.2−−−−−−−−−−→ Vγ = Veq = V ′′D0
− VT (T3.8)
I ′′D0=2 · 10−3A
g=0.08S ⇒ Vγ = 0.62Vr=1/g = 12.5Ω
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Diode as non-linear device 24
Graphicpicture of thediode linearpiecewise inbreakdown
region
See “Breakdown effect” ( pag. 18)
.
.
I′′′
D0
iD [A]
vD [V ]
−VZ
tg α
≈
Figure T3.3
(T3.7)−−−−→ without considering the analytic expression of iD in breakdown zone, the
angular coefficient of the geometric tangent in I ′′′D0can be outlined; tg α = gZ =
1
rZ(T3.6)−−−−→ Veq = vD when iD ≈ 0
Zener voltage graphically Veq = −VZ
Zenerresistance
(T3.5),(T3.7)−−−−−−−−→ rZ =1
tg α
Zener diodeequivalentcircuit in
breakdownregion
(T3.5),(T3.6)−−−−−−−−→ vD = −VZ + iDrZ (T3.9)
actually iD is negative
.
.
−+
−VZ
rZ
iD
vD
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Diode as non-linear device 25
Linearpiecewise ap-proximation(LPA) for
diodes
Generally the three linear piecewise are extended for larger values of vD (largesignal conditions)
region condition
(T3.1)−−−−→.
.
I OFF vD = rOFF iD; iD ≈ 0A for Vbr. < vD < Vγ (T3.10)
(T3.5),(T3.7)−−−−−−−−→(T3.6) .
.
II ON vD = Vγ + rON iD for vD > Vγ (T3.11)
LPA for Zenerdiodes
region condition
(T3.10)−−−−−→.
.
I OFF vD = rOFF iD; iD ≈ 0A for −VZ < vD < Vγ
(T3.11)−−−−−→.
.
II ON vD = Vγ + rON iD for vD > Vγ
(T3.8)−−−−→.
.
III Zener vD = −VZ + rZ iD for vD ≤ −VZ (T3.12)
Zener diodeequivalentcircuits
iD
vD
region condition
.
.
I OFF
rOFFiD
vD
−VZ ≤ vD < Vγ
.
.
II ON
Vγ
iD rON
vD
vD ≥ Vγ
.
.
III Zener
iD
vD
vD ≤ −VZ
VZ
iD rZiZ
vD
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Diode as non-linear device 26
How tochoose theright region
.
.
BEGIN
Choose a
region
simpler, but it
could be time
consuming
randomly
Slitly more
complex because
a preliminary
circuit analysis is
required, but less
time consuming
by means of circuit
considerations
Insert in the circuit
the equivalent
circuit associated
with the choosen
region
Solve the linear
circuit obtained after
substitution
Are constraints of
the choosen region
verified?
NO
The right operating
region was choosen
YES
END
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part A1
Diode applications
Rectifier vI ∼ vO
vI
t
⇓vO
t
Bridgerectifier
vI ∼ vO
vI
t
⇓vO
t
Diode applications 28
Rectifier withfilter
vI ∼ vO
vI
t
⇓vO
t
Amplitude-modulation
detector
The circuit schematic is the same of the rectifier with filter but with a differentRC time constant: the RC time constant must be higher compared with the periodof the carrier, and it must be lower compared to the period of the modulated signal.
Zenerregulated
power supply
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Diode applications 29
Zener limiter
vI ∼ vO
vI
t
⇓vO
t−Vγ
VZ
vI ∼ vO
vI
t
⇓vO
t
−(VZ+Vγ)
VZ+Vγ
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part T4
MOSFET device
MOSFET ascapacitor withcapacitance
depending ongate voltage
vG
GATE
OXIDE SiO2
P-SUBSTRATE (BODY)
SUBSTRATEMETAL CONTACT
tox
L
W
L
WGATE
MAP VIEW
1 vG < 0
holes move towards the surface that becomes a zone where electrons can move.
Ceq1=
ǫoxA
tox
tox is the SiO2 thicknessǫox is the SiO2 electrical constantA = L · W is the gate area
vG
GATE
OXIDE SiO2
P-SUBSTRATE (BODY)
SUBSTRATEMETAL CONTACT
tox
L
W
−−−−−−−
2 0 < vG < Vth (Vth ≈ 1V )
Near the surface a depletion charge zone is created (negative ions). In this regionelectrons can’t move.
Ceq2=
ǫ′oxA
tox + tdp vG
GATE
OXIDE SiO2
P-SUBSTRATE (BODY)
SUBSTRATEMETAL CONTACT
tox
L
W
+ + + + +
⊖ ⊖ ⊖ ⊖ ⊖tdp
MOSFET device 31
3 vG ≥ Vth
INVERSION LAYERFree electrons in the p-substrate move towards the surface under the oxide.
Ceq3=
ǫoxA
tox= Ceq1
= Cox
vG
GATE
OXIDE SiO2
P-SUBSTRATE (BODY)
SUBSTRATEMETAL CONTACT
tox
L
W
++++++++++
−−−−−−−−−−til (inversion zone)
Figure T4.1
(T4.1) QINV = −Cox (vG − Vth) = −Cox (vOX − Vth) (vG = vOX)
Ceq
vG
Cox
Ceq2
VT
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
MOSFET device 32
MOSFETdevice
structurewhen
inversion layeris present
x
i(x)
SOURCEn+
DRAINn+
SiS
DiDGATE
B
DEPLETION ZONE
BODY
P-SUBSTRATE
vGS+
vDS+
vBS
+
Figure T4.2
A position on the inversion layer is characterizedby v(x) and i(x) where v(0) = v(S) ≡ 0, further-more iD = iS .
G B
D
S
G
D
S≡Β
Symbols
(T2.4)−−−−→vBS : ”n+ source - p substrate” and ”n+ drain - p substrate” diodes are reversebiased.
Charge in theinversion layer
(T4.1)−−−−−−→Fig. T4.2
Q(x) = −W L ǫox
tox(vOX(x) − VTn
) = −W L C′′ox (vOX(x) − VTn
) (T4.2)
where C′′ox =
ǫox
tox
[F
m2
]
Mediumcharge density
Fig. T4.1−−−−−−→ (T4.3) ρv =Q
W L til
where til is the thickness of the inversion zone (Fig. T4.1).
Current iD
wheninversion layer
is present
i(x) = J(x)W til
where J(x) is the current density.
(T1.9)−−−−→(T4.3)
i(x) =Q
W L tilvd W til =
Q(x)vd
L
(T4.2)−−−−→ i(x) = −W L ǫox
tox(vOX(x) − VTn
)vd
L
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
MOSFET device 33
(T1.7)−−−−→ i(x) = −W ǫox
tox(vOX(x) − VTn
) (−µn E(x))
where µn is the electrons (n carriers) mobility.
(T1.6)−−−−→ i(x) = −Wǫox
tox︸︷︷︸
C′′ox
(vOX(x) − VTn) µn
d v(x)
d x
with
(T4.4) vOX(x) = vGS − v(x) ⇒ v(x) = vGS − vOX(x)
(T4.4)−−−−→ i(x) = −W C′′ox (vGS − v(x) − VTn
)µnd v(x)
d x
i(x)d x = −µn W C′′ox (vGS − v(x) − VTn
) d v(x)
by integrating x from 0 to the channel length L and v(x) from 0 to vDS∫ L
0
i(x)d x = −µn W C′′ox
∫ vDS
0
[(vGS − VTn) − v(x)] d v(x)
iD L = µn W C′′ox
[
(vGS − VTn) vDS − v2
DS
2
]
being i(x) = −iD = constant
(T4.5) iD = kn
(
vGS − VTn− vDS
2
)
vDS
with k′n = µn C′′
ox and kn = k′n
W
L. [kn] =
A
V 2
k′n depends on the technology characteristic.
Validity fieldof (T4.5):
triode region
(T4.4)−−−−→ vOX(x) ≥ VTn
vOX(x) = vGS − v(x) ≥ VTn
v(x) as its maximum for x = L where v(x) = vDS
vGS − vDS ≥ VTn
(T4.6) vDS ≤ vGS − VTn
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
MOSFET device 34
Graphics ofiD vs. vDS intriode region
(T4.5)−−−−→ iD = 0 for
vDS = 0vDS = 2 (vGS − VTn
)
d iDd vDS
= kn [(vGS − VTn) − vDS ] = 0 ⇒ vDS = vGS − VTn
maximum
0 1 2 3 4 5 60
1
2
3
4
5
6
vGS
vDS
i D/k
n
(T4.6)−−−−→ vGS − VTn= vDS
iD =kn
2(vGS − VTn
)2 =kn
2v2
DS
MOSFET asVoltage
ControlledResistor(VCR)
for vDS ≪ vGS − VTnvDS ≈ vGS − VTn
10(T4.5)−−−−→ iD ≈ kn (vGS − VTn
) vDS
vDS
iD=
1
kn (vGS − VTn)
= ReqV CR =1
∂iD∂vDS
∣∣∣∣vDS=0
MOSFET insaturation
region
Fig. T4.3
for vDS ≥ vGS − VTnwhen vDS = vGS − VTn
(T4.4)−−−−→
vOX(0) = vGS
vOX(L) = vGS − vDS = VTn
and
(T4.2)−−−−→ Q(x)|x=L = 0
therefore for x = L the inversion layer thickness is 0 and the current reachesits maximum value.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
MOSFET device 35
POF F
SOURCEn+
DRAINn+
SiS
DiD
GATE
B
DEPLETION ZONE
BODY
P-SUBSTRATE
vGS+
vDS+
vBS
+
Figure T4.3
for vDS > vGS − VTnFind x : vOX(x) = VTn
(T4.4)−−−−→ vOX(x) = vGS − v(x) = VTn⇒ v(x) = vGS − VTn
< vDS
and
(T4.2)−−−−→ Q(x)|x=L = 0
therefore for x = L the inversion layer thickness is 0 and the current reachesits maximum value.
POF F
⊕⊕⊕⊕⊖ ⊖ ⊖
⊖⊖
⊖SOURCE
n+
DRAINn+
SiS
DiD
GATE
B
DEPLETION ZONE
BODY
P-SUBSTRATE
vGS+
vDS+
vBS
+
Figure T4.4
Pinch-offpoint
for x = POFF the inversion layer is depleted, but electrons in POFF can stillreach the drain due the electrical field created by the voltagevDS − VPOF F
= vDS − (vGS − VTn).
⇒ id does not decrease and therefore the current reaches a saturation value.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
MOSFET device 36
Saturationregion
(T4.6)−−−−→ iD =kn
2(vGS − VTn
)2
(T4.7)
vGSVTn
iD
Figure T4.5
MOSFET is avoltage-
controlledcurrent
generator
0 1 2 3 4 5 60
1
2
3
4
5
6
vGS
vDS
i D/k
n
Figure T4.6
Channelmodulation
effect
Actually for vDS ≥ vGS − VTn(saturation region) the inversion layer length is
Lil ≤ L
(T4.7)−−−−→ iD =k′
n
2
W
Lil(vGS − VTn
)2
with Lil ∝1
vDS⇒ L = Lil + ∆L(vDS)
(T4.7)−−−−→ iD =k′
n
2
W
L − ∆L(vDS)(vGS − VTn
)2
(T4.8) iD ≈ k′n
2
W
L︸ ︷︷ ︸
kn
(vGS − VTn)2(1 + λvDS) = kn (vGS − VTn
)2(1 + λvDS)
10−3 < λ < 10−1[V −1
]
Body effect(substratebias effect)
The substrate tension should be kept as lower as possible to avoid the conduction ofdiodes B-S and B-D. When vBS 6= 0, the width of the depletion layer and thereforealso the voltage across the oxide are modified due to a change in the charge of thedepletion region. This results in a different threshold voltage
(T4.9) VTn= VT0 + γ
(√
vSB + 2ΦF −√
2ΦF
)
being ΦF a physical parameter such that 2ΦF = 0.6 Vγ = 0.4 V 1/2 a technology related parameter andVT0 = Vth when vBS = 0.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
MOSFET device 37
Extension top-channelMOSFETs
(T4.5),(T4.8)−−−−−−−−→(T4.9)
SOURCE
p+
DRAIN
p+
SiS
DiDGATE
B
DEPLETION ZONE
BODY
N-SUBSTRATE
vGS+
vDS+
vBS
+
Figure T4.7
G B
D
S
G
D
S≡B
Symbols
• inversion layer is present when vGS < 0 V
• holes (positive charges) produce a current iD < 0 and move from the sourcewhen vGS < 0 V
• Regions S-B and D-B are diodes
• substrate (body) must not conduct then vBS > 0 V (the substrate tensionshould be kept as higher as possible to avoid the conduction of diodes S-B and S-D).
• VTp< 0 V
MOSFET-ptriode current
(T4.10) iSD = kp
(
vSG −∣∣VTp
∣∣ − vSD
2
)
vSD
MOSFET-psaturationcurrent
(T4.11) iSD =kp
2
(vSG −
∣∣VTp
∣∣)2
(1 + λvSD)
MOSFET:limits ofoperation
Due to the MOSFET physical structure, it mainly has the following limits:• Gate oxide breakdown (maximum VGS voltage): the gate oxide thickness (tox) isvery thin (in the order of 100 nm or even less for the technologies), so it can onlysustain a limited voltage. Exceeding this limit can result in destruction of the deviceor in the reduction of its lifetime.
• Maximum VDS voltage: the MOSFET device has a maximum specified drain tosource voltage, beyond which breakdown may occur. Exceeding the breakdownvoltage causes the device to turn on, potentially damaging itself and other circuitelements due to excessive power dissipation.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part T5
Bipolar Junction Transistor (BJT)
BipolarJunctionTransistor
(BJT):physicalstructure
iC iE
iB
C E
B
n n+p
C E
B B-EB-C
⇒
C EB
n
n+
p
Si
tB
n - p - nE - B - C
tB=0.1¥100µm
Figure T5.1
A BJT cannot be considered as two back-to-back diodes due to the thin thickness ofthe base region (tB).
Conductionwhen B-E is
forwardbiased and
B-C is reversebiased
(graphicpicture)
C EB
Energy
x
B - C B - E
Figure T5.2
vBEvCB
C E
B
n n+p
C-B-E: energy bands when the BEjunction is forward biased and the BCjunction is reverse biased.
The forward bias on the BE junc-tion causes electrons to move towardthe base. Some of the electrons willcombine with holes. However, sincethe base region length (tB) is very thinand usually smaller than the electronsdiffusion length (mean length withinwhich electrons combine with holes),the percentage of combined electrons isvery small. Thus, most of the electronsreach the boundary of the BC depletionregion. Because the collector is morepositive than the base (the BC junctionis reverse biased), these electrons aredragged into the collector across theBC depletion region.
Bipolar Junction Transistor (BJT) 39
BJT currentwhen
vBE 6= 0and
vBC = 0vBE
C E
B
n n+p
iE
iB
iF
vCB
iC
n-p-n BJT
C
E
B
iC = iF
iB currentwhen vBE 6= 0and vBC = 0
(T5.1) iB =iFβF
20 < βF < 500
iC currentwhen vBE 6= 0and vBC = 0
iF = iC
(T2.4)−−−−→ iC ≈ IS
(
evBE/VT − 1)
(T5.2) forward transport current
iE currentwhen vBE 6= 0and vBC = 0
iE = iC + iB
(T5.3) iE =βF + 1
βFIS
(
evBE/VT − 1)
BJT currentwhen
vBE = 0and
vBC 6= 0vBE
C E
B
n n+p
iE
iB
iR
vCB
iC
iE = −iR
iB currentwhen vBE = 0and vBC 6= 0
(T5.1)−−−−→ iB =iRβR
(T5.4) 0 < βR < 20
iE currentwhen vBE = 0and vBC 6= 0
iR = −iE
(T5.2)−−−−→ iR ≈ IS
(
evBC/VT − 1)
(T5.5) inverse transport current
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Bipolar Junction Transistor (BJT) 40
iC currentwhen vBE = 0and vBC 6= 0
iC = −iR − iB
(T5.3)−−−−→ iC = −βR + 1
βRIS
(
evBC/VT − 1)
(T5.6)
BJT currentwhen
vBE 6= 0and
vBC 6= 0
(T5.2)−−−−→(T5.6)
iC = IS
(
evBE/VT − 1)
− βR + 1
βRIS
(
evBC/VT − 1)
iC = IS
(
evBE/VT − evBC/VT
)
− IS
βR
(
evBC/VT − 1)
iC currentwhen vBE 6= 0and vBC 6= 0
(T5.5)−−−−→ iC = iT − iRβR
(T5.7)
iE currentwhen vBE 6= 0and vBC 6= 0
(T5.3)−−−−→(T5.5)
iE = ISβF + 1
βF
(
evBE/VT − 1)
− IS
(
evBC/VT − 1)
iE = IS
(
evBE/VT − evBC/VT
)
+IS
βF
(
evBE/VT − 1)
(T5.2)−−−−→ iE = iT +iFβF
(T5.8)
iB currentwhen vBE 6= 0and vBC 6= 0
iB =iRβR
+iFβF
iB =IS
βR
(
evBC/VT − 1)
+IS
βF
(
evBE/VT − 1)
(T5.9)
BJTnon-linear
circuit model:transport
model
(T5.1),(T5.7)−−−−−−−−→(T5.4),(T5.9)
C E
B
iC iE
iB
iT
iF¯F
iR¯R
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Bipolar Junction Transistor (BJT) 41
ForwardActive Region
(FAR)
vBE ≥ Vγ vBC ≤ 0
(T5.7)−−−−→ iC ≈ ISevBE/VT +IS
βR≈ ISevBE/VT
(T5.8)−−−−→ iE ≈ ISevBE/VT +IS
βFevBE/VT ≈ βF + 1
βFiC
(T5.9)−−−−→ iB ≈ − IS
βR+
IS
βFevBE/VT ≈ iC
βF
(T5.10)
ReverseActive Region
(RAR)
vBC ≥ Vγ vBE ≤ 0
(T5.7)−−−−→ iC ≈ −ISevBC/VT − IS
βRevBC/VT
iC ≈ −ISβR + 1
βRevBC/VT ≈ βR + 1
βRiE
(T5.8)−−−−→ iE ≈ −ISevBC/VT − IS
βF≈ −ISevBC/VT
(T5.9)−−−−→ iB ≈ IS
βRevBC/VT − IS
βF≈ − iE
βR
BJT:Saturation
Region (SR)
vBE ≥ Vγ1 vBC ≥ Vγ2
Usually Vγ1 > Vγ2 due to different doping concentrations in the emitter andcollector regions.
(T5.7)−−−−→ iC ≈ ISevBE/VT
(T5.8)−−−−→ iE ≈ ISβF + 1
βFevBE/VT
(T5.9)−−−−→ iB ≈ IS
βFevBE/VT +
IS
βRevBC/VT
vCE = −vBC + vBE ≈ 0.2 V
iBSAT> iBF AR
iBSAT>
iCβF
(T5.11) iCSAT= βFORCED · iBSAT
βFORCED < βF
BJT:InterdictionRegion (IR)
vBE ≤ −4VT vBC ≤ −4VT 4VT ≈ 0.1 V at T = 25C
(T5.7)−−−−→ iC ≈ IS
βR
(T5.8)−−−−→ iE ≈ − IS
βF
(T5.9)−−−−→ iB ≈ − IS
βF− IS
βR
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Bipolar Junction Transistor (BJT) 42
Graphicspictures of iC
vs. iB andvCE in FAR
C
E
B
iC
iE
iB
vBE
vCE
vCE = −vBC + vBE
FAR: vBE + vCB = vCE ⇒ 0.7 V + vCB = vCE
(T5.10)−−−−−→1 mA
0.7 V vBE
iC
1 µA0.7 V vBE
iB
vCE
iC
20 µARAR
iB
vCE
iC
0.7 V 5 V
FARSAT
iB1 mA
RAR
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Bipolar Junction Transistor (BJT) 43
Early effect
When the forward active region is considered, given vBE , increasing vCE increasesthe reverse voltage on the collector-base junction and thus increases the width of thecollector-base depletion region. Accordingly, the effective base length decreases andthus the percentage of electrons that can reach the collector-base junction increases.Since (given vCB) the collector current is proportional to the percentage of electronsable to reach the collector-base junction, the increased amount of electrons leads toa greater collector current. This is the Early effect.This effect can be accounted for by including a factor in the collector current in (T5.10)
(T5.12)
iC ≈ ISevBE/VT
(
1 +vCE
VA
)
iB ≈ IS
βFevBE/VT
iE = iC + iB
where VA is the Early tension.
vCE
iC
−VA
BJT physicallimits
• Maximum reverse voltage (vBC in FAR, vBE in RAR)• Maximum power dissipation (iC · vCE)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part T6
MOSFET and BJT as non-linear devices
MOSFET:LPA withvBS = 0 in
triode region
MOSFET as a non-linear device
1) Triode region vDS ≤ vGS − VTn
The Taylor series of (T4.5) in a neighborhood of iD = ID, vDS = VDS , vGS = VGS
is
(T4.5)−−−−→ iD = ID +∂iD∂vGS
∣∣∣∣VDS , VGS
∆vGS +∂iD
∂vDS
∣∣∣∣VGS , VDS
∆vDS + . . .
iD = ID + knVDS∆vGS + kn (VGS − VTn− VDS)∆vDS + . . .
If components of order higher than the first can be neglected then
(T6.1) iD = ID + gmvgs + g0vds
where, by definition,
∆vDS = vds ∆vGS = vgs
gm = knVDS g0 = kn (VGS − VTn− VDS)
iD = ID︸︷︷︸
biasing
+ gmvgs + g0vds︸ ︷︷ ︸
linear behavior
= ID + id
MOSFET and BJT as non-linear devices 45
MOSFET:LPA withvBS = 0 insaturation
region
2) Saturation region vDS > vGS − VTn
The Taylor series of (T4.8) in a neighborhood of iD = ID, vDS = VDS , vGS = VGS
is
(T4.8)−−−−→iD = ID + kn (VGS − VTn
) (1 + λVDS)∆vGS +kn
2(VGS − VTn
)2λ∆vDS
+1
2kn (1 + λVDS)∆v2
GS + λkn (VGS − VTn)∆vGS∆vDS + . . .
by defining
vgs = ∆vGS vds = ∆vDS
(T6.2) gm = kn (VGS − VTn) (1 + λVDS) =
2ID
VGS − VTn
g0 =kn
2(VGS − VTn
)2λ =
λID
1 + λVDS
if components of order higher than the first can be neglected then
(T6.3) iD = ID + gmvgs + g0vds
iD = ID︸︷︷︸
biasing
+ gmvgs + g0vds︸ ︷︷ ︸
linear behavior
= ID + id
Geometricinterpretation
of g0
0 1 2 3 4 5 60
1
2
3
4
5
VDS
ID
vDS
i D/k
n
vGS
Figure T6.1
g0 =∂iD
∂vDS
∣∣∣∣VGS
≈ ∆iD∆vDS
∣∣∣∣VGS
Geometricinterpretation
of gm
vGSVTn
iD
VGS
vDS
ID
Figure T6.2
gm =∂iD∂vGS
∣∣∣∣VDS
≈ ∆iD∆vGS
∣∣∣∣VDS
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
MOSFET and BJT as non-linear devices 46
MOSFET:LPA
conditions insaturation
region (smallsignal)
If kn (VGS − VTn) (1 + λVDS)∆vGS ≫ 1
2kn (1 + λVDS)∆v2
GS , iD can be represented
by a linear function. The previous condition leads to
∆vGS ≪ 2 (VGS − VTn) ⇒ ∆vGS ≤ 2
10(VGS − VTn
)
(T6.4) ∆vGS ≤ 1
5(VGS − VTn
)
MOSFETequivalent
circuit for id
(T6.5)
id = gmvgs + g0vds
ig = 0⇒
.G
S
D
gm vgs 1
g0
id
MOSFETequivalent
circuit whenvBS 6= 0
(T4.8),(T4.9)−−−−−−−−→(T6.3)
iD = ID (VGS , VDS , VBS) + id
(T6.6) id = gmvgs + g0vds + gmbvbs
.G
S
D B
gm vgs1
g0
gmb vbs
id
Figure T6.3
Evaluation ofiD by means
of circuittheory
Being the circuit related to the linear iD, it can also be evaluated by means of thesuperposition principle:
(T6.7)
.
circuit 1 ID = iD when id = 0
circuit 2 id = iD when ID = 0
.
linear-circuit⇒ analysis laws
can be used
MOSFETparasitic
capacitances:triode region
(T4.1),(T6.3)−−−−−−−−−−→(T6.6),Fig. T6.3
MOSFET equivalent circuit under small-signal condition (in-put signals have “small” variations with respect to the biasingpoint) must be completed to take into account capacitive ef-fects intrinsic in the MOSFET physical structure.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
MOSFET and BJT as non-linear devices 47
Fig. T4.2−−−−−−→(T4.5)
SOURCEn+
DRAINn+
S DGATE
B
BODY
P-SUBSTRATE
Lov Lov
CGchannel = Cox = C′′oxA
(T6.8) CGS = CGD =1
2C′′
oxWL
Due to the MOSFET technology process, source and drain diffusions extend by Lov
below the thin oxide (lateral diffusion) giving rise to overlap capacitances equal toCov = WC′
ov where C′ov = LovC
′′ox
(T6.8)−−−−→ CGS = CGD =1
2C′′
oxWL + WC′ov (T6.9)
(T2.5)−−−−→ CDB, CSB (transaction capacitances across the inverse-biased junction B-Dand B-S)
MOSFETparasitic
capacitances:saturation
region
Fig. T4.3−−−−−−→(T4.7)
SOURCEn+
DRAINn+
S DGATE
B
BODY
P-SUBSTRATE
Lov Lov
(T6.8)−−−−→
CGS ≈ 2
3C′′
oxWL + WC′ov
CGD = WC′ov
(T6.10)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
MOSFET and BJT as non-linear devices 48
MOSFETlinear
equivalentcircuit in high
frequencycondition
G
S
D
B
g0
CSB
1gmvgs gmbvbs
CGS
CDB
CGD
Figure T6.4
When canparasitic
capacitors beneglected?
When the input signal frequency f is such that
(T6.11)1
2πf≪10
RsCx1
2πf≫10
RpCx (T6.12)
vo =Rsvx
Rs +1
j2πfCxvo
CX
Rsvx
∣∣∣∣
vo
vx
∣∣∣∣=
∣∣∣∣
j2πfCxRs
1 + j2πfCxRs
∣∣∣∣=
2πfCxRs√
1 + (2πfCxRs)2
(T6.11)−−−−−→∣∣∣∣
vo
vx
∣∣∣∣=
2πfCxRs√
1 + (2πfCxRs)2≈ 1 for
1
2πfCx≪ Rs (T6.13)
io = ix
1
j2πfCx
1
j2πfCx+ Rp
io
CX Rpix
∣∣∣∣
ioix
∣∣∣∣=
∣∣∣∣
1
1 + j2πfCxRp
∣∣∣∣=
1√
1 + (2πfCxRp)2
(T6.12)−−−−−→∣∣∣∣
ioix
∣∣∣∣=
1√
1 + (2πfCxRp)2≈ 1 for
1
2πfCx≫ Rp (T6.14)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
MOSFET and BJT as non-linear devices 49
BJT: LPA
BJT as non-linear device
(T6.1)−−−−→ By applying to equation (T5.12) the same procedure used for MOSFET( pag. 44) we have that the Taylor series of (T5.12) in a neighborhood of iC = IC ,iB = IB , vBE = VBE vCE = VCE is
(T6.15)
iC = IC︸︷︷︸
biasing
+ gmvbe + g0vce︸ ︷︷ ︸
linear behavior
iB = IB︸︷︷︸
biasing
+ gπvbe︸ ︷︷ ︸
linear behavior
where
(T6.16) gm =∂iC
∂vBE
∣∣∣∣vCE
=IC
VT
(T6.17) g0 =∂iC
∂vCE
∣∣∣∣vBE
=ISevBE/VT
VA=
IC
VA + VCE
(T6.18) gπ =diB
dvBE=
IC
VT βF=
gm
βF
(T6.16)−−−−−→(T6.18)
βF =gm
gπ= gmrπ
(
gπ =1
rπ
)
BJTequivalent
circuit
(T6.15)−−−−−→
ic = gmvbe + g0vce
ib = gπvbe
(T6.19)
Equivalent circuit
B
E
C
r0
gmvbe
ic
r¼
ib
Figure T6.5
BJT:Evaluation ofic and ib by
circuit theory
(T6.15)−−−−−→(T6.7)
IC = iC when ic = 0
IB = iB when ib = 0
biasing
ic = iC when IC = 0
ib = iB when IB = 0
small signal
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
MOSFET and BJT as non-linear devices 50
BJT: LPAconditions inFAR region
(small signal)
(T6.15)−−−−−→(T6.4)
In analogy with the LPA conditions for MOSFET, the linear approximation
can be accepted if
(T6.20) ∆vBE = vbe ≤ 2
10VT = 5 mV
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part N1
Basics of Electrical TheorySee [?], [?], [?]
Quadripoles
Two-port networks (Quadripoles)
Definitions
A Quadripole is an electricalcircuit or device with two coupleof terminals called input andoutput terminals.VI = V1 − V1′ is the inputvoltage,VO = V2 − V2′ is the outputvoltage,I1, I1′ are the input currentsandI2, I2′ are the output currents.Note that voltagesV1, V1′ , V2, V2′ are referredto the ground node and thatcurrents I1, I1′ , I2, I2′ are con-ventionally taken as shown inthe figure.
INPUT TERMINALS
QuadripoleVI
I1
VO
I21
1’
2
2’
I1’I2
OUTPUT TERMINALS
Differentialinput
The quadripole has a differential inputwhen ports 1 and 1’ are controlled bytwo independent voltage (or current)generators.
Quadripole
1
1’
VI1
ZS1
VI2
ZS2
Single input
The quadripole is said to have a singleinput when one of the two input ports(port 1’ for example) is wired to groundand the other one (port 1 for example)is controlled by an independent voltage(or current) generator.
Quadripole
1
1’
VI1
ZS1
Basics of Electrical Theory 52
Differentialoutput
The quadripole has a differential output if none of the output terminals isdirectly connected to ground.
Quadripole
2
2’
ZO1
ZO2
Quadripole
2
2’
ZO
Single output
The quadripole has a single output if atleast one of the two output ports (port2’ for example) is wired to ground.
Quadripole
2
2’
ZO
Single-input,single-output
linearquadripoles
A quadripole is said to be linear when the relationship between input andoutput electrical variables can be written with linear equations. There aremany ways to describe a linear quadripole, but the most common is the so calledZ-parameters (impedance parameters), usually expressed in matrix notation:
(N1.1)
(VI
VO
)
=
(Z11 Z12
Z21 Z22
) (II
IO
) VI = Z11 · II + Z12 · IO
VO = Z21 · II + Z22 · IO
where
(N1.2) Z11 =VI
II
∣∣∣∣IO=0
Z12 =VI
IO
∣∣∣∣II=0
Z21 =VO
II
∣∣∣∣IO=0
Z22 =VO
IO
∣∣∣∣II=0
(N1.3)
VI
VO
QuadripoleII
VO
VI
Quadripole IO
The quadripole is said to be reciprocal if Z12 = Z21. Note thatZ11, Z12, Z21, Z22 are function of s in the Laplace domain, are phasors insinusoidal steady state, and in the special case when the frequency tends tozero they are constant (DC condition).
Input andoutput
impedances
Let us consider a quadripole with avoltage (current) generator ES (IS)at its input and loaded with animpedance ZL. Let the internal gen-erator impedance be ZS.
QuadripoleES
2
2’
1
1’
ZS
ZL
We call input impedance ZI , the equiv-alent impedance seen from the inputterminals when the output terminalsare loaded with ZL.
II
ZI
QuadripoleVI
1
1’
2
2’
ZL
Analogously, we call output impedanceZO, the equivalent impedance seenfrom the output terminals whenthe input generator is set to zero(ES=0 V, IS=0 A).
IO
ZO
Quadripole VO
2
2’
1
1’
ZS
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basics of Electrical Theory 53
Voltage,current andpower gains
The voltage gain is defined as: AV =VO
VIGV = AV |dB = 20 log (|AV |)
The current gain is defined as: AI =IO
IIGI = AI |dB = 20 log (|AI |)
The power gain is defined as: AP =PO
PIGP = AP |dB = 10 log (|AP |)
Pay attention to the definition of GP : it has a 10 instead of a 20 because AP
is the square of a gain.
Differential-input
single-outputlinear
quadripoles
When a quadripole has a differential input, the input generators and theirinternal impedances can be substituted by two generators producing the samevoltages at nodes 1 and 1’:
I1
QuadripoleVI V
O
1
1’
2
2’
V1
V2
I1’
IO
Figure N1.1
When the quadripole is linear, by means of the superposition principle we canwrite:
VO = A1 · V1 + A2 · V2
However this writing does not emphasize on the VO dependence on the real in-put voltage, i.e. the difference V1−V1′ , therefore other notations are introducedin the following sections.
Commonmode anddifferential
mode voltages
A differential input can be seen as the weighed sum of two different voltagescalled differential mode voltage and common mode voltage defined as:
VDM = V1 − V1′ VCM = (V1 + V1′) /2
With these definitions we can write (see Fig. N1.1):
(N1.4) V1 =VDM
2+ VCM V1′ = −VDM
2+ VCM
QuadripoleVID
VICM
VID
/2
-VID
/2
VO = (A1 − A2)VDM
2+ (A1 + A2)VCM (N1.5)
Commonmode anddifferentialmode gains
To simplify the above VO notation we define:
Differential mode gain: ADM =A1 − A2
2
Common mode gain: ACM = A1 + A2
Therefore
(N1.5)−−−−→ VO = ADMVDM + ACMVCM (N1.6)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basics of Electrical Theory 54
Common-mode
rejection ratio
The common-mode rejection ratio (CMRR) of a differential-input single-outputquadripole is the ability of the quadripole to reject input signals common toboth input terminals. A high CMRR is important in applications where thesignal of interest is represented by a small voltage fluctuation superimposedon a voltage offset, or when the signal of interest is in the difference betweeninputs [?], [?].
(N1.7) CMRR =
∣∣∣∣
ADM
ACM
∣∣∣∣
A high CMRR means that the differential mode gain is greater than the com-mon mode gain.
Differentialmode andcommon
mode inputimpedance
Assuming that the quadripole is loaded with the impedance ZL
QuadripoleVID
VICM
VID
/2
-VID
/2
ZLV
O
the differential mode input impedance is defined as
RIDM =VDM
IDMZL
QuadripoleVID
IID
and the common mode input impedance is defined as
RICM =VCM
ICM
ZL
Quadripole
VICM
IICM
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basics of Electrical Theory 55
UnidirectionalLinear
Amplifier
A unidirectional linear amplifier is a linear quadripole working in only one direction,from input to output terminals. In other words, this means that a change in the inputelectrical variables produces a change in the output electrical variables, whereas achange in the output electrical variables does not produce any changes in the inputelectrical variables:
(N1.1)−−−−→(
VI
VO
)
=
(Z11 0Z21 Z22
) (II
IO
)
⇒
VI = Z11 · II
VO = Z21 · II + Z22 · IO(N1.8)
From input terminals, a unidirectional linear amplifier is simply seen as the impedanceZ11. From output terminals, it can be modeled with Thevenin or Norton theorems.Accordingly, there are four possible combinations:
Signal source generator
Outp
ut
equiv
alen
t
voltage current
A _ VI
ZO
ZI VIZ _ II
ZO
ZI
II
ZI VIY _ VI ZO ZI
II
A _ II ZO
vol
tage
curr
ent
Voltageamplifier
A _ VI
ZO
ZI VI
Figure N1.2
(N1.2),(N1.3)−−−−−−−−−−→(N1.8),Fig. N1.2
ZI =VI
II= Z11, ZO =
VO
IO
∣∣∣∣II=0
= Z22, A =VO
VI
∣∣∣∣IO=0
=Z21
Z11(N1.9)
(N1.9)−−−−→(
VI
VO
)
=
(ZI 0
A · ZI ZO
) (II
IO
)
(N1.10)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basics of Electrical Theory 56
Trans-impedanceamplifier
(current-to-voltage
converter)
Z _ II
ZO
ZI
II
Figure N1.3
(N1.2),(N1.3)−−−−−−−−−−→(N1.8),Fig. N1.3
ZI =VI
II= Z11, ZO =
VO
IO
∣∣∣∣II=0
= Z22, Z =VO
II
∣∣∣∣IO=0
= Z21 (N1.11)
(N1.11)−−−−−→(
VI
VO
)
=
(ZI 0Z ZO
) (II
IO
)
(N1.12)
Trans-conductance
amplifier(voltage-to-
currentconverter)
ZI VIY _ VI ZO
Figure N1.4
(N1.2),(N1.3)−−−−−−−−−−→(N1.8),Fig. N1.4
ZI =VI
II= Z11, ZO =
VO
IO
∣∣∣∣II=0
= Z22, Y =IO
VI
∣∣∣∣VO=0
= − Z21
Z22 · Z11(N1.13)
(N1.13)−−−−−→(
VI
VO
)
=
(ZI 0
−Y · ZI · ZO ZO
) (II
IO
)
(N1.14)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basics of Electrical Theory 57
Currentamplifier
ZI
II
A _ II ZO
Figure N1.5
(N1.2),(N1.3)−−−−−−−−−−→(N1.8),Fig. N1.5
ZI =VI
II= Z11, ZO =
VO
IO
∣∣∣∣II=0
= Z22, A =IO
II
∣∣∣∣VO=0
= −Z21
Z22(N1.15)
(N1.15)−−−−−→(
VI
VO
)
=
(ZI 0
−A · ZO ZO
) (II
IO
)
(N1.16)
Maximumvoltage
transfer to theinput
impedance
Given the Thevenin equivalent of an input source with VS and ZS , how do we delivermaximum voltage to the input impedance?
ZI VI
VS
ZS
ZL
Figure N1.6
(N1.17) VI =ZI
ZI + ZSVS ⇒ VI ≤ VS ⇒ max (VI) = VS when |ZI | ≫ |ZS |
Maximumcurrent
transfer to theinput
impedance
Given the Norton equivalent of an input source with IS and ZS , how do we delivermaximum current to the input impedance?
ZI
II
ISZS ZL
Figure N1.7
(N1.18) II =ZS
ZI + ZSIS ⇒ II ≤ IS ⇒ max (II) = IS when |ZI | ≪ |ZS |
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basics of Electrical Theory 58
Maximumvoltage
transfer to theload
Given the Thevenin equivalent of the amplifier output with VT and ZT , how do wedeliver maximum voltage to the load ZL?
II
ZLVI
VT
ZT
VO
Figure N1.8
(N1.19) VO =ZL
ZL + ZTVT ⇒ VO ≤ VT ⇒ max (VO) = VT when |ZL| ≫ |ZT |
Maximumcurrent
transfer to theload
Given the Norton equivalent of the amplifier output with IN and ZN , how do wedeliver maximum current to the load ZL?
II
ZLVI
IN ZN
IO
Figure N1.9
(N1.20) IO =ZN
ZN + ZLIN ⇒ IO ≤ IN ⇒ max (IO) = IN when |ZL| ≪ |ZN |
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basics of Electrical Theory 59
Maximumvoltage
transfer fromthe input to
the load
Given the Thevenin equivalent of an input source with VS and ZS and theThevenin equivalent of the amplifier output with VT = A · VI and ZT = ZO (i.e., avoltage amplifier), how do we deliver maximum voltage from the input to the load ZL?
ZI VI
VS
ZS
ZL
ZO
VOA _ VI
Figure N1.10
(N1.17)−−−−−→(N1.19)
|ZI | ≫ |ZS | and |ZO| ≪ |ZL| (N1.21)
(N1.21)−−−−−−−−−−→(N1.17),(N1.19)
AV =VO
VS=
ZI
ZI + ZS︸ ︷︷ ︸
≈1
AZL
ZL + ZO︸ ︷︷ ︸
≈A
≈ A (N1.22)
Maximumcurrent
transfer fromthe input to
the load
Given the Norton equivalent of an input source with IS and ZS and the Nortonequivalent of the amplifier output with IN = A · II and ZN = ZO (i.e., a currentamplifier), how do we deliver maximum current from the input to the load ZL?
ZL
A _ II ZOZI
II
ISZS
IO
Figure N1.11
(N1.18)−−−−−→(N1.20)
|ZI | ≪ |ZS | and |ZO| ≫ |ZL| (N1.23)
(N1.23)−−−−−−−−−−→(N1.18),(N1.20)
AI =IO
IS=
ZS
ZS + ZI︸ ︷︷ ︸
≈1
AZO
ZO + ZL︸ ︷︷ ︸
≈A
≈ A (N1.24)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basics of Electrical Theory 60
The Millertheorem
The Miller theorem
Consider the generic circuit in Fig. N1.12 and let beZ the equivalent impedance seen between nodes A
and B.When the circuit is bidirectional, it is always possibleto split Z into two impedances ZA and ZB connectedbetween nodes A and B, respectively. The obtainedcircuit (Fig. N1.13) is equivalent to the original cir-cuit if and only if
(N1.25)
ZA = Z1
1 − k
ZB = Zk
k − 1
k =VB
VA
being k is called the Miller factor is equal to thevoltage gain between nodes B and A.NOTE: If the circuit is not bidirectional (VB/VA 6=VA/VB) it is possible to use the Miller theorem butit is valid only in one direction.
A B
Z
Figure N1.12
A BZA ZB
Figure N1.13
Millertheorem
demonstration
Circuits in Fig. N1.14 are electrically equivalent only if there are no changes inthe electrical variables. In others words they are equivalent if node voltages VA
and VB are unchanged, and if the current flowing out of the node A is the sameof that flowing in of the node B and if both are equal to the current flowing inof impedance Z.
A BZA ZB
IA IB
A B
Z
IAB
Figure N1.14
(N1.26)
k =VB
VA
IAB =VA − VB
Z= VA
1 − k
Z= VB
1/k − 1
Z
IA =VA
ZA= IB = −VB
ZB
For the circuits equivalence we must have IAB = IA and IAB = IB, thus
(N1.26)−−−−−→
VA − VB
Z=
VA
ZA⇒ 1 − k
Z=
1
ZA⇒ ZA = Z
1
1 − k
VA − VB
Z= −VB
ZB⇒ 1/k − 1
Z=
−1
ZB⇒ ZB = Z
k
k − 1
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basics of Electrical Theory 61
Miller effectfor capacitors
When Z is the impedance of a capacitor C, i.e. Z =1
sC, equations (N1.25) simplify
to
(N1.27)
ZA =1
sC (1 − k)=
1
sCA
ZB =k
sC (k − 1)=
1
sCB
this means that the capacitor C can be split into two capacitors with capacitancesCA = C (1 − k) and CB = C (1 − 1/k). When k < 0, CA and CB are greater than C
and for high values of |k| we have CB ≈ C. The effective increment of CA is usuallyreferred to as Miller effect.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part A2
Single stage MOSFET and BJTconfigurations
Commonsource (CS)
MOSFET single stage amplifiers
(T6.3)−−−−→(T6.7)
G
S
D
B
RD
RS
Rg
-VSS
VDD
vo
vi
Figure A2.1
iD = ID + idID depends on VDD and on − VSS
id depends on vi
Single stage MOSFET and BJT configurations 63
CS: biasing
ID can be calculated when vi = 0
G
S
D
RD
RS
Rg
-VSS
VDD
ID
IG
Figure A2.2
Hp: MOSFET in saturation region
VGS = VSS − IDRS
VDD = (RD + RS) ID + VDS − VSS
ID =kn
2(VGS − VTn
)2 (1 + λVDS)
λ ≤ 0.1 ⇒ (1 + λVDS) ≈ 1
(A2.1)
• ANALYSIS PROBLEM
Given: Find:RD, RS , Rg
VDD, VSS ID, VGS , VDS
kn, VTn
• DESIGN PROBLEM
Given: Find:Rg, ID
VGS , VDS RS , RD, VDD, VSS
kn, VTn
(A2.1)−−−−→ 3 equations and 3 un-known variables: solve the system,verify the validity of the saturationregion hypothesis.
(A2.1)−−−−→ 3 equations and 4 un-known variables: 1 more constraint isissued or 1 more variable is specified.Solve the system, verify the validity ofthe saturation region hypothesis.
Sensitivity(definition)
Consider the generic multivariable function G(x, y, z, . . .), the sensitivity of G withrespect to variations of x (∆x) is defined as
(A2.2) SxG =
x
G
∆G
∆x
where x/G is a normalizing factor (the sensitivity is dimensionless) and ∆G/∆x isthe ratio between the variation on G caused by the variation of x and the variation ofx itself. When ∆x is sufficiently small then the sensitivity can be approximated with
(A2.3) SxG =
x
G
∂G
∂x
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Single stage MOSFET and BJT configurations 64
CS: Thedesign
problem
Concerning the “DESIGN PROBLEM” a constraint can be issued by setting themaximum sensibility of ID when VTn
can vary from its nominal value.
(T4.8)−−−−−−→Fig. T6.2
BC
A
VSS/RS
VSS
∆ID
VTminVTn
VTmaxvGS
iD
Figure A2.3
A = IDA, VGSA
B = IDB
, VGSB
C = IDC= ID, VGSC
= VGS
(A2.3)−−−−→ SVTn
ID=
VTn
ID
∂ID
∂VTn
(A2.1)−−−−→ ∂ID
∂VTn
= kn (VGS − VTn) (1 + λVDS)
∂ (VGS − VTn)
∂VTn
∂ID
∂VTn
=2ID
VGS − VTn
∂ (VSS − IDRS − VTn)
∂VTn
=2ID
VGS − VTn
(
0 − ∂ID
∂VTn
RS − 1
)
∂ID
∂VTn
=−2ID
2IDRS + VGS − VTn
⇒ SVTn
ID=
−2VTn
2IDRS + VGS − VTn
hence
∣∣∣S
VTn
ID
∣∣∣ ≤ p ⇒ RS ≥ 1
p
VTn
ID− 1
2
VGS − VTn
ID.
But VGS > VTnand VDS > VGS − VTn
when the MOSFET is in saturationregion, therefore
(A2.1)−−−−→ RS <VSS − VTn
IDand RS <
VDD + VSS − VGS + VTn
ID− RD
therefore
1
p
VTn
ID− 1
2
VGS − VTn
ID≤ RS < min
(VSS − VTn
ID,VDD + VSS − VGS + VTn
ID− RD
)
CS:Small-signal
(LPA)equivalent
circuit
id is evaluated when VDD = VSS = 0 and, as discussed above, if vgs ≤ 1
5(VGS − VTn
)
MOFSET equations for saturation region can be linearized by means of the Taylorapproximation.
.
G
S
D
B
g0
RS
Rg
vi
1gmvgs gmbvbs
RD
MOSFET equivalent circuit
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Single stage MOSFET and BJT configurations 65
CS: Nortonequivalent
circuit
By applying Norton theorem
G
S
D≡B
g0
RS
Rg
1gmvgs gmbvbs
ieq
vds=vbs
vivg=
B≡D
gmb
1
ieq = gmvgs + vds (g0 + gmb)
vgs = vi − ieqRS
vds = −ieqRS
ieq = gm (vi − ieqRS) − ieqRS (g0 + gmb)
ieq [1 + RS (gm + gmb + g0)] = gmvi
(A2.4) ieq =gmvi
1 + (gm + gmb + g0)RS
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Single stage MOSFET and BJT configurations 66
CS: equivalentconductance
vbs = vgs
g′out =ixvx
ix = (gm + gmb) vgs + g0vds
vx = vds + ixRS
vgs = −vsg = −ixRS
S
D
B≡G
g0
RS
1gmvgs gmbvbs
vx
ix
gout
g′m = gm + gmb
g′out =−g′mixRS + g0vx − g0ixRS
vx
g′out =− (g′m + g0) ixRS + g0vx
vx
g′out = − (g′m + g0) g′outRS + g0
g′out [1 + (g′m + g0)RS ] = g0 ⇒ g′out =g0
1 + (gm + gmb + g0)RS
S
D
1ieq
goutvo⇒
S
D
1ieq
goutRD vo
(A2.5) gout = g′out +1
RD=
g0
1 + (gm + gmb + g0)RS+ GD
CS: voltageamplification
(A2.4)−−−−→(A2.5)
vo = − ieq
gout= −
gmvi
1 + (gm + gmb + g0)RSg0
1 + (gm + gmb + g0)RS+ GD
(A2.6)vo
vi= − gm
g0 + GD + (gm + gmb + g0)RSGD
CS:simplifyinghypotheses
• RS = 0 ⇒ vbs = 0gout = g0 + GD
(A2.6)−−−−→ vo
vi= − gm
g0 + GD(A2.7)
• RS = 0g0 = 0
⇒ vbs = 0gout = GD
(A2.6)−−−−→ vo
vi= −gmRD (A2.8)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Single stage MOSFET and BJT configurations 67
CS:estimation ofthe maximum
voltageamplification
(T6.2)−−−−→(A2.8)
vo
vi= −gmRD = − 2ID
VGS − VTn
RD
(A2.1)−−−−→ VDD + VSS = RDID + VDS
Under the hypothesis of balanced output swing (i.e., the output signal has thesame up and down voltage excursion range)
RDID = VDS =VDD + VSS
2
(A2.9) |gmRD| =VDD + VSS
VGS︸︷︷︸
=2
− VTn︸︷︷︸
≈1
≈ VDD + VSS
It was chosen VGS = 2 because this value makes (A2.9) maximum and gives a “safe”MOSFET bias point.
Commondrain (CD)
G
S
DB
RS
Rg
-VSS
VDD
vo
vi
-VSS
Figure A2.4
CD: biasing
(A2.1)−−−−→ Same as CS
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Single stage MOSFET and BJT configurations 68
CD:small-signalequivalent
circuit
G S
B≡D
g0
Rs
vi1
gmvgs gmbvbs RS
gmb
1
CD:short-circuit
id = ieq
By applying Norton theorem
(A2.10) ieq = gmvi
CD: outputequivalent
conductance
g′0 = g0 + gmb
(A2.11) gout =1
rout=
ixvx
= gm + g′0
S
G≡B≡D
g0
1gm
1vx
ix
gout
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Single stage MOSFET and BJT configurations 69
CD: voltageamplification
S
RS1 vo
io
gout
gmvi
vo = gmvireq
req = RS//rout =routRS
rout + RS=
1
goutRS
1
gout+ RS
=RS
1 + goutRS
(A2.12)vo
vi= gmreq =
gmRS
1 + goutRS
g0 +gmb ≪ gm ⇒ gout ≈ gm ⇒ vo
vi≈ gmRS
1 + gmRSio =
vo
RS≈ gm
1 + goutRSvi
Common gate(CG) G
S
DB
RS
RD
-VSS
VDD
vo-VSS
is
CG: biasing(A2.1)−−−−→ Same as CS
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Single stage MOSFET and BJT configurations 70
CG:small-signalequivalent
circuit
g′m = gm + gmbS
G≡B
g0 RD
1gmvgs
is
id
RS
D
CG:short-circuit
id = ieq
By applying Norton theorem
ieq = g′mvgs + g0vds
vds = vgs
ieq = (g′m + g0) vgs
vsg = (is + ieq)RS
vgs = −vsg
ieq [1 + (g′m + g0)RS ] = − (g′m + g0) RSis
(A2.13) ieq =− (g′m + g0)RS
1 + (g′m + g0)RSis
S
G≡B
g0
1gmvgs
isRS
D
ieq
ieq
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Single stage MOSFET and BJT configurations 71
CG: outputequivalent
conductance
gout =ixvx
ix = g′mvgs + g0vds
vx = vds + ixRS
vsg = −vgs = ixRS
S
g0
1gmvgs
RS
D
ix
vx
gout
G≡B
ix
gout =−g′mixRS + g0 (vx − ixRS)
vx
gout = −g′mRSgout − g0RSgout + g0
(A2.14) gout =1
rout=
g0
1 + (g′m + g0)RS
CG: currentamplification
gout
1ieq
ioD
RD
G≡B
ioieq
= − rout
RD + rout= − 1
1 + goutRD= − 1 + (g′m + g0)RS
1 + (g′m + g0)RS + g0RD
(A2.13)−−−−−→ iois
=ioieq
ieq
is=
(g′m + g0)RS
1 + (g′m + g0)RS + g0RD(A2.15)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Single stage MOSFET and BJT configurations 72
CG: inputconductance
gin =ixvx
vx = (id + ix)RS
id = g′mvgs + g0vds
vds = vo − vx
vo = −idRD
vgs = −vx
S
G≡B
g0 RD
1gmvgs
vx
id
RS
D
ix
vo
gin
id = −g′mvx + g0 (−idRD − vx)
id (1 + g0RD) = − (g′m + g0) vx
id = − g′m + g0
1 + g0RDvx
vx =
(
− g′m + g0
1 + g0RDvx + ix
)
RS
vx
(
1 +g′m + g0
1 + g0RDRS
)
= ixRS
(A2.16) gin =ixvx
=
(
1 +g′m + g0
1 + g0RDRS
)1
RS=
1 + 2g0RD + (gm + gmb) RS
(1 + g0RD)RS
CG: voltageamplification
vs =isgin
vo = RDio
(A2.15)−−−−−→ vo
vs=
RDiois/gin
= ginRDiois
(A2.17)
MOSFETconfigurations
summary
Simplifying hypotheses: CGS and CGD are negligible (“central-band hypothesis”)
rin gout vo/vs io/is(A2.5)−−−−→(A2.6)
CS (RS=0, VBS=0) ∞ g0 + GD−gm
gout∞
(A2.5)−−−−→(A2.6)
CS (RS 6=0) ∞ (A2.5) (A2.6) ∞(A2.11)−−−−−→(A2.12)
CD ∞ (A2.11) (A2.12) ∞(A2.14)−−−−−→(A2.15)
CG (A2.16) (A2.14) (A2.17) (A2.15)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Single stage MOSFET and BJT configurations 73
Simplifying hypotheses: g0 = 0, CGS and CGD are negligible
rin gout vo/vs io/is(A2.5)−−−−→(A2.6)
CS (RS=0, VBS=0) ∞ GD −gmRD ∞
(A2.5)−−−−→(A2.6)
CS (RS 6=0) ∞ GD (A2.6) ∞
(A2.11)−−−−−→(A2.12)
CD ∞ gm + gmb +1
RS(A2.12) ∞
(A2.14)−−−−−→(A2.15)
CGRS
1 + g′mRSGD g′mRD
g′mRS
1 + g′mRS
Commonemitter (CE)
BJT single stage amplifiers
iC = IC + ic iB = IB + ib
IC and IB depend on VCC and −VEE
ic and ib depend on vi
B
E
C
RC
RE
Rg
-VEE
VCC
vo
vi
iC
iE
iB
Figure A2.5
CE: Biasing
Hp: BJT in FAR
(A2.18)
VEE = IBRg + VBE + IERE
VCC + VEE = RCIC + REIE + VCE
IC = IBβF IE = IC + IB
VCE ≪ VA ⇒ 1 +VCE
VA≈ 1
VBE ≈ 0.7 V (see note∗)
∗VBE is considered approximately 0.7 V to avoid theexponential equation in the system resolution.
B
E
C
RC
RE
Rg
-VEE
VCC
IC
IE
IB
Figure A2.6
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Single stage MOSFET and BJT configurations 74
• ANALYSIS PROBLEM
Given: Find:RC , RE , Rg IC , IB , IE ,VCC , VEE VCE , VBE
βF
• DESIGN PROBLEM
Given: Find:Rg, IC RC , RE , IB ,VBE , VCE IE , VCC , VEE
βF
(A2.18)−−−−−→ 5 equations and 5 un-known variables: solve the system,verify the validity of the SAR regionhypothesis.
(A2.18)−−−−−→ 5 equations and 6 un-known variables: 1 more constraint isissued or 1 more variable is specified.Solve the system, verify the validity ofthe SAR region hypothesis.
CE: Thedesign
problem
Concerning the “DESIGN PROBLEM” a constraint can be issued by fixing themaximum variation ∆iC when the temperature varies (i.e., VT changes).
(expanded axis)
VEE
RE
VEE
T2
T0
T1
∆iC
0.68 0.7 0.72
A
C
B
vBE [V]
iC
IC ≫ IB ⇒ IE ≈ IC
T1 < T0 < T2
A = ICA, VBEA
B = ICB, VBEB
Hp: Rg < RE
(A2.18)−−−−−→ VEE =IC
βFRg + VBE + ICRE
VEE = VBE + ICRE
∆iC =VBEB
− VBEA
RE= ICA
− ICB= ∆IC
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Single stage MOSFET and BJT configurations 75
CE:Small-signal
circuit
B
E
C
r0
RE
Rg
vi
gmvbe
vo
r¼
RC
Figure A2.7
The small-signal circuit is similar to that seen for the MOSFET common sourceconfiguration, thus to find the voltage amplification we can follow the same procedure( pag. 64). Accordingly, for r0 = ∞ we have
vo
vi=
−gmrπRC
Rg + rπ + (1 + gmrπ) RE=
−βF RC
Rg + rπ + (1 + βF )RE
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part E1
Esempio di progettazione di unamplificatore CS
Specifiche diprogetto
Dato l’amplificatore in figura
RD
RS
Rg
-VSS
VDD
vovi
M1
CS
CO
RL
R1
R2
CI
rout
rin
Figure E1.1
Si progetti il circuito in maniera da soddisfare le seguenti specifiche:
• Guadagno di tensione: AV = −2
• Resistenza di ingresso di piccolo segnale: rin ≥ 100 kΩ
• Resistenza di uscita di piccolo segnale: rout = 10 kΩ
• Potenza dissipata in polarizzazione: P ≤ 10 mW
Esempio di progettazione di un amplificatore CS 77
Dati
• Tensione di alimentazione: VDD = VSS = 5 V
• Resistenza di carico: RL = 10 kΩ
• Resistenza di sorgente: Rg = 50 Ω
• Condensatori di disaccoppiamento: CI = CO = CS = 1 µF• Frequenza operativa del segnale di ingresso vi: fi = 10 kHz
• Parametri del MOSFET-n: VTn= 1 V kn = 150 µA/V
2λ = 0.01 V−1
Analisipreliminaredel circuito
Prima di procedere bisogna capire in quale configurazione a singolo transistore sitrova il MOSFET-n M1.Per fare questo e utile identificare i terminali di uscita e di ingresso. Come e possibilevedere in Fig. E1.1 il segnale vi e applicato al gate di M1 attraverso la resistena Rg
e il condensatore di disaccoppiamento CI , dunque il terminale di ingresso e il GATE.Inoltre il segnale di uscita viene prelevato dal DRAIN attraverso il condensatore didisaccoppiamento CO.In definitiva M1 e in configurazione common source ( pag. 62) e, consideratala presenza della resistenza di source RS e del condensatore CS , e in una config-urazione common source con resistenza di source e condensatore di disaccoppiamento.
Circuitoequivalente
per lo studiodella
polarizzazione
In polarizzazione (cioe a frequenza nulla) i condensatoridi disaccoppiamento sono dei circuiti aperti quindi ilcircuito equivalente per lo studio della polarizzazione equello riportato in Fig. E1.2.La tensione al nodo di gate VG e ottenibile con ilpartitore resistivo tra VDD e −VSS ed e data da
VG =R2
R1 + R2(VDD + VSS) − VSS
La tensione al nodo di source VS e
VS = IDRS − VSS
dove con ID si e intesa la corrente di drain (source) diM1. Infine la tensione al nodo di drain VD e
VD = VDD − IDRD
RD
RS
-VSS
VDD
M1
R1
R2
Figure E1.2
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Esempio di progettazione di un amplificatore CS 78
Dunque
(E1.1)
VGS = VG − VS =R2
R1 + R2(VDD + VSS) − IDRS
VDS = VD − VS = VDD + VSS − (RD + RS) ID
(E1.2) ID =kn
2(VGS − VTn
)2(1 + λVDS)
Dal momento che si desidera che M1 lavori in zona di saturazione ( pag. 34) devonoessere soddisfatte le condizioni:
(E1.3)
VGS > VTn
VDS ≥ VGS − VTn
Correnteerogata dai
generatori dipolarizzazione
Oltre a ID che scorre in M1 i genereatori di polarizzazione erogano la corrente I12
che scorre nelle resistenze R1, R2 data da:
I12 =VDD + VSS
R1 + R2
Quindi la corrente IT erogata dai generatori e
(E1.4) IT = ID +VDD + VSS
R1 + R2
Circuitoequivalente di
piccolosegnale
Il circuito equivalente di piccolo segnale e ottenuto dalla linearizzazione attorno alpunto di polarizzazione del circuito in Fig. E1.1, quindi bisognerebbe conoscere ilpunto di lavoro di M1 per poter essere sicuri che si trovi in zona di saturazione. Aquesto punto del progetto, pero, non abbiamo questa informazione e l’unica alterna-tiva possibile e ipotizzare che M1 si trovi in zona di saturazione. Supponiamo inoltreche la frequenza operativa fi del segnale di ingresso sia tale da ritenere i conden-satori di disaccoppiamento dei corto circuiti, mentre quelli parassiti dei circuiti aperti(ipotesi di centro banda).
Sotto tali ipotesi che andranno verificate nel seguito il circuito per piccolosegnale e il seguente
vo
G D
S≡B
g0
Rg
vi1
gmvgs gmbvbsRDR1==R2
routrin
RL
Figure E1.3
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Esempio di progettazione di un amplificatore CS 79
L’ispezione visiva di tale figura ci suggerisce alcune semplificazioni: dato che iterminali di source e di body sono cortocircuitati tra loro si ha vbs = 0 e quindiil generatore pilotato gmbvbs eroga corrente nulla: questo significa che tale gen-eratore e l’equivalente di un circuito aperto e dunque puo essere eliminato dal circuito.
Inoltre
(E1.5) rin = R1//R2
e come e facilmente ricavabile da (A2.5)
(E1.6) rout = 1/g0//RD = r0//RD
A seguito di tali considerazioni il circuito per piccolo segnale diviene
G D
S≡B
Rg
vi
gmvgsrin vo
rout RL
Figure E1.4
Guadagno ditensione
Riferendosi a Fig. E1.4 si ha
vgs =rin
rin + Rgvi
vo = −rout//RLgmvgs = −gmrout//RLrin
rin + Rgvi
(E1.7) AV =vo
vi= −gmrout//RL
rin
rin + Rg
Conversionedelle
specifiche
Le informazioni ricavate finora sono utili a convertire le specifiche in equazioni darisolvere. Per adesso concentriamoci sulle specifiche riguardanti AV , rin e rout. Inparticolare da (E1.6), dalla definizione di g0 ( pag. 46) e dalle specifiche di progettosi ha
rout = r0//RD = 10 kΩ
solitamente r0 ≫ RD quindi ipotizzando che valga tale relazione (va verifi-cato in seguito) la rout diviene
(E1.8) rout ≈ RD = 10 kΩ
e sotto tali condizioni si ha
(E1.9) rout//RL ≈ RD//RL ≈ RL/2 = 5 kΩ
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Esempio di progettazione di un amplificatore CS 80
Per le specifiche rin = R1//R2 deve essere maggiore di 100 kΩ. Imponendo arbitrari-amente R1 = R2 la specifica viene tradotta in rin = R1/2 e quindi
(E1.10) R1 ≥ 200 kΩ
Sotto le condizioni (E1.8), (E1.9) e (E1.10), la (E1.7) si semplifica in AV ≈ −gmRL/2essendo rin ≫ Rg. Dunque la specifica sul guadagno impone
−gmRL/2 = −2 ⇒ gm =2ID
VGS − VTn
= 0.4 mS ⇒ VGS − VTn= 5000ID
che sostituita nella (E1.2) da
(E1.11) ID =1
1875 (1 + λVDS)≈ 1 µA
1875≈ 533 µA
dove e stata utilizzata l’approssimazione λVDS ≪ 1, sempre vera considerato cheλ = 0.01 V−1 e che VDS ≤ VDD + VSS = 10 V. Inoltre
(E1.12) VGS − VTn= 5000ID ≈ 2.67 V ⇒ VGS ≈ 3.67 V
Conoscendo la corrente di drain (source) si puo verificare la condizione r0 ≫ RD
usata in precedenza ( pag. 46)
r0 =1 + λVDS
λID≈ 1
λID≈ 188 kΩ ≫ RD
cosı confermando che l’ipotesi fatta e corretta.Utilizzando la specifica sulla potenza massima e tramite la (E1.4) si puo trovare unvalore opportuno per R1 = R2
PT = ID (VDD + VSS) +(VDD + VSS)
2
2R1≤ 10 mW ⇒ R1 ≥ 21.4 kΩ
in altri termini se si rispetta la (E1.10) si rispetta anche quest’ultima condizione.Fissiamo pertanto arbitrariamente
(E1.13) R1 = 200 kΩ
Dalle equazioni (E1.3), (E1.12), (E1.13) e i dai dati del progetto si possono soddisfarele condizioni di polarazzazione di M1 in (E1.1)
(E1.14)
3.67 = 5 − 533 · 10−6RS
VDS = 10 − 533 · 10−6 (RD + RS)⇒
RS ≈ 2495 ΩRD ≤ 11257 Ω
quindi la (E1.8) garantisce la zona di saturazione del transistor perche soddisfaquest’ultima condizione.
Verifica dicentro banda
L’unica ipotesi non ancora verificata e quella di centro banda fatta per ricavare ilcircuito per piccolo segnale. Secondo la teoria ( pag. 48) si deve verificare che allafrequenza operativa le reattanze capacitive di CI , CO e CS siano tali da poter esseretrascurate rispetto alle resistenze viste ai loro capi. Essendo CI = CO = CS = 1 µFsi ha
XCI= XCO
= XCS=
1
2π · 10 · 103 · 1 · 10−6≈ 15.92 Ω
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Esempio di progettazione di un amplificatore CS 81
CI e in serie con la resistenza Rg+rin ≈ 100 kΩ ≫ 15.92 Ω, quindi XCIe sicuramente
trascurabile.CO e in serie con la resistenza RL+rout ≈ 20 kΩ ≫ 15.92 Ω, quindi XCO
e sicuramentetrascurabile.CS e in parallelo con la resistenza RS e quella data da (A2.11) dunque1
gm//RS//
1
g0≈ 1241 Ω ≫ 15.92 Ω, quindi XCS
e sicuramente trascurabile.
In conclusione anche l’ipotesi di centro banda e verificata.
Sommario
Riassumento si ha
• Polarizzazione:
R1 = R2 = 200 kΩ RS = 2495 Ω RD = 10 kΩ
VGS = 3.67 V > VTn ID = 533 µA VG = 0 V
VDS = 3.34 V > VGS − VTn VS = −3.67 V VD = −330 mV
IR1,R2 = 25 µA PT = 5.6 mW
• Piccolo segnale:
rin = 100 kΩ rout = 9.49 kΩ AV = 1.85
A causa delle approssimazioni fatte i valori reali sono leggermente diversi daiprecedenti, ma non cosı diversi da giustificare una progettazione eseguita senzaapprossimazioni (in polarizzazione si dovrebbe risolvere un sistema di 3 equazioni in3 incognite, inoltre una delle equazioni e di terzo grado)
• Polarizzazione non approssimata:
VGS = 3.647 V > VTn ID = 542.36 µA VG = 0 V
VDS = 3.223 V > VGS − VTn VS = −3.647 V VD = −423.58 mV
IR1,R2 = 25 µA PT = 5.7 mW
• Piccolo segnale non approssimato:
rin = 100 kΩ rout = 9.5 kΩ AV = 1.996
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part A3
Basic MOSFET-based configurations
Diode-connectedMOSFETconnection
ROUT
iDS G≡D
D
G
iDS
MOSFET-n
ROUT
iSD
G≡D
G
D
iSD
MOSFET-p
S≡BS≡B
S≡BS≡B
|vGS | = |vDS |VTn
|iDS |
⇒
S≡B
g01
gmvgs
D≡Gix
vx
(A3.1) ROUT =vx
ix=
1
gm + g0
Currentmirror
k′n1
= k′n2
VTn1= VTn2
λ1 = λ2
(W
L
)
1
6=(
W
L
)
2
iD1 =kn1
2
(vGS − VTn1
)2(1 + λ1vGS)
iD2 =kn2
2
(vGS − VTn2
)2(1 + λ2vDS2
)
iIN R1
VDD VDD
req
M1 M2
Basic MOSFET-based configurations 83
(A3.2)iD1
iD2
=
(W
L
)
1
(1 + λ1vGS)
(W
L
)
2
(1 + λ2vDS2)
(A3.1)−−−−→Small-signal circuit for req evaluation
g021
gmvgs
g011
S1≡S2
D1≡G1≡G2 D2
vgs
req
(A2.5)−−−−→ req =1
g02
= r02
Currentmirrors
iIN
VDD
MS M1
n1iIN
M2
n2iIN
Mm
nmiIN
Differentialamplifier
(DA): largedifferential
signal
Hp:• M1 and M2 in saturation region and perfectlymatched• λ = 0
iD1 =kn
2(VGS1 − VTn
)2 ⇒ VGS1 =
√2iD1
kn+ VTn
ISS = iD1 + iD2
vd = vi1 − vi2 = VGS1 − VGS2
vd =
√2iD1
kn−
√2iD2
kn
v2d =
2
kn(iD1 + iD2) −
4
kn
√
iD1iD2
knv2d
2= ISS − 2
√
iD1iD2 ⇒ 2√
iD1 iD2 = ISS − knv2d
2
VDD
M1 M2
RD RD
RS
-VSS
iD1 iD2
ISS
vi2vi1
vO1 vO2
VS
4iD1iD2 =
(
ISS − knv2d
2
)2
⇒ (iD1 + iD2)2 − (iD1 − iD2)
2=
(
ISS − kn
2v2
d
)2
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basic MOSFET-based configurations 84
I2SS − (iD1 − iD2)
2= I2
SS
(
1 − kn
2ISSv2
d
)2
(iD1 − iD2)2
= I2SS − I2
SS
(
1 − kn
2ISSv2
d
)2
(iD1 − iD2)2
= I2SS
[
1 −(
1 − kn
2ISSv2
d
)2]
iD1 − iD2 = ISS
√
1 − 1 − k2nv4
d
4I2SS
+knv2
d
ISS
iD1 − iD2 = vd ISS
√
kn
ISS︸ ︷︷ ︸
gm1,2
√
1 − knv2d
4ISS(A3.3)
iD1 − iD2 ≈ vdISS
√
kn
ISSif
knv2d
4ISS≪ 1
knv2d
4ISS≪ 1 ⇒ v2
d ≪ 4ISS
kn⇒ vd ≪ 2
√ISS
kn
an increase in ISS leads to an increase in vd but also to a greater power dissi-pation being PD = (VDD + VSS) ISS .
ISS = 2ID1 = 2ID2 ⇒ vd ≪ 2
√
ISS
kn⇒ vd ≪ 2
√
2ID1
kn= 2 (VGS1 − VTn
)
thus vd ≤ 0.2 (VGS1 − VTn)
DA:iD1
= f1(vd)iD2
= f2(vd)
(A3.3)−−−−→
iD1 − iD2 = gm1,2vd
√
1 − knv2d
4ISS
iD1 + iD2 = ISS
√
1 − knv2d
4ISS
iD1 − ISS + iD1 = gm1,2vd
√
1 − knv2d
4ISS
iD1 =ISS
2+ gm1,2
vd
2
√
1 − knv2d
4ISS(A3.4)
−iD2 + ISS − iD2 = gm1,2vd
√
1 − knv2d
4ISS
iD2 =ISS
2− gm1,2
vd
2
√
1 − knv2d
4ISS(A3.5)
iD1 = ISS?
(A3.4)−−−−→ ISS
2= gm1,2
vd
2
√
1 − knv2d
4ISS
ISS = ISS
√
kn
ISSvd
√
1 − knv2d
4ISS
1
vd=
√
kn
ISS
√
1 − knv2d
4ISS
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basic MOSFET-based configurations 85
1
v2d
=kn
ISS
(
1 − knv2d
4ISS
)
⇒ k2nv4
d − 4knv2dISS + 4I2
SS =(knv2
d − 2ISS
)2= 0
vd =
√
2ISS
kn=
√2 (VGS − VTn
)
iD1 = 0?
(A3.4)−−−−→ −ISS
2= gm1,2
vd
2
√
1 − knv2d
4ISS
−ISS = ISS
√
kn
ISSvd
√
1 − knv2d
4ISS
− 1
vd=
√
kn
ISS
√
1 − knv2d
4ISS
1
v2d
=kn
ISS
(
1 − knv2d
4ISS
)
⇒ k2nv4
d − 4knv2dISS + 4I2
SS =(knv2
d − 2ISS
)2= 0
vd = −√
2ISS
kn= −
√2 (VGS − VTn
)
DA: plots ofiD1
and iD2
vd
ISS
ISS
2
√2
(
VGS − VTn
)
−√
2(
VGS − VTn
)
iD1 iD2
Figure A3.1
DA: plots ofvO1
and vO2
vO1 = VDD − RDiD1 vO2 = VDD − RDiD2
vd
VDD
VDD − RD
ISS
2
√2
(
VGS − VTn
)
−√
2(
VGS − VTn
)
vO1 vO2
Figure A3.2
around vd = 0 we have
• ∆vO2
vd> 0 (non-inverting stage)
• ∆vO1
vd< 0 (inverting stage)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basic MOSFET-based configurations 86
DA:verification ofthe saturationregion for M1
and M2
vDS1 ≥ vGS1 − VTn⇒ vDG1 ≥ −VTn
⇒ vGD1 ≤ VTn
vGD1,MAX= vG1,MAX
− vD1,MIN= vG1,MAX
− (VDD − RDISS) ≤ VTn
vG1,MAX≤ VDD + VTn
− RDISS
this limits the amplitude of the input signal (vd ≤ 0.2 (VGS1 − VTn)).
Note that when RDISS ≤ VTn, vG1,MAX
can be as high as VDD.
DA:evaluation of
vO1
vO1 = VDD − RD
(ISS
2+ gm1,2
vd
2
)
vO1 = VDD − RDISS
2︸ ︷︷ ︸
biasing
−gm1,2RDvd
2︸ ︷︷ ︸
small signal
= VO1 − vo1
thus
vo1
vd= −1
2gm1,2RD
VO1 = VDD − RDISS
2
DA: biasingequivalent
circuit
VDD
M1 M2
RD RD
RS
-VSS
iD1 iD2
ISS
vi2vi1
vO1 vO2
VS
VDD
M1 M2
RD RD
2RS
-VSS
ID1 ID2
ISS/2
VO1 VO2
VS
2RS
-VSS
ISS/2
VS
VDD
1 2
vi1=vi2=0
Figure A3.3
DA: biasing
Considering only half circuit(A2.1)−−−−→ VDD = RDID1 + VDS1 + 2RSID1 − VSS = (RD + 2RS)
ISS
2+ VDS1 − VSS
VG1 = 0
VD1 = VO1 = VDD − RDID1 = VDD − RDISS
2
VS1 = −VSS + 2RSID1 = −VSS + RSISS
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basic MOSFET-based configurations 87
DA: smallsignal
From Fig. A3.3, the small-signal equivalent circuit is obtained setting VDD = VSS = 0and according to (N1.4) we can consider input signal as the superposition of twodifferent signals: the common-mode signal vicm
and the differential-mode signal vd
vi1 = vicm+
vd
2vi2 = vicm
− vd
2
DA: common-mode small
signal
When vd = 0 we have vi1 = vicm= vi2
and thus the circuit is perfectly sym-metric. In this case we can analyze onlyhalf circuit.
M1
RD
2RS
id1
vicm
vo1
Figure A3.4
(A3.4)−−−−→
G
S
D
B
g01
2RS
1gm1,2vgs1 gmb1vbs1
RD
vicm
vo1
g01 = 0 v′o1= vo|vd=0
(A2.8)−−−−→ v′o1
vicm
= − gm1,2RD
1 + 2(gm1,2 + gmb1
)RS
(A3.6)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basic MOSFET-based configurations 88
DA:differential-mode small
signal
(N1.5)−−−−→
When vicm= 0
ISS = iD1 + iD2 = ID1 + id + ID2 − id⇒ VS = RSISS − VSS = constant
i.e. there are no small-signal vari-ations on the source node and VS iszero from a small-signal point of view.Accordingly, the small-signal equiva-lent circuit for the differential-modeanalysis can be obtained from Fig.A3.3 simply considering half circuitand VS = 0.
M1
RD
2RS
id1
vo1
vd2
Figure A3.5
(A3.4)−−−−→
G
S´B
D
g01
1gm1,2vgs1 RDvd vo12
RS = 0 g01 = 0 v′′o1= vo|vicm =0
(A2.8)−−−−→ v′′o1
vd= −gm1,2RD
2(A3.7)
(A3.8) gm1,2 =2ID1
VGS1 − VTn
=2ID1
√
2ID1/kn
=√
2ID1kn =√
ISSkn
DA: completevo1
(A3.6)−−−−→(A3.7)
vo1 = v′o1+ v′′o1
= − gm1,2RD
1 + 2gm1,2RSvicm
− gm1,2RDvd
2(A3.9)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Basic MOSFET-based configurations 89
DA: CMRR
(N1.7)−−−−→ CMRR =
∣∣∣∣
ADM
ACM
∣∣∣∣=
gm1,2RD
2gm1,2RD
1 + 2gm1,2RS
=1 + 2gm1,2RS
2(A3.10)
A higher CMRR cannot be obtained with a higher RS because, given VDD and VSS ,a higher RS leads to a smaller biasing current ID1 thus to a smaller gm1,2 (see (A3.8))that produces a smaller CMRR. We can have a higher CMRR substituting the re-sistance RS with a current mirror (i.e., a fixed output current and a high outputequivalent resistance).
DA: commonsource
configurationwith RS = 0
(A2.7)−−−−→ vo
vi= −gmRD = Av
A higher Av cannot be obtained with a higher RD because, given VDD and VSS , ahigher RD leads to a smaller biasing current ID thus to a smaller gm (see (A3.8)) thatproduces a smaller Av. We can have a higher Av substituting the resistance RD witha current mirror, this configuration is called “differential amplifier with active load”.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part T7
Amplifiers’ frequency response
Frequencyresponse
(definition)
For a linear system with transfer function A (s)
A(s)x(t) y(t)
Figure T7.1
we have y(t) = h sin (ωt + φ) when x(t) = k sin (ωt), in other words the system’sresponse to a sinusoidal signal is still a sinusoidal signal with different amplitudeand phase, but the same frequency. Since every complex signal can be expressedas a linear combination of sinusoids, the output is also a combination of sinusoids.However, every sinusoid has an amplitude and a phase different compared to theinput. Parameters h and φ depend on the input frequency according to relationships
(T7.1) h(ω) = k |A (jω)| φ(ω) = arg [A (jω)]
k − h
φ
0 π 2π
ω · t
0
1
0.5
−1
−0.5
x(t
)/k,
y(t
)/k
Amplifiers’ frequency response 91
Bode plot
There are several ways to plot a transfer function. Among these, the so called Bodeplot is preferred when a magnitude and phase plots are required.• A Bode magnitude plot is a graph of logarithm magnitude as a function of thelogarithm of frequency.• A Bode phase plot is a graph of the transfer function phase (in degrees) versus thelogarithm of frequency.
For example the function A(s) =1
1 + shas the following Bode magnitude and Bode
phase plots.
20 log |A (jω)| = 20 log1
√
w2 + 1, 6 A (jω) = arctan
Im A (jω)Re A (jω) = arctan (−ω)
10−3 10−2 10−1 100 101 102 103−60
−40
−20
0
slope: 20 dB/decade20
log|A
(jω)|
ω (log ω)
10−3 10−2 10−1 100 101 102 103−90
−60
−30
0
6A
(jω)
ω (log ω)
Band-passfilter
Apart from specific circuits, every electronic circuit is a band-pass filter, i.e. a circuitthat transmits frequencies within a certain range with an almost constant gain AV 0
and rejects (attenuates) frequencies outside that range.The portion of passed spectrum is called passband, whereas the limiting frequenciesare called low-cut frequency fL and high-cut frequency fH . fL and fH are the fre-quencies in which the gain is 1/
√2 (i.e., -3 dB) of the gain in the passpand (AV 0).
Frequencies greater than fH and lower than fL are considered high and low frequen-cies, respectively.
AV 0AV 0√
2
fHfL
passband highlow
When fH ≫ fL the system is “broadband” (broad bandwidth), otherwise it is “nar-rowband” (narrow bandwidth).
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Amplifiers’ frequency response 92
Reduction ofa third ordersystem to first
order
Let us consider the below transfer function with a passband gain A0, no finite zerosand three poles p1, p2, p3
AH(s) =A0
(1 + s/p1) (1 + s/p2) (1 + s/p3)=
A0
1 + a1s + a2s2 + a3s3
where
a1 =1
p1+
1
p2+
1
p3a2 =
1
p1p2+
1
p1p3+
1
p2p3a3 =
1
p1p2p3
For simplicity, let us consider p1 < p2 < p3 (it is always possible to organize poles inrising order).When p1 ≪ p2 < p3 (dominant pole condition) we can write
a1 ≈ 1
p1a2 ≈ 1
p1p2a3 =
1
p1p2p3⇒ p1 ≈ 1
a1p2 ≈ a1
a2p3 ≈ a2
a3.
This means that under a dominant pole condition, poles can be simply ob-tained from the transfer function coefficients. Furthermore, being p1 the smallestpole, it is, approximately, the high-cut frequency
fH ≈ p1
2π
=1
2πa1
Reduction ofa n-th order
system to firstorder
Given the n-th order transfer function
AH(s) =A0
(1 + s/p1) (1 + s/p2) · · · (1 + s/pn)=
A0
1 + a1s + a2s2 + · · · + ansn
the dominant pole approximation can be applied when
p1 ≪ p2 < · · · < pn
Generalizing the above procedure for the k -th pole, we have
(T7.2) pk ≈ ak−1
ak
However, we are not interested in finding all poles, we need only p1, because it rep-resents the high-cut frequency and every circuit works in its passband, and p2 fromwhich it is possible to evaluate how good the dominant pole approximation is. Forexample, when p2 ≥ 10 p1 the error on fH is lower than 10%. The higher is the ratiop2/p1, the lower is the percentage error on fH . Accordingly, we need only coefficienta1 and a2 of the transfer functions.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Amplifiers’ frequency response 93
Time-constantmethod
The general form of a system’s high frequency response is
AH(s) =1 + b1s + b2s
2 + · · · + bmsm
1 + a1s + a2s2 + · · · + ansn
with m ≤ n.
It was proven that
(T7.3) a1 =n∑
i=1
R0i Ci (T7.4) a2 =
n−1∑
i=1
R0i Ci
n∑
j=i+1
RijCj
where R0i is the resistance seen by capacitor Ci with all the other capacitors
open circuited. The superscript 0 in R0i means that the other capacitors have a 0
capacitance, i.e. an open circuit since limC→0
∣∣∣∣
1
jωC
∣∣∣∣
= ∞. Rij is the resistance seen
by capacitor Cj with capacitor Ci short circuited and all the other capacitors opencircuited.
Note ontime-constant
method
The time-constant method is valid only for independent capacitors. We say thatn capacitors are independent if it is possible to assign the voltage of each one,independently of the voltage of all the others, i.e. parallel or series capacitors areNOT independent. Each independent capacitor introduces one pole in the transferfunction. Accordingly, before applying the time-constant method, the network mustbe simplified in such a way to have only independent capacitors.
C1 C2 Ck
C1
C2
Ck
CEQ =
k∑
i=1
Ci
CEQ =
k∏
i=1
Ci
k∑
i=1
k∏
j=1,j 6=i
Cj
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part A4
Time-constant method application
Time-constantmethodexample
Given the following circuit
RL
Rs
g ¢vcvs vo
C1
C2
vc
is i2
i1
io
Figure A4.1
evaluate its high-cut frequency.First, let us evaluate exactly the transfer function vo/vs in the Laplace domain.
Outputshort-circuitcurrent of
circuit in Fig.A4.1
Rs
g ¢vcvs
C1
C2
vc
is i2
i1
ieq
vc
Time-constant method application 95
The voltage drop on C2 is vc due to the output short-circuit ⇒ i2 = sC2vc
ieq = i2 − gvc = sC2vc − gvc = (sC2 − g) vc
is = i1+i2 = sC1vc+sC2vc = s (C1 + C2) vc =vs − vc
Rs⇒ vc =
vs
1 + sRs (C1 + C2)
(A4.1) ieq = vssC2 − g
1 + sRs (C1 + C2)
Outputequivalent
impedance ofcircuit in Fig.
A4.1
The equivalent circuit for evaluating the output equivalent impedance Zout is
Rs
g ¢vcC1
C2
vc
is i2
i1
ix
vx
that can be simplified in
g ¢vcZEQ
C2
vc
i2 ix
vx
where
(A4.2) ZEQ = Rs//1
sC1=
Rs
1 + sRsC1
ix = i2 + gvc, vc =ZEQvx
1
sC2+ ZEQ
=sC2ZEQvx
1 + sC2ZEQ, i2 =
vx
ZEQ +1
sC2
=sC2vx
1 + sC2ZEQ
ix =1 + gZEQ
1 + sC2ZEQsC2vx
hence
(A4.3) Zout =vx
ix=
1 + sC2ZEQ
sC2 (1 + gZEQ)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Time-constant method application 96
Nortonequivalent ofcircuit in Fig.
A4.1
From (A4.1) and (A4.3) the Norton equivalent of the circuit is
ieqZout vo
RL
Figure A4.2
Transferfunction of
circuit in Fig.A4.1
(A4.3)−−−−−−→Fig. A4.2
vo =Zout
RL + ZoutieqRL =
1 + sC2ZEQ
1 + sC2 [RL (1 + gZEQ) + ZEQ]
(sC2 − g)RL
1 + sRs (C1 + C2)vs
(A4.2)−−−−→ vo
vs=
(sC2 − g)RL
1 + s [Rs (C1 + C2) + (1 + gRs)RLC2] + s2RsRLC1C2(A4.4)
Time-constantmethod
applied tocircuit in Fig.
A4.1
According to (T7.3) and (T7.4), coefficients a1 and a2 of the transfer function in(A4.4) can be evaluated as
a1 =
2∑
i=1
R0i Ci = R0
1C1 + R02C2
a2 =
1∑
i=1
R0i Ci
2∑
j=i+1
RijCj
= R01C1R
12C2
As defined before ( pag. 92), R01 is the resistance seen by capacitor C1 with
C2 open circuited; R02 is the resistance seen by capacitor C2 with C1 open circuited;
R12 is the resistance seen by capacitor C2 with C1 short circuited.
Evaluation ofR0
1by meansof the
time-constantmethod
The equivalent circuit for the evaluation of R01 is
RL
Rs
g ¢vc
ix
vc=vxvx
(A4.5) R01 = Rs
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Time-constant method application 97
Evaluation ofR0
2by meansof the
time-constantmethod
The equivalent circuit for the evaluation of R02 is
RL
Rs
g ¢vc
ix
vc
vx i2
vc = ixRs, ix = − (gvc + i2)
i2 =vRL
RL=
vc − vx
RL=
ixRs − vx
RL
ix = −gvc − i2 = −gRsix − ixRs − vx
RL
ix
(
1 + gRs +Rs
RL
)
=vx
RL
(A4.6) R02 =
vx
ix= RL + gRsRL + Rs
Evaluation ofR1
2by meansof the
time-constantmethod
The equivalent circuit for the evaluation of R12 is
RL
Rs
g ¢vc
ix
vc
vx
i2
Since vc = 0, there is no current flowing in Rs and the current generator controlledby vc is off. Thus the simplified equivalent circuit for R1
2 is
RL
ix
vx
i2
(A4.7) R12 =
vx
ix= RL
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Time-constant method application 98
Evaluation ofcoefficient a1
by means ofthe
time-constantmethod
(T7.3),(A4.6)−−−−−−−−→(A4.5)
a1 = RsC1 + (RL + gRsRL + Rs)C2
hence
(A4.8) a1 = Rs (C1 + C2) + (1 + gRs)RLC2
that is the same coefficient a1 in (A4.4) evaluated in a simpler way.
Evaluation ofcoefficient a2
by means ofthe
time-constantmethod
(T7.4),(A4.7)−−−−−−−−→(A4.5)
a2 = RsC1RLC2 = RsRLC1C2 (A4.9)
that is the same coefficient a2 in (A4.4) evaluated in a simpler way.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part T8
Ideal voltage amplifier and feedback
Basicconfiguration
of actualoperationamplifier
VDD
-VSS
VDD
-VSS
C.D.Ampl.
A3
C.S.Ampl.
A2
Diff.Ampl.
A1v1
v2
v3
VDD
-VSS
vid v4
RoutA2RinA3
RLvo
RoutA1RoutA3
RinA2
Effects of reactive elements are neglected due to the operational frequency considered.
vo
v2 − v1=
v3
v2 − v1
v4
v3
vo
v4
v3 = A1vid
RinA2
RinA2+ RoutA1
≈ A1vid
v4 = A2v3
RinA3
RinA3+ RoutA2
≈ A2v3
vo = A3v4RL
RL + RoutA3
≈ depends on RL
RoutA3= minimum output resistance among CS, CG, CD configurations
Idealoperationamplifier
VDD
-VSS
vo
io
i-v-
i+v+
Idealoperationamplifier:
parameters
(T8.1)
A =vo
v+ − v−= ∞
i+ = 0 i− = 0io = anything, it depends partially on the external circuit
Ideal voltage amplifier and feedback 100
(T8.2)
Rin+ = Rin− = ∞Rout = 0
v+ − v− = vid =vo
A
Idealoperationamplifier:
virtual shortcircuit
limA→∞
vid = 0 ⇒ v+ ≈ v− (T8.3)
Feedback
Feedback is a system control technique consisting in looping back the system outputsignal to the input of the system itself.
Feedback can be positive or negative, however in electronic engineering themost commonly used is the negative one.
Negativefeedback
Fig. T8.1 shows the basic structure of a feedback amplifier. A(s) is the transferfunction of the basic amplifier, B is the feedback block and Sǫ, SI , SF are signalsthat are expressed in the same unit. The transfer function of the feedback system isgiven by
Sǫ = SI − SF
SF = B · SO
SO = A(s) · Sǫ = A(s) (SI − SF )
SO = A(s) (SI − B · SO)
(T8.4) SO =A(s)
1 + B · A(s)SI =
A(s)
1 + T (s)SI
A(s)
B
SI
SF
S" SO
Figure T8.1
where T (s) = B · A(s) is the loop gain.
Closed-loopgain
According to (T8.4) the closed-loop gain AV (s) of the whole system is
(T8.5) AV (s) =SO
SI=
A(s)
1 + T (s)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Ideal voltage amplifier and feedback 101
Negativefeedback
circuits basedon the idealoperationamplifier
Eq. (T8.3) is valid only when the ideal operation amplifier is into a circuit withnegative feedback.
vo
v-
v+
vi2vi1
resistive feedback networkinput coupling
output definition
Feedbackanalysis of
circuits basedon the idealoperationamplifier
(T8.6)
1) vi1 = vi2 = · · · = 02) remove OA
3) evaluatevd
vo
4) the feedback is negative ifd vd
d vo< 0
Closed-loopideal gain
Feedback properties
Let us define AV0 = AV (0), A0 = A(0) and T0 = T (0) = BA(0) = BA0.When |A0| → ∞ (i.e., |T0| → ∞) we have
(T8.5)−−−−→ limT0→∞
AV0 = limT0→∞
A0
1 + T0=
1
B(T8.7)
this means that the closed-loop gain is independent of the amplifier when the latterhas an ideal infinite gain (|A0| → ∞).Actually, we cannot have amplifier with infinite gain, however (T8.7) can be consid-ered practically true for A0 ≫ 10.
Sensitivity ofAV0
withrespect to A0
One of the primary purposes of using feedback is to reduce the sensitivity of thesystem to parameter variations. To illustrate this, evaluate the sensitivity of (T8.5)with respect to parameter variations of A0 using (A2.3).
(A2.3)−−−−→ SA0
AV0=
A0
AV0
∂AV0
∂A0=
A0
AV0
1 + BA0 − BA0
(1 + BA0)2 =
1
1 + T0(T8.8)
note that (T8.8) tends to 0 when T0 → ∞.
Sensitivity ofAV0
withrespect to B
(A2.3)−−−−→ SBAV0
=B
AV0
∂AV0
∂B= − T0
1 + T0≈ −1 (T8.9)
in other words, every variation in B is reported to the system output with a unitygain.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Ideal voltage amplifier and feedback 102
Noisesuppression
When a real system is analyzed, noise signals must be considered. In order tosimplify the analysis, let us consider four possible noise signals d1, d2, d3 and d4
injected in four points of the feedback system.
d2
A(s)
B
SI
SF
S" SO
d1
d4 d3
d1, d2 and d4 can be considered “parametric variations” of A0, whereas d3 is a “para-metric variation” of B. Accordingly, from (T8.8) we expect a noise suppression factorof 1/ (1 + T0) and from (T8.9) we expect no suppression. Evaluating the completeclosed-loop transfer function when SI = 0 we have
(T8.10) AV |SI=0 =d2
1 + T0+
(d1 − d4)A0
1 + T0− d3T0
1 + T0
confirming what stated before.
Feedback withnon-linearamplifier
Real amplifiers are not linear. However, when a non-linear amplifier is inserted ina feedback loop, its non-linearity can be seen as a superimposed noise signal dNL
injected as shown in the figure
dNL
A(s)
B
SI
SF
S" SO
and, according to (T8.8), the non-linearity is reduced by a factor 1/ (1 + T0). Thismakes the amplifier more linear.
A0 (ideal, open-loop) dNL (superimposed noise)
vi
vo
linear region
vi
vo
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Ideal voltage amplifier and feedback 103
A0 + dNL (real, open-loop) A0 + dNL/ (1 + T0) (real, closed-loop)
vi
vo
≈linear region
vi
vo
≈linear region
Bandwidthextension
Feedback increases the system bandwidth (compared to the bandwidth of the basicamplifier). To prove this, consider the simple case when the basic amplifier has asingle pole
A(s) =A0
1 + s/ωp⇒
(T8.5)−−−−→ AV (s) =A0
1 + BA0
1
1 +s
ωp (1 + BA0)
(T8.11)
Therefore, the bandwidth of the closed-loop system is (1 + BA0) times bigger thanthat of the basic amplifier. This is an advantage for almost every type of circuits.However, the increased bandwidth can be a drawback since high frequency noise canbe injected into the system.
Gain-bandwidthproduct
According to (T8.11), the gain-bandwidth product (GBW) between the basic amplifierA(s) and the closed-loop gain AV (s) is constant
(T8.11)−−−−−→ |A0| · ωp =
∣∣∣∣
A0
1 + BA0
∣∣∣∣· ωp |1 + BA0| (T8.12)
where A0 is the amplifier gain,A0
1 + BA0is the closed-loop gain, ωp is the amplifier
bandwidth and ωp |1 + BA0| is the closed-loop bandwidth. This simple property saysthat the feedback extends the closed-loop bandwidth at the expense of a reduction ingain (with respect to the basic amplifier A(s)).
Transitionangular
frequency andgain-
bandwidthproduct
Given a transfer function A(s), the angular frequency at which |A(jω)| = 1 is calledtransition angular frequency ωT . Accordingly, for a single-pole transfer function
A(s) =A0
1 + s/ωpthe transition angular frequency is
|A(jωT )| =
∣∣∣∣
A0
1 + jωT /ωp
∣∣∣∣=
|A0|√
1 + (ωT /ωp)2
= 1, thus
(T8.13) ωT = ωp
√
A20 − 1 ≈ |A0|ωp (|A0| ≫ 1)
comparison of (T8.13) and (T8.12) shows that, for a single-pole transfer function, thegain-bandwidth product is approximately equal to the transition angular frequency.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Ideal voltage amplifier and feedback 104
ωT
0
ωp
20 log |A0|
ωp |1 + BA0|
20 log
∣∣∣∣
A0
1 + BA0
∣∣∣∣
Figure T8.2
The bifilarmodel
Feedback topologies
The unifilar model presented in Part T8 is only an idealization. In fact, in a systemevery block is connected to others blocks at least with two wires, as shown in Fig.T8.3.
A(s)
¯
sampling
SsSm
loadmixingsignal
Figure T8.3
Note that the block β is equal to the block B in T8.1 only if the sampled (Ss) andthe mixed (Sm) signals are expressed with the same unit (e.g. Volt, Ampere). In thiscase β = B is a unitless quantity. When the sampled (Ss) and the mixed (Sm) signalshaven’t the same unit, the quantity β is such that Sm = β · Ss (i.e., Sm and β · Ss
have the same unit).According to the bifilar model, there are two possible combinations for the samplingnetwork, and two for the mixing network.
Voltage(shunt)
sampling
A(s)
B
load
ZOUT
ZO
VO
VO
Figure T8.4
(T8.14) ZOUT =ZO
1 + T0
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Ideal voltage amplifier and feedback 105
Current(series)
sampling
A(s)
B
load
ZOUT
ZO
IO
IO
Figure T8.5
(T8.15) ZOUT = ZO (1 + T0)
Voltage(series)mixing
ZIN
A(s)
B
signal
ZI
VF
Figure T8.6
(T8.16) ZIN = ZI (1 + T0)
Current(shunt)mixing ZIN
A(s)
B
signal
ZI
IF
IF
Figure T8.7
(T8.17) ZIN =ZI
1 + T0
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part A5
Ideal voltage amplifier and feedbackapplications
Voltagefollower based
on OA
vo
vi
Figure A5.1
(T8.6)−−−−→vo
v+ = 0
v− = vo
vd = −vo
d vd
d vo= −1 negative feedback
Verify the feedback type for the circuit
vo
vi
(T8.1),(T8.2)−−−−−−−−→(T8.3)
v+ = vi v− = vo ⇒ vo
vi= 1 (A5.1)
Ideal voltage amplifier and feedback applications 107
Non-invertingamplifier
voR
R
vi
Figure A5.2
(T8.6)−−−−→voR
R
v− =voR1
R1 + R2
v+ = 0
vd = − voR1
R1 + R2
d vd
d vo= − R1
R1 + R2= −β > −1 negative feedback
(T8.1),(T8.2)−−−−−−−−→(T8.3)
vi = v+ = v− =voR1
R1 + R2⇒ vo
vi=
(
1 +R2
R1
)
(A5.2)
Invertingamplifier
vo
R1
R2
vi
Figure A5.3
(T8.6)−−−−→
vo
R1
R2
v− =voR1
R1 + R2
v+ = 0
vd = − voR1
R1 + R2
d vd
d vo= − R1
R1 + R2< 0 negative feedback
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Ideal voltage amplifier and feedback applications 108
(T8.1),(T8.2)−−−−−−−−→(T8.3)
v+ = v− = 0vi
R1+
vo
R2= 0
vo = −R2
R1vi ⇒ vo
vi= −R2
R1(A5.3)
Invertingadder vo
R1
R2
vi1
vi2
R1
Figure A5.4
(T8.1),(T8.2)−−−−−−−−→(T8.3)
vi1
R1+
vi2
R1+
vo
R2= 0
vo = − (vi1 + vi2 )R2
R1(A5.4)
Subtractorvo
R1
R2
vi1
vi2
R1
R2
Figure A5.5
(A5.2)−−−−→(A5.3)
vo = −R2
R1vi1 +
R2
R1vi2 =
R2
R1(vi2 − vi1) (A5.5)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part T9
Stability analysis of feedback amplifiers
Stabilityanalysis
An amplifier A(s) stable in an open-loop system could not be stable in a feedbackloop: to use A(s) in a closed-loop system it is necessary a stability analysis. If thestability analysis results in a possible instability, a compensation procedure on theamplifier has to be applied.A stability analysis starts from the loop gain T (s) defined in Part T8. However, tocalculate T (s) it is possible to use the following sequence of operations instead ofcomputing the whole system closed-loop gain.
Single-poleamplifier
Consider a single-pole basic amplifier with transfer function
A(s) =A0
1 + s/ωp
where ωp is the angular frequency of the pole. The related closed-loop trans-fer function is
AV (s) =A0
1 + BA0
1
1 +s
ωp (1 + BA0)
thus the feedback moves the closed-loop pole −ωp,cl along the negative (−ωp
is negative) real axis to
(T9.1) ωp,cl = ωp (1 + BA0)
in other words the feedback system is always stable.
Two-poleamplifier
Consider a stable amplifier with two real and negative poles
A(s) =A0
(1 + s/ωp1) (1 + s/ωp2)
the related closed-loop transfer function has two poles given by
(T9.4)−−−−→ s2 + (ωp1 + ωp2) s + (1 + BA0)ωp1ωp2 = 0
(T9.2) s = −1
2(ωp1 + ωp2) ±
1
2
√
(ωp1 + ωp2)2 − 4 (1 + BA0)ωp1ωp2
Eq. (T9.2) shows that poles become closer as BA0 is increased from zero.
Stability analysis of feedback amplifiers 110
When BA0 =(ωp1 + ωp2)
2
4ωp1ωp2− 1, the poles are coincident, and for greater values of
BA0 the poles are complex conjugates with a real part equal to −1
2(ωp1 + ωp2).
Accordingly, a feedback system based on a stable basic amplifier with two poles isalways stable.
Amplifierswith at leastthree poles
When a basic amplifier with three or more poles is considered, a stability analysis isrequired.
The loop gainmodulus
Consider the generic loop gain transfer function in the Bode form
T (s) = T0
m1∏
i=1
(1 + s/ωnz,i)
m2∏
i=1
(1 − s/ωpz,i)
n∏
i=1
(1 + s/ωp,i)
with modulus
|T (jω)| = |T0|
m1∏
i=1
√
1 + (ω/ωnz,j)2
m2∏
i=1
√
1 + (ω/ωpz,j)2
n∏
i=1
√
1 + (ω/ωp,j)2
where ωnz,i are the angular frequencies of zeros with negative real part, ωpz,i
are the angular frequencies of zeros with positive real part, ωp,i are the poles’ angularfrequencies (we cannot have poles with negative real part since we are consideringonly stable circuits), m = m1 + m2 is the degree of the numerator, and n is thedegree of the denominator. Circuits we are interested in have always n > m, i.e. thedegree of the denominator is always greater than that of the numerator. Therefore,
limω→0
|T (jω)| = |T0| and limω→∞
|T (jω)| ≈ |T0|wm
wn≈ 0 since n > m. Thus, |T (jω)|
is a continuous-always-positive function of ω, it tends to |T0| when ω → 0 and isapproximately zero for high values of ω; hence, |T (jω)| decreases as ω increases.Furthermore, from (T8.4) we have |T0| = |B · A0|; consequently, considering that|B| ≤ 1 (we use always passive components to build the feedback block), |T (jω)|decreases as B decreases.
The loop gainphase
The phase of the loop gain at the angular frequency ω is always given by
(T9.3) 6 T (jω) =
m1∑
i=1
arctan
(ω
ωnz,i
)
−m2∑
i=1
arctan
(ω
ωpz,i
)
−n∑
i=1
arctan
(ω
ωp,i
)
.
Note that, as regards phase, the zeros with a positive real part behave like poles.Therefore, lim
ω→06 T (jω) = 0 and lim
ω→∞6 T (jω) ≈ 90 · (m1 − m2 − n) = −90 · (n − m).
Thus, 6 T (jω) is a continuous function of ω, it is equal to 0 when ω → 0 and tends toan integer multiple of −90 for high values of ω (n−m is integer since both n and mare integers).
Characteristicequation
The poles of the feedback amplifier are the zeros of denominator of (T8.5), i.e.
(T9.4) 1 + T (s) = 0 ⇒ T (jω) = −1 ⇒ |T (jω)| = 1 and 6 T (jω) = −180
this is called the characteristic equation of the feedback loop.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Stability analysis of feedback amplifiers 111
Loop gainphase
From the above considerations, considering B=1 (i.e., the worst case condition forthe loop gain modulus) and calling ωT the angular frequency at which |T (jωT )| = 1and the phase θ of the loop gain at that frequency θ = 6 T (jωT ) we can have thefollowing cases
• θ > −180
The feedback system is stable sincethere is no value of B (0 ≤ B ≤ 1) andω such that T (jω) = −1.
Re [T (jω)]
Im [T (jω)]
1
unit circle
(−1, 0)
T (0)T (j∞)
T (jωT )
θ
B = 1B = 0.5
• θ < −180
There is at least one value of B(0 ≤ B ≤ 1) and of ω such thatT (jω) = −1. The feedback system isunstable.
Re [T (jω)]
Im [T (jω)]
1
unit circle
θ(−1, 0)
T (0)
T (j∞)
T (jωT )
B = 1B = 0.5
• θ = −180
The feedback system is on the borderbetween stability and instability. Thismeans that a little alteration in T0,i.e. a variation of B, can produce anunstable system.
Re [T (jω)]
Im [T (jω)]
1
unit circle
θ(−1, 0)
T (0)
T (j∞)
T (jωT )
B = 1B = 0.5
Loop gainmodulus
Analogously, considering B=1 (i.e., the worst case condition for the loop gainmodulus) and calling ω180 the frequency at which 6 T (jω180) = −180 and M themodulus of the loop gain at that frequency M = |T (jω180)| we can have
• M < 1
The feedback system is stable.Re [T (jω)]
Im [T (jω)]
1
M
unit circle
−180(−1, 0)
T (0)
T (j∞)
T (jω180)
B = 1B = 0.5
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Stability analysis of feedback amplifiers 112
• M > 1
The feedback system is unstable.Re [T (jω)]
Im [T (jω)]
1
unit circle
M
−180(−1, 0)
T (0)
T (j∞)
T (jω180)
B = 1B = 0.5
• M = 1
The feedback system is on the borderbetween stability and instability.
Re [T (jω)]
Im [T (jω)]
1
unit circle
M
−180(−1, 0)
T (0)
T (j∞)
T(jω180)
B = 1B = 0.5
Gain andphase margins
To simplify the stability analysis, two parameters are commonly introduced
• Phase margin PM = 180 + 6 T (jωT )
• Gain margin GM = 20 log
∣∣∣∣
1
T (jω180)
∣∣∣∣
where ωT and ω180 are defined above. According to the previous analysis wehave a stable system only if PM > 0 or, alternatively, if GM > 0. However, sincephase margin and gain margin are equivalent, usually only the phase margin isconsidered.
System withphase marginequal to 90
• PM = 90
The system is stable,but its response in thetime domain is slow (i.e.,it reaches the 90% of thesteady state in relativehigh time).
Time response
t
av(t)
Frequency response
10−3 10−2 10−1 100 101 102 103−2
−1
0
1
|AV
(jω)|
/|A
V0|
(dB)
ω/ωH
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Stability analysis of feedback amplifiers 113
System withphase marginequal to 60
• PM = 60
The system is stableand its response in thetime domain is fast even ifthere are some initial os-cillations. The passbandis greater than systemswith a 90 phase margin.
Time response
t
av(t)
Frequency response
10−3 10−2 10−1 100 101 102 103−2
−1
0
1
|A(j
ω)|
/|A
0|
(dB)
ω/ωH
System withphase marginequal to 30
• PM = 30
The system is stableand its response in thetime domain is fast butthere are too initial os-cillations. The passbandis greater than systemswith a 60 phase marginbut there is a no “flat”passpand due to the peakin the frequency response.
Time response
t
av(t)
Frequency response
10−3 10−2 10−1 100 101 102 103−2
−1
0
1
|A(j
ω)|
/|A
0|
(dB)
ω/ωH
What is thebest phasemargin?
According to the previous plots, systems with 60 phase margin are stable and fasterthan system with PM = 90. The only drawback is the presence of some initialoscillations. However, this oscillations rapidly stabilize thus they do not heavily affectthe system time-domain response.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Stability analysis of feedback amplifiers 114
Compensation
The term “compensation” refers to methods used for modifying the loop gain T (s)of a feedback system so that the it is stable for any desired value of the closed-loopgain.The most common compensation methods are the “compensation by reduction of theloop gain” and “the compensation by reduction of the amplifier’s bandwidth”. Thelatter is usually referred to as “narrow-banding”.For both cases, the most difficult condition to compensate is when B = 1 ( pag. 100),since for a unity-gain feedback (i.e., B = 1) the closed-loop gain is approximately equalto 1 (from (T8.7) we have AV ≈ 1/B = 1). Therefore, the loop gain is equal to thetransfer function of the basic amplifier. Accordingly, only the case when B = 1 iscompensated since if the system is stable for a unity-gain feedback, it will be stablefor every value of B ≤ 1 (remember that B is always lower or equal to 1, since it isobtained using passive networks ( pag. 100)).
Compensationby reductionof the loop
gain
This compensation technique aims at the reduction of the gain of the basic amplifierand it is usually used when a dominant pole is already present in the amplifier.When the basic amplifier has a dominant pole ω1, the transition angular frequencycan be written as ( pag. 103) ωT ≈ |A0|ω1, where A0 has the usual meaning.In a dominant-pole amplifier the phase margin is given by
(T9.9)−−−−→ PM = 90 − arctan
(ωT
ω2
)
where ω2 is the angular frequency of the second pole. Hence, we can find thevalue of |A0| needed to achieve the desired phase margin. Accordingly, we have
(T9.5) |A0| = tan (90 − PM)ω2
ω1=
ω2
ω1 tan (PM)
an example of this compensation technique is plotted in Fig. T9.1. Note that theBode modulus plot before compensation (solid line) and the Bode modulus plot aftercompensation (dashed line) are parallel: this means that the pole angular frequenciesare unchanged. Furthermore, note that the phase is not affected by this compensationtechnique. Only the transition angular frequencies ωT (i.e., the transition angularfrequency before compensation) and ωc
T (i.e., the transition angular frequency aftercompensation) and the loop gains are changed.
10−4 10−3 10−2 10−1 100 101 102 103 104−200
−150
−100
−50
0
50
100
−200
−150
−100
−50
0
ω1 ω2 ωT
−162
ωcT
−115
20
log|A
(jω)|
6A
(jω)
ω
before compensation after compensation
Figure T9.1
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Stability analysis of feedback amplifiers 115
Narrow-banding
Consider the generic transfer function of the basic amplifier (i.e., the transfer functionof the loop gain since B = 1) in the Bode form
(T9.6) A(s) = A0
m1∏
j=1
(1 + s/ωnz,j)
m2∏
j=1
(1 − s/ωpz,j)
n∏
i=1
(1 + s/ωp,i)
where ωp,1 < ωp,2 < · · · < ωp,n, ωnz,1 < ωnz,2 < · · · < ωnz,m1 and ωpz,1 < ωpz,2 <· · · < ωpz,m2 . The narrow-banding compensation technique requires the modificationof the angular frequency of the first pole (i.e., ωp,1) such as to obtain a dominant polesystem
(T9.7) A(s) = A0
m1∏
j=1
(1 + s/ωnz,j)
m2∏
j=1
(1 − s/ωpz,j)
(1 + s/ωD)
n∏
i=2
(1 + s/ωp,i)
where ωD is the angular frequency of the dominat pole obtained after the compesa-tion. In a dominant pole system we can write
(T9.8)
ωcT ≈ |A0|ωD
PM = 180 + 6 A(jωT ) ≈ 90 −n∑
i=2
arctan
(ωc
T
ωp,i
)
≈ 90 − arctan
(ωc
T
ωp,2
)
where ωcT is the transition angular frequency of the compensated system and ωp,2 is
the angular frequency of the second pole. Note that the approximations in (T9.8) arecorrect only if ωD ≪ ωp,i for every i ∈ [2..n], if ωD ≪ ωnz,i for every i ∈ [1..m1] andif ωD ≪ ωpz,i for every i ∈ [1..m2]. From (T9.8), we obtain a general equation forevaluating the angular frequency of the dominat pole ωD that leads to the desiredphase margin
(T9.9) ωD =ωp,2
|A0| tan (PM).
As stated before, the narrow-banding compensation technique is based on the modifi-cation of the angular frequency of the pole of the transfer function with lowest angularfrequency. To this aim, the most commonly used techiques are the “pole dominantcompensation” and “the Miller compensation”.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Stability analysis of feedback amplifiers 116
Pole dominantcompensation
The basic amplifier circuit ( pag. 100) of a feedback system usually consists of cas-caded stages. Each stage can introduce one or more poles and/or zeros in the transferfunction. Let us suppose that nodes Ni and Nj of the basic amplifier contribute tothe pole p1 of the system transfer function with the lowest angular frequency ωp,1
according to the general equation
(T9.10) ωp,1 =1
Req,i−jCeq,i−j
where Req,i−j and Ceq,i−j are the equivalent resistance and capacitance seen betweennodes Ni and Nj.
stage 1 stage k stage nsignal load
Ni
Nj
With the pole dominant compensation technique, the designer modifies the angularfrequency of p1 by connecting a parallel capacitor between nodes Ni and Nj such asto make p1 a dominant pole (hence the name of this technique). The new angularfrequency of p1 is given by
(T9.10)−−−−−→ ωD =1
Req,i−j (Ceq,i−j + CC)(T9.11)
where CC is the so called compensating capacitor.
stage 1 stage k stage nsignal load
Ni
Nj
CC
Then, by using (T9.9) and (T9.11) we evaluate the capacitance of CC that leads tothe desired phase margin
(T9.9)−−−−−→(T9.11)
CC =|A0| tan (PM)
ωp,2Req,i−j− Ceq,i−j . (T9.12)
Note that a value of CC lower than zero means that either the system does not needcompensation or the desired phase margin is not achievable.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Stability analysis of feedback amplifiers 117
Millercompensation
Consider the amplifier circuit in Fig. T9.2 with the input modelled as a Theveninequivalent and the output modelled as a Norton equivalent.
viC1 v1
R1C2 vo
g1v1
R2
A B
Figure T9.2
The circuit has 2 poles with angular frequencies ω1 = 1/ (R1C1) and ω2 = 1/ (R2C2)and its transfer function vo/vi is
(T9.13)vo
vi= −g1R2
1
(1 + sR1C1) (1 + sR2C2).
The Miller compensation technique requires the modification of the above amplifierby connecting a capacitor CM and a resistor RM between nodes A and B as shownin Fig. T9.3. In the following, we evaluate the capacitance of CM and the resistanceof RM needed to obtain the desired phase margin.
C1
CM RM
v1 C2 vo
g1v1
R2
B
vi R1
A
Figure T9.3
Note that this modification of the circuit in Fig. T9.2 does not alter its the passbandvoltage gain since the circuits in Fig. T9.2 and in Fig. T9.3 are equivalent in thepassband region.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Stability analysis of feedback amplifiers 118
The circuit in Fig. T9.3 has three poles and one zero; its transfer function is
(T9.14)vo
vi= −g1R2
1 + s
(
RM − 1
g1
)
CM
a3s3 + a2s2 + a1s + 1
where coefficients a1, a2, a3 can be evaluated by resorting to the time-constantmethod ( pag. 92) and result to
(T7.3)−−−−→(T7.4)
a1 = R1C1 + R2C2 + CM [R1 (1 + g1R2) + R2 + RM ]a2 = R1C1 [R2C2 + (R2 + RM )CM ] + R2C2 (R1 + RM )CM
a3 = R1C1R2C2RMCM
. (T9.15)
Furthermore, by neglecting the contribution of the third pole, the angular frequenciesof the zero, the first and second pole are given by
(T7.2)−−−−→
ωz =1
(
RM − 1
g1
)
CM
ωc1 ≈ 1
a1=
1
R1C1 + R2C2 + CM [R1 (1 + g1R2) + R2 + RM ]
ωc2 ≈ a1
a2=
R1C1 + R2C2 + CM [R1 (1 + g1R2) + R2 + RM ]
R1C1 [R2C2 + (R2 + RM )CM ] + R2C2 (R1 + RM )CM
. (T9.16)
It is clear that the angular frequency of the zero depends on the value of RM . Actually,the zero is unwanted since it may be a source of instability when we put the amplifierin a feedback system, hence its angular frequency should be set as high as possibleto make negligible the effect of the zero on the phase margin. To be more specific weshould set the value of ωz such that ωz ≫ ω2. This can be achieved simply choosingRM as close as possible to 1/g1. Indeed, when RM → 1/g1 we reach the desiredcondition ωz → ∞. Additionally, notice that k = −g1R2 is the passband voltage gainbetween nodes A and B. Therefore, we have ωz → ∞ and
(T9.16)−−−−−→
ωc1 ≈ 1
R1C1 + R2C2 + CM [R1 (1 − k) + R2 + 1/g1]
ωc2 ≈ R1C1 + R2C2 + CM [R1 (1 − k) + R2 + 1/g1]
R1C1 [R2C2 + (R2 + 1/g1)CM ] + R2C2 (R1 + 1/g1) CM
. (T9.17)
Now, let us consider the following conditions
k < 0this condition is required (see below) otherwisethe Miller compensation cannot be used
|k| ≫ 1this condition is usually true since the circuit isan amplifier
CM NOT much lower than C2
If this condition is false than the amplifier is notcorrectly compesated. However, the Miller com-pensation can still be used and the only drawbackis that the actual phase margin after the compen-sation is different from the desired one.A value C2/CM ≤ 10 is accettable.
Under these conditions, (T9.17) approximates to
(T9.18) ωc1 ≈ 1
R1C1 + R2C2 + R1 (1 − k)CM≈ 1
R1 [C1 + (1 − k)CM ]
(T9.19) ωc2 ≈ R1 [C1 + (1 − k)CM ]
R1R2 [C1 (C2 + CM ) + C2CM ]≈ C1/R2 + g1CM
C1CM + C2CM≈ g1
C1 + C2
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Stability analysis of feedback amplifiers 119
From (T9.18) it is clear that the capacitor CM is seen by the circuit as if it was inparallel to C1 and multiplied by 1− k. This is called “Miller effect” (hence the nameof this compensation technique) ( pag. 60) and it is a direct consequence of theMiller theorem ( pag. 59).Comparison of the angular frequencies of the poles of the circuits in Fig. T9.2 andFig. T9.3 shows that the Miller compensation modifies both the first and the secondpole of the circuit. To be more specific, the angular frequency of the first pole of thecompensated circuit is lower than the first pole in the original circuit (i.e., ωc
1 < ω1),whereas the angular frequency of the second pole in the compensated circuit is higherthan the second pole in the original circuit (i.e., ωc
2 > ω2). This phenomenon is called“pole splitting”.
Finally, by applying (T9.9) we obtain the capacitance of CM that leads to the desiredphase margin
(T9.18)−−−−−→(T9.19)
CM =C1 + C2
|k| g1R1|A0| tan (PM) − C1
|k| . (T9.20)
As in the case of the dominant pole technique ( pag. 116), a value of CM lower thanzero means that either the system does not need compensation or the desired phasemargin is not achievable.
Comparingthe
effectivenessof the poledominant
compensan-tion and theMiller com-pensantion
Considering the circuit in Fig. T9.2, let us compensate it for a given phase marginPM with both the pole dominant compesantion and the Miller compesantion.By observing the circuit we can have 2 possible cases: ω1 < ω2 and ω1 > ω2.First let us suppose ω1 < ω2. In this case, with the pole dominant compensation wehave to introduce a capacitor CC between node A and ground as shown in Fig. T9.4.
vi C1 CCv1
R1C2 vo
g1v1
R2
A B
Figure T9.4
Therefore the angular frequencies of the poles of the compensated system are
(T9.21)
ωc1 =
1
R1 (C1 + CC)
ωc2 = ω2 =
1
R2C2
and by applying (T9.9) we obtain
(T9.22)1
R1 (C1 + CC)=
1
R2C2
|A0| tan (PM)⇒ CC =
R2
R1C2 |A0| tan (PM) − C1.
Comparison of (T9.22) and (T9.20) shows that if ω1 < ω2 the dominant pole com-pensation is more effective (i.e., CC < CM ) than the Miller compensation if
(T9.23)
R2
R1C2 |A0| tan (PM) <
C1 + C2
|k| g1R1|A0| tan (PM) ⇒ |k| g1R2 <
C1 + C2
C2
⇒ k2 <C1 + C2
C2⇒ |k| <
√C1 + C2
C2
.
Note that this condition was obtained ignoring the term −C1/ |k| in (T9.20) and theterm −C1 in (T9.22) since they are divided by |A0| tan (PM) and hence negligible.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Stability analysis of feedback amplifiers 120
Now let us consider the case when ω1 > ω2. In this case, with the pole dominantcompensation we have to introduce a capacitor CC between node B and ground asshown in Fig. T9.5.
vi
C1 v1
R1 C2 CCvo
g1v1
R2
A B
Figure T9.5
Therefore the angular frequencies of the poles of the compensated system are
(T9.24)
ωc1 = ω1 =
1
R1C1
ωc2 =
1
R2 (C2 + CC)
and by applying (T9.9) we obtain
(T9.25)1
R2 (C2 + CC)=
1
R1C1
|A0| tan (PM)⇒ CC =
R1
R2C1 |A0| tan (PM) − C2.
Comparison of (T9.25) and (T9.20) shows that if ω1 > ω2 the dominant pole com-pensation is more effective (i.e., CC < CM ) than the Miller compensation if
(T9.26)
R1
R2C1 |A0| tan (PM) <
C1 + C2
|k| g1R1|A0| tan (PM) ⇒ g1
R21
R2|k| <
C1 + C2
C1
⇒ g21R
21 <
C1 + C2
C1⇒ g1R1 <
√
C1 + C2
C1
.
As done in the previous case, this condition was obtained ignoring the term −C1/ |k|in (T9.20) and the term −C2 in (T9.25) since they are divided by |A0| tan (PM) andhence negligible.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part E2
Compensation examples
Compensationexample
Given the basic amplifier with the following transfer function (i.e., the loop gaintransfer function since B = 1)
A(s) =A0
(1 + s/ω1) (1 + s/ω2) (1 + s/ω3)
where A0 = 3000, ω1 = 1 rad/s, ω2 = 10 rad/s e ω3 = 100 rad/s, calculate thedominant pole required to give a phase margin of 60.As explained above we have to add a dominant pole to the system, let us call ωD
the angular frequency of the added pole. The new system will have a compensatedtransfer function given by
AC(s) =A0
(1 + s/ωD) (1 + s/ω1) (1 + s/ω2) (1 + s/ω3)
In a single-pole system the gain-bandwidth product ( pag. 103) is approximatelyequal to the transition angular frequency. This is also approximately true for asystem with a dominant pole ( pag. 92).Accordingly, since ωD is the bandwidth ( pag. 92) of the compensated transferfunction and A0 is its gain, we can evaluate the transition angular frequency of thecompensated system simply with ωc
T ≈ |A0|ωD and thus PM = 180 + 6 AC(jωcT )
where
(T9.3)−−−−→ 6 AC(jωcT ) = − arctan
(ωc
T
ωD
)
− arctan
(ωc
T
ω1
)
− arctan
(ωc
T
ω2
)
− arctan
(ωc
T
ω3
)
We don’t know ωcT but we can write
• arctan
(ωc
T
ωD
)
= arctan (|A0|) ≈ 90 since |A0| ≫ 1
• arctan
(ωc
T
ω2
)
= arctan
(ωc
T
ω3
)
≈ 0 since ωcT ≪ ω2 and ωc
T ≪ ω3
thus the phase margin only depends on the angular frequency ω1
PM = 90 − arctan
(ωc
T
ω1
)
.
Compensation examples 122
We want a phase margin of 60 so
PM = 90 − arctan
(ωc
T
ω1
)
= 60 ⇒ arctan
(ωc
T
ω1
)
= 30 ⇒ ωcT
ω1= tan (30)
and thus ωcT = ω1 tan (30) = ω1
√3
3⇒ ωD =
ω1
|A0|
√3
3≈ 192.5 µrad/s .
This is the angular frequency of the dominant pole that makes the phase marginequal to 60. Now we have to verify all the assumptions used to find the value of ωD.
ωcT ≈ |A0|ωD ? ⇒ ωc
T = 0.51 rad/s ≈ |A0|ωD = 0.57 rad/sarctan (|A0|) ≈ 90 ? ⇒ arctan (3000) = 89.981
ωcT ≪ ω2 ? ⇒ arctan (0.57/10) = 3.26
ωcT ≪ ω3 ? ⇒ arctan (0.57/100) = 0.327
PM = 60 ? ⇒ PM = 60.148
Bode plots forthe original
andcompensated
systems
10−5 10−4 10−3 10−2 10−1 100 101 102 103 104−200
−150
−100
−50
0
50
100
−360
−270
−180
−90
0
ωD ω1 ω2 ω3 ωT
−229
ωcT
−120
20
log|A
(jω)|
6A
(jω)
ω
before compensation after compensation
Compensationexample on asimple 3-stage
amplifier
Given the following amplifier
R1
vi C1 C2v1 v2
g1v1
R2 C3 vo
g2v2
R3
A B
Figure E2.1
withR1 = 50 Ω R2 = 10 kΩ R3 = 500 Ω C1 = 1 nFC2 = 20 nF C3 = 1 nF g1 = 200 mS g2 = 400 mS.Supposing to use this amplifier as a basic amplifier in a feedback system with B = 1,compensate the amplifier so that its phase margin is 60.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Compensation examples 123
The circuit voltage transfer function vo/vi is
A(s) =1
1 + sR1C1
−g1R2
1 + sR2C2
−g2R3
1 + sR3C3=
g1g2R2R3
(1 + sR1C1) (1 + sR2C2) (1 + sR3C3)Thus
|A0| = 4 · 105 ω1 =1
R2C2= 5 krad/s
ω2 =1
R3C3= 2 Mrad/s ω3 =
1
R1C1= 20 Mrad/s.
According to the previous section we can compensate the amplifier connectinga capacitor between nodes related to the system pole with lowest angular frequency.Since the pole with lowest frequency is ω1, we have to connect a capacitor betweennodes A (see Fig. E2.1) and ground (i.e., in parallel with C2).
R1
vi C1 C2v1 v2
g1v1
R2 C3 vo
g2v2
R3
A
CC
The angular frequency of the dominant pole is ωD =1
R2 (C2 + CC), the pole with
angular frequency ω1 is no more present, and the second pole of the system has anangular frequency equal to ω2 (it is not affected by CC). Now we have to find thecapacitance CC that gives an amplifier with a phase margin of 60.
(T9.9)−−−−→ ωD =1
R2 (C2 + CC)=
ω2
|A0| tan (PM)
Hence
CC =|A0| tan (PM)
R2ω2− C2 ≈ 35 µF
(this is only an example, usually the compensating capacitor has smaller ca-pacitance). Now we have to verify the underlying hypotheses of equation (T9.9):
ωcT = |A0|ωD ≪ ω3 ? ⇒ arctan
(5 · 105 · 2.325
2 · 107
)
= 3.32
Millercompensation
example
Consider the example circuit in Fig. E2.2 with R1 = R2 = 10 kΩ, C1 = 100 pF,C2 = 1 pF and g1 = 50 mS.
viC1 v1
R1C2 vo
g1v1
R2
A B
Figure E2.2
By using the time-constant method ( pag. 92) the circuit poles are
(T7.2)−−−−→
ω1 =1
R1C1= 1 Mrad/s
ω2 =1
R2C2= 10 Mrad/s
(E2.1)
and its passband gain is A0 = −g1R2 = −500.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Compensation examples 124
The passband gain between nodes A and B is equal to k = −g1R2 = −500, thus, wecan compensate the circuit using the Miller compensation connecting a capacitor CM
and a resistor RM = 1/g1 = 20 Ω between nodes A and B.
C1
CM RM
v1 C2 vo
g1v1
R2
B
vi R1
A
Figure E2.3
Hence, we have
(T9.20)−−−−−→ CM =C1 + C2
|k| g1R1|A0| tan (PM) − C1
|k| ≈ 150 fF (E2.2)
and C2/CM ≈ 6.67 < 10 means that the Miller compensation is effective. By usingthe pole dominant compensation we have to introduce a capacitor CC between nodeA and ground since ω1 < ω2.
vi C1 CCv1
R1C2 vo
g1v1
R2
A B
Figure E2.4
Therefore,
(T9.22)−−−−−→ CC =R2
R1C2 |A0| tan (PM) − C1 ≈ 766 pF (E2.3)
thus it is clear that the Miller compensation is more effective seeing that CM ≪ CC .This result can be simply obtained evaluating the condition in (T9.23) that, beingfalse, reveals that the Miller compensation is more effective than the pole dominantcompensation for the considered circuit
(T9.23)−−−−−→ |k| <
√
C1 + C2
C2⇒ 500 <
√
101 · 10−12
1 · 10−12≈ 10. (E2.4)
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part T10
Techniques used to analyze feedbackamplifiers
Rosenstark’sformula
Rosenstark’s formula is a powerful methodology for evaluating the closed-loop gainof a feedback system when the system complexity is so high to make Kirkoff’s lawsnot effective. According to Rosenstark formula the closed-loop gain of a system is
(T10.1) AV =GA · T + GD
1 + T
where GA is the asymptotic gain, GD is the direct gain and T is the return ratio (notto be confused with the loop gain defined in Part T8).Note that equation (T10.1) is valid even for systems without feedback, in this caseGA = T = 0, thus AV = GD.
Return ratio
Consider a circuit with a non-zero number of dependent generators (in a feedbacksystem there is at least one dependent generator). Each generator has a control lawgiven in the form y = k · x, where x is the controlling electrical variable, k is the gainand y is the generated electrical variable. For example, in the circuit
Rs
vs
g•vc
R2
vc
R1
vo
there is a dependant current generator g · vc controlled by the voltage vc. In this casek is a conductance. To evaluate the return ratio, set all independent generators tozero (e.g. vs = 0), choose a dependent generator (e.g. g · vc) and substitute it withan independent generator Y generating the same electrical variable with the samepolarity. Let us call the controlling variable X (e.g. X = vc). The return ratio isdefined as
(T10.2) T = −kX
Y
Techniques used to analyze feedback amplifiers 126
Asymptoticgain
Calling so the system’s output signal (e.g. so = vo) and si the system’s input signal(e.g. si = vs), the asymptotic gain is defined as the system’s gain so/si when T → ∞.According to (T10.2), T → ∞ is equivalent to k → ∞ (e.g. g → ∞)
(T10.3) GA = limT→∞
so
si= lim
k→∞
so
si
Direct gain
The direct gain is defined as the system’s gain so/si when T → 0 (i.e., k → 0).
(T10.4) GD = limT→0
so
si= lim
k→0
so
si
Blackman’sformula
Blackman’s formula is useful to evaluate equivalent impedances in complex systems.Consider the case when the equivalent impedance Zeq between nodes A and B of thenetwork in figure is required.
A B
network
Z
Blackman’s formula states that
(T10.5) Zeq = Z01 + TSC
1 + TOC
where Tsc is the return ratio (same definition as for the Rosenstark’s formula) whennodes A and B are short-circuited, Toc is the return ratio when nodes A and B areopen-circuited and Z0 is the equivalent impedance seen from A-B when the dependentgenerator used for evaluating Tsc and Toc is off.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part E3
Examples of the Rosenstark andBlackman formulas
Return ratioexample
Rs Y
R2X
R1
is
i1
is
v2v1
X = Rsis is = i1 + Y i1 =v1
R1v1 = − (X + v2) v2 = R2is =
R2
RsX
v1 = −(
1 +R2
Rs
)
X i1 = − X
R1
(
1 +R2
Rs
)
is = − X
R1
(
1 +R2
Rs
)
+ Y
X = − X
R1(Rs + R2) + RsY ⇒ T = −g
X
Y= −g
R1Rs
R1 + R2 + Rs
Asymptoticgain example
Rs
vs
g•vc
R2vc
R1
vo
is is
Note that if g → ∞ then vc → 0 because the product g · vc must be finite (otherwisethe circuit violates the conservation of energy law because is able to produce an
infinite energy g · vc from a finite source of energy vi).vc → 0 ⇒ is =vs
Rs
vo = R2is = vsR2
Rs⇒ GA =
vo
vi=
R2
Rs
Examples of the Rosenstark and Blackman formulas 128
Direct gainexample
Rs
vsR2
R1
vo
is is
is
vo = R2vs
R1 + R2 + Rs⇒ GD =
vo
vi=
R2
R1 + R2 + Rs
Rosenstark’sformulaexample
Joining previous results we have
AV =(1 − gR1)R2
R1 + R2 + (1 − gR1)Rs
Blackman’sformulaexample
Given the circuit in figure evaluate the equivalent resistance between nodes A and B
(i.e., ground).
Rs
vs
g•vc
R2vc
R1
vo
B
A
Blackman’sformulaexample:
evaluation ofTsc
Rs Y
X
R1
B
A
R1 and Rs are in parallel
X = R1//RsY ⇒ Tsc = −gX
Y= −gR1//Rs
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Examples of the Rosenstark and Blackman formulas 129
Blackman’sformulaexample:
evaluation ofToc
Rs Y
X
R1
B
A
There is no current flowing in Rs, and the current generated by Y goes all in R1
X = 0 ⇒ Toc = −gX
Y= 0
Blackman’sformulaexample:
evaluation ofR0
Rs
R1
B
A
vx
ix
R0 =vx
ix= R1 + Rs
Blackman’sformulaexample
Joining previous results we have
Req = (R1 + Rs) (1 − gR1//Rs) = R1 + (1 − gR1)Rs
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Part E4
Esercizi su amplificatori, retroazione ecompensazione
Esercizio A
Dato il seguente circuito
R R
C CV I VO
R
C
(T7.3)−−−−→(T7.4)
a1 =
n∑
i=1
R0i Ci, a2 =
n−1∑
i=1
R0i Ci
n∑
j=i+1
RijCj
calcolare la funzione di trasferimento in bassa frequenza (ω = 0). Calcolare i coeffi-cienti a1 ed a2 della funzione di trasferimento, nel dominio di Fourier, con il metododelle costanti di tempo; verificare la validita dell’approssimazione a polo dominantee, dopo aver definito la frequenza di taglio, nel caso sia valida l’approssimazione cal-colarla numericamente (R1 = R2 = R3 = 1 kΩ, C1 = C2 = C3 = 1 pF).
Esercizio B
Si consideri il seguente circuito a due poli
CVS
G VI
R
RS
RV I VOC
Dopo aver ricavato la funzione di trasferimento VO/VS nel dominio di Laplace edevidenziato il guadagno in continua, compensare opportunamente il circuito al fine diottenere un circuito a polo dominante con un margine di fase pari a 60; si giustifichiinoltre la scelta del metodo di compensazione usato.RS = 50 Ω, R1 = 5 kΩ, R2 = 1 kΩ, G = 30 mS, C1 = 5 pF, C2 = 10 pF
Esercizi su amplificatori, retroazione e compensazione 131
Esercizio C
Si consideri il seguente circuito a due poli
CIS
GV I
R RV I VOC
Dopo aver ricavato la funzione di trasferimento VO/IS nel dominio di Laplace edevidenziato il guadagno in continua, compensare opportunamente il circuito al fine diottenere un circuito a polo dominante con un margine di fase pari a 60; si giustifichiinoltre la scelta del metodo di compensazione usato. Per la compensazione del circuitosi consideri B = 1 Ω−1.R1 = 5 kΩ, R2 = 1 kΩ, G = 30 mS, C1 = 5 pF, C2 = 10 pF
Esercizio D
Si consideri il seguente circuito a due poli
C GV IR
RV I VOCVS
• Ricavare la funzione di trasferimento VO/VS nel dominio di Laplace evidenziando ilguadagno in continua.• Supponendo di retroazionare tale amplificatore (blocco A) con un guadagno B = 1valutare la frequenza di taglio del sistema retroazionato. Dimostrare analiticamentela formula utilizzata nel calcolo.R1 = 10 kΩ, R2 = 1 kΩ, G = 10 S, C1 = C2 = 1 pF
Esercizio E
Dato il seguente amplificatore differenziale (con specchio di corrente sui source), cal-colare il CMRR evidenziando e commentando tutti i passaggi.
RD RD
M M
VDD
M
-VSS
M
RC
vi vi
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Esercizi su amplificatori, retroazione e compensazione 132
Esercizio F
Dati i seguenti amplificatori basati su MOSFET e BJT e polarizzati con 4 resistori,trovare le condizioni in forma simbolica per raggiungere lo stesso guadagno e com-mentare il risultato. (VSS = VDD = VCC = VEE = 5 V)
RD
M
VDD
-VSS
vi
RS CS
R
R
CIRs
CO
RL vo
RC
Q
VCC
-VEE
vi
RE CE
R
R
CIRs
CO
RL vo
Esercizio GDisegnare due amplificatori in configurazione invertente e non invertente rispettiva-mente, utilizzando un amplificatore operazionale caratterizzato da un guadagno ditensione A = 104 ± 10%, Ro = 500 Ω. Calcolare come la tolleranza su A si ripercuotasul guadagno di tensione dell’amplificatore retroazionato.
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Bibliography
[1] J. Millman and A. Grabel, Microelettronica, 2nd ed. McGraw-Hill, 1988.
[2] URL: http://hyperphysics.phy-astr.gsu.edu/hbase/hframe.html
[3] URL: http://en.wikipedia.org/wiki/Zener breakdown
[4] URL: http://en.wikipedia.org/wiki/Avalanche breakdown
[5] URL: http://en.wikipedia.org/wiki/Two-port network
[6] URL: http://en.wikipedia.org/wiki/Common-mode rejection ratio
Index
Eq. T1.1, 8Fig. T1.1, 8Eq. T1.2, 9Eq. T1.3, 9Fig. T1.2, 9Eq. T1.4, 9Eq. T1.5, 9Fig. T1.3, 9Eq. T1.6, 10Fig. T1.4, 10Fig. T1.5, 10Fig. T1.6, 10Eq. T1.7, 11Fig. T1.7, 11Eq. T1.8, 11Eq. T1.9, 11Eq. T2.1, 13Eq. T2.2, 15Eq. T2.3, 15Fig. T2.1, 16Fig. T2.2, 17Eq. T2.4, 17Eq. T2.5, 17Eq. T2.6, 18Eq. T3.1, 20Fig. T3.1, 21Eq. T3.2, 21Eq. T3.3, 21Eq. T3.4, 21Eq. T3.5, 21Eq. T3.6, 22Fig. T3.2, 23Eq. T3.7, 23Eq. T3.8, 23Fig. T3.3, 24Eq. T3.9, 24Eq. T3.10, 25Eq. T3.11, 25Eq. T3.12, 25Fig. T4.1, 31Eq. T4.1, 31Fig. T4.2, 32Eq. T4.2, 32Eq. T4.3, 32Eq. T4.4, 33Eq. T4.5, 33Eq. T4.6, 33Fig. T4.3, 35Fig. T4.4, 35Eq. T4.7, 36Fig. T4.5, 36Fig. T4.6, 36
Eq. T4.8, 36Eq. T4.9, 36Fig. T4.7, 37Eq. T4.10, 37Eq. T4.11, 37Fig. T5.1, 38Fig. T5.2, 38Eq. T5.1, 39Eq. T5.2, 39Eq. T5.3, 39Eq. T5.4, 39Eq. T5.5, 39Eq. T5.6, 40Eq. T5.7, 40Eq. T5.8, 40Eq. T5.9, 40Eq. T5.10, 41Eq. T5.11, 41Eq. T5.12, 43Eq. T6.1, 44Eq. T6.2, 45Eq. T6.3, 45Fig. T6.1, 45Fig. T6.2, 45Eq. T6.4, 46Eq. T6.5, 46Eq. T6.6, 46Fig. T6.3, 46Eq. T6.7, 46Eq. T6.8, 47Eq. T6.9, 47Eq. T6.10, 47Fig. T6.4, 48Eq. T6.11, 48Eq. T6.12, 48Eq. T6.13, 48Eq. T6.14, 48Eq. T6.15, 49Eq. T6.16, 49Eq. T6.17, 49Eq. T6.18, 49Eq. T6.19, 49Fig. T6.5, 49Eq. T6.20, 50Eq. N1.1, 52Eq. N1.2, 52Eq. N1.3, 52Fig. N1.1, 53Eq. N1.4, 53Eq. N1.5, 53Eq. N1.6, 53Eq. N1.7, 54
Index 135
Eq. N1.8, 55Fig. N1.2, 55Eq. N1.9, 55Eq. N1.10, 55Fig. N1.3, 56Eq. N1.11, 56Eq. N1.12, 56Fig. N1.4, 56Eq. N1.13, 56Eq. N1.14, 56Fig. N1.5, 57Eq. N1.15, 57Eq. N1.16, 57Fig. N1.6, 57Eq. N1.17, 57Fig. N1.7, 57Eq. N1.18, 57Fig. N1.8, 58Eq. N1.19, 58Fig. N1.9, 58Eq. N1.20, 58Fig. N1.10, 59Eq. N1.21, 59Eq. N1.22, 59Fig. N1.11, 59Eq. N1.23, 59Eq. N1.24, 59Eq. N1.25, 60Fig. N1.12, 60Fig. N1.13, 60Fig. N1.14, 60Eq. N1.26, 60Eq. N1.27, 61Fig. A2.1, 62Fig. A2.2, 63Eq. A2.1, 63Eq. A2.2, 63Eq. A2.3, 63Fig. A2.3, 64Eq. A2.4, 65Eq. A2.5, 66Eq. A2.6, 66Eq. A2.7, 66Eq. A2.8, 66Eq. A2.9, 67Fig. A2.4, 67Eq. A2.10, 68Eq. A2.11, 68Eq. A2.12, 69Eq. A2.13, 70Eq. A2.14, 71Eq. A2.15, 71Eq. A2.16, 72Eq. A2.17, 72Fig. A2.5, 73Eq. A2.18, 73Fig. A2.6, 73Fig. A2.7, 75Fig. E1.1, 76Fig. E1.2, 77Eq. E1.1, 78
Eq. E1.2, 78Eq. E1.3, 78Eq. E1.4, 78Fig. E1.3, 78Eq. E1.5, 79Eq. E1.6, 79Fig. E1.4, 79Eq. E1.7, 79Eq. E1.8, 79Eq. E1.9, 79Eq. E1.10, 80Eq. E1.11, 80Eq. E1.12, 80Eq. E1.13, 80Eq. E1.14, 80Eq. A3.1, 82Eq. A3.2, 83Eq. A3.3, 84Eq. A3.4, 84Eq. A3.5, 84Fig. A3.1, 85Fig. A3.2, 85Fig. A3.3, 86Fig. A3.4, 87Eq. A3.6, 87Fig. A3.5, 88Eq. A3.7, 88Eq. A3.8, 88Eq. A3.9, 88Eq. A3.10, 89Fig. T7.1, 90Eq. T7.1, 90Eq. T7.2, 92Eq. T7.3, 93Eq. T7.4, 93Fig. A4.1, 94Eq. A4.1, 95Eq. A4.2, 95Eq. A4.3, 95Fig. A4.2, 96Eq. A4.4, 96Eq. A4.5, 96Eq. A4.6, 97Eq. A4.7, 97Eq. A4.8, 98Eq. A4.9, 98Eq. T8.1, 99Eq. T8.2, 100Eq. T8.3, 100Eq. T8.4, 100Fig. T8.1, 100Eq. T8.5, 100Eq. T8.6, 101Eq. T8.7, 101Eq. T8.8, 101Eq. T8.9, 101Eq. T8.10, 102Eq. T8.11, 103Eq. T8.12, 103Eq. T8.13, 103Fig. T8.2, 104
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena
Index 136
Fig. T8.3, 104Fig. T8.4, 104Eq. T8.14, 104Fig. T8.5, 105Eq. T8.15, 105Fig. T8.6, 105Eq. T8.16, 105Fig. T8.7, 105Eq. T8.17, 105Fig. A5.1, 106Eq. A5.1, 106Fig. A5.2, 107Eq. A5.2, 107Fig. A5.3, 107Eq. A5.3, 108Fig. A5.4, 108Eq. A5.4, 108Fig. A5.5, 108Eq. A5.5, 108Eq. T9.1, 109Eq. T9.2, 109Eq. T9.3, 110Eq. T9.4, 110Eq. T9.5, 114Fig. T9.1, 114Eq. T9.6, 115Eq. T9.7, 115Eq. T9.8, 115Eq. T9.9, 115Eq. T9.10, 116Eq. T9.11, 116Eq. T9.12, 116Fig. T9.2, 117Eq. T9.13, 117Fig. T9.3, 117Eq. T9.14, 118Eq. T9.15, 118Eq. T9.16, 118Eq. T9.17, 118Eq. T9.18, 118Eq. T9.19, 118Eq. T9.20, 119Fig. T9.4, 119Eq. T9.21, 119Eq. T9.22, 119Eq. T9.23, 119Fig. T9.5, 120Eq. T9.24, 120Eq. T9.25, 120Eq. T9.26, 120Fig. E2.1, 122Fig. E2.2, 123Eq. E2.1, 123Fig. E2.3, 124Eq. E2.2, 124Fig. E2.4, 124Eq. E2.3, 124Eq. E2.4, 124Eq. T10.1, 125Eq. T10.2, 125Eq. T10.3, 126
Eq. T10.4, 126Eq. T10.5, 126
prof. S. Rocchi, ing. M. Poli - Dipartimento di Ingegneria dell’Informazione - Universita degli Studi di Siena