tdts 08 advanced computer architecturetdts08/lectures/16/lec1.pdf2016-10-28 1 zebo peng embedded...
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2016-10-28
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Zebo Peng
Embedded Systems Laboratory (ESLAB)Dept. of Computer and Information Science (IDA)
Linköping University
TDTS 08
Advanced Computer Architecture[Datorarkitektur]
www.ida.liu.se/~TDTS08
22Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Contact Information
Zebo Peng, course leader and examiner
Email: [email protected]
Arian Maghazeh, course and lab assistant
Email: [email protected]
Helene Meisinger, course secretary
Email: [email protected]
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33Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Course Information Web page http://www.ida.liu.se/~TDTS08
Lectures 12 lectures.
Lecture notes will be available at the web page usually one day before each lecture.
The whole set of last year’s lecture notes is on the web.
Lecture notes following the course book’s structure are also available on the web.
Examination Written exam, closed book.
Previous exam examples are at the course web site.
44Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Course Information (cont’d)
Literature William Stallings: Computer Organization and
Architecture, 10th edition, Peason, 2016.
Additional articles available at the website.
http://williamstallings.com/ComputerOrganization/
• Student resources, including relevant websites and documents.
You can also use:
• Older editions of Stallings’ book.
• Books covering the same subjects.
Ex. Hennessy and Patterson: “Computer Architecture: A Quantitative Approach.”
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55Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Course Information (cont’d) Labs
Hands-on exercises with concepts taught in the course.
Use tools for architecture evaluation via simulation.
Give insights in various trade-offs involved in the design of computers.
Enhance the understanding of parallel computer systems.
Lab assignments Lab 1: Cache Memories.
Lab 2: Instruction Pipelining.
Lab 3: Superscalar Processors.
Lab 4: VLIW Processors.
Lab 5: Multiprocessor and Multi-Computer Systems.
Please build group of two students and sign up for the labs in the website before November 8.
Additional information to be given in the seminar (lesson) Wednesday November 9, 15-17.
66Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Lecture 1
What is expected from this course
CPU and instruction execution
Computer architecture: concepts and definitions
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77Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Computer Architecture
Computer architecture refers to those attributes of a computer system that are visible to programmers, or have a direct impact on the logical execution of programs.
MemorySystem
Instruction
SetALU
Registers
I/O Devices
Control Logic
88Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Many Definitions for CA
“The science and art of selecting and interconnecting hardware components to create computers that meet functional, performance and cost goals.”
“The theory behind the design of a computer.”
“The conceptual design and fundamental operational structure of a computer system.”
“The arrangement of computer components and their relationships.”
…
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99Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Typical Architecture Attributes
The instruction set.
Data representation methods.
The basic hardware units in the CPU.
Functions of the main components.
Interconnections of the main components.
Instruction execution.
Memory organization.
I/O mechanisms and their control.
…
1010Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
What is a Computer?
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1111Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Definition of a Computer
A computer is a data processing machine which is operated automatically under the control of a list of instructions stored in its main memory.
Central Processing Unit
(CPU)
MainMemory
Data transfer
Control
Computer
1212Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
A Computer System A computer system consists of a computer and its
peripherals.
Computer peripherals include input devices, output devices, and secondary memories.
Computer
Secondarymemory
Computer System
Input device
Output device
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1313Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
2%
98%
Microprocessor Market Share
General-purpose computers
1414Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Basic Principles of Computers
Virtually all modern computer designs are based on the von Neumann architecture principles:
Data and instructions are stored in a single read/write memory.
The contents of this memory are addressable by location, without regard to what are stored there.
Instructions are executed sequentially (from one instruction to the next) unless the order is explicitly modified.
CPU
Memory
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1515Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Why von Neumann Architecture?
General-purpose, programmable. They can solve very different problems
by executing different programs.
Instruction execution is done automatically.
It can be built with very simple electronics components: Data processing function is performed
by electronic gates.
Data storage function is provided by memory cells.
Data communication is achieved by electrical wires.
CPU
Memory
1616Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Technology Development
Eniac, 1946
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1717Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Moore’s Law
Similar improvement in:Clock Frequency (every 2 years)PerformanceMemory capacity
Number of transistors per chipwould double every 1.5 years.1000 M
25 M
50 M
750 M
# of trans.
0080 85 90 9575
year
05 10
1818Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Intel Microprocessor Evolution
18 Images courtesy of Intel Corporation
Intel 40042.3 Thousands transistors10000 nm
Intel 8‐core Xeon2.3 Billion Transistor
45nm
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1919Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Lecture 1
What is expected from this course
CPU and instruction execution
Computer architecture: concepts and definitions
2020Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
CPU
Central Processing Unit (CPU)
Control UnitArithmeticand Logic
Unit
The Central Processing Unit (CPU), also called processor, includes two main units: A program control unit (CU), and An Arithmetic and Logic Unit (ALU).
Register
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2121Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
CPU (Cont’d)
The primary function of a CPU is to execute the instructions stored in the main memory.
An instruction tells the CPU to perform one of its basic operations.
The CPU includes a set of registers, which are temporary storage devices used to hold control information, key data, and intermediate results.
It includes also an internal bus infrastructure, which provides data movement paths among the control unit, ALU, and registers.
The CU is the one which interprets (decodes) the instruction to be executed and "tells" the other components what to do.
2222Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
A CPU Example
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2323Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Registers
CPU must have some working space (temporary storage).
These storage units are called registers.
They are the top level component in the memory hierarchy.
The number and functions of the registers vary between different computers.
Register organization is one of the major design decisions.
2424Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Register Organization
The registers serve two main functions: User-Visible Registers: used by machine/assembly
language programmers to minimize memory access.
• General-purpose registers
• Data registers
• Address registers
• Condition code registers
Control and Status Registers: used by the control unit to control the operation of the CPU, and by the operating system to control the execution of programs.
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2525Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Machine Instructions
The CPU can only execute machine code in binary format, called machine instructions.
A machine instruction specifies the following information: What has to be done (operation code)
To whom the operation applies (source operands)
Where does the result go (destination operand)
How to continue after the operation is finished (next instruction address).
Machine instructions are of four types: Arithmetic and logic operations.
Data transfer between memory and CPU registers.
Program control (e.g., conditional branches).
I/O transfer.
2626Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Instruction Set Design The design of an instruction set is critical to the operations
of a computer system. The most important issues are:
Operation repertoire — How many and which operations to provide, and how complex these operations should be.
Data types — Which data types to be supported.
Instruction format — Length, number of addresses, size of various fields, etc.
Registers — Number of CPU registers and their use.
Addressing — Which modes to be provided.
The issues are highly interrelated and must be considered together.
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2727Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
CPU
Instruction Execution Mechanism
Control Unit
Main Memory
Address D/I
ALU
PC
MAR
AR
MBR
IR
2828Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Instruction Execution
CPU
Control Unit ALU
PC
MAR
AR
MBR
IR
fetch decode execute
fetch cycle execute cycle
PC -> MARM[MAR] -> MBRMBR -> IRPC + 1 -> PC
Decode(IR) Perform the specified operation
(memory access may be needed)(PC may be changed)
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2929Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Machine Cycles and Performance
The execution of an instruction is carried out in a machine cycle (instruction cycle).
The CPU executes one instruction after the other, cycle by cycle, repeatedly.
The machine cycle time (or instruction execution time) of a computer gives an indication of its performance (speed). Ex. a computer can have a performance of 733 MIPS (Millions of
Instructions Per Second).
Since different instructions need different time to execute, the average instruction execution time is often used.
Very common, FLOPS (FLoating-point Operations Per Second) is used nowadays.
3030Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Summary
A computer executes repeatedly a series of instructions (called programs) stored in its main memory:
It performs data processing operations specified by the programs.
It runs the programs automatically, with no need for human intervention.
It can perform the operations in extremely high speed.
It can store and manipulate a large amount of data.
It can communicate with each other and with users in an efficient way.
It represents program and data in the same way, which leads to flexibility.
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3131Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Lecture 1
What is expected from this course
CPU and instruction execution
Computer architecture: concept and definitions
3232Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Computer Organization Computer organization refers to the operational units and their
interconnections that realize the architectural specifications.
Ex. Multiplication function: Architectural issue: having a multiply instruction or not.
Organization issue: a special multiply unit or repeated use of the add unit to perform multiplication.
ALU
MemorySystem
Registers
Microprog.controller
I/O Devices
Hidden Reg.
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3333Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Lecture Contents
1. Introduction: Basic concepts and definitions of computer architecture and organizations.
2. Memory System: Memory hierarchy, cache memories, virtual memories, memory management.
3. Instruction Pipelining: Organization, pipeline hazards, reducing branch penalties, branch prediction strategies.
4. RISC Architectures: Analysis of instruction execution, compiling for RISC computers, RISC-CISC trade-offs.
5. Superscalar Architectures: Instruction level parallelism and machine parallelism, HW techniques for performance enhancement, limitations.
6. VLIW Architectures: VLIW advantages and limitations, compiling for VLIW architectures, the Merced (Itanium) architecture.
3434Zebo Peng, IDA, LiTHZebo Peng, IDA, LiTH TDTS 08 – Lecture 1TDTS 08 – Lecture 1
Lecture Contents (Cont’d)7. Parallel Computation: Parallel programs, performance of
parallel computers, classification of architectures.
8. SIMD Architectures: Vector processors, array processors, multimedia extensions.
9. MIMD Architectures: Symmetric multiprocessors, NUMA architecture, and clusters.
10. Cache Coherence in Parallel Architectures: Cache design for parallel system, cache coherence protocols.
11. Multi-Core Processor and GPU: Technology, hardware issues, software impact, commercial examples.
12. Low-Power Architectures: Power consumption in CMOS circuits, designing for low power, Crusoe processor.