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The top documents tagged [chip networks]
IST_presentation - California Institute of Technology
194 views
1 Next Generation On-Chip Networks: What Kind of Congestion Control Do We Need? George Nychis, Chris Fallin, Thomas Moscibroda, Onur Mutlu Carnegie Mellon
214 views
Manycores in the Future Rob Schreiber hp labs. Dont Forget These views are mine, not necessarily HPs Never make forecasts, especially about the future
212 views
Chapter 3 Embedded Computing in the Emerging Smart Grid Arindam Mukherjee, ValentinaCecchi, Rohith Tenneti, and Aravind Kailas Electrical and Computer
213 views
EE 587 SoC Design & Test Partha Pande School of EECS Washington State University
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232 views
The Raw All Purpose Unit (APU) based on a Tiled-Processor Architecture A Logical Successor to the CPU, GPU and NPU? Anant Agarwal MIT
215 views
ECE 1749H: Interconnection Networks for Parallel Computer Architectures: Flow Control Prof. Natalie Enright Jerger
231 views
From Adaptive to Self-Tuning Systems Sudhakar Yalamanchili, Subramanian Ramaswamy and Gregory Diamos School of Electrical and Computer Engineering
213 views
1 On-Chip Networks from a Networking Perspective: Congestion and Scalability in Many-Core Interconnects George Nychis ✝, Chris Fallin ✝, Thomas Moscibroda
215 views
UIC Thesis Corbetta
437 views
FULLTEXT01_4
96 views
Dual-mode inter-router communication channel for deflectionrouted networks-on-chip
254 views
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