(synchronous) finite state machines lab 2 is due tonight great -theory! finally! some engineering!
TRANSCRIPT
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(Synchronous)Finite State Machines
Lab 2 is due tonight
Great -Theory!
Finally! Some ENGINEERING!
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Our New Machine
•Engineered cycles•Works only if dynamic discipline obeyed•Remembers k bits for a total of 2k unique combinations
• Acyclic graph• Obeys static discipline• Can be exhaustively enumerated
by a truth table of 2k+m rows and k+n output columns
CombinationalLogic
Output
NewState
CurrentState
StateRegisters
Clock
Input
k
m
k
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Must Respect Timing Assumptions!
Questions:• Constraints on TCD for the logic?
• Minimum clock period?
• Setup, Hold times for Inputs?
We know how fast it goes… But what can it do?
CombinationalLogic
NewState
Output
CurrentState
Clock
Input
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A simple sequential circuit…
Specification:
• One input ( “0” or “1”)
• One output (“Unlock” signal)
• UNLOCK is 1 if and only if:
Last 4 inputs were the “combination”: 0110
Lets make a digital binary Combination Lock:
Lock
How many registers are
needed?
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Abstraction du jour:Finite State Machines
•A FINITE STATE MACHINE has
• k STATES S1 … Sk (one is “initial” state)• m INPUTS I1… Im
• n OUTPUTS O1… On
• Transition Rules s’(s, I) for each state s and input I
• Output Rules Out(s) for each state s
Clocked FSM
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State Transition Diagram
Designing our lock …• Need an initial state; call it SX.
• Must have a separate state for each step of the proper entry sequence
• Must handle other (erroneous) entries
Why do these go to S0 and S01?
Heavy circle Means
INITIAL stateNAME of state
OUTPUT when in this
state
INPUT causing
transition
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Yet Another Specification
All state transition diagrams can be described by truth tables…
Binary encodings are assigned to each state (a bit of an art)
The truth table can then be simplified using the reduction techniques we learned for combinational logic
The assignment of codes to states can be arbitrary, however, if you choose them carefully you can greatly reduce your logic requirements.
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Valid State Diagrams
• Arcs leaving a state must be:
• (1) mutually exclusive
– can’t have two choices for a given input value
• (2) collectively exhaustive
– every state must specify what happens for each possible input combination. “Nothing happens” means arc back to itself.
MOORE Machine: Outputs on States
MEALY Machine: Outputs on Transitions
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Now put it in Hardware!
ROM 16x4
Trigger update periodically (“clock”)
unlock
Next state
IN
Current state
3We assume inputs are
synchronized with clock…
4 inputs → 24locations each location supplies 4 bits
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Discrete State, Time
s state bits →2s possible states
Two design choices:
(1) outputs only depend on state (Moore)
(2) outputs depend on inputs + state (Mealy)
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Asynchronous Inputs - I
Our example assumed a single clock transition per input. What if the “button pusher” is unaware of, or not synchronized with, the clock?
What if each button input is an asynchronous 0/1 level? How do we prevent a single button press, e.g., from making several transitions?
Lock
But what About the Dynamic
Discipline?
Use intervening states to synchronize button presses!
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FSM Party Games
1. What can you say about the number of states?
2. Same question:
3. Here's an FSM. Can you discover its rules?
ROM
m States
n States
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What’s My Transition Diagram?
• If you know NOTHING about the FSM, you’re never sure!• If you have a BOUND on the number of states, you can discover its
behavior:
K-state FSM: Every (reachable) state can be reached in < k steps.
BUT ... states may be equivalent!
0=OFF, 1=ON?
"1111" = Surprise!
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FSM Equivalence
ARE THEY DIFFERENT?NOT in any practical sense! They are EXTERNALLY INDISTINGUISHABLE, hence interchangeable.
ENGINEERING GOAL:• HAVE an FSM which works...• WANT simplest (ergo cheapest) equivalent FSM.
FSMs EQUIVALENT iff every input sequence yields identical output sequences.
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Lets build an Ant
• SENSORS: antennae L and R, each 1 if in contact with something.
• ACTUATORS: Forward Step F, ten-degree turns TL and TR (left, right).
GOAL: Make our ant smart enough to get out of a maze like:
STRATEGY: "Right antenna to the wall"
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Lost in space
Action: Go forward until we hit something.
“lost” is the initial state
LOST
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Bonk!
Action: Turn left (CCW) until we don’t touch anymore
RCCWLOST
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A little to the right…
Action: Step and turn right a little, look for wall
RCCWLOST
Wall1
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Then a little to the left
Action: Step and turn left a little, till not touching (again)
LOST RCCW Wall2
Wall1
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Dealing with corners
Action: Step and turn right until we hit perpendicular wall
LOST RCCW Wall2
CornerWall1
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Equivalent State Reduction
Observation: Si ≡ Sj if1. States have identical outputs; AND2. Every input →equivalent states.
Reduction Strategy:Find pairs of equivalent states, MERGE them.
LOST RCCW Wall2
CornerWall1
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An Evolutionary Step
Merge equivalent states Wall1 and Corner into a single new, combined state.
Behaves exactly as previous (5-state) FSM, but requires half the ROM in its implementation!
LOST RCCWWall2
Wall1
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Building the Transition Table
LOST RCCW
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Implementation Details
LOST
RCCW
WALL1
WALL2
Complete Transition table
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Ant Schematic
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Roboant®
Featuring the new Mark-II ant: can add (M), erase (E), and sense (S) marks along its path.
FSM state table
Status display
Maze selection
Plan view of maze
Simulation controls
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Housekeeping issues…
1. Initialization? Clear the memory?
2. Unused state encodings?
• waste ROM (use PLA or gates)
• what does it mean?
• can the FSM recover?
3. Choosing encoding for state?
4. Synchronizing input changes with state update?
ROM or
gates
inputs
STATE
outputs
NEXT
Now, that’s a funny looking state machine
IN
CLK
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Twisting you Further…
• MORE THAN ANTS:Swarming, flocking, and schooling can result from collections of very simple FSMs
• PERHAPS MOST PHYSICS: Cellular automata, arrays of simple FSMs, can more accurately model fluilds than numerical solutions to PDEs
• WHAT IF:We replaced the ROM with a RAM and have outputs that modify the RAM?
... You'll see FSMs for the rest of your life! (Every computer we have built so far is just an
FSM)
Are we just big, hairy FSMs?
I transition therefore I am