synchronous counters

8
SYNCHRONOUS COUNTERS

Upload: lee-diaz

Post on 21-May-2015

3.896 views

Category:

Technology


0 download

TRANSCRIPT

Page 1: Synchronous counters

SYNCHRONOUS COUNTERS

Page 2: Synchronous counters

Synchronous CounterClock pulses are applied to the input of all

flip-flops. Common clock trigger all flip-flops

simultaneouslyT=0 or J=K=0 (flip-flop does not change

state)T=1 or J=K=1 (flip-flop complements)

Page 3: Synchronous counters

Types of Synchronous CountersBinary CounterUp-Down Binary CounterBCD CounterBinary Counter with Parallel Load

Page 4: Synchronous counters

a. Binary Counter The flip-flop in the least significant position is complemented in every pulse. A flip-flop in any other position is complemented when all the bits in the lower significant positions are equal to 1.If J and K = 0 (state of the counter does not change), however if it is = 1 counter is enabled.

Page 5: Synchronous counters

b. Up-Down Binary Counter

A synchronous countdown binary counter goes through the binary states in reverse order. A bit in any other position is complemented if all lower significant bits are equal to 0.Up input = 1 (circuit counts up), Down input = 1 (circuit counts down). Both inputs = 0 (circuit does not change), however if it is = 1 (circuit counts up).

Page 6: Synchronous counters

c. BCD Counter A BCD counts in binary-coded decimal from 0000 to 1001 and back

to 0000. Because of the return to 0 after a count of 9. Output “Y” is equal to 1 when the present state is 1001. “Y” can enable the count of the next higher significant decade while

the same pulse switches the present decade from 1001 to 0000. The unused states for minterms 10 to 15 are taken as don’t-care

terms. The simplified functions are:

T Q1 = 1

T Q2 = Q’8 Q1

T Q4 = Q2 Q1

T Q8 = Q8 Q1 + Q4 Q2 Q1

Y = Q8 Q1

Page 7: Synchronous counters

d. Binary Counter with Parallel Load

Counters employed in digital systems often require a parallel load capability for transferring an initial binary number into the counter prior to the count operation.When equal to 1, the input load control disables the count operation and causes a transfer of data from the four data inputs into the four flip-flops. If both inputs are zero, clock pulses do not change the state of the register.

Page 8: Synchronous counters

FUNCTION TABLE FOR THE COUNTER Clear Clock Load Count Function

0111

X100

XX10

Clear to 0Load inputsCount next binary stateNo change

The four control inputs – Clear, Clock, Load, Count – determine the next state. Clear input is asynchronous and when equal to 0, causes the counter to be cleared. X symbolize don’t care conditions for the other inputs. With the Load and Count inputs both 0, the output do not change.