Switching Control Method for Light Load Efficiency Improvement in Phase Shifted Full Bridge Converter

Jong-Woo Kim\ Duk-You Kim!, Chong-Eun Kim2, Moon-Young Kim! and Gun-Woo Moon! !Department of Electrical Engineering, KAIST, Republic of Korea

2Samsung Electro-Mechanics, Republic of Korea gwmoon@ee.kaist.ac.kr

Abstract- In this paper, a new switching control method for

light load efficiency improvement in phase shifted full bridge

(PSFB) converter is proposed. The main advantage of the

proposed method is that it does not use any additional component

in power conversion stage, so that it does not have any additional

loss. By using simple "AND-gated" control signals for

synchronous rectifier (SR) and optimized dead time for primary

switches, it is possible to get not only reduced core losses, but also

ZVS operation even in light load condition. Therefore, the

proposed switching control method reduces switching and core

losses in light load condition so that it shows remarkably

increased light load efficiency. The feasibility of the proposed

switching control method has been verified by experimental

results with 90-264Vac input, 400V link voltage, 12V output

voltage, and 750W output server computer power supply system.

Keywords- Light load efficiency improvement, phase shifted

full bridge converter (PSFB), synchronous rectifier (SR) control.

I. INTRODUCTION

Recently, importance of light load efficiency in server

power system has been increased, because the system usually

operates in light load condition because it is usually

constructed with redundant structure for high reliability.

Therefore, brand-new certifications ask manufacturers to meet

the efficiency requirement in 10% load condition, whereas the

minimurn load condition for certification was 20% before [1],

[2]. Moreover, many data centers strongly demand efficiency

improvement in very light load condition, lower than 10%. For

these reasons, many previous works have investigated various

techniques to improve light load efficiency.

A server power system consists of boost power factor

correction (PFC) and DCIDC conversion stage. In the DCIDC

conversion stage, phase shifted full bridge (PSFB) converter is

one of the most promising topologies because of its simple

control scheme and inherent zero voltage switching (ZVS)

characteristics. Also, since the server power system has large

output current specification, it is natural to use synchronous

rectifiers (SRs) in secondary side of PSFB converter in order to

reduce conduction losses as shown in Fig. 1. Usually, primary

side switches are controlled by phase shifted signals of

complementary signals, and SRs in secondary side are

controlled by OR-gated combination of control signals for

primary side switches [3]. This construction allows

978-1-4799-0482-2/13/$31.00 ©2013 IEEE 165

- -ILo I"",

Figure I. Phase shifted full bridge converter with synchronous rectifiers.

getting ZVS operation in primary side switches and minimized

conduction losses in secondary side rectifiers.

However, server power supply shows decreased efficiency

in light load condition, and there are two main reasons for light

load efficiency decrement in PSFB converter [4]. First of all,

ZVS energy becomes insufficient as load current decreases.

This is because ZVS energy stored in leakage inductor

becomes smaller as the load current decreases. Secondly, core

losses of transformer core and output inductor core in PSFB

converter occupy a large portion of the total loss in light load

condition. This is because core losses remain almost constant,

whereas conduction losses are decreased. Therefore, in order to

get high efficiency in light load condition, switching and core

losses should be reduced.

There have been many previous approaches to improve the

light load efficiency in PSFB converter. The first approach is to

extend ZVS range by using auxiliary circuits [6]-[13].

Secondly, several control-mode-change methods are proposed.

These methods try to improve the light load efficiency by

reducing circulating energy without additional components

[14], [15]. Lastly, SR turn-off schemes to get discontinuous

conduction mode (DCM) has been proposed in several works

[16], [17]. These methods improved light load efficiency, but

there are many side effects such as high cost, complex control,

and large conduction losses in body diodes of SR.

In this paper, a new switching control method for light load

efficiency improvement in PSFB converter has been proposed.

First of all, by using "AND-gated" SR control signals, not

turning-off SRs, it can have reduced conduction losses in SRs,

maintaining the advantages of DCM operation. Dead time

modulation scheme is also proposed to achieve the improved

ZVS operation even at very light load condition. Therefore,

with the proposed control scheme, minimized critical losses in

�I Q 1 II Q2 II Q 1

i i OR-�ated sivnals i i 1 i S R 1 i 1 1-1 ----::-:!S �:-:-1- �

I I I I I I I I I I

4. ... J.,"�.,�,--.�,:., .. ,�� ... 1 ........ ... :sL7: 1 : :\\7:1 \C7 � .... .. .. �.�# ' .. �............

, negative ito

(a)

lou'����.�.�.��.�� ............ i.� ...... ... , h ' t�

Q2

SR2

--+I throug !+-(b) : body diode :

II Q 1 II Q2 Ie ,

Q3! SR1

-...... '- positive ho �'''''#

(c)

:-

SR2 � I+-,

�: , through , channel

Figure 2. Output inductor current in light load condition with (a) OR-gated signals (b) SR off (c) AND-gated SRs.

the light load condition can be obtained, and it shows

remarkable efficiency improvement without any additional

component in power conversion stage.

II. THE PROPOSED SCHEME

A. AND-gated signal for SR driving in light load condition In PSFB converter, OR-gated signals to drive SR are

simple and effective to get small conduction losses in the entire

load condition. However, since core losses become one of main

losses in light load condition, the use of OR-gated signals to

drive SRs shows an undesirable influence on system efficiency.

This is because effective core losses remain constant, whereas

conduction losses become very small in light load condition.

When SRs are controlled with OR-gated signals, all SRs in the

secondary side are turned on during freewheeling period,

allowing output inductor current to be negative, as shown in

Fig. 2 (a). Thus, PSFB converter operates in continuous

conduction mode (CCM), resulting in constant effective duty

ratio in the entire load condition. Since core losses depends on

effective duty ratio, the constant effective duty ratio results in

constant core losses in the entire load condition, resulting in

low efficiency in light load condition. Therefore, in order to

166

---a2J1 Q3

Q1 II Q2 II Q1 (ii) Q4 II Q3 IC� ""1 ... II II

:: '- Small dead time tbr lagging leg :: II II II II II II II II II II II II II II II II ,Lt. II :: /11 '; :: :: \·1 .: :: :: :; L Lalige ZVS curreH II II II II .............. -........ .............. II

II II

.. .............. ___ .... ...!-l II II II

. .--�'"!-' -----o!' ................... ---•••••• .,.....-....... i--nVQ2 n VQ1

�I Q3

II II I : � �

"'IL Fast transition, �;ft switching ..• •

(a)

Q1 II Q2 II Q1 ( ii) Q4 II Q3 IC� '1' r .. II II

:: '- Small dead time tbr lagging leg :: II II II :� I SR1 :� I �R2 ' r-.. . :� .. II II II :: :: r Small ZVS current

:: ipri� /if \ :: II . ' I II II .,11.... II II "!" r ' ...... II

i, II II II II II II II II

. ..-_�_;_---..,..---..... 1; ................. .,....----'.i-_ nVQ2 :: VQ1 II " II : '

"'IL Slow transition, ' h�rd switching

'... �

(b)

Figure 3. Waveforms for ZVS transition of lagging leg switches without dead time modulation (a) in heavy load condition (b) in DCM operation

have reduced core losses, it is required to get reduced effective

duty ratio in light load condition.

In order to get reduced core losses in light load condition,

the negative output inductor current should be prevented.

Turning off SRs makes the output inductor current positive,

because SRs shows diode-like operation with their body diodes.

Then PSFB converter can operate in DCM so that the converter

has reduced effective duty ratio, as the load current decreases.

Therefore, with turned off SRs, it is possible to get decreasing

core losses as the load current decreases. However, it is not an

effective way to turn off SRs in server power supply system.

This is because it causes large conduction losses in SRs

although PSFB converter operates in light load condition, as

shown in Fig. 2(b). This causes worse system efficiency

although it has reduced core losses in light load condition.

Therefore, it is required to get effective SR control signals

which have both DCM in light load condition and minimized

conduction losses in body diode of SRs.

In order to make PSFB converter operate in DCM, it is

required to get diode-like operation when output inductor

current decreases so that the output inductor current can be

positive. In this paper, AND-gated signal for SRs has been

proposed. By replacing the conventional "OR-gated" signals

with simple "AND-gated" signals for SR driving in light load

condition, as shown in Fig. 2(c), output inductor current flows

through channel of SRs when it is built up, and it flows through

body diodes of SRs when it decreases, preventing the converter

from having the negative output inductor current. With the

proposed SR control signals, PSFB converter can operate with

DCM in light load condition resulting in reduced core losses.

Also, the proposed SR control signals have reduced conduction

losses in body diodes of SRs, because the time period that the

body diodes of SRs conduct is reduced. Moreover, the

proposed control is very simple, because it does not require any

additional current-sensing network. Therefore, the AND-gated

signal can be the most simple and effective SR driving signal

in light load condition, to get high efficiency in light load

condition.

B. Dead time modulation in light load condition Fig. 3 (a) shows key waveforms for ZVS transitIOn of

lagging leg switches in heavy load condition. The primary side

current, ipm is sufficiently large to obtain very fast ZVS

operation. After full ZVS operation of lagging leg switch is

achieved, ipri changes quickly. In order to get appropriate ZVS

operation, the lagging leg switch should be turned on before ipn changes its direction. Otherwise, the voltage across the lagging

leg switch will be increased resulting in undesired hard

switching operation. For these reasons, dead time for lagging

leg switches is set to very small value, about 200ns.

Fig. 3 (b) shows operational waveforms of PSFB converter

with the proposed SR control signals in light load condition.

The secondary side of the converter is not reflected to the

primary side during freewheeling period of PSFB converter

because of diode-like operation of SRs. Therefore, ZVS energy

for lagging leg switches is provided by magnetizing inductor

current in transformer, hm. However, the ZVS transition of

PSFB converter in DCM is very slow compared to CCM

operation, since magnetizing inductor current is usually very

small. With the conventional dead time, lagging leg switches

are turned on with hard switching manner because dead time

for lagging leg switches is too short to get ZVS operation.

Therefore, dead time modulation is proposed to achieve

ZVS operation in light load condition. The proposed dead time

modulation has extended dead time in light load condition to

get full ZVS operation. With the dead time modulation with

respect to operating load condition, switching losses in light

167

.................................................................................................... i Q'�d L�Q2 i�� � � �� i Q'� SR, SR2 �Q2 ! Q4�ad He�Q3 L. .... ___ ........... ___ ..... ___ ........... __ ..... ____ ..... __ ... _ ..... ��_��'!.t!:.�������!.e.�':! ..

Load information of Reference -

Figure 4. Implementation of the proposed control.

load condition can be greatly reduced. With the simple

proposed switching control technique, core and switching

losses can be reduced effectively resulting in high efficiency in

light load condition.

III. IMPLEMENT AnON OF THE PROPOSED SCHEME

A. implementation Fig. 4 shows the implementation of the proposed control.

Using output current information in server power system, SR

gate signals and dead time are modulated. In light load

condition, SRs are controlled with AND-gated signals and dead

time of lagging leg switches is large. In heavy load condition,

SRs are controlled with OR-gated signals and the dead time is

small. The proposed technique can be easily implemented since

it does not require additional current sensing network and it has

simple structure and uses pre-existing load information in

server power system.

B. Dead time modulation in light load condition From the previous analysis, it can be noted that large dead

time is required to achieve ZVS operation for lagging leg

switches. It can be noted that voltage across Q4, VQ4, should be

Vin in order to get VQ3=O, which is ZVS condition of Q3. From

the ZVS condition, required dead time can be obtained as

follows:

sin-I (_1 ) OJDT,

tdead = ---'---� OJ

1 , where OJ = --;====

�2LmCoss

(1)

(2)

iou! (10A/div)

(a)

' .. ""","-) r �-.. ���� .. ��--������ .. �� .. �- �

time(5us/div) (b)

iou! (10Aldiv)

(e) Figure 4. SR gate signal modulation (a) transition (b) at light load (c) at heavy load.

IV . EXPERIMENTAL RESULTS

The proposed control scheme was designed for 90 Vac�265 Vac input, 12V !750W output server power supply. With two stage structure, PSFB was implemented for DC/DC conversion part, following boost PFC with 400V link voltage. 60R190C6 4EA are selected as primary side switches for PSFB, EE3220(Ae=200mm2, AII'=120mm2, Ve=12400mm3) is selected as transformer core, CH229060(from Changsung in KOREA) is selected as an output inductor core, BSN028N06NS 4EA(2x2, center tapped) are selected as SR switches. Turn ratio of the main transformer is designed as 26: 1: 1. Magnetizing inductance of the main transformer is 2mH, and leakage inductance is 15uH. Switching frequency is 78kHz. It is designed to have the highest efficiency at 50% load condition.

Feasibility of the proposed control methods was verified by

experimental results with the aforementioned system. As

168

leCroy

t

".�����"""��1111!=!100����� V,S signals �. r lagging leg • • • ' J L-_�_�_�_�_---j._� __ �_time(20usldiv)

(a) leCroy

0-

iou! (10Aldiv)

-+! 1500ns ! ... . i deadtlme i

I I-"

V's signals or lagging leg time(1 us/div) (b)

leCroy

0- l iou! (10A/div) 200ns

dealt time 1-• ........: :.-

U l-

e ,

V.s signals +r lagging leg time(1 us/div) (e)

Figure 5. Dead time modulation (a) transition (b) at light load (c) at heavy load.

(a)

Figure 6. ZVS waveforms at (a) 1% and (b) 5% load condition.

85 80

� 75 L � 70 . � 65+-.. ·-�� .... -...... -�· .. -...... -.... -· .. -.... ·-.... -.. ·-.... ·-.... -.... -.... ·-.... _ .... _ ... _ .... _ .... _ .... _ .... _ .... _ .... _ ... _ ..... _ .. . _ ............ _ .... _ ...... _ ... _ .... ..

� 60

50 ..... Proposed control 45 +---�--__ �--

�--

�----

�--

�--

--�--

�--

�--

�

1% 2% 3% 4% 5% 6% 7% 8% 9% 10% Load

Figure 7. The system efficiency in light load condition.

shown in Fig. 4, SR driving signals are modulated when load

current changes. SRs are driven with AND-gated signal at the

light load condition, and with OR-gated signal at the heavy

load condition. Dead time for ZVS of lagging leg switches are

also modulated appropriately when load current changes, as

shown in Fig. 5. From the experimental results, it can be noted

conduction, and switching losses, so that it can have higher

efficiency. The proposed method has higher efficiency than

conventional method and SR off method, even though dead

time was modulated with SR off method to get ZVS operation

in light load condition, as shown in Fig. 7.

V . CONCLUSION

In this paper, a new switching control method for light

load efficiency improvement in PSFB has been proposed. By

modulating SR control signal and dead time of primary side

switches, the proposed method shows reduced core, primary

conduction, and switching losses so that the converter has high

efficiency in light load condition. The experimental results

verify the proposed methods shows remarkably improved

efficiency in light load conditions. Because the proposed

method does not use any additional components in power

conversion stage and only uses simple modulation of control

signals, it can be practical and simple solution for light load

efficiency improvement in large output current applications,

such as server power supply.

ACKNOWLEDGMENT

This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MEST) (No.2012-0000981).

169

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