str750-stk development board - mantech electronics is development board with high performance...
TRANSCRIPT
STR750-STK development board Users Manual
All boards produced by Olimex are ROHS compliant
Revision A, December 2009Copyright(c) 2010, OLIMEX Ltd, All rights reserved
Page 1
INTRODUCTION
STR750-STK is development board with high performance STR750F ARM7TDMI-STM microcontroller from STMicroelectronics. This microcontroller supports serial interfaces such as USB Device, UART, CAN and other. On the board are available JTAG, TFT LCD and SD/MMC card connector, UEXT, EXT, USB, CAN and two RS232 connectors. All this allows you to build a diversity of powerful applications to be used in a wide range of applications.
BOARD FEATURES
• MCU: STR750
• Standard JTAG connector with ARM 2x10 pin layout for programming/debugging with ARM-JTAG
• USB 2.0 device port
• 2x RS232 interface and drivers
• 3x User Buttons
• Trimmer potentiometer
• NOKIA 6610 TFT COLOR LCD display 128x128 pixel 12 bit color with backlight
• UEXT - 10 pin extension connector for Olimex addon peripherials like MP3, RF2.4Ghz, RFID etc. modules
• On board voltage regulators with up to 800mA current
• single power supply: 6-9VDC required
• power supply LED
• power supply filtering capacitor
• RESET circuit
• RESET button
• 4 Mhz crystal
• PCB: FR-4, 1.5 mm (0,062"), soldermask, silkscreen component print
• Dimensions: 110.5 x 101.6 mm (4.35 x 3.99")
Page 2
ELECTROSTATIC WARNING
The STR750-STK board is shipped in protective anti-static packaging. The board must not be subject to high electrostatic potentials. General practice for working with static sensitive devices should be applied when working with this board.
BOARD USE REQUIREMENTS
Cables: The cable you will need depends on the programmer/debugger you use. If you use ARM-JTAG-EW, you will need USB A-B cable.
Hardware: Programmer/Debugger ARM-JTAG-EW or other compatible programming/debugging tool if you work with EW-ARM.
You can use also ARM-USB-OCD, ARM-USB-TINY, ARM-USB-OCD-H, ARM-USB-TINY-H, but we don't offer a project for this board with this programmers.
PROCESSOR FEATURES
STR750-STK board use STR750F ARM7TDMI-STM microcontroller with on-chip high-speed single voltage FLASH memory and high-speed RAM from STMicroelectronics with these features:
− Core:
− ARM7TDMI-S 32-bit RISC CPU
− 56 DMIPS @ 60 MHz
− Memories
− 256 Kbytes embedded Flash program memory (10k cycles endurance, data retention 20 yrs at 55°C)
− 16 Kbytes Read While Write Flash for data storage (100k cycles endurance, data retention 20 yrs at 55°C)
− Flash Data Readout Protection
− 16 KBytes embedded SRAM
− Memory mapped interface to ext. Serial Flash or EEPROM (64 MB) w.boot capability
− Clock, Reset and Supply Management
− Single supply 3.3V ±10% or 5V ±10%
− Embedded 1.8V Voltage Regulators with Low Power features
− Smart Clock Controller with flexible clock generation capability:
− Internal RC for fast start-up and backup clock mechanism.
− Up to 60 MHz operation using internal PLL with 4 or 8 MHz crystal/ceramic osc.
Page 3
− Smart Low Power Modes: SLOW, WFI, STOP and STANDBY with backup registers.
− Real Time Clock, driven by low power internal RC or 32.768 kHz dedicated osc, for clock-calendar and Auto Wake-up
− Nested interrupt controller
− Fast interrupt handling with 32 vectors
− 16 IRQ priorities, 2 maskable FIQ sources
− 16 external interrupt / wake-up Lines
− DMA
− 4-channel DMA controller
− Circular buffer management
− Support for UART, SSP, Timers, ADC
− 6 Timers
− 16-bit watchdog timer (WDG)
− 16-bit timer for system timebase functions
− 3 Synchronizable timers each with 2 input captures and 2 output compare/PWMs.
− 16-bit 6-channel synchronizable PWM timer
− Dead time generation, edge/center-aligned waveforms and emergency stop
− 8 Communications Interfaces
− 1 I2C interface
− 3 HiSpeed UARTs w. Modem/LIN capability
− 2 SSP serial interfaces (SPI or SSI)
− 1 CAN interface (2.0B Active)
− 1 USB 2.0, full-speed 12 MB/s interface with 8 configurable endpoint sizes.
− 10-bit A/D Converter
− 16/11 channels with Fast Scan Mode
− Programmable Analog Threshold Detection
− Conversion time: min. 3µs
− Conversion Range: 0 to VDD_IO
− 72 GPIO lines with High Sink capabilities
− Development Tools Support
− JTAG interface (ARM Embedded ICE)
Page 4
SCHEMATIC
Page 7
10K
10nF
1uF/
6.3V
100n
100n
F
47uF
/6.3
V(N
A)
220uF/16V/mini
470p
10uF
/6.3
V
100n
27p
100n
100n
22p
10u/
6.3V
220uF/16V
100n
F10
0nF
100n
100n
100n
22p
NA
47uF/6.3VDC
47uF/6.3V
27p
100n
F(N
A)
100n
F
100nF
100n
F(N
A)
100n
F
100n
F
33nF
10uF/6.3V
100n
10nF
10uF
/6.3
V
470uF/16V
15p(
NA
)15
p(N
A)
100n
1N58
19S
1N58
19S
ferr
ite_b
ead/
0805
ferr
ite_b
ead/
0805
IRLM
L640
2
DB
104(
SM
D)
220u
BL_
PW
R
BL_
PW
R
4MH
z
Q_G
ND
TC38
H_S
MD
_GN
D
1
220/
1%(N
A)
1M
100/
1%(N
A)
120
10K
390/
1%
10K
10K
NA
10K
10K
330
560
2K
2k 0 10K
100K
240/
1%
33K
NC
NC
NC
NC
10K
1M
1K
150
5.6k
/1%
1.2k
/1%
4.7K
560
10K
10K
100K
10K
10K
330
10K
10K
10K
0
4.7K
4.7K
22 22
1.5K
10K
33k
10k
10K
10K
150
330
10K
10K
10K
0
330
SD/M
MC
-bot
SN
65H
VD
230
MC
P13
0
M25
P64
-VM
E(N
A)
STR
750F
ST3
232
MC
3406
3
3.3V
3.3V
AG
ND
AG
ND
VD
DA
3.3V
3.3V
3.3V
VDDA3.
3V
3.3V
3.3V
3.3V
3.3V
3.3V
AG
ND
AG
ND
3.3V
3.3V
VD
DA
3.3V
3.3V 3.3V
3.3V
3.3V3.
3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
AG
ND
3.3V
3.3V
AG
ND
AG
ND
3.3V
3.3V
3.3V
1.8V
1.8V
LM11
17
LM11
17(N
A)
+5V
_US
B
/RES
ET
/RES
ET
/RES
ET
ADC
_IN
6
ADC
_IN
6
B1
B1
B2
B2
BOO
T0
BOO
T0
CAN
_RX
CAN
_RX
CAN
_TX
CAN
_TX
CP
CP
CS_
LCD
CS_
LCD
CS_
MM
C
CS_
MM
C
LCD
_BL
LCD
_BL
LCD
_RES
ET
LCD
_RES
ET
MIS
O0
MIS
O0
MIS
O0
MIS
O0
MIS
O1
MIS
O1
MO
SI0
MO
SI0
MO
SI0
MO
SI0
MO
SI1
MO
SI1
MO
SI1
P2.
01
P2.0
1
RTC
K
RTC
K
RXD
0
RXD
0
RXD
1
RXD
1
RXD
2
RXD
2
SCL
SCL
SCLK
0
SCLK
0
SCLK
0SC
LK0
SCLK
1
SCLK
1
SCLK
1
SDA
SDA
SPI0
_NSS
SPI0
_NSS
SPI1
_NSS
SPI1
_NSS
STAT
STAT
TCK
TCK
TDI
TDI
TDO
TDO
TMS
TMS
TRST
TRST
TXD
0/BO
OT1
TXD
0/BO
OT1
TXD
0/BO
OT1
TXD
1
TXD
1TX
D2
TXD
2
USB
_D+
USB
_D-
WAK
EUP
WAK
EUP
WP
WP
12
1.8B
_E1
21.
8V_E
AN
_TR
B1
B2
1 2 3BO
OT0
1 2 3BO
OT1
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C13
C14
C15
C16
C17
C22
C25
C26
C27
C28
C29
C30
C31
C32
C33
C34
C35
C36
C37
C38C
39
C40
C41
C42
C43
C70
C72
C73
C74
12345
6789 CA
N0
1 2
CAN0_T
1
2
3C
NTR
L/H
S
D1
D2
EX
T-1
EX
T-2
EX
T-3
EX
T-4
EX
T-5
EX
T-6
EX
T-7
EX
T-8
EX
T-9
EX
T-10
EX
T-11
EX
T-12
EX
T-13
EX
T-14
EX
T-15
EX
T-16
EX
T-17
EX
T-18
EX
T-19
EX
T-20
EX
T-21
EX
T-22
EX
T-23
EX
T-24
EX
T-25
EX
T-26
EX
T-27
EX
T-28
EX
T-29
EX
T-30
EX
T-31
EX
T-32
EX
T-33
EX
T-34
EX
T-35
EX
T-36
EX
T-37
EX
T-38
EX
T-39
EX
T-40
FB1
FB2
FET1
G1
GN
D
12
34
56
78
910
1112
1314
1516
1718
1920
JTA
G
L1
CS
5D
IO3
GN
D8
LED
GN
D9
RE
SE
T2
SC
K4
VD
IGIT
AL
1V
DIS
PLA
Y6
VLE
D10
PW
R
PW
R_J
AC
K
Q1
Q2
12
R-T
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R27
R28
R29
R30 R31
R32
R33
R34
R35
R36
R37
R38
R39
R40
R41
R42
R43
R45
R46
R47
R48
R49
R50
R51
R52
R53
R54
R55
R56
R57
R58
R59
R60
R61
1 2 3 4 5
6 7 8 9
RS
232_
1
1 2 3 4 5
6 7 8 9
RS
232_
2
RS
T
CD
/DA
T3/C
S1
CLK
/SC
LK5
CM
D/D
I2
CP
113
CP
215
DA
T0/D
O7
DA
T1/R
ES
8
DA
T2/R
ES
9
VD
D4
VS
S1
3
VS
S2
6
WP
110
WP
214
SD/M
MC
STA
T
CA
NH
7
CA
NL
6R
S8
RX
D4
TXD
1
VD
D3
VR
EF
5
VS
S2
U1
3
12
GN
D
VC
CR
ES
ET
U2
#HO
LD7
#S1
#W/V
PP
3
C6
D5
Q2
VC
C8
VS
S4
U3
NJT
SR
ST
22
NR
STI
N59
NR
STO
UT
58
P0.
00/T
IM0_
OC
/BO
OT0
4
P0.
01/T
IM0_
TI1/
MC
O3
P0.
02/T
IM2_
OC
1/A
DC
_IN
0/E
IT0
2
P0.
03/T
IM2_
TI1/
AD
C_I
N1
100
P0.
04/S
MI_
CS
0/S
PI0
_NS
S79
P0.
05/S
PI0
_SC
LK/S
MI_
CK
/EIT
178
P0.
06/S
MI_
DIN
/SP
I0_M
ISO
77
P0.
07/S
MI_
DO
UT/
SP
I0_M
OS
I/EIT
276
P0.
08/I2
C_S
CL/
EIT
330
P0.
09/I2
C_S
DA
29
P0.
10/U
AR
T0_R
X/S
MI_
CS
3/E
IT4
28
P0.
11/U
AR
T0_T
X/B
OO
T1/S
MI_
CS
227
P0.
12/U
AR
T0_C
TS/A
DC
_IN
2/S
MI_
CS
126
P0.
13/R
TCK
/UA
RT0
_RTS
25
P0.
14/C
AN
_RX
/EIT
564
P0.
15/C
AN
_TX
63
P0.
16/S
PI1
_SC
LK42
P0.
17/S
PI1
_MIS
O/A
DC
_IN
341
P0.
18/S
PI1
_MO
SI
40
P0.
19/U
SB
_CK
/SP
I1_N
SS
/AD
C_I
N4/
EIT
639
P0.
20/U
AR
T1_R
X17
P0.
21/U
AR
T1_T
X16
P0.
22/U
AR
T1_C
TS/A
DC
_IN
515
P0.
23/U
AR
T1_R
TS/A
DC
_IN
611
P0.
24/U
AR
T2_R
X38
P0.
25/U
AR
T2_T
X37
P0.
26/U
AR
T2_C
TS36
P0.
27/U
AR
T2_R
TS/A
DC
_IN
735
P0.
28/T
IM1_
OC
18
P0.
29/T
IM1_
TI1/
AD
C_I
N8
7
P0.
30/T
IM1_
OC
26
P0.
31/T
IM1_
TI2
5
P1.
00/T
IM0_
OC
295
P1.
01/T
IM0_
TI2
94
P1.
02/T
IM2_
OC
268
P1.
03/T
IM2_
TI2
67
P1.
04/P
WM
3N/A
DC
_IN
991
P1.
05/P
WM
3/E
IT7
90
P1.
06/P
WM
2N/A
DC
_IN
1089
P1.
07/P
WM
2/E
IT8
88
P1.
08/P
WM
1N/A
DC
_IN
1187
P1.
09/P
WM
1/E
IT9
81
P1.
10/P
WM
_EM
ER
GE
NC
Y/E
IT10
80
P1.
11/A
DC
_IN
12/E
IT11
34
P1.
12/A
DC
_IN
13/E
IT12
1
P1.
13/A
DC
_IN
14/E
IT13
93
P1.
1492
P1.
15/W
KP
_STD
BY
/EIT
1560
P1.
16/J
TDI
21
P1.
17/J
TDO
20
P1.
18/J
TCK
19
P1.
19/J
TMS
18
P2.
0024
P2.
0123
P2.
0214
P2.
03/U
AR
T1_R
TS13
P2.
04/T
IM2_
OC
112
P2.
05/P
WM
3N86
P2.
06/P
WM
385
P2.
07/P
WM
2N84
P2.
08/P
WM
283
P2.
09/P
WM
1N82
P2.
1072
P2.
1171
P2.
1262
P2.
1361
P2.
1451
P2.
1550
P2.
1643
P2.
17/U
AR
T2_R
TS33
P2.
1832
P2.
1931
TES
T9
US
B_D
N65
US
B_D
P66
V18
96
V18
BK
P55
V18
RE
G52
VD
DA
_AD
C70
VD
DA
_PLL
45
VD
D_I
O1
44
VD
D_I
O2
69
VD
D_I
O3
99
VR
EG
_DIS
75
VS
S18
53
VS
S18
_197
VS
SA
_AD
C73
VS
SA
_PLL
49
VS
SB
KP
54
VS
S_I
O1
10
VS
S_I
O2
48
VS
S_I
O3
74
VS
S_I
O4
98
XR
TC1
57
XR
TC2
56
XT1
47X
T246
U4
C1+
1
C1-
3
C2+
4
C2-
5
R1I
N13
R1O
UT
12
R2I
N8
R2O
UT
9
T1IN
11T1
OU
T14
T2IN
10T2
OU
T7
V+
2
V-
6
U5
1516
GND
VCCU
5PW
R
DC8
FB5
IS7 SC
1
SE
2TC
3
VCC6VSS
4U6
UE
XT-
1U
EX
T-2
UE
XT-
3U
EX
T-4
UE
XT-
5U
EX
T-6
UE
XT-
7U
EX
T-8
UE
XT-
9U
EX
T-10
1 2 3 4
US
B
AD
J/G
ND
INO
UT
VR
1(3.
3V) AD
J/G
ND
INO
UT
VR
2(1.
8V)
12 VR
E
WA
KE
UP
5VA
C6V
DC
STR
750-
STK
Rev
. A
CO
PY
RIG
HT(
C),
200
9
http
://w
ww
.olim
ex.c
om/d
ev
+
+
+
+
++
+
+
+
+
GND
USB
POWER SUPPLY CIRCUITSTR750-STK can take power (+6 V) from PWR_JACK, and (+5 V) from USB.
The programmed board power consumption is about 140 mA with all peripherials enabled.
RESET CIRCUITSTR750-STK reset circuit includes jumper R-T, pin 15 of JTAG connector,
STR750F pin 59 (NRSTIN), U2 (MCP130) and RESET button.
CLOCK CIRCUITQuartz crystal 4 MHz is connected to STR750F pin 46 (XT2) and pin 47
(XT1).
Quartz crystal 32.768 kHz is connected to STR750F pin 56 (XRTC2) and pin 57 (XRTC1).
JUMPER DESCRIPTIONCAN0_T
This jumper assures correct work of the CAN. At each end of the bus it should be closed. This means that if you have only two devices with CAN, the jumpers of both devices should be closed. If you have more than two devices, only the two end-devices should be closed. Default state is closed.
1.8V_EDefault state is closed.
1.8B_EDefault state is open.
VREDefault state is closed.
CNTRL/HS Default state is in position CNTRL.
R-TDefault state is closed.
BOOT0Default state is 0.
BOOT1Default state is 0.
Page 9
INPUT/OUTPUTStatus led (red) with name STAT connected to STR750F pin 31 (P2.19).
Power-on LED (red) with name PWR – this LED shows that +3.3V is applied to the board.
User button with name B1 connected to STR750F pin 34 (P1.11).
User button with name B2 connected to STR750F pin 1 (P1.12).
User button with name WAKEUP connected to STR750F pin 60 (P1.15/WKP_STDBY).
User button with name RESET connected to STR750F pin 59 (NRSTIN).
Trimpot with name AN_TR connected to STR750F pin 11 (P0.23/ADC_IN6).
TFT LCD - 128x128 12 bit color with backlight.
Page 10
EXTERNAL CONNECTORS DESCRIPTIONRS232_1
Pin # Signal Name
1 NC
2 T2OUT
3 R2IN
4 NC
5 GND
6 NC
7 NC
8 NC
9 NC
RS232_2
Pin # Signal Name
1 NC
2 T1OUT
3 R1IN
4 NC
5 GND
6 NC
7 NC
8 NC
9 NC
Page 11
PWR_JACK
Pin # Signal Name
1 Power Input
2 GND
UEXT
Pin # Signal Name
1 3.3V
2 GND
3 TXD0/BOOT1
4 RXD0
5 SCL
6 SDA
7 MISO1
8 MOSI1
9 SCLK1
10 SPI1_NSS
USB
Pin # Signal Name
1 +5V_USB
2 USB_D-
3 USB_D+
4 GND
Page 12
JTAGThe JTAG connector allows the software debugger to talk via a JTAG (Joint Test Action
Group) port directly to the core. Instructions may be inserted and executed by the core thus allowing STR750 memory to be programmed with code and executed step by step by the host software.
For more details refer to IEEE Standard 1149.1 - 1990 Standard Test Access Port and Boundary Scan Architecture and STR750 datasheets and users manual.
Pin # Signal Name Pin # Signal Name
1 3.3V 2 3.3V
3 TRST 4 GND
5 TDI 6 GND
7 TMS 8 GND
9 TCK 10 GND
11 RTCK 12 GND
13 TDO 14 GND
15 /RESET 16 GND
17 pull-down 18 GND
19 +5V_J-LINK 20 GND
Page 13
EXT
Pin # Signal Name Pin # Signal Name
1 3.3V 2 GND
3 AVDD 4 AGND
5 P1.00 6 P1.01
7 P1.02 8 P1.03
9 P1.04 10 P1.05
11 P1.06 12 P1.07
13 P1.08 14 P1.09
15 P1.10 16 P2.00
17 P2.02 18 P2.03
19 P2.04 20 P2.05
21 P2.06 22 P2.07
23 P2.08 24 P2.09
25 P2.10 26 P2.11
27 P2.12 28 P2.13
29 P2.17 30 P0.31
31 P0.30 32 P0.29
33 P0.28 34 P0.27
35 P0.26 36 P0.22
37 P0.12 38 P0.03
39 P0.02 40 P0.01
Page 14
SD/MMC
Pin # Signal Name Pin # Signal Name
1 CS_MMC 2 MOSI0
3 GND 4 VDD
5 SCLK0 6 GND
7 MISO0 8 pull-up
9 pull-up 10 WP
11 - 12 -
13 CP 14 pull-down
15 pull-down
CAN0
Pin # Signal Name
1 NC
2 JMP CAN0_T; CANL
3 GND
4 NC
5 NC
6 GND
7 CANH
8 pull-down
9 pull-up
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AVAILABLE DEMO SOFTWARE
– Jim Lynch's NOKIA 6610 LCD tutorial
– OpenOCD + Eclipse set of projects 1.00 include flash write make file for STR-750STK.
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ORDER CODE STR750-STK - assembled and tested board, includes STR750 microcontroller
How to order?
You can order to us directly or by any of our distributors.Check our web www.olimex.com/dev for more info.
Revision history
Revision A, December 2009
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Disclaimer
© 2010 Olimex Ltd. All rights reserved. Olimex®, logo and combinations thereof, are registered trademarks of Olimex Ltd. Other terms and product names may be trademarks of others.The information in this document is provided in connection with Olimex products. No license, express or implied or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Olimex products. Neither the whole nor any part of the information contained in or the product described in this document may be adapted or reproduced in any material from except with the prior written permission of the copyright holder.The product described in this document is subject to continuous development and improvements. All particulars of the product and its use contained in this document are given by OLIMEX in good faith. However all warranties implied or expressed including but not limited to implied warranties of merchantability or fitness for purpose are excluded.This document is intended only to assist the reader in the use of the product. OLIMEX Ltd. shall not be liable for any loss or damage arising from the use of any information in this document or any error or omission in such information or any incorrect use of the product.
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