stopwatch using logic gates
DESCRIPTION
stopwatch report using logic gatesTRANSCRIPT
Design Project
StopWatch
Done
by Anwer Alsomaily
200841680
&
Abdullah Al-Karairi
200923910
For Dr. K QURESHI
Department of Electrical Engineering
EE 200 DIGITAL LOGIC CIRCUIT DESIGN
Introduction:
Due to importance of time in exams competition and other situations in our life, we
found that stopwatch is the most useful project we may do. This stopwatch should
have START/STOP/RESET functions and it counts up to 100 minutes (99:59)
then it rests itself.
:Equipment & ICs
4- Hexadecimal display
4- BCD counter (74-161)
1- 7408 AND Gate
1- 7400 NAND Gate
1- 7432 OR Gate
Clock Start/Stop
Reset
:Circuit logic work implantation
Lab Work
+5 V (RED)
We used it as a power supply for all IC's
0V "ground" (Blue)
We use it to set the initial value of the inputs (A,B,C,D) to be 0
To Ground All IC's.
Load (Orange)
We Connect it As Shown in the logic work Diagram; By that way
1st Counter will count up to 9 and rest it self at the same moment it gives a clock
pulse to 2nd Counter
2nd Counter Will count up to 5 then repeat it self, Once It is be came 5 & 1st Counter 9
they will give a clock pulse to the 3rd Counter which will count up to 9 and by the
same way 4th counter will be pulsed.
Clock (white)
Connected with SWETCH using And Gate to deactivate it when we want to stop
counting and the output of this and is connected to this clock of 1st counter.
Output "QA,QB,QC,QD" (Green)
The output of the counters are connected to hexadecimal display.
Clear (Black)
We connected all the clear together and connect it to active high pulser.
The stopwach was working duo to this table:
ClK Clear (invert) Load Display
up 1 1 Next state
up 0 x 0
up 1 0 Intial state (ABCD)
Defficalies:
At the beginning of our project we used 7493 BCD counter but we faced a
problem that 7493 counter before it goes to the next state it go back to the initial
state and start counting up to the needed state. So we tride to make the Counter
using JK FF But when we did the simulation on logicworks we found the the
connection was very complicated and it is very difficuat to do it on minilab. By
searching on the Internet we found BCD counter 74_161 (Fig 2 Last PIG) wich is
fuction well with our project.
7-segment displayer needs to be connected to a 7-segment decoder
in order to reduce the number of ICs and the cost of the circuit we used Hex-
Dicimal Diplayer. (Fig1 Last PG)
Conclusion:
At the end of our work the stopwatch was working as we planned. In this project
we touched the exciting part of digital design every issue was exciting challenge. The
most important part of this project that we covered what we have studied
experimentally and practice a new experience; also we had a good review for the
final Exam.
Hexadecimal Display connection
74-161 Internal structure
74-161 connection
BI
ABCD
49
ABCDEFG
5124
3
11
10
98613
12
BI
ABCD
49
ABCDEFG
5124
3
11
10
98613
12
BI
ABCD
49
ABCDEFG
5124
3
11
10
98613
12
BI
ABCD
49
ABCDEFG
5124
3
11
10
98613
12
a
gdot
a
gdot
a
gdot
+5V
a
gdot
62
30
QA
QB
QC
QD
R0
2R
01
CL
KB
CL
KA9
33 2
1
14
12
9811
QA
QB
QC
QD
R0
2R
01
CL
KB
CL
KA9
33 2
1
14
12
9811
QA
QB
QC
QD
R0
2R
01
CL
KB
CL
KA9
33 2
1
14
12
9811
QA
QB
QC
QD
R0
2R
01
CL
KB
CL
KA9
33 2
1
14
12
9811
QA
QB
QC
QD
16
1
RC
O
P T ABCD LO
AD
CL
R
CL
K
107
19
2 3456
14
13
12
11
15
QA
QB
QC
QD
16
1R
CO
P T ABCD LO
AD
CL
R
CL
K
107
19
2 3456
14
13
12
11
15
QA
QB
QC
QD
16
1
RC
O
P T ABCD LO
AD
CL
R
CL
K
107
19
2 3456
14
13
12
11
15
QA
QB
QC
QD
16
1
RC
O
P T ABCD LO
AD
CL
R
CL
K
107
19
2 3456
14
13
12
11
15