Department of Electronics & Communication – S V N I T Microblaze-Starter Guide

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OBJECTIVE: TO CREATE MICROBLAZE PROJECT

1) Open Xilinx 10.1. XPS (Xilinx Platform Studio) using following commands :csh -----> 5 ( for Xilinx EDK10.1)-------> 112 (for XPS) ---- >

Click on Base System Builder (BSB) for new design.

2) Select Board as shown below :

Select correct revision of board (i.e. D), click next.

Department of Electronics & Communication – S V N I T Microblaze-Starter Guide

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3) Set Microblaze clock frequency as default value. Set debug option and Local memory option as per requirement. On-chip H/W debug will require JTAG cable. Click next.

4) Microblaze supports HyperTerminal through which standard output can be seen. It need RS-232 cable. To enable this select one of the XPS_UARTs as shown below:

Set appropriate Baudrate synchronous with HyperTerminal.

Department of Electronics & Communication – S V N I T Microblaze-Starter Guide

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Mark DDR_SDRAM device and unmark all other. Click next.

5) Microblaze provides inbuilt XPS_TIMER which can be used to count number of cycle required for your application.

One can add this timer by click on Add Peripheral - XPS_TIMER.

Department of Electronics & Communication – S V N I T Microblaze-Starter Guide

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Unmark Peripheral Test as it is not required. STDIN and STDOUT will show the standard i/o of your kit. Click next.

Base system builder will now generate the address of each peripheral you have selected. Click generate to build the project.

You will find the following display representing your system and path where it is located. click FINISH to finalize your design.

Department of Electronics & Communication – S V N I T Microblaze-Starter Guide

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OBJECTIVE: TO ADD NEW APPLICATION IN MICROBLAZE

1) After creating new project you will find the following XPS view :

Right click on Test_App_Memory and disable “Mark to Initialize BRAM”. Add new application ( here named my_application ) by clicking on it and enable “Mark

to Initialize BRAM” as shown below :

Department of Electronics & Communication – S V N I T Microblaze-Starter Guide

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2) Open Software Software Platform Settings Set CORE_CLK_FREQ_HTZ to 500000000 as shown below :

3) Set Compiler option Debug and Option No Optimization ( If you have loops in your design than it is advisable to choose this option)

Set default linker script. Set environment as executable.

4) Right click on Source in my_application add existing source. Add your source *.c file which has to be stored in folder “pcore” automatically generated by system.

Department of Electronics & Communication – S V N I T Microblaze-Starter Guide

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OBJECTIVE: TO ADD NEW COPROCESSOR USING FSL IN MICROBLAZE

1) Open “create and import peripheral” click next.

2) Select “create templates for new peripheral” click next.

3) Select “ To an XPS” project click next.

Department of Electronics & Communication – S V N I T Microblaze-Starter Guide

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4) Select “Fast Simplex Link” click next Select input and output number of interface to coprocessor. click next.

5) Define input- output argument click next.

6) Click Finish. Now your coprocessor interface is established!

Department of Electronics & Communication – S V N I T Microblaze-Starter Guide

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6) Now re-open “create and import peripheral” click next.

7) Select “import existing peripheral” click next.

8) Select name of your top level entity or module name as shown below :click next.

9) Select option “Browse to your HDL source…” click next.

Department of Electronics & Communication – S V N I T Microblaze-Starter Guide

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10) Select your HDL file from folder pcore : click next.

11) Your HDL code is compiled at this stage. If there is any error occur it will show you massage in log file. Otherwise following window will appear select both FSL link click next.

12) click Finish to exit setup of coprocessor.

Department of Electronics & Communication – S V N I T Microblaze-Starter Guide

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13) Open “ Hardware” Configure Coprocessor : Select your Coprocessor click Add.

14) Find the new FSL interface connected with Microblaze as shown below :

14) Click on Build All user Application

15) Click on “update bitstream using software application” and finally

16) Click on “Download bitstream to FPGA”. Then open hyper terminal:

program communication HyperTerminal 9600bps…. Result will be displayed.