Solving Hard Instances of Solving Hard Instances of FPGA Routing with a FPGA Routing with a Congestion-Optimal Congestion-Optimal Restrained-Norm Path Restrained-Norm Path Search SpaceSearch Space

Keith SoSchool of Computer Science and EngineeringUniversity of New South Wales, AustraliaISPD2007

Presentation OutlinePresentation Outline

1. Introduction to FPGA Routing2. Brief Review of Prior Work3. Observed Problems with Standard

Negotiated Congestion Formulations4. New Lexicographical Path Search Space

and Associated Properties5. Application to Wirelength-Driven

Routing6. Future Work7. Conclusions

Research GoalsResearch GoalsDevelop a range of FPGA routers

for different designer constraintsIdentify potential for

improvements through the study of known best state-of-the-art routers

More robust FPGA routers can save unit costs and allow area improvement in future FPGA architectures

FPGA Routing ProblemFPGA Routing Problem

FPGA Components◦ Logic blocks◦ Wire segments◦ Wire switches

Problem: To find an assignment of resources to nets that ◦ Satisfies required

connectivity◦ Satisfies electrical

design rules◦ (Plus optional designer

constraints)

Routing Resource Graph Routing Resource Graph Converts the FPGA architecture into a digraph

◦ Pins, Logic Blocks, Wire Segments Vertices◦ Switches Edges

Problem translates to finding mutually vertex-disjoint trees that implement the connectivity of nets

A Simple ExampleA Simple Example

Example Netlist◦ Net 1: s1->t1

◦ Net 2: s2->t2

◦ Net 3: s3->t2 and t3

In practice, 1000s+ of nets and more complex graph

t1 t2 t3

s1 s2 s3

r5r4

r3

r2

r1

Some Prior Approaches to Some Prior Approaches to FPGA RoutingFPGA Routing

Rip and reroute [Frankle92]

Global routing then detailed routing [Brown96,Lemieux97]

Transforms to SAT [Wood97,Nam99,Xu03]

Min-cost flow based[Lee03]

Negotiated Congestion based [Mcmurchie95,Betz97,Betz00,Fung03]

Negotiated CongestionNegotiated Congestion

Iterative route nets and gradually increase sharing penalty of overused resources

A* routing used to connect each net, with a cost function with congestion and secondary cost components

Sharing penalty cost is based on current congestion and congestion in previous iteration rounds and is monotonically increasing

Iterations continue until no electrical design rules are violated or until a maximum number of iterations reached (declares unroutability)

NC on the Simple ExampleNC on the Simple Example

t1 t2 t3

s1 s2 s3

r5r4

r3

r2

r1

1 2 3

1 1 4 1 2 5 2 3 5 2 3

2 1 4 1 2 4 2 3 5 2 3

3 1 1 2 3 1 2 4 2 3 5 2 3

N N N

I s r t s r t s r t t

I s r t s r t s r t t

I s r r r t s r t s r t t

Typical Form for Negotiated Typical Form for Negotiated Congestion Cost FunctionsCongestion Cost FunctionsFor vertex v:

occ(v): guard for congested vertexp(v): present congestion cost,

exponentially increasingh(v): historical congestion costs(v): designer issued secondary

costPath cost = sum of vertex costs

( ) ( ) ( ) ( ) ( )f v occ v p v h v s v

Problems with Scalar Path Problems with Scalar Path Evaluation Evaluation

In all previous implementations a weighted scalar projection is used for path evaluation

Optimality to the weighted functions has limited meaning to conditions in the terrain◦ Sometimes lead to suboptimal choices for

congestion avoidanceMagnitude of congestion cost is

exponentially increasing◦ Needed to ensure convergence◦ Will lead to numerical instability with floating

point representations

Suboptimal Choice with Respect Suboptimal Choice with Respect to Congestion Costto Congestion Cost

Suppose x is chosen by the A* router

Any path y on the Pareto line might have been chosen

Path z2 which is congestion free is not chosen ◦ because it is not on

the lower bound of candidate paths in the scalar function

Phases in the Negotiated Phases in the Negotiated Congestion CycleCongestion Cycle

Significand bits

congestionsecondary

Phase 1

Phase 2 Significand bits

congestion

secondary

Phases in the Negotiated Phases in the Negotiated Congestion CycleCongestion Cycle

Phase 3

Phase 4PrecisionLost!

Significand bits

congestion secondary

Significand bits

congestion secondary

Solution: Lexicographical Solution: Lexicographical Ordered PairsOrdered Pairs

Use a ordered pair to store congestion and secondary cost components

Pairwise addition: (c1,s1) + (c2,s2) = (c1+c2, s1+s2)

Define a dictionary order on elements: (c1,s1) < (c2,s2) if

c1<s1 or [c1=s1 and c2<s2]

Proof: Preservation of Proof: Preservation of AdmissibilityAdmissibility

The OP transformation preserves admissiblity of scalar secondary heuristics

Proof:◦ Define f’(x)=(0,f(x)) for admissible f in scalar

form◦ In OP space, the actual cost will be of the form

(d,f(x)+e)◦ (0,f(x)) < (d,f(x)+e) for any nonnegative d and

e so f’(x) is admissible in OP space Shows that A* search will be optimal when

using the OP comparator

Properties of Searches in the Properties of Searches in the Ordered Pair SpaceOrdered Pair SpaceProperty 1: Path chosen will have

minimum congestion cost◦(w,x) < (y,z) if w < y

Property 2: If multiple paths of congestion cost x are available, path chosen will be the one with minimum secondary cost◦(x,y) < (x,z) if y < z

Both properties handy for ensuring an “optimum choice” is made for each pin, assuming congestion cost measure “problem size’’

Application: CornNC Application: CornNC Wirelength Driven RouterWirelength Driven RouterSecondary cost is total wirelengthCornNC cost is an OP of

congestion cost and expected wirelength to target: f(v)=(occ(v)c(v),WL(v))

Congestion cost increased linearly per iteration, allows many iterations to be run (representation limit ~millions!)

Experimental EvaluationExperimental Evaluation

CornNC and VPR4.30 on the FPGA Challenge architecture and placements [Betz97]

Number of tracks parameterised to determine robustness

Runtimes and utilisation measured between mutually routable instances

Max iterations for CornNC = 1600

Further Aspects for Further Aspects for InvestigationInvestigationRuntime Improvements

◦Congestion cost schedule refinementInclusion of multiple objectives

◦e.g. simultaneous power and timing/mintime-maxtime

Application to other domains◦where negotiated congestion has

been successfully applied

ConclusionsConclusionsLexicographical ordered pair

evaluation of candidate paths has useful properties and is numerically stable

Effective for solving difficult cases of wirelength FPGA routing with a significant (10%) improvement

Analytically promising for many other objectives because of provably desirable path choices