slides courtesy: prof. nikolic (uc berkeley) eecs 141, sprint 2006 oregon state university ece...

Oregon State UniversityECE 471/571, Winter 2007Prof. Patrick Chiang

Slides courtesy:Prof. Nikolic (UC Berkeley)EECS 141, Sprint 2006

ECE 471 / 571 – Digital Integrated Circuits

Assistant Professor Patrick ChiangWinter 2007

Tues/Thurs 9-11AMOwen 103

Slides: Courtesy Prof. Nikolic(Berkeley),EECS 151, Spring 2006

Class Guidelines

• This is not an easy class– Do not take this class if you want a easy class in your Senior

year– Homework/projects require much computer simulation– I prefer active feedback – communication, open questions,

discussions

• Homework: Handed out ThursdaysDue: Thursdays before lecture

Course Breakdown• Final: 30%

• Project: 20%

• Midterm: 20%

• Homework(groups of two): 20%

• Class Participation: %10– Always ask the question:

why are we learning this?

• Homework for Thursday: Read Chapter 1

Multiple Processors on Single Chip

• Two processors on single-chip

• Two chips(w/ two processors) in single package

• 16 – 64 – 256 processors on single die– PicoChip– Stream Processors– Sun Niagara

QUESTIONS / BREAK

Documents