1

Differential Amplifiers

•Single Ended and Differential Operation•Basic Differential Pair•Common-Mode Response•Differential Pair with MOS loads

Hassan AboushadyUniversity of Paris VI

• B. Razavi, “Design of Analog CMOS Integrated Circuits”,McGraw-Hill, 2001.

References

H. Aboushady University of Paris VI

2

Differential Amplifiers

•Single Ended and Differential Operation•Basic Differential Pair•Common-Mode Response•Differential Pair with MOS loads

Hassan AboushadyUniversity of Paris VI

Single Ended and Differential Operation

H. Aboushady University of Paris VI

• Single Ended Signal:- Measured with respect to a fixed potential, usually ground.

• Differential Signal:- Measured between 2 nodes that have equal and oppositeexcursions around a fixed potential.- The center potential is called “Common Mode” (CM).

3

Rejection of Common Mode Noise

H. Aboushady University of Paris VI

• Single Ended Signal:- Due to capacitive coupling,transitions on the clock linecorrupt the signal on L1 .

• Differential Signal:- If the clock line is placedmidway, the transitions disturbthe differential signals by equalamounts, leaving the differenceintact.

Rejection of Power Supply Noise

H. Aboushady University of Paris VI

• Maximum Output Swing: • Maximum Output Swing:

)(max THGSDDout VVVV −−= [ ])(2maxmax THGSDDYX VVVVV −−=−

4

Differential Pair

H. Aboushady University of Paris VI

21

21

21

mm

DD

inin

ggIIVVif

≠⇒≠⇒≠

21 DDSS III +=

Differential pair minimaldependence on input CM level.

Differential circuit sensitiveto the input CM level.

221

21

SSDD

inin

III

VVif

==⇒

=

2SS

DDDIRVCMOutput −=

Differential Pair: Qualitative Analysis

H. Aboushady University of Paris VI

21 inin VV << M1 OFF, M2 ON

SSD II =2 DDout VV =1

DSSDDout RIVV −=2

21 inin VV = M1 ON, M2 ON

221SS

DDIII == D

SSDDoutout RIVVV

221 −==

21 inin VV >> M1 ON, M2 OFF

SSD II =1

DDout VV =2

DSSDDout RIVV −=1

5

Differential Pair: Qualitative Analysis

H. Aboushady University of Paris VI

• Maximum and minimum levels are well-defined andindependent of the input CM: VDD and VDD - RD ISS

• The small signal gain (the slope of Vout1-Vout2 vs Vin1-Vin2)is maximum for Vin1=Vin2 (equilibrium).

Differential Pair: Common-Mode Behavior

H. Aboushady University of Paris VI

For proper operation:• M3 in saturation

• M1 & M2 in saturation

CMininin VVV ,21 ==To study Common-Mode

)( 331, THGSGSCMin VVVV −+≥

THSS

DDDCMin VIRVV +−≤2,

6

Differential Pair: Output Voltage Swing

H. Aboushady University of Paris VI

For M1 & M2 in saturation:

THCMinout

THPCMinPout

VVVVVVVV

−≥−−≥−

,

,

THCMinoutDD VVVV −≥≥ ,

Output Voltage Swing:

To increase output swing, we choose a low CMinV ,

Differential Pair: Quantitative Analysis

H. Aboushady University of Paris VI

2211 GSinGSinP VVVVV −=−=

2121 GSGSinin VVVV −=− 1

LWC

IVVoxn

DTHGS

µ

2)( 2 =−

TH

oxn

DGS V

LWC

IV +=µ

22

Assuming M1 & M2 in saturation:

LWC

I

LWC

IVVoxn

D

oxn

Dinin

µµ21

2122 −=−

From eq. 1 & 2 :

)2(2)( 212

21 DDSS

oxn

inin III

LWC

VV −=−µ

Squaring the 2 sides, and since: 21 DDSS III +=

7

Differential Pair: Quantitative Analysis

H. Aboushady University of Paris VI

212

21 2)(2 DDSSininoxn IIIVVLWC −=−−µ

221

2

221

22121

)(

)()(4

DDSS

DDDDDD

IIIIIIIII

−−=

−−+=Squaring the 2 sides, and since:

Previous equation can be written:

221

421

22

21 )()(41)( ininoxnSSininoxnDD VV

LWCIVV

LWCII −+−⎟

⎠⎞

⎜⎝⎛−=− µµ

2212121 )(4)(

2 inin

oxn

SSinin

oxnDD VV

LWC

IVVLWCII −−−=−

µ

µ

We arrive at:

3

Differential Pair: Quantitative Analysis

H. Aboushady University of Paris VI

2

2

/4

2/

4

2in

oxn

SS

inoxn

SS

oxn

in

Dm

VLWC

I

VLWC

I

LWC

VIG

∆−

∆−=

∆∂∆∂=

µ

µµ

SSoxnmin ILWCGVFor µ==∆ ,0

Deriving eq. 3 with respect to

2121 andLet DDDininin IIIVVV −=∆−=∆

inV∆

221121 DDDDDDDDoutout RIVRIVVV −−−=−Since:

Dinmout RVGV ∆=∆DDout RIV ∆=∆

DSSoxnDmin

outv RI

LWCRG

VVA µ==

∆∆=The small signal

differential voltage gain:

4

8

Drain Currents and Overall Transconductance

H. Aboushady University of Paris VI

2

2

/4

2/

4

2in

oxn

SS

inoxn

SS

oxnm

VLWC

I

VLWC

I

LWCG

∆−

∆−=

µ

µµ

LWC

IVoxn

SSin

µ

21 =∆ when is 11 SSDin IIV =∆ 111 THGSin VVV −=∆

2212121 )(4)(

2 inin

oxn

SSinin

oxnDD VV

LWC

IVVLWCII −−−=−

µ

µ3

4

∆ID vs ∆VD

H. Aboushady University of Paris VI

LWC

IVoxn

SSin

µ

21 =∆

↑↑SSI

↑↑LWPlot the input-output characteristics

of a differential pair as the devicewidth and the tail current vary:

9

Differential Pair: Small Signal Gain

H. Aboushady University of Paris VI

DSSoxnDmin

outv RI

LWCRG

VVA µ==

∆∆=

221SS

DDIII ==

In equilibrium, we have

Dmv RgA = Where gm is thetransconductance of M1 & M2.

Calculating Small Signal Gain by Superposition

H. Aboushady University of Paris VI

Set Vin2 =0M1 forms a common sourcestage with a degenerationresistance

2/1 mS gR =

21

1

1 /1 mm

Dm

in

X

ggRg

VV

+−=

Sm

Dm

in

Xv Rg

RgVVA

1

1

1 1+−==

Neglecting channel lengthmodulation and body effect

21

111mm

D

in

X

gg

RVV

+−=

5

10

Calculating Small Signal Gain by Superposition

H. Aboushady University of Paris VI

Replacing M1 by its Thévenin equivalent:

21

111mm

D

in

Y

gg

RVV

+=

1inT VV = 1/1 mT gR = 22 /1 min gR =

1

21

112)(

1in

mm

DVtodueYX V

gg

RVVin

+

−=−

6

From eq. 5 & 6, we get:

Calculating Small Signal Gain by Superposition

H. Aboushady University of Paris VI

1

21

112)(

1in

mm

DVtodueYX V

gg

RVVin

+

−=−

mmm ggg == 21

11

)( inDmVtodueYX VRgVVin

−=−

22

)( inDmVtodueYX VRgVVin

=−

Dminin

totalYX RgVVVV

−=−

−

21

)(

Similarly we can say that:

Since:

The small signaldifferential voltage gain:

11

The concept of Half Circuit

H. Aboushady University of Paris VI

If a fully symmetric differential pair senses differentialinputs then the concept of half circuit can be applied.

• A differential change in the inputs Vin1 and Vin2 isabsorbed by V1 and V2 leaving VP constant

Application of The Half Circuit Concept

H. Aboushady University of Paris VI

Since VP experiences no change, node P can be considered“ac ground” and the circuit can be decomposed into twoseparate halves

Dmin

X RgVV −=

1Dm

in

Y RgVV −=

2

Two common source amplifiers:

Dminin

YX RgVVVV −=

−−

21

12

The Half Circuit Concept : Example

H. Aboushady University of Paris VI

Taking into account the output resistance(channel length modulation)

( )11

// ODmin

X rRgVV −= ( )2

2

// ODmin

Y rRgVV −=

Two common source amplifiers:

( )ODminin

YX rRgVVVV //

21

−=−−

Arbitrary Inputs to a Differential Pair

H. Aboushady University of Paris VI

Conversion of arbitrary inputs to differential and common-modecomponents:

DifferentialCommon

Mode

13

Arbitrary Inputs to a Differential Pair: Example

H. Aboushady University of Paris VI

Calculate VX and VY if Vin1 =Vin2 and λ=0

( ) ( )2

// 211

ininODmX

VVrRgV −−=For differential mode operation:

( ) ( )21// ininODmYX VVrRgVV −−=−

( ) ( )2

// 122

ininODmY

VVrRgV −−=

For common mode operation:2/21 SSDD III ==

Assuming fully symmetric circuitand Ideal Current Source:•ID1 and ID2 independent of•VX and VY independent of

inCMV ,

inCMV ,

The Differential pair circuit:Amplifies , Eliminates the effect of inCMV ,21 inin VV −

Common Mode Response: Non-Ideal Current Source

H. Aboushady University of Paris VI

Assuming fully symmetric circuitwith finite output impedancecurrent source, RSS :

SSm

D

CMin

outCMv Rg

RVVA

+−==

)2/(12/

,,

Equivalent circuit:• Degenerated Common Source

gm the transconductance of 1 transistor.

14

Common Mode Response: RD Mismatch Effect

H. Aboushady University of Paris VI

SSm

DCMinX Rg

RVV+

∆−=∆)2/(1,

Assuming M1 & M2 identical:

Common mode to differential conversion

SSm

DDCMinY Rg

RRVV+

∆+∆−=∆)2/(1,

Effect of CM noise in thepresence of resistor noise

Common Mode Response: M1-M2 Mismatch Effect

H. Aboushady University of Paris VI

)( ,11 PCMinmD VVgI −=

)( ,22 PCMinmD VVgI −=

( ) SSPCMinmmP RVVggV )( ,22 −+=( )

( ) CMinSSmm

SSmmP V

RggRggV ,

22

22

1+++=

21 mm gg ≠

( ) DPCMinmX RVVgV −−= ,1 ( ) CMinDSSmm

mX VR

RgggV ,

21

1

1++−=

( ) DPCMinmY RVVgV −−= ,2 ( ) CMinDSSmm

mY VR

RgggV ,

21

2

1++−=

( )( ) 121

,21

++−

=−SSmm

CMinDmmYX Rgg

VRggVV

( ) 121, ++∆=−=−

SSmm

Dm

CMin

YXDMCM Rgg

RgV

VVACM to DM Conversion Gain:

15

Common Mode Rejection Ratio

H. Aboushady University of Paris VI

DMCM

DM

AACMRR

−

=: Differential Mode GainDMA

: Common-Mode to Differential Mode Gain

DMCMA −

Cascode Differential Pair

H. Aboushady University of Paris VI

)//( OPONmNv rrgA =

Low gain 10 to 20.

To increase the gain:Cascode Differential Pair

)//( 7551331 OOmOOmmv rrgrrggA =

Current Source Load: