simple memristive time-delay chaotic systems
TRANSCRIPT
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International Journal of Bifurcation and Chaos, Vol. 23, No. 4 (2013) 1350073 (9 pages)c© World Scientific Publishing CompanyDOI: 10.1142/S0218127413500739
SIMPLE MEMRISTIVE TIME-DELAYCHAOTIC SYSTEMS
VIET-THANH PHAM, ARTURO BUSCARINO,LUIGI FORTUNA and MATTIA FRASCA
Dipartimento di Ingegneria Elettrica Elettronica e Informatica,Facolta di Ingegneria, Universita degli Studi di Catania,
viale A. Doria 6, 95125 Catania, Italy
Received June 12, 2012; Revised November 8, 2012
Memristive systems have appeared in various application fields from nonvolatile memory devicesand biological structures to chaotic circuits. In this paper, we propose two nonlinear circuitsbased on memristive systems in the presence of delay, i.e. memristive systems in which the stateof the memristor depends on the time-delay. Both systems can exhibit chaotic behavior and,notably, in the second model, only a capacitor and a memristor are required to obtain chaos.
Keywords : Time-delay systems; memristive systems; simple chaotic systems.
1. Introduction
Chaotic circuits have been designed to confirm the-oretical models [Fortuna et al., 2009] as well asto be used in diverse applications such as securechaotic communications [Cuomo & Oppenheim,1993], robotics [Arena et al., 2002] or randomgenerator implementation [Yalcin et al., 2004].Chaotic circuits can be either autonomous ornonautonomous, and an actual topic in the researchon chaos is the design of chaotic circuits with min-imum number of elements. On one hand, somesimple nonautonomous chaotic circuits were pro-posed [Linsay, 1981; Lindberg et al., 2005]. Lin-say built an anharmonic oscillator with a resistor,an inductor, and a varactor diode [Linsay, 1981].Dean [1994] presented a circuit with a capacitor,a linear resistor, and a resistor including ohmiclosses in the inductor winding. Chaos could occurin a sinusoidally driven second-order circuit madeof three linear elements and a Chua’s diode [Laksh-manan & Murali, 1995]. A nonautonomous chaoticcircuit based on one transistor, two capacitors,and two resistors was described by Lindberg et al.
[Lindberg et al., 2005; Fortuna & Frasca, 2007].On the other hand, in the realm of autonomouscircuits, Chua’s circuit has received a significantamount of attention [Fortuna et al., 2009]. The four-element Chua’s circuit introduced in [Barboza &Chua, 2008] can be considered as the simplest cir-cuit of this kind. In addition, by using a nonlin-ear active memristor, a 3-element autonomous cir-cuit has been realized [Muthuswamy & Chua, 2010].Piper [Piper & Sprott, 2010] introduced some sim-ple autonomous chaotic circuits using only op-ampsand linear time-invariant passive components. Morerecently, the autonomous Hartley’s oscillator basedon a Junction Field Effect Transistor (JFET) and atapped coil has been implemented [Tchitnga et al.,2012]. Hence, the authors have named it the sim-plest chaotic two-component circuit. However, it isnotable that, when the Tchitnga’s circuit is ana-lyzed in terms of the concept of mathematicalsimplicity given in [Piper & Sprott, 2010], it isnot really simple because of its four state equa-tions. The circuits discussed above are summarizedin Table 1.
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Table 1. Number of elements corresponding to several simple chaotic circuits.
Reference Autonomous Nonautonomous
Num. of elements
[Lindberg et al., 2005] 5[Lakshmanan & Murali, 1995] 4[Dean, 1994] 3[Linsay, 1981] 3[Barboza & Chua, 2008] 4[Muthuswamy & Chua, 2010] 3[Tchitnga et al., 2012] 2This work 2
From another point of view, if the prospec-tive study is to create a simple chaotic circuitdescribed by few dynamical equations, it is clearthat time-delay systems are good candidates. Thepresence of time-delay in dynamical systems hasbeen recorded, for example, in biological systems[Mackey & Glass, 1977; Sun et al., 2006] and arti-ficial systems [Ikeda & Matsumoto, 1987]. Due totime-delay, these systems are infinite-dimensionaldynamical systems [Xia et al., 2009] and thus a sys-tem described by just one delay differential equationcan be chaotic. Examples of time-delay chaotic cir-cuits built on the basis of a simple feedback schemeconsisting of a nonlinearity, a first-order RC circuit,and a time-delay block are reported in [Srinivasanet al., 2010; Buscarino et al., 2011].
Recently, memristor devices operating at thenanoscales have been discovered [Strukov et al.,2008; Tour & He, 2008], although their fundamen-tal theory was already introduced [Chua, 1971]and generalized [Chua & Kang, 1976] some timeago. Besides the potential applications of memris-tive systems as biological models [Pershin et al.,2009], adaptive filters [Driscoll et al., 2010] or pro-grammable analog integrated circuits [Shin et al.,2011; Chua, 2011], simple chaotic systems can bebuilt conveniently using memristors. Such theoreti-cal models have been listed in [Itoh & Chua, 2008,2011], while experimental approaches have beenpresented in [Muthuswamy, 2010; Muthuswamy &Chua, 2010; Buscarino et al., 2012].
In this paper, we investigate the possibility ofdesigning memristive time-delay systems (MTDS)exhibiting chaotic behavior. In particular, we intro-duce two different autonomous MTDS models andpropose an implementation of the second modelwhich consists of just two components: a time-delaymemristive element and a capacitor. The paper isorganized as follows. In Sec. 2, the two models (the
6-element MTDS and the 2-element MTDS) areintroduced. In Sec. 3, the implementation of the sec-ond model is discussed and experimental results areshown. Finally, conclusions are drawn in Sec. 4.
2. Models of MemristiveTime-Delay Systems
This section is devoted to the introduction of themathematical models of two MTDS showing chaoticbehavior. These models are built starting from cir-cuit configurations that are good candidates for thegeneration of chaos. This is in view of the final goalof our research, which is the real implementation ofthe mathematical model introduced.
2.1. The 6-element memristivetime-delayed system
The first model introduced in this paper is theMTDS shown in Fig. 1. The MTDS consists of anintegrator, a nonlinear active memristor, and a sin-gle time-delay block.
Analogously to the approach presented in[Muthuswamy, 2010], a nonlinear active memristive
Fig. 1. Circuital model of the 6-element MTDS based on anonlinear active memristor and a delay unit.
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Simple Memristive Time-Delay Chaotic Systems
system is considered. In particular, it is governedby the following equations:
y = f(y, vM , t) = lvM + my + nvMy
iM = G(y, vM , t)vM = αvM + βvMy2,(1)
where vM , iM , y are the voltage across the terminalsof the memristive system, the current through itand its state variable, respectively, and l,m, n, α, βare constants. By applying the Kirchhoff’s circuitlaws to the MTDS in Fig. 1, the following circuitequations are obtained:
dvC(t)dt
= −α
CvC(t) − 1
RCvC(t − τ)
− β
CvC(t)y2(t)
dy(t)dt
= lvC(t) + my(t) + nvC(t)y(t),
(2)
where τ is the time-delay. The dimensionlessequations of the 6-element MTDS are derived asfollows
x = ax + bxτ + cxy2
y = lx + my + nxy,(3)
where x = vC(t), xτ = x(t − τ), a = − αC , b = −1
RC ,and c = − β
C . If we set a = 1.5, b = −2, c = −2,l = 2.5, m = −0.5, and n = −5, Eqs. (3) become
x = 1.5x − 2xτ − 2xy2
y = 2.5x − 0.5y − 5xy.(4)
Once fixed the values of the parameters,Eqs. (4) have been numerically integrated for dif-ferent values of τ . Chaos is obtained through asequence of period-doubling bifurcations induced byincreasing values of this bifurcation parameter. Thechaotic attractor obtained for τ = 1.3 is shown inFig. 2, while the bifurcation diagram of Eqs. (4)when τ is varied from 0.3 to 1.6 is illustrated inFig. 3.
In order to confirm the chaotic behavior ofthe system, the maximum Lyapunov exponent hasbeen calculated. To do this, it should be takeninto account that, due to the presence of the time-delay, Eqs. (3) are infinite-dimensional. For suchsystems in the form x = f(x(t),x(t − τ)) withx(t) ∈ R
n, the maximum Lyapunov exponent canbe calculated [Sprott, 2007] by approximating the
−4 −2 0 2 4 6−6
−5
−4
−3
−2
−1
0
1
x(t)
y(t)
(a)
−4 −2 0 2 4 6−4
−2
0
2
4
6
x(t)
x(t−
τ)
(b)
Fig. 2. Projection of the chaotic attractors exhibited by the6-element MTDS (4).
0.4 0.6 0.8 1 1.2 1.4 1.6−6
−4
−2
0
2
4
6
8
10
τ
x max
(t)
Fig. 3. Numerical bifurcation diagram for the 6-elementMTDS, τ ∈ [0.3, 1.6].
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0.4 0.6 0.8 1 1.2 1.4 1.6−0.6
−0.5
−0.4
−0.3
−0.2
−0.1
0
0.1
τ
λ max
Fig. 4. Maximum Lyapunov exponent for the 6-elementMTDS.
dynamical equations in terms of (N + 1)n ordinarydifferential equations (ODEs) as follows:
x0 = f(x0,xN )
x1 =N(x0 − x1)
τ...
xN =N(xN−1 − xN )
τ
(5)
where x0,x1, . . . ,xN ∈ Rn and N → ∞, and apply-
ing the Wolf algorithm [Wolf et al., 1985] by usingthe Runge–Kutta method.
In particular, in our case, we fixed N = 100.The maximum Lyapunov exponent for system (3) isshown in Fig. 4. The results confirm that the behav-ior of the system becomes chaotic for τ ≥ 1.1.
2.2. The 2-element memristivetime-delay system
The most simple chaotic circuit based on mem-ristor is the so-called 3-element circuit introduced
Fig. 5. The 2-element MTDS.
in [Muthuswamy & Chua, 2010]: this consists ofonly three circuit elements (an inductor, a capac-itor and a memristive system), since, according tothe Poincare–Bendixson theorem [Bendixson, 1901],three is the minimum number of state variables foran autonomous continuous-time system to be ableto generate chaotic behavior. However, when time-delay systems are dealt with, since they can be con-sidered as infinite-dimensional dynamical systems[Mackey & Glass, 1977], even one delay differen-tial equation is enough to generate chaos [Farmer,1982; Ikeda & Matsumoto, 1987]. For this rea-son, we investigated a very simple configurationwith one time-delay memristive system: the par-allel of a memristive system and a second circuitelement. One has two possibilities: either consider-ing the parallel with a resistor or with a memory
−5 0 50
1
2
3
4
5
x(t)
y(t)
(a)
−5 0 5−5
0
5
x(t)
x(t−
τ)
(b)
Fig. 6. Chaotic attractor of 2-element MTDS (9) obtainedfor τ = 1.3.
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Simple Memristive Time-Delay Chaotic Systems
element (inductor or capacitor). The first case wasdiscarded, because the presence of a resistor in par-allel with the meristive system has the only effect ofredefining the i–v characteristics of the memristivesystem. In the second case, considering an induc-tor or a capacitor is equivalent. We focused on theparallel of a capacitor with a nonlinear active mem-ristive system. The circuit is shown in Fig. 5.
The memristive system in Fig. 5 is a voltage-controlled one-port system described by the follow-ing equations:
x = f(xτ , vM , t) = axτ + b|xτ | + cvM
iM = G(x, vM , t)vM = (α + βx)vM ,(6)
where x is the state variable of the memristor,τ is time-delay and a, b, c, α, β are constants. Byapplying the Kirchhoff’s circuit laws and the con-stitutive relationship of the memristive system (6),the equations governing the circuit are obtained:
dx(t)dt
= ax(t − τ) + b|x(t − τ)| + cvC(t)
dvC(t)dt
= −α
CvC(t) − β
Cx(t)vC(t).
(7)
By defining y = vC(t), xτ = x(t− τ), m = − αC , and
n = − βC , the following dimensionless equations are
derived for the 2-element MTDS:x = axτ + b|xτ | + cy
y = my + nxy.(8)
In the following we set a = 1, b = −2, c = 5, m =0.5, and n = −0.9 and consider τ as a bifurcation
1 1.1 1.2 1.3 1.4 1.5 1.60
0.5
1
1.5
2
2.5
3
3.5
4
τ
y max
(t)
Fig. 7. Numerical bifurcation diagram for the 2-elementMTDS (9), τ ∈ [1, 1.6].
1 1.1 1.2 1.3 1.4 1.5 1.6−0.2
−0.15
−0.1
−0.05
0
0.05
0.1
0.15
τ
λ max
Fig. 8. Maximum Lyapunov exponent for the 2-elementMTDS (9), τ ∈ [1, 1.6].
parameter. Equations (8) become:x = xτ − 2|xτ | + 5y
y = 0.5y − 0.9xy.(9)
Equations (9) have been numerically integratedand chaotic behavior has been obtained for τ 1.25. An example of the chaotic behavior obtainedwith the 2-element MTDS is shown in Fig. 6, whilethe bifurcation diagram with respect to τ is shownin Fig. 7. Another interesting bifurcation parame-ter is b. When this parameter is varied, chaos ispreserved for a quite large interval, beyond whichperiodic behavior or stable equilibrium point isobtained. The bifurcation diagram with respect tob is shown in Fig. 9.
1.8 1.85 1.9 1.95 2 2.05 2.1 2.15 2.20
1
2
3
4
5
−b
y max
(t)
Fig. 9. Numerical bifurcation diagram for the 2-elementMTDS (9), b ∈ [−2.2,−1.8].
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3. Implementation of the 2-ElementMemristive Time-Delay System
In this section we discuss the implementation ofthe 2-element memristive time-delay circuit andrelated experimental results. The memristive sys-tem in Eqs. (6) is implemented through a multiplierand a series of operational-based blocks devoted torealize the different terms appearing in Eqs. (6), sothat the whole circuit is implemented as in Fig. 10.It consists of a capacitor C1 in parallel with thecircuitry needed to implement the memristive sys-tem. The state variables of the mathematical modelx, y are implemented as voltages across the twocapacitors C2, C1, respectively. For the design ofthe op-amp-based blocks and for the choice of thevalues of the circuit components the design guide-lines detailed in [Arena et al., 1995, 1996; Fortuna
et al., 2009; Muthuswamy, 2010; Muthuswamy &Chua, 2010; Sprott, 2010] have been followed.
The circuit equations have the following form:
dx
dt=
1R13C2
(−x +
R11
R8x +
R11
R10xτ
− R17
R16
R11
R7|xτ | + R11
R9y
)
dy
dt=
1R13C1
(R13
R3y − R13(R4 + R5)
10R3R4xy
).
(10)
These equations are derived under two designconstraints which simplify a lot the expression of theparameters and, thus, the choice of the circuit com-ponents, which have to be selected so that Eqs. (10)can match Eqs. (9). In particular, at the summing
y
x
x_tau
0
0
0
0
0
0
0
Delay Unit
C1
1uF
R15
100k
R15
100k
U7U7
+
-
OUT R13
1k
R13
1k
R5
34k
R5
34k
U6U6
+
-
OUT
R42kR42k
R3
2k
R3
2k
R16
100k
R16
100k
R2
2.2k
R2
2.2k
R10
100k
R10
100k
R12100kR12100k
R1
2.2k
R1
2.2k
U4U4
+
-
OUT
R11
100k
R11
100k
D1
D1N4148
D1
D1N4148
U3
AD633
U3
AD633
X11
X22
Y13
Y24
Z6
W 7
V+
8V
-5
C21uC21u
U5U5
+
-
OUT
R17
110k
R17
110k
U2U2
+
-
OUT
U1U1
+
-
OUT
R9
20k
R9
20k
R14
100k
R14
100k
U8U8+
-
OUT
R8
100k
R8
100k
R7
50k
R7
50k
R6
11.11k
R6
11.11k
Fig. 10. Schematic of the 2-element memristive time-delay circuit. R17 is a variable resistor which implements the bifurcationparameter b. The values of components are as follows R1 = R2 = 2.2 kΩ, R3 = R4 = 2kΩ, R5 = 34 kΩ, R6 = 11.11 kΩ,R7 = 50 kΩ, R9 = 20 kΩ, R13 = 1kΩ, R17 = 110 kΩ, R8 = R10 = R11 = R12 = R14 = R15 = R16 = 100 kΩ, andC1 = C2 = 1 µF.
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Fig. 11. Schematic of the delay unit including six Bessel filters in series where R18 = R19 = R20 = R21 = · · · = R28 =R29 = 10kΩ, C3 = C5 = · · · = C2i+1 = · · · = C13 = 22nF, and C4 = C6 = · · · = C2i = · · · = C14 = 10nF.
operational amplifier U2 we imposed that the sumof all the conductances at the negative input ter-minal of the operational amplifier is equal to thesum of the conductances at the positive input,i.e. that:
1R6
+1
R11=
1R7
+1
R8+
1R9
+1
R10+
1R12
. (11)
In this way, each input contribution to the out-put of the summing amplifier is weighted by a termwhich is the ratio between the feedback resistanceR11 and the resistance linking the given input to theinput terminal of the operational amplifier. The sec-ond constraint is that R8 R13, so that capacitorC2 is loaded only by R13.
To match Eqs. (9), the components are chosenso that they satisfy: R11
R8= 1, R11
R10= 1, R17R11
R16R7= 2,
R11R9
= 5, R13R3
= 0.5, and R13(R4+R5)10R3R4
= 0.9. Theterms C1R13 = C2R13 = 1ms represent a timerescaling factor of the whole circuit, introduced tolet the typical frequencies of the circuit to be in theorder of magnitude of kHz. Furthermore, the blockconstituted by the operational amplifier U1 and R3
is the equivalent of a negative resistance of value−R3, provided that R1 = R2.
The time-delay block has also been imple-mented with an op-amp-based approach. In partic-ular, the approach discussed in [Buscarino et al.,2011] and based on a cascade of Bessels filters hasbeen used. This approach is suitable to implement
(a) (b)
Fig. 12. Experimental chaotic attractor of the 2-element memristive time-delay circuit in (a) x(t)–y(t) plane, and (b) x(t)–x(t − τ ) plane when R17 = 100 kΩ [X axis = Y axis = 1 V/div].
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Fig. 13. Experimental bifurcation diagram for the 2-elementmemristive time-delay circuit with respect to parameter b.
time-delays in the order of magnitude of millisec-onds as required in our study.
TL084 op-amps and an Analog Devices AD633multiplier have been used. Values of resistors andcapacitors are reported in Fig. 10. The schematicof the time-delay block is shown in Fig. 11. Thevalue of the time-delay implemented in this blockis Tdelay = 1.3ms, so that the dimensionless delayτ is:
τ =Tdelay
R13C2= 1.3. (12)
The 2-element memristive time-delay circuithas been implemented on a breadboard with dis-crete off-the-shelf components. Signal waveformshave been recorded by using a data acquisitionboard National Instruments SCB-68 with a sam-pling frequency of fs = 10kHz for T = 5 sec. Thechaotic attractor obtained for R17 = 100 kΩ, corre-sponding to b = −2, is shown in Fig. 12. A goodagreement between the theoretical and experimen-tal attractor can be observed. We have then inves-tigated the behavior of the circuit with respectto b, by varying the value of the variable resis-tor R17. R17 consists of a 90 kΩ resistor in serieswith a 20 kΩ trimmer. The experimental bifurca-tion diagram showing the local maxima of the out-put signal y at different values of R17 is shown inFig. 13. Chaotic regions of the system behavior andwindows of periodic behaviors are observed in thebifurcation diagram. The experimental bifurcationdiagram confirms the numerical analysis carried outin the previous section.
4. Conclusion
In this work two novel memristor-based chaoticoscillators have been introduced. By consideringmemristive systems with time-delay, chaos can beobserved in very simple circuit configurations. Inparticular, the second chaotic circuit consists ofonly two components: a capacitor and a memristivesystem with time-delay. An electronic implementa-tion of this 2-element introduced model has alsobeen proposed and experimental results confirmingthe suitability of the approach and the interest thatmemristive time-delay circuits can raise have beenobtained.
Although Eqs. (9) do not correspond to a phys-ical system, it is also true that memristive proper-ties are today appearing in a lot of different devicesand systems. We retain that the chaotic behav-ior observed in system (9) is not strictly linkedto the nonlinearity used, but, on the opposite, weretain that, since other nonlinearities can be used inthe memristor equations, our work demonstrates amore general conclusion, i.e. that chaos can appearin a system made by a memory element and atime-delayed memristive element. Given the highrate of new discoveries of memristive characteris-tics in old and new devices, we do not exclude thatmemristive physical systems, to be used in schemessimilar to that we proposed to generate chaos,can be found.
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