sigma delta modulation

Integrated Systems Laboratory ETH Zürich

Introduction to

Sigma-Delta Modulation

ESPRIT - Mixed Signal Design Cluster - Work Shop

Prof. Dr. Qiuting Huang

Seedamm-Plaza, Pfäffikon, SwitzerlandOctober 22nd, 2001


Outline

q ADC as a Tracking Loop

q Linearity and Quantization Noise

q First Order Σ∆-Modulator

q Higher Order Loops

q Cascaded Modulators

q Non-Idealities

q Conclusions


Motivation for Oversampled Converters

q Need for spectral efficiency in communications systems (ADSL, UMTS, etc. ) => high requirements for A/D and D/A converters (12-14 bit of resolution and linearity)

q VLSI technologies: Low component accuracy, decreasing analog signal dynamic range => difficult for Nyquist rate converters and anti-aliasing filters

q IDEA: Exchange of speed + complexity vs. analog resolution

q Solution: Oversampled data converters, spectral shaping of

quantization noise


Published Sigma-Delta Converters

PrecisionMeasurement

Speech

Audio

MobileCommunications

GSMADSL

Broadband WirelineCommunications

ADAMS86

BOSER88 LONGO93

KERTH94

HAIRAPETIAN96

FUJIMORI96

LEUNG97

RABII97

FELDMAN98BURGER98

GEERTS00

NAIKNAWARE00

GEERTS00

BALMELLI00BURGER01

10 100 1k 10k 100k 1M 10M 100M50

150

120

110

140

130

100

80

90

70

60

Dyn

amic

Ran

ge [d

B]

Input Signal Bandwidth [Hz]

Speed vs. ResolutionTrade-Off


Generic ADC as Tracking Loop

q D/A converter determines gain and linearity of entire A/D converter

Examples:- Dual-Slope- SAR- Σ∆ - Modulation

( )xfyfqA

xqAy

qA1band signalin

1

1−

>>

= →+

=o

oooo

A(u)

A/D (Quantizer)

D/A

q(w)

f(y)

x u wy

n

- n


D/A Converter Linearity and Quantizer Levels

q Dynamic Range Is Determined by Linearity and Noise

q Static Linearity Depends on Matching Accuracy of ComponentsExcept for a 1-bit D/A

q Quantization Noise Decreases with Increasing Quantizer Levels

q Noise Power Is Spread Between DC and fs/2

q DR Can Be Traded with Speed


Spectral Behavior of Quantization Error (Noise)

0

-40

-20

-60

-80

-1000 Fs/2Frequency [Hz]

Mag

nitu

de [d

BFS]

10bit Quantizer (Quantization Error):

0

-40

-20

-60

-80


Mag

nitu

de [d

BFS]

10bit Quantizer (Output Signal):

0

-40

-20

-60

-80


Mag

nitu

de [d

BFS]


0

-40

-20

-60

-80


Mag

nitu

de[d

BFS

]



Av.

0.26

-1

v[k]

0.25

0.24

0.23

0.22

0.21

1-0.1-0

ε[k]x[k]u[k]K

First Order Σ∆ ModulatorBlock Diagram Example:

First Order Shaped Noise

x[k] = x[k-1] + ε[k-1]v[k] = Q(x[k])ε[k] = u[k] – v[k]

Low-Pass

Integrator 1bitquantizer

D/A

u(kTs) v(kTs) d(kTs)

∫ dt

Fs/2000 Fs/2-100

-80

-60

-40

-20

0

Fs/200 Fs/20Frequency [Hz]

Mag

nitu

de [d

B FS]

D

v[k]x[k]

-1

+1

u[k] ε[k]Q(.)

0.9 1 - 0.8

0.1 1 - 0.8

- 0.7 -1 1.2

0.5 1 - 0.8

- 0.3 -1 1.2

0.9 1 - 0.8

0.2


General Single-Path Σ∆ Modulator

D/A

x(kTs) y(kTs)

A/DH(z)

w(kTs)

e(kTs)

The power spectrum of quantizer error e(kTs) = y(kTs) – w(kTs) can be assumed white and uncorrelated with x(kTs), if the latter is sufficiently active.

The power of quantization error is:

srms TdEe ωπ

π

=ΩΩΩ= ∫ ,)(21 2

0

22

+−


Linearized General Model

)()(1

1)(

)(1)(

)( zEzH

zXzH

zHzY

++

+=

D/A

X(z) Y(z)

A/DH(z)

W(z)

E(z)

+

NTF1)(1

1)(1)(1

)()(1

)(STF −=

+−

++

=+

=zHzH

zHzX

zHzH

NTFSTF

1STF(Ω)

<<1NTF(Ω)

>>1H(Ω)

In-bandX(z) Y(z)

H(z)

W(z)

E(z)


Higher Order Loops

L

zz

zH

−

= −

−

1

1

1)(

Output noise spectral density

)()1()()1(

)1()(1

1)()( 1 Ω−≈ →Ω

+−−

==+

Ω=Ω Ω−<<ΩΩ−Ω−

Ω−

Ω EeEee

eezH

EF LjLjLj

Lj

j

)2( ss fTT πω ==Ω

Total in-band noise

∫∫∫ΩΩ

Ω−Ω

Ω−

ΩΩ

Ω

=ΩΩ−=ΩΩΩ=ooo

o

dEedEedFFNL

rms

Ljo

0

22

2

0

22* )()2

sin(21

)(11

)()(21

πππ

)12(2

2

0

2221,)sin(

12)12(1 )12( +−

Ω<<≈

+=Ω

+=ΩΩ →

+

∫ LL

rmsormsL

rmsxxx OSR

Le

Le

deL

o πππ soo T

OSRω

ππ=

Ω=

z-1

H(z)

z-1z-1


RMS-Noise in Signal Band

O dB corresponds to that of PCM sampled at Nyquist rate


Stability of Higher Order Modulators

Solutions:

q Add feedforward and feedback paths to increase damping

⇒ Higher order single loop modulators

q Cascade 1st and 2nd order stages

⇒ Cascaded modulators

NTF(z) = (1-z-1)L implemented with a chain of integrators can lead to unstable modulator behavior for L ≥ 3

1

6 dB

00

2

sTje ω−−1

sTωπ


Design of Single Loop Modulators

1. Design of NTF(z) - Filter function (e.g. inverse Chebychev)- STF = 1 – NTF- Steeper noise shaping can be tolerated

with more quantizer levels

2. Compute H(z)

H(z) = 1 - 1/NTF

1. Choose appropriate topology toimplement H(z)

2. Compute coefficients

3. Simulate behavior with quantizer

⇒ ds-toolbox (R. Schreier, ftp://next242.ece.orst.edu/pub/delsig.tar.Z)

103

104

105

106

90

80

70

60

50

40

30

20

10

10

Frequency [Hz]

0

100

STF NTF

Pass-Band

d1 = 4/5

d2 = 3/5

b1 = 1/4

b2 = 1/2

a1 = 1/4

c2 = 0.0105

d3 = 3/5b3 = 1/6

d2a1

b3b2b1

d1

c2

d3


Achievable SNR

Butterworth Type NTF(all zeros at DC)

Optimized NTF(zeros optimally spread over pass-band)

0

20

40

60

80

100

120

140

160

L = 2

L = 3

L = 4

L = 5

25612864321684

OSR

0

20

40

60

80

100

120

140

160

L = 2

L = 3

L = 4

L = 5

25612864321684

OSR


Stability of Single Loop Modulators

H(z)X(z) Y(z)-

k +

E(z)

Quantizer Gain0 ≤ k ≤ 1

)(11

zkHNTF

+=

)(1)(zkH

zkHSTF

+=

q Single bit quantizer- Ardalan/Paulos (TrCAS, Jun87)- Maguire/Huang (ISCAS94)

q Multi bit quantizerv

u

v = k u


Cascaded Modulators

Single Loop Modulator

Cascaded Modulator

H(z) A/D

D/A

Analoginput

- Digitaloutput

H(z) A/D

D/A

Analoginput

- Digitaloutput 1

H(z) A/D

D/A

Digitalsignalprocessing

-

Digitaloutput 2

-

Finaldigitaloutpu t


1-1 Cascaded Modulator

⇒ Performance depends on matching of analog and digital transfer functions

)2())(1( 21'

3'

22 −−−−− +−−−−+≈ nnnnnnn eeeeegxy

X(z)

-z-1

z-1 z-1- Y(z)

-z-1

ne

'ne

)( '1

'−−+ nnn eex

'1−⋅ neg

1'

2 −− −+⋅ nnn eeeg

-


Σ∆ Modulator Non-Idealities I

q Nonlinear STF due to quantization (Huang/Maguire (ISCAS 93))

- Example: 3rd order modulator with inv. Chebychev NTF

10 6-140

-120

-100

-80

-60

-40

-20

0

89 dB

10 4 10 510 3

Frequency [Hz]

Output Spectrum at Maximum Input Level

89 dB

3rdHarmonics


Σ∆ Modulator Non-Idealities II

q Tones - Limit cycles in the pass-band - Tones near fs/2

q Circuit non-idealities → other presentations

5.7 5.8 5.9 6 6.1 6.2 6.3 6.4 6.5x 10 6

-140

-120

-100

-80

-60

-40

-20

0

Tones- 6 dBfull scale

30 kHz sinusoidal input@-43 dB full scale

Output Spectrum Near fs/2

Frequency [Hz]

-140

-120

-100

-80

-60

-40

-20

0

- DC-input @ -51 dBfull scale

Tones

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2x 10

5

Output Spectrum of 2x Pass-Band Width

Frequency [Hz]


Conclusions

q Linearity of an A/D converter is determined by that of its D/A

q Matching accuracy is typically limited, which makes linearity a problem for monolithic integration of A/D converters

q One-bit D/A is potentially very linear, but too much noise is generated by a 1-bit quantizer

q Noise shaping, effected by feedback, enables S and N to be separated

q A Σ∆ converter is therefore a combination of 1-bit quantizer for linearity, noise shaping for S and N separation and digital filtering for noise removal

sigma delta modulation

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