session a1: topics on computer architecture

1
MicroprocessMgand Mkcroprogramming 32 (1991) 11-12 11 Nor;h-Holland ~: E~wm~ San~m~ Each family of processors has its own particular problems associated with its architecture. The papers to be presented propose solutions for particular problems arising in three families of processors: microprogrammed processors, RISC processors, and high-level language processors. Certain sequencers for microprogrammed processors impose rigid constraints concerning the placement of microinstructions; the future address must be within a certain limited distance. In this case, the microprogrammer finds himself confronted with the problem of the global placement of microinstructions. The paper of E. S. T. Fernandes et al., "Microinstruction Placement by Simulated Annealing" proposes an original solution for overcoming this problem. This method has been tested, with success, on a microprogrammable computer MITKA-!5 ~rom Cll-Thomson. Several instructions that are currently found in th~ instruction set of CISC processors have disappeared with the rise of RISC processors. Division is an example; it can be implemented by a series of microinstructions in a CISC processor, but it must be implemented by a series of assembly instructions on a RISC processor. The paper of L. Anido, "Improving the Division Instruction of Application-Specific RISCs" presents an algorithm for implementing division on a RISC processor, so as to optimize the time of calculation. This method was tested on an application for the treatment of images, where the time spent executing division operations represents a significant po:tion of the total time of execution. Opposed to RISC architectures one finds high level-language processors, where the principle is to study the instructions of a chosen language in order to facilitate the compilation of that language. The assembly instructions of such a~rocessor are very close to the primiv~uw of the chosen language thus making u::~ code generated by the compiler very short. The paper of B. W. Watson et al., "Compilation Techniques for a High-Level Language Processor", presents a compiler for a processor that was developed for the C programming language at the Eindhoven University of Technology.

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MicroprocessMg and Mkcroprogramming 32 (1991) 11-12 11 Nor;h-Holland

~ : E~wm~ San~m~

Each family of processors has its own particular problems associated with its architecture. The papers to be presented propose solutions for particular problems arising in three families of processors: microprogrammed processors, RISC processors, and high-level language processors. Certain sequencers for microprogrammed processors impose rigid constraints concerning the placement of microinstructions; the future address must be within a certain limited distance. In this case, the microprogrammer finds himself confronted with the problem of the global placement of microinstructions. The paper of E. S. T. Fernandes et al., "Microinstruction Placement by Simulated Annealing" proposes an original solution for overcoming this problem. This method has been tested, with success, on a microprogrammable computer MITKA-!5 ~rom Cll-Thomson. Several instructions that are currently found in th~ instruction set of CISC processors have disappeared with the rise of RISC processors. Division is an example; it can be implemented by a series of microinstructions in a CISC

processor, but it must be implemented by a series of assembly instructions on a RISC processor. The paper of L. Anido, "Improving the Division Instruction of Application-Specific RISCs" presents an algorithm for implementing division on a RISC processor, so as to optimize the time of calculation. This method was tested on an application for the treatment of images, where the time spent executing division operations represents a significant po:tion of the total time of execution.

Opposed to RISC architectures one finds high level-language processors, where the principle is to study the instructions of a chosen language in order to facilitate the compilation of that language. The assembly instructions of such a~rocessor are very close to the primiv~uw of the chosen language thus making u::~ code generated by the compiler very short. The paper of B. W. Watson et al., "Compilation Techniques for a High-Level Language Processor", presents a compiler for a processor that was developed for the C programming language at the Eindhoven University of Technology.