sensor signal conditioning ic for closed-loop magnetic ... · pdf filefeatures designed for...

36
FEATURES D DESIGNED FOR SENSORS FROM VACUUMSCHMELZE (VAC) D SINGLE SUPPLY: 5V D POWER OUTPUT: H-Bridge D DESIGNED FOR DRIVING INDUCTIVE LOADS D EXCELLENT DC PRECISION D WIDE SYSTEM BANDWIDTH D HIGH-RESOLUTION, LOW-TEMPERATURE DRIFT D BUILT-IN DEGAUSS SYSTEM D EXTENSIVE FAULT DETECTION D EXTERNAL HIGH-POWER DRIVER OPTION APPLICATIONS D GENERATOR/ALTERNATOR MONITORING AND CONTROL D FREQUENCY AND VOLTAGE INVERTERS D MOTOR DRIVE CONTROLLERS D SYSTEM POWER CONSUMPTION D PHOTOVOLTAIC SYSTEMS DESCRIPTION The DRV401 is designed to control and process signals from specific magnetic current sensors made by Vacuumschmelze GmbH & Co. KG (VAC). A variety of current ranges and mechanical configurations are available. Combined with a VAC sensor, the DRV401 monitors both ac and dc currents to high accuracy. Provided functions include: probe excitation, signal conditioning of the probe signal, signal loop amplifier, an H-bridge driver for the compensation coil, and an analog signal output stage that provides an output voltage proportional to the primary current. It offers overload and fault detection, as well as transient noise suppression. The DRV401 can directly drive the compensation coil, or connect to external power drivers. Therefore, the DRV401 combines with sensors to measure small to very large currents. To maintain the highest accuracy, the DRV401 can demagnetize (degauss) the sensor at power-up and on demand. Integrator Filter Probe Interface H-Bridge Driver V OUT REF IN I COMP2 R S I COMP1 Compensation Patents Pending. Diff Amp Timing, Error Detection, and Power Control Degauss V REF V REF GND +5V IS2 IS1 DRV401 I P Compensation Winding Magnetic Core Primary Winding Field Probe PWM PWM DRV401 SBVS070B - JUNE 2006 - REVISED MAY 2009 Sensor Signal Conditioning IC for Closed-Loop Magnetic Current Sensor www.ti.com Copyright 2006-2009, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

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Page 1: Sensor Signal Conditioning IC for Closed-Loop Magnetic ... · PDF filefeatures designed for sensors from vacuumschmelze (vac) single supply: 5v power output: h-bridge designed for

FEATURES DESIGNED FOR SENSORS FROM

VACUUMSCHMELZE (VAC) SINGLE SUPPLY: 5V POWER OUTPUT: H-Bridge DESIGNED FOR DRIVING INDUCTIVE LOADS EXCELLENT DC PRECISION WIDE SYSTEM BANDWIDTH HIGH-RESOLUTION, LOW-TEMPERATURE

DRIFT BUILT-IN DEGAUSS SYSTEM EXTENSIVE FAULT DETECTION EXTERNAL HIGH-POWER DRIVER OPTION

APPLICATIONS GENERATOR/ALTERNATOR MONITORING

AND CONTROL FREQUENCY AND VOLTAGE INVERTERS MOTOR DRIVE CONTROLLERS SYSTEM POWER CONSUMPTION PHOTOVOLTAIC SYSTEMS

DESCRIPTIONThe DRV401 is designed to control and process signalsfrom specific magnetic current sensors made byVacuumschmelze GmbH & Co. KG (VAC). A variety ofcurrent ranges and mechanical configurations areavailable. Combined with a VAC sensor, the DRV401monitors both ac and dc currents to high accuracy.

Provided functions include: probe excitation, signalconditioning of the probe signal, signal loop amplifier, anH-bridge driver for the compensation coil, and an analogsignal output stage that provides an output voltageproportional to the primary current. It offers overload andfault detection, as well as transient noise suppression.

The DRV401 can directly drive the compensation coil, orconnect to external power drivers. Therefore, the DRV401combines with sensors to measure small to very largecurrents.

To maintain the highest accuracy, the DRV401 candemagnetize (degauss) the sensor at power-up and ondemand.

IntegratorFilter

ProbeInterface

H−BridgeDriver

VOUT

REFIN

ICOMP2

RS

ICOMP1

Compensation

Patents Pending.

DiffAmp

Timing, Error Detection,and Power Control

Degauss VREFVREF

GND+5V

IS2

IS1

DRV401

IP

Compensation Winding

Magnetic Core

Primary Winding

Field Probe

PWM PWM

DRV401

SBVS070B − JUNE 2006 − REVISED MAY 2009

Sensor Signal Conditioning IC forClosed-Loop Magnetic Current Sensor

www.ti.com

Copyright 2006−2009, Texas Instruments Incorporated

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instrumentssemiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

! !

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2

ABSOLUTE MAXIMUM RATINGS (1)

Supply Voltage +7V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Signal Input Terminals:

Voltage(2) −0.5V to VDD + 0.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . Differential Amplifier(3) −10V to +10V. . . . . . . . . . . . . . . . . . . . . . Current at IS1 and IS2 ±75mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Current (pins other than IS1 and IS2)(2) ±25mA. . . . . . . . . . . . . . ICOMP Short Circuit(4) +250mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Junction Temperature −50°C to +150°C. . . . . . . . . . . . . Storage Temperature −55°C to +150°C. . . . . . . . . . . . . . . . . . . . . . . ESD Rating:

Human Body Model (HBM)Pins IAIN1 and IAIN2 Only 1kV. . . . . . . . . . . . . . . . . . . . . . . . . . .

All Other Pins 4kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (1) Stresses above these ratings may cause permanent damage.

Exposure to absolute maximum conditions for extended periodsmay degrade device reliability. These are stress ratings only, andfunctional operation of the device at these or any other conditionsbeyond those specified is not supported.

(2) Input terminals are diode-clamped to the power-supply rails.Input signals that can swing more than 0.5V beyond the supplyrails must be current limited, except for the differential amplifierinput pins.

(3) These inputs are not internally protected against over voltage.The differential amplifier input pins must be limited to 5mA, max or±10V, max.

(4) Power-limited; observe maximum junction temperature.

This integrated circuit can be damaged by ESD. TexasInstruments recommends that all integrated circuits behandled with appropriate precautions. Failure to observe

proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation tocomplete device failure. Precision integrated circuits may be moresusceptible to damage because very small parametric changes couldcause the device not to meet its published specifications.

ORDERING INFORMATION(1)

PRODUCT PACKAGE-LEADPACKAGE

DESIGNATORPACKAGEMARKING

DRV401QFN-20

(5mm x 5mm)RGW HAAQ

DRV401 SO-20 DWP DRV401A

(1) For the most current package and ordering information see thePackage Option Addendum at the end of this document, or seethe TI web site at www.ti.com.

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ELECTRICAL CHARACTERISTICS Boldface limits apply over the specified temperature range: TJ = −40°C to +125°C.

At TA = +25°C and VDD1 = VDD2 = +5V with external 100kHz filter BW, and zero output current ICOMP, unless otherwise noted.DRV401

PARAMETER CONDITIONS MIN TYP MAX UNITSDIFFERENTIAL AMPLIFIER RL = 10kΩ to 2.5V, VREFIN = 2.5V

OFFSET VOLTAGEOffset Voltage, RTO(1)(2) VOS Gain 4V/V ±0.01 ±0.1 mV

Drift, RTO (2) dVOS/dT ±0.1 ±1(3) µV/°Cvs Common-Mode, RTO CMRR −1V to +6V, VREF = 2.5V ±50 ±250 µV/Vvs Power-Supply, RTO PSRR VREF not included ±4 ±50 µV/V

SIGNAL INPUTCommon-Mode Voltage Range −1 (VDD) + 1 V

SIGNAL OUTPUTSignal Over-Range Indication (OVER-RANGE), Delay (2) VIN = 1V Step, See Notes 2 and 3 2.5 to 3.5 µsVoltage Output Swing From Negative Rail(2), OVER-RANGE Trip Level

I = +2.5mA, CMP Trip Level +48 +85 mV

Voltage Output Swing From Positive Rail(2), OVER-RANGE Trip Level

I = −2.5mA, CMP Trip Level VDD − 85 VDD − 48 mV

Short-Circuit Current(2) ISC VOUT Connected To GND −18 mAVOUT Connected To VDD +20 mA

Gain, VOUT/VIN_DIFF 4 V/VGain Error ±0.02 ±0.3 %Gain Error Drift ±0.1 ppm/ °CLinearity Error RL = 1kΩ 10 ppm

FREQUENCY RESPONSEBandwidth(2) BW−3dB 2 MHzSlew Rate(2) SR CMVR = −1V to = +4V 6.5 V/µsSettling Time, Large-Signal(2) dV ± 2V to 1%, No External Filter 0.9 µsSettling Time(2) dV ± 0.4V to 0.01% 14 µs

INPUT RESISTANCEDifferential 16.5 20 23.5 kΩCommon-Mode 41 50 59 kΩExternal Reference Input 41 50 59 kΩ

NOISEOutput Voltage Noise Density, f = 1kHz, RTO(2) en Compensation Loop Disabled 170 nV/√Hz

COMPENSATION LOOP

DC STABILITY Probe f = 250kHz, RLOAD = 20ΩOffset Error(4) Deviation from 50% PWM, Pin Gain = L 0.03 %Offset Error Drift (2) Deviation from 50% PWM, Pin Gain = L 7.5 ppm/ °CGain, Pin Gain = L(2) |VICOMP1| − |VICOMP2| −200 25 200 ppm/VPower-Supply Rejection Ratio PSRR Probe Loop f = 250kHz 500 ppm/V

FREQUENCY RESPONSEOpen-Loop Gain, Two Modes, 7.8kHz Pin Gain H/L 24/32 dB

PROBE COIL LOOPInput Voltage Clamp Range Field Probe Current < 50mA −0.7 to VDD + 0.7 V

Internal Resistor, IS1 or IS2 to VDD1(2) RHIGH 47 59 71 ΩInternal Resistor, IS1 or IS2 to GND1(2) RLOW 60 75 90 ΩResistance Mismatch Between IS1 and IS2(2) ppm of RHIGH + RLOW 300 1500 ppmTotal Input Resistance (3) 134 200

Comparator Threshold Current(3) 22 28 34 mAMinimum Probe Loop Half-Cycle(2) 250 280 310 nsProbe Loop Minimum Frequency 250 kHzNo Oscillation Detect (Error) Suppression 35 µs

COMPENSATION COIL DRIVER, H-BRIDGEPeak Current (2) VICOMP1 − VICOMP2 = 4.0VPP 250 mAVoltage Swing 20Ω Load 4.2 VPPOutput Common-Mode Voltage VDD2/2 VWire Break Detect, Threshold Current(5) ICOMP1 and ICOMP2 Railed 33 57 mA

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4

ELECTRICAL CHARACTERISTICS (continued) Boldface limits apply over the specified temperature range, TJ = −40°C to +125°C, with zero output current I COMP.

At TA = +25°C and VDD1 = VDD2 = +5V with external 100kHz filter BW, unless otherwise noted.DRV401

PARAMETER CONDITIONS MIN TYP MAX UNITSVOLTAGE REFERENCEVoltage(2) No Load 2.495 2.5 2.505 V

Drift (2) No Load ±5 ±50 ppm/ °CPSRR(2) ±15 ±200 µV/VLoad Regulation(2) Load to GND/VDD, dI = 0mA to 5mA 0.15 mV/mAShort-Circuit Current ISC REFOUT Connected to VDD +20 mA

REFOUT Connected to GND −18 mA

DEMAGNETIZATIONDuration See Timing Diagram 106 130(3) ms

DIGITAL I/O

LOGIC INPUTS (DEMAG, GAIN, and CCdiag Pins) CMOS Type LevelsPull-Up High Current (CCdiag) 3.5 < VIN < VDD 160 µAPull-Up Low Current (CCdiag) 0 < VIN < 1.5 5 µALogic Input Leakage Current 0 < VIN < VDD 0.01 5 µALogic Level, Input: L/H 2.1/2.8 V

Hysteresis 0.7 V

OUTPUTS (ERROR AND OVER-RANGE Pins)Logic Level, Output: L 4mA Sink 0.3 VLogic Level, Output: H No Internal Pull-Up

OUTPUTS (PWM and PWM Pins) Push-Pull TypeLogic Level L 4mA Sink 0.2 VLogic Level H 4mA Source (VDD) − 0.4 V

POWER SUPPLYSpecified Voltage Range VDD 4.5 5 5.5 VPower-On Reset Threshold VRST 1.8 VQuiescent Current [I(VDD1) + I(VDD2)] IQ ICOMP = 0mA, Sensor Not Connected 6.8 mABrownout Voltage Level(2) 4 VBrownout Indication Delay 135 µs

TEMPERATURE RANGESpecified Range TJ −40 +125 °C

Operating Range TJ −50 +150 °CPackage Thermal Resistance

QFN Surface-Mount JA See Note 6 40 °C/W

SO PowerPAD Surface-Mount JA See Note 6 27 °C/W

(1) Parameter value referred to output (RTO).(2) See Typical Characteristic curves.(3) Total input resistance and comparator threshold current are inversely related. See Figure 2a.(4) For VAC sensors, 0.2% of PWM offset approximately corresponds to 10mA primary current offset per winding.(5) See Compensation Driver section in Applications Information.(6) See Applications Information section for information on power dissipation, layout considerations, and proper PCB soldering and heat-sinking technique.

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5

PIN CONFIGURATIONS

Top View RGW Top View DWP

ERROR

DEMAG

GAIN

REFOUT

REFIN

VDD1

OVER−RANGE

CCdiag

VDD2

ICOMP1

ExposedThermal Padon Underside,

Connectto GND1

PW

M

PW

M

IS1

GN

D1

IS2

VO

UT

IAIN

2

IAIN

1

GN

D2

I CO

MP

2

6 7 8 9 10

1

2

3

4

5

15

14

13

12

11

20

19

18

17

16

QFN−20 (5mm x 5mm)

PWM

PWM

ERROR

DEMAG

GAIN

REFOUT

REFIN

VOUT

IAIN2

IAIN1

IS1

GND1

IS2

VDD1

OVER−RANGE

CCdiag

VDD2

ICOMP1

ICOMP2

GND2

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

1 2

11

Wide−Body SO−20

ExposedThermal Padon Underside,

Connectto GND1

PIN ASSIGNMENTSNAME RGW DWP DESCRIPTION

ERROR 1 3 Error flag: open-drain output, see the Error Conditions section.

DEMAG 2 4 Control input, see the Demagnetization section.

GAIN 3 5 Control input for open-loop gain: low = normal, high = −8dB.

REFOUT 4 6 Output for internal 2.5V reference voltage.

REFIN 5 7 Input for zero reference to differential amplifier.

VOUT 6 8 Output for differential amplifier.

IAIN2 7 9 Noninverting input of differential amplifier.

IAIN1 8 10 Inverting input of differential amplifier.

GND2 9 11 Ground connection. Connect to GND1.

ICOMP2 10 12 Output 2 of compensation coil driver.

ICOMP1 11 13 Output 1 of compensation coil driver.

VDD2 12 14 Supply voltage. Connect to VDD1.

CCdiag 13 15 Control input for wire-break detection: high = enable.

OVER−RANGE 14 16 Open-drain output for over-range indication: low = over-range.

VDD1 15 17 Supply voltage.

IS2 16 18 Probe connection 2.

GND1 17 19 Ground connection.

IS1 18 20 Probe connection 1.

PWM 19 1 PWM output from probe circuit (inverted).

PWM 20 2 PWM output from probe circuit.

Exposed Thermal Pad — — Connect to GND1.

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6

TYPICAL CHARACTERISTICS

At TA = +25°C and VDD1 = VDD2 = +5V with external 100kHz filter BW, unless otherwise noted.

0.04

0.03

0.02

0.01

0

−0.01

−0.02

−0.03

−0.044.34.1

I PR

IM(A

)

4.5 4.7 4.9 5.1 5.3 5.5 5.7 5.9 6.1

DRV401 AND SENSOR:OFFSET vs SUPPLY VOLTAGE

VDD (V)

M4645−X211M4645−X211

M4645−X080

100

10

0.10.1

VN

(µV

/√H

z)

1 10 100 1k 10k 100k

DRV401 AND SENSOR:OUTPUT VOLTAGE NOISE DENSITY

(Sensor M4645−X080, RSHUNT = 10Ω, Mode = Low)

Frequency (Hz)

60Hz Line Frequency and Multiples(measured in a 60Hz environment)

Divided FieldProbe Frequency

DRV401 AND SENSOR: ABSOLUTE ERROR(Soldered DWP−20 with 1 Square−Inch Copper Pad)

(Measurements by Vacuumschmelza GmbH)

0

0.3

0.2

0.1

0

−0.1

−0.2

−0.3300200100−300 −200 −100

Primary Current (A)

Abs

olu

teE

rror

(A)

TC (RSHUNT) ±25ppm/C.

T = −50CT = +25CT = +85CT = +125C

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

0.8010

Nor

ma

lized

Gai

n

100 1k 10k 100k 1M

GAIN FLATNESS vs FREQUENCY(Measurements by Vacuumschmelze GmbH)

Frequency (Hz)

DRV401 with M4645−X600 SensorDRV401 with M4645−X211 SensorDRV401 with M4645−X080 Sensor

20 60 1000

2V/d

iv

2000

A/d

iv

IPRIM

40 80 120 140 160 180 200

3A ICOMP OVERLOAD RECOVERY(Measurements by Vacuumschmelze GmbH)

Time (µs)

IPRIM

Over−Range

ERROR

ERROR

VOUT

Over−Range

VOUT

NOTE: IPRIM = 3000A corresponds to ICOMP = 3A.

− 50

− 45

− 40

− 35

− 30

− 25

− 20

− 15

− 10 − 5 0 5

10

15

20

25

30

35

40

45

50

Pop

ula

tion

DIFFERENTIAL AMPLIFIER:VOLTAGE OFFSET PRODUCTION DISTRIBUTION

Voltage Offset (µV)

RTO

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7

TYPICAL CHARACTERISTICS (Continued)

At TA = +25°C and VDD1 = VDD2 = +5V with external 100kHz filter BW, unless otherwise noted.

20

16

12

8

4

0

−4

−8

−12

−16

−20−25 25 75−50

Inp

utV

OS

(µV

)

0 50 100 125 150

DIFFERENTIAL AMPLIFIER:OFFSET VOLTAGE vs TEMPERATURE, RTO

Temperature (C)

Sample Average

20

15

10

5

0

−5

−10

−15

−2010

Gai

n(d

B)

100 1k 10k 100k 1M 10M

DIFFERENTIAL AMPLIFIER:GAIN vs FREQUENCY

Frequency (Hz)

120

100

80

60

40

20

010 100 1k 10k 100k 1M

PS

RR

and

CM

RR

(dB

)

Frequency (Hz)

2M

CMRR

PSRR

DIFFERENTIAL AMPLIFIER:PSRR AND CMRR vs FREQUENCY

DIFFERENTIAL AMPLIFIER:OUTPUT VOLTAGE vs OUTPUT CURRENT

5.0

4.9

4.8

4.7

0.3

0.2

0.1

0

0 1 2 3 4 5 6 7 8 9 10

Load Current (mA)

Out

putV

olta

ge(V

)−40C

+85C

+125C

−40C+25C

+85C+125C

+25C

1000

100

10100

No

ise

Den

sity

(nV

/√H

z)

1k 10k 100k 1M

DIFFERENTIAL AMPLIFIER:OUTPUT NOISE DENSITY

Frequency (Hz)

Autozero Frequency = 69kHzSensor Not Runningen = 162nV/√Hz (average over 250Hz to 50kHz)

25

20

15

10

5

0

−5

−10

−15

−20

−25−25−50

Sho

rt−

Cir

cuit

Cur

rent

(mA

)

0 25 50 75 100 125 150

DIFFERENTIAL AMPLIFIER:SHORT−CIRCUIT CURRENT vs TEMPERATURE

Temperature (C)

VOUT Shorted to 0V

VOUT Shorted to 5V

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8

TYPICAL CHARACTERISTICS (Continued)

At TA = +25°C and VDD1 = VDD2 = +5V with external 100kHz filter BW, unless otherwise noted.

3.8

3.6

3.4

3.2

3.0

2.8

2.6

2.4

2.2

2.0

1.8

1.6

1.4

Vol

tag

e(V

)

1µs/div

DIFFERENTIAL AMPLIFIER:TA = −50C LARGE−SIGNAL STEP RESPONSE

3.8

3.6

3.4

3.2

3.0

2.8

2.6

2.4

2.2

2.0

1.8

1.6

1.4

Vo

ltag

e(V

)

1µs/div

DIFFERENTIAL AMPLIFIER:TA = +25C LARGE−SIGNAL STEP RESPONSE

3.8

3.6

3.4

3.2

3.0

2.8

2.6

2.4

2.2

2.0

1.8

1.6

1.4

Vol

tage

(V)

1µs/div

DIFFERENTIAL AMPLIFIER:TA = +150C LARGE−SIGNAL STEP RESPONSE

3.5

3.4

3.3

3.2

3.1

3.0

2.9

2.8

2.7

2.6

2.5−25−50

Ove

r−R

ange

De

lay

(µs)

0 25 50 75 100 125 150

DIFFERENTIAL AMPLIFIER:OVER−RANGE DELAY vs TEMPERATURE

Temperature (C)

At 5.0VVIN Step 0V to ±1V

Positive Over−Range

Negative Over−Range

7.5

7.4

7.3

7.2

7.1

7.0

6.9

6.8

6.7

6.6

6.5−25−50

Sle

wR

ate

(V/µ

s)

0 25 50 75 100 125 150

DIFFERENTIAL AMPLIFIER:POSITIVE SLEW RATE vs TEMPERATURE

Temperature (C)

At 5.0V−6.5

−6.6

−6.7

−6.8

−6.9

−7.0

−7.1

−7.2

−7.3

−7.4

−7.5−25−50

Sle

wR

ate

(V/µ

s)

0 25 50 75 100 125 150

DIFFERENTIAL AMPLIFIER:NEGATIVE SLEW RATE vs TEMPERATURE

Temperature (C)

At 5.0V

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9

TYPICAL CHARACTERISTICS (Continued)

At TA = +25°C and VDD1 = VDD2 = +5V with external 100kHz filter BW, unless otherwise noted.

50.250

50.125

50.000

49.875

49.750

49.625−25−50

RR

EF

IN(k

Ω)

0 25 50 75 100 125 150

DIFFERENTIAL AMPLIFIER:REFIN RESISTANCE vs TEMPERATURE

Temperature (C)

70

60

50

40

30

20

10

01k100

Ga

inV

PW

MA

VE

RA

GE

/(V

ICO

MP

1,V

ICO

MP

2)(d

B)

10k 100k

COMPENSATION LOOP:SMALL−SIGNAL GAIN

Frequency (Hz)

Pin Gain = Low

Pin Gain = High

2000

1500

1000

500

0

−500

−1000

−1500

−2000−25−50

Dut

yC

ycle

Err

or(p

pm)

0 25 50 75 100 125 150

COMPENSATION LOOP:DUTY CYCLE ERROR vs TEMPERATURE

Temperature (C)

At 400kHz, 5.0V

At 250kHz, 5.0V

− 20

0− 1

80

− 16

0− 1

40

− 12

0− 1

00

− 80

− 60

− 40

− 20 0 20 40 60 80 100

120

140

160

180

200

Pop

ula

tion

COMPENSATION LOOP:DC GAIN: DUTY CYCLE ERROR CHANGE

Gain (ppm/V)

VICOMP1 − VICOMP2 = 4.2VILOAD = 210mA

Gain Pin Low

ICOMP OUTPUT SWING TO RAILvs OUTPUT CURRENT

5.00

4.75

4.50

4.25

4.00

1.00

0.75

0.50

0.25

00 50 100 150 200 250 300

Output Current (mA)

Out

putS

win

g(V

)

−50C+25C+125C

−50C+25C+125C

35.0

32.5

30.0

27.5

25.0−25−50

Pro

beC

omp

ara

tor

Thr

esh

old

Cur

rent

(mA

)

0 25 50 75 100 125 150

PROBE COMPARATOR THRESHOLDCURRENT vs TEMPERATURE

Temperature (C)

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TYPICAL CHARACTERISTICS (Continued)

At TA = +25°C and VDD1 = VDD2 = +5V with external 100kHz filter BW, unless otherwise noted.

90

85

80

75

70

65

60

55

50

45−25−50

Res

ista

nce

(Ω)

0 25 50 75 100 125 150

PROBE DRIVER:INTERNAL RESISTOR vs TEMPERATURE

Temperature (C)

Driver L

Driver H

0.10

0.08

0.06

0.04

0.02

0−25−50

Out

putI

mpe

dan

ceM

ism

atch

(Ω)

0 25 50 75 100 125 150

OUTPUT IMPEDANCE MISMATCH OF IS1 AND IS2vs TEMPERATURE

Temperature (C)

2.5010

2.5008

2.5006

2.5004

2.5002

2.5000

2.4998

2.4996

2.4994

2.4992

2.4990−4−6

VR

EF

(V)

−2 0 2 4 6

VOLTAGE REFERENCE vs LOAD CURRENT

ILOAD (mA)

2.49

502.

4955

2.49

602.

4965

2.49

702.

4975

2.49

802.

4985

2.49

902.

4995

2.50

002.

5005

2.50

102.

5015

2.50

202.

5025

2.50

302.

5035

2.50

402.

5045

2.50

50

Po

pula

tion

VOLTAGE REFERENCE PRODUCTION DISTRIBUTION

VREF (V)

02.

55.

07.

510

.012

.515

.017

.520

.022

.525

.027

.530

.032

.535

.037

.540

.042

.545

.047

.550

.0

Pop

ulat

ion

VOLTAGE REFERENCE DRIFTPRODUCTION DISTRIBUTION

Voltage Reference Drift (ppm/C)

2.525

2.520

2.515

2.510

2.505

2.500

2.495

2.490

2.485

2.480

2.475−25−50

VR

EF

(V)

0 25 50 75 100 125 150

VOLTAGE REFERENCE vs TEMPERATURE

Temperature (C)

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TYPICAL CHARACTERISTICS (Continued)

At TA = +25°C and VDD1 = VDD2 = +5V with external 100kHz filter BW, unless otherwise noted.− 2

00

− 17

5

− 15

0

− 12

5

− 10

0

− 75

− 50

− 25 0 25 50 75

100

125

150

175

200

Po

pula

tion

VOLTAGE REFERENCE POWER−SUPPLY REJECTIONPRODUCTION DISTRIBUTION

PSR (µV/V)

250

253

256

259

262

265

268

271

274

277

280

283

286

289

292

295

298

301

304

307

310

Po

pula

tion

OSCILLATOR PRODUCTION DISTRIBUTION

Minimum Probe Loop Half−Cycle (ns)

310

305

300

295

290

285

280

275

270

265

260

255

250−25−50

Min

imum

Pro

beLo

opH

alf−

Cyc

le(n

s)

0 25 50 75 100 125 150

OSCILLATOR vs TEMPERATURE

Temperature (C)

310

305

300

295

290

285

280

275

270

265

260

255

2504.6 5.2 5.84.3

Min

imum

Pro

beLo

opH

alf−

Cyc

le(n

s)

4.9 5.5 6.0

OSCILLATOR vs SUPPLY VOLTAGE

VDD (V)

4.20

4.15

4.10

4.05

4.00

3.95

3.90

3.85

3.80−25−50

Bro

wn−

Out

Vol

tage

(V)

0 25 50 75 100 125 150

BROWN−OUT VOLTAGE vs TEMPERATURE

Temperature (C)

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APPLICATIONS INFORMATION

FUNCTIONAL PRINCIPLE OF CLOSED-LOOPCURRENT SENSORS WITH MAGNETICPROBE USING THE DRV401

Closed-loop current sensors measure current over widefrequency ranges, including dc. These types of devicesoffer a contact-free method as well as excellent galvanicisolation performance combined with high resolution,accuracy, and reliability.

At dc and in low-frequency ranges, the magnetic fieldinduced from the current in the primary winding iscompensated by a current flowing through acompensation winding. A magnetic field probe, located inthe magnetic core loop, detects the magnetic flux. This

probe delivers the signal to the amplifier that drives thecurrent through the compensation coil, bringing themagnetic flux back to zero. This compensation current isproportional to the primary current, relative to the windingratio.

In higher frequency ranges, the compensation windingacts as the secondary winding in the current transformer,while the H-bridge compensation driver is rolled off andprovides low output impedance.

A difference amplifier senses the voltage across a smallshunt resistor that is connected to the compensation loop.This difference amplifier generates the output voltage thatis referenced to REFIN and is proportional to the primarycurrent. Figure 1 shows the DRV401 used as acompensation current sensor.

IntegratorFilter

ProbeInterface

H−BridgeDriver

VOUT

REFIN

ICOMP2

RS

ICOMP1

Compensation

DiffAmp

Timing, Error Detection,and Power Control

Degauss VREFVREF

GND+5V

IS1

IS2

DRV401

IP

Compensation Winding

Magnetic Core

Primary Winding

Field Probe

Figure 1. Principle of Compensation Current Sensor with the DRV401

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FUNCTIONAL DESCRIPTION

The DRV401 operates from a single +5V supply. It is acomplete sensor signal conditioning circuit that directlyconnects to the current sensor, providing all necessaryfunctions for the sensor operation. The DRV401 providesmagnetic field probe excitation, signal conditioning, andcompensation coil driver amplification. In addition, itdetects error conditions and handles overload situations.A precise differential amplifier allows translation of thecompensation current into an output voltage using a smallshunt resistor. A buffered voltage reference can be usedfor comparator, analog-to-digital converter (ADC), orbipolar zero reference voltages.

Dynamic error correction ensures high dc precision overtemperature and long-term accuracy. The DRV401 usesanalog signal conditioning; the internal loop filter andintegrator are switched capacitor-based circuits.Therefore, the DRV401 allows combination withhigh-precision sensors for exceptional accuracy andresolution. The typical characteristic curve, DRV401 andSensor Linearity, shows an example of the linearity andtemperature stability achieved by the device.

A demagnetization cycle can be initiated on demand or onpower-up. This cycle reduces offset and restores highperformance after a strong overload condition. An internalclock and counter logic generate the degauss function.The same clock controls power-up, overload detection andrecovery, error, and time-out conditions.

The DRV401 is built on a highly reliable CMOS process.Unique protection cells at critical connections enable thedesign to handle inductive energy.

MAGNETIC PROBE (SENSOR) INTERFACE

The magnetic field probe consists of an inductor wound ona soft magnetic core. The probe is connected betweenpins IS1 and IS2 of the probe driver that appliesapproximately +5V (the supply voltage) through resistorsacross the probe coil (see Figure 2a).

The probe core reaches saturation at a current of typically28mA (see Figure 2a). The comparator is connected toVREF by approximately 0.5V. A current comparator detectsthe saturation and inverts the excitation voltage polarity,causing the probe circuit to oscillate in a frequency rangeof 250kHz to 550kHz. The oscillating frequency is afunction of the magnetic properties of the probe core andits coil.

The current rise rate is a function of the coil inductance:dI = L × V × dT. However, the inductance of the field probeis low while its core material is in saturation (the horizontalpart of the hysteresis curve) and is high at the vertical partof the hysteresis curve. The resulting inductance and theseries resistance determine the output voltage and currentversus time performance characteristic.

Without external magnetic influence, the duty cycle isexactly 50% because of the inherent symmetry of themagnetic hysteresis; the probe inductor is driven from −Bsaturation through the high inductance range to +Bsaturation and back again in a time-symmetric manner(see Figure 2b).

If the core material is magnetized in one direction, a longand a short charge time result because the probe currentthrough the inductors generates a field that eithersubtracts or adds to the flux in the probe core, either drivingthe probe core out of saturation or further into saturation(see Figure 2c). The current into the probe is limited by thevoltage drops across the probe driver resistors.

The DRV401 continuously monitors the logic magnetic fluxpolarity state. In the case of distortion noise and excessiveoverload that could fully saturate the probe, the overloadcontrol circuit recovers the probe loop. During an overloadcondition, the probe oscillation frequency increases toapproximately 1.6MHz until limited by the internal timingcontrol.

In an overload condition, the compensation current (ICOMP)driver cannot deliver enough current into the sensorsecondary winding, and the magnetic flux in the sensormain core becomes uncompensated.

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a) Simplified probe interface circuit.The probe is connected between S1 and S2.

b) Without an external magnetic field, the hysteresis curve issymmetrical and the probe loop generates 50% duty cycle.

c) An external magnetic flux (H) generated from the primary current(IPRIM) shifts the hysteresis curve of the magnetic field probe in theH-axis and the probe loop generates a nonsymmetrical duty cycle.

B

H

500ns/div

2V/d

iv50

0mV

/div

V (IS1)

V (PWM)/10

B

H

500ns/div

2V/d

iv50

0mV

/div

V (IS1)

V (PWM)/10

55Ω

IS2 IS1

Probe

VDD1

PWMCMP18Ω

VREF = 0.5V

NOTE: MOS components function as switches only.

55Ω

Figure 2. Magnetic Probe, Hysteresis, and Duty Cycle

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The transition from normal operation to overload happensrelatively slowly, because the inherent sensor transformercharacteristics induce the initial primary current step, asshown in Figure 3. As the transformer-induced secondarycurrent starts to decay, the compensation feedback driverincreases its output voltage to maintain the sensor coreflux compensation at zero.

When the system compensation loop reaches its drivinglimit, the rising magnetic flux causes one of the probePWM half-periods to become shorter. The minimumhalf-period of the probe oscillation is limited by the internaltiming to 280ns, based on the properties of the VACmagnetic sensors. After three consecutive cycles of thesame half-period being shorter than 280ns, the DRV401goes into overload-latch mode. The device stores theICOMP driver output signal polarity and continues producingthe skewed-duty cycle PWM signal. This action preventsthe loss of compensation signal polarity information duringvery strong overloads. In this case, both PWM half-periodsare short and approximately equal, because the fieldprobe stays completely in one of the saturated regions.

The overload-latch condition is removed after the primarycurrent goes low enough for the ICOMP driver tocompensate, and both half-periods of the probe driveroscillation become longer than 280ns (the field probecomes out of the saturated region).

Peak voltages and currents can be generated duringnormal operations as well as overload conditions.Therefore, both probe connection pins are internally

protected against coupled energy from the magnetic core.Wiring between probe and IC inputs should be short andguarded against interference; see Layout Considerations.

For reliable operation, error detection circuits monitor theprobe operation:

1. If the probe driver comparator (CMP) output stays lowlonger than 32µs, the ERROR flag asserts active, andthe compensation current (ICOMP) is set to zero.

2. If the probe driver period is less than 275ns on threeconsecutive pulses, the ERROR flag asserts active.

See the Error Conditions section for more details.

PWM PROCESSING

The outputs PWM and PWM represent the probe outputsignal as a differential PWM signal. It can drive externalcircuitry or be used for synchronous ripple reduction. ThePWM signal from the probe excitation and sense stage isinternally connected to a high-performance,switched-capacitor integrator followed by anintegrating-differentiating filter. This filter converts thePWM signal into a filtered delta signal and prepares it fordriving the analog compensation coil driver. The gainroll-off frequency of the filter stage is set to provide high dcgain and loop stability. If additional gain is added fromexternal circuitry, the internal gain can be reduced by 8dB,asserting the GAIN pin high (see the ExternalCompensation Coil Driver section).

50µs/div

1

3

4

2

Sensor: 4 x 100RSH = 10ΩStep Response2kHz InV(Gain) = Low

Channel 1: 2V/div

Channels 2−4: 500mV/div

V(1Ω× IPRIM/10)

ICOMP1

ICOMP2

VOUT

A current pulse of 0A to 18A (Ch 1) generates the two ICOMP signals (Ch 3 and Ch 4). Ch 2 shows the resulting output signal,VOUT. This test uses the M4645-X030 sensor, no bandwidth limitation, but a 20-sample average.

Figure 3. Primary Current Step Response

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COMPENSATION DRIVER

The compensation coil driver provides the driving currentfor the compensation coil. A fully differential driver stageoffers high signal voltages to overcome the wire resistanceof the coil with only +5V supply. The compensation coil isconnected between ICOMP1 and ICOMP2, both generating ananalog voltage across the coil (see Figure 3) that turns intocurrent from the wire resistance (and eventually from theinductance). The compensation current represents theprimary current transformed by the turns ratio. A shuntresistor is connected in this loop and the high-precisiondifference amplifier translates the voltage from this shuntto an output voltage.

Both compensation driver outputs provide low impedanceover a wide frequency range to insure smooth transitionsbetween the closed-loop compensation frequency rangeand the high-frequency range, where the primary windingdirectly couples the primary current into the compensationcoil at a rate set by the winding ratio.

The two compensation driver outputs are designed withprotection circuitry to handle inductive energy. However,additional external protection diodes might be necessaryfor high current sensors.

For reliable operation, a wire break in the compensationcircuit can be detected. If the feedback loop is broken, theintegrating filter drives the outputs ICOMP1 and ICOMP2 to theopposite rails. With one of these pins coming within 300mVto ground, a comparator tests for a minimum current flowingbetween ICOMP1 and ICOMP2. If this current stays below thethreshold current level for at least 100µs, the ERROR pin isasserted active (low). The threshold current level for this testis less than 57mA at 25°C and 65mA at −40°C, if the ICOMP

pins are fully railed (see the Typical Characteristics).

For sensors with high winding resistance (compensation coilresistance + RSHUNT) or connected to an externalcompensation driver, this function should be disabled bypulling the CCdiag pin low.

RMAX

VOUT

65mA

Where:

VOUT equals the peak voltage between ICOMP1 and ICOMP2

at a 65mA drive current.

RMAX equals the sum of the coil and the shunt resistance.

EXTERNAL COMPENSATION COIL DRIVER

An external driver for the compensation coil can beconnected to the ICOMP1 and ICOMP2 outputs. To prevent awire break indication, CCdiag has to be asserted low.

An external driver can provide both a higher drive voltageand more drive current. It also moves the powerdissipation to the external transistors, thereby allowing ahigher winding resistance in the compensation coil andmore current. Figure 4 shows a block diagram of anexternal compensation coil driver. To drive the buffer,either one or both ICOMP outputs can be used. Note,however, that the additional voltage gain could causeinstability of the loop. Therefore, the internal gain can bereduced by approximately 8dB by asserting the GAIN pinhigh. RSHUNT is connected to GND to allow for asingle-ended external compensation driver. Thedifferential amplifier can continue to sense the voltage,and used for the gain and over-range comparator orERROR flag.

DRV401

ExternalBuffer

V+

V−

CompensationCoil

RSHUNT

ICOMP1

ICOMP2

Figure 4. DRV401 with External Compensation Coil Driver and R SHUNT Connected to GND

(1)

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SHUNT SENSE AMPLIFIERThe differential (H-bridge) driver arrangement for thecompensation coil requires a differential sense amplifierfor the shunt voltage. This differential amplifier offers widebandwidth and a high slew rate for fast current sensors.Excellent dc stability and accuracy result from anauto-zero technique. The voltage gain is 4V/V, set byprecisely matched and stable internal SiCr resistors.

Both inputs of the differential amplifier are normallyconnected to the current shunt resistor. This resistor addsto the internal (10kΩ) resistor, slightly reducing the gain inthis leg. For best common-mode rejection (CMR), adummy shunt resistor (R5) is placed in series with theREFIN pin to restore matching of both resistor dividers, asshown in Figure 5a.

For gains of 4V/V:

4

R2

R1

R4 R5

RSHUNT R3

With R2/R1 = R4/R3 = 4; R5 = RSHUNT × 4

Typically, the gain error resulting from the resistance ofRSHUNT is negligible; for 70dB of common-mode rejection,however, the match of both divider ratios needs to be betterthan 1/3000.The amplifier output can drive close to the supply rails, andis designed to drive the input of a SAR-type ADC; addingan RC low-pass filter stage between the DRV401 and theADC is recommended. This filter not only limits the signalbandwidth but also decouples the high-frequencycomponent of the converter input sampling noise from theamplifier output. For RF and CF values, refer to the specificconverter recommendations in the specific product datasheet. Empirical evaluation may be necessary to obtainoptimum results.The output can drive 100pF directly and shows 50%overshoot with approximately 1nF capacitance. Adding RF

allows much larger capacitive loads, as shown inFigure 5b and Figure 5c. Note that with RF of only 20Ω, theload capacitor should be either smaller than 1nF or largerthan 33nF to avoid overshoot; with RF of 50Ω this transientarea is avoided.

a) Internal difference amplifier with an example of a decoupling filter.

10µs/div

20m

V/d

iv

b) VOUT of Figure 5a with R5 = 20Ω and CD = 100nF.

10µs/div

20m

V/d

iv

c) VOUT of Figure 5a with R5 = 50Ω and CD = 10nF.

R240kΩ

R110kΩ

R440kΩ

R310kΩ

R5DummyShunt

DifferentialAmplifier

RF50Ω

Decoupling, Low−Pass Filter

REFIN CompensatedREFIN

ADCVOUT

CF10nF

RSHUNT

ICOMP2

K2

DRV401 Differential Amplifier Section

NOTE: R5 is a dummy shunt resistor equal to 4x RSHUNT to compensate for RSHUNT and provide best CMR.

Figure 5. Internal Difference Amplifier with Example of a Decoupling Filter

(2)

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The reference input (REFIN) is the reference node for theexact output signal (VOUT). Connecting REFIN to thereference output (REFOUT) results in a live zero referencevoltage of 2.5V. Using the same reference for REFIN andthe ADC avoids mismatch errors that exist between tworeference sources.

OVER-RANGE COMPARATOR

High peak current can overload the differential amplifierconnected to the shunt. The OVER-RANGE pin, anopen-drain output, indicates an over-voltage condition forthe differential amplifier by pulling low. The output of thisflag is suppressed for 3µs, preventing unwanted triggeringfrom transients and noise. This pin returns to high as soonas the overload condition is removed (external pull-uprequired to return the pin high).

This ERROR flag not only provides a warning about asignal clipping condition, but is also a window comparatoroutput for actively shutting off circuits in the system. Thevalue of the shunt resistor defines the operating window forthe current. It sets the ratio between the nominal signal andthe trip level of the Over-Range flag. The trip current of thiswindow comparator is calculated using the followingexample:

With a 5V supply, the output voltage swing isapproximately ±2.45V (load and supplyvoltage-dependent).

The gain of 4V/V allows an input swing of ±0.6125V.

Thus, the clipping current is IMAX = 0.6125V/RSHUNT.

See the differential amplifier curve of the TypicalCharacteristics, Output Voltage vs Output Current.

The over-range condition is internally detected as soon asthe amplifier exceeds its linear operating range, not just aset voltage level. Therefore, the error or the over-rangecomparator level is reliably indicated in fault conditionssuch as output shorts, low load or low supply conditions.As soon as the output cannot drive the voltage higher, theflag is activated. This configuration is a safetyimprovement over a voltage level comparator.

NOTE: The internal resistance of the compensation coilmay prevent high compensation current from flowingbecause of ICOMP driver overload. Therefore, thedifferential amplifier may not overload with this current.However, a fast rate of change of the primary current wouldbe transmitted through transformer action and safelytrigger the overload flag.

VOLTAGE REFERENCE

The precision 2.5V reference circuit offers low drift(typically 10ppm/K) and is used for internal biasing; it isalso connected to the REFOUT pin. The circuit is intendedas the reference point of the output signal to allow a bipolarsignal around it. This output is buffered for low impedanceand tolerates sink and source currents of ±5mA.Capacitive loads can be directly connected, but generateringing on fast load transients. A small series resistor of afew ohms improves the response, especially for acapacitive load in the range of 1µF. Figure 6 shows thetransient load regulation with 1nF direct load.

The reference source is part of the integrated circuit andreferenced to GND2. Large current pulses driving thecompensation coil can generate a voltage drop in the GNDconnection that would add on to the reference voltage.Therefore, a low impedance GND layout is critical tohandle the currents and the high bandwidth of this IC.

2.5µs/div

10m

V/d

iv

10kΩ

1nF ±5V

+2.5V

REFOUT

Test Circuit:

Figure 6. Pulse Response Test Circuit and Scope Shot of Reference

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DEMAGNETIZATION

Iron cores are not immune to residual (remanence)magnetism. The residual remanence can produce a signaloffset error, especially after strong current overload, whichgoes along with high magnetic field density. Therefore, theDRV401 includes a signal generator for a demagnetizationcycle. The digital control pin, DEMAG, starts this cycle ondemand after this pin is held high for at least 25.6µs.Shorter pulses are ignored. The cycle lasts forapproximately 110ms. During this time, the Error flag isasserted low to indicate that the output is not valid. WhenDEMAG is high during power-on, a demagnetization cycleimmediately initiates (12µs) after power-on (VDD > 4V).Holding DEMAG low avoids this cycle at power-up (seethe Power-On and Brownout section).

The probe circuit is in normal operation and oscillatesduring the demagnetization cycle. The outputs PWM andPWM are active accordingly.

A demagnetization cycle can be aborted by pullingDEMAG low, filtered by 25µs to ignore glitches (seeFigure 7). In a typical circuit, the DEMAG pin may beconnected to the positive supply, which enables a degausscycle every time the unit is powered on.

The degauss cycle is based on an internal clock andcounter logic. The maximum current is limited by theresistance of the connected coil in series with the shuntresistor. The DEMAG logic input requires a +5VCMOS-compatible signal.

POWER-ON AND BROWNOUT

Power-on is detected with the supply voltage going higherthan 4V at VDD1. When DEMAG is high, a degauss cycleis started (see Figure 7a). During this time the ERROR flagremains low, indicating the not ready condition.Maintaining DEMAG low prevents this cycle, and theDRV401 starts operation approximately 32µs after

power-up. If no probe error conditions are detected withinfour full cycles (that is, the probe half-periods are shorterthan 32µs and longer than 280ns), the compensationdriver starts and the ERROR pin indicates the readycondition by going high, typically about 42µs afterpower-up.

NOTE: an external pull-up resistor is required to pull theERROR pin high.

Both supply pins (VDD1 and VDD2) should not differ by morethan 100mV for proper device operation. They arenormally connected together or separately filtered (seeLayout Considerations).

The DRV401 tests for low supply voltage with a brown-outvoltage level of +4V; proper power conditions must besupplied. Good power-supply and low ESR bypasscapacitors are required to maintain the supply voltageduring the large current pulses that the DRV401 can drive.

A critical voltage level is derived from the proper operationof the probe driver. The probe interface relies on a peakcurrent flowing through the probe to trip the comparator.The probe resistance plus the internal resistance of thedriver (see Electrical Characteristics specification, ProbeCoil Loop, Internal Resistor) sets the lower limit for theacceptable supply voltage. Voltage drops lasting less than31µs are ignored. The probe error detection activates theERROR pin as soon as proper oscillation fails for morethan 32µs.

A low supply voltage condition, or brown-out, is detectedat +4V. Short and light voltage drops of less than 100µs areignored, provided the probe circuit continues to operate. Ifthe probe no longer operates, the ERROR pin goes active.Signal overload recovery is only provided if the probe loopwas not discontinued.

A supply drop lasting longer than 100µs generatespower-on reset. A voltage dip down to +1.8V (for VDD1)also initiates a power-on reset.

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a) Demagnetization cycle on power-up. With power-up, the VOUT across the compensation coil centers around half the supply and thenstarts the cycle after the 4V threshold is exceeded. The ERROR flag resets to H after the cycle is completed.

d) Abort of demagnetization cycle. The ERROR flag resets to H (as shown) and the output settles back to normal opera-tion.

b) Power-up without demagnetization. The probe oscillation V(IS1)starts just before ERROR resets—15µs after the supply voltage cross-es the 4V threshold.

c) Demagnetization cycle on command.

20ms/div

5V/d

iv

1

4

2

3

2V/d

ivRSH = 10Ω

VDD1

V(ICOMP2)

VOUT

V(ERROR)106ms

20ms/div

5V/d

iv

1

4

2V

/div

VDD1

V(ERROR)

2

V(IS1)

3V(ICOMP2)

42µs

Initial setting uponclosing of feedback loop.

20ms/div

5V/d

iv

1

4

2

3

2V/d

iv

V(DEMAG)

V(ICOMP2)

VOUT

V(ERROR)106ms

RSH = 10Ω

500µs/div

5V/d

iv

1

4

2

32V

/div

RSH = 10Ω

V(DEMAG)

V(ICOMP2)

VOUT

V(ERROR)

3.4ms

Figure 7. Demagnetization and Power-On Timing

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ERROR CONDITIONS

In addition to the Over-Range flag that indicates signalclipping in the output amplifier (differential amplifier), asystem error flag is provided. The ERROR flag indicatesconditions when the output voltage does not represent theprimary current. It is active during a demagnetizationcycle, during a power-fail or brown-out. It also goes activewith an open or short-circuit in the probe loop. As soon asthe error condition is no longer present and the circuit hasreturned to normal operation, the flag resets.

Both the ERROR and Over-Range flags are open-drainlogic outputs. They can be connected together for awired-OR and require an external pull-up resistor forproper operation.

The following conditions result in ERROR flag activation(ERROR asserts low):

1. The probe comparator stays low for more than 32µs.This condition occurs either if the probe coilconnection is open or if the supply voltage dips to thelevel where the required saturation current cannot bereached. During the 32µs timeout, the ICOMP driverremains active but goes inactive thereafter. In case ofrecovery, ERROR is low and the ICOMP driver remainsin reset for another 3.3ms.

2. The probe driver pulse-width is less than 280ns forthree consecutive periods. This condition indicateseither a shorted field probe coil or a fully-saturatedsensor at start-up. If this condition persists longerthan 25µs and then recovers, the ERROR flagremains low and ICOMP is in reset for another 3.3ms.If the condition lasts less than 25µs, the ERROR flagrecovers immediately and the ICOMP driver is notinterrupted.

3. During demagnetization, if the cycle is aborted earlyby pulling DEMAG low, the ERROR flag stays low foranother 3.3ms (ICOMP is disabled during this time).

4. An open compensation coil is detected (longer than100µs). Note: the probe driver, the PWM signalfilter and the ICOMP driver continue to function innormal mode—only the ERROR flag is asserted inthis case. This condition indicates that not enoughcurrent is flowing in the ICOMP driver output; thiscondition might be the result of a high-resistancecompensation coil or the connection of an externaldriver. Detection of this condition can be disabledby setting the CCdiag pin low.

5. At power-on after VDD1 crosses the +4V threshold,the ERROR flag is low for approximately 42µs.

6. A supply voltage low (brown-out) condition lastslonger than 100µs. Recovery is the same aspower-up, either with or without a demag cycle.

PROTECTION RECOMMENDATIONS

The inputs IAIN1 and IAIN2 require external protection tolimit the voltage swing beyond 10V of the supply voltage.The driver outputs ICOMP1 and ICOMP2 can handle highcurrent pulses protected by internal clamp circuits to thesupply voltage. If repeated over-currents of largemagnitudes are expected, connect external Schottkydiodes to the supply rails. This external protectionprevents current flowing into the die.

The probe connections IS1 and IS2 are protected withdiode clamps to the supply rails. In normal applications, noexternal protection is required. The maximum current mustbe limited to ±75mA.

All other pins offer standard protection—see the AbsoluteMaximum Ratings table.

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BASIC CONNECTION EXAMPLE

The circuit shown in Figure 8 offers an axample of a fully-connected current sensor system.

Integrator

H−BridgeDriver

CCdiag

AmpV = 4

Logic: Timing, Error Detection, and Demagnetize

Power Valid

BandgapReference

VDD2 GND2

VDD1

GND1

DRV401

VOUT

REFIN

OVER−RANGE

REFOUT

Probe CoilDriver and

Comparator

R7

R3 R4

ERROR

+5V

DEMAG

+5V

C2

C3

C4

IS1 IS2 PWM PWM

VSW

(PWM is inphase with IS1.)

GAIN

+5V

ICOMP1 ICOMP2 IAIN2 IAIN1

R1R2

+5V

+5V

D1

D2

R6

2.5V

VSW

Oscillator Reset

10MHz

C4

+5V

IS2

S2S1

ICOMP

IP

Probe Coil

K2K1

Compensation Coil

Primary WindingCurrent Sensor Module

Main CoreProbeCore

R5

Figure 8. Basic Connection Circuit

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The connection example in Figure 8 illustrates the fewexternal components required for optimal performance.Each component is described in the following list:

IP is the primary current to be measured; K1 and K2

connect to the compensation coil. S1 and S2connect to the magnetic field probe. The dotsindicate the winding direction on the sensor maincore.

R1 and R2 form the shunt resistor RSHUNT. Thisresistance is split into two to allow for adjustmentsto the required RSHUNT value. The accuracy andtemperature stability of these resistors are part ofthe final system performance.

R3 and R4, together with C3 and C4, form a networkthat reduces the remaining probe oscillator ripple inthe output signal. The component values dependon the sensor type and are tailored for best results.This network is not required for normal operation.

R5 is the dummy shunt (RD) resistor used to restorethe symmetry of both differential amplifier inputs.R5 = 4 × RSHUNT, but the accuracy is less important.

R6 and R7 are pull-up resistors connected to thelogic outputs.

C1 and C2 are decoupling capacitors. Use lowESR-type capacitors connected close to the pins.Use low impedance printed circuit board (PCB)traces, either avoiding vias (plated-through holes)or using multiple vias. A combination of a large(> 1µF) and a small (< 4.7nF) capacitor aresuggested. When selecting capacitors, make sureto consider the large pulse currents handled fromthe DRV401.

D1 and D2 are protection diodes for the differentialamplifier input. They are only needed if the voltagedrop at RSHUNT exceeds 10V at the maximumpossible peak current.

LAYOUT CONSIDERATIONS

The DRV401 operates with relatively large currents andfast current pulses, and offers wide-bandwidthperformance. It is often exposed to large distortion energyfrom both the primary signal and the operatingenvironment. Therefore, the wiring layout must provideshielding and low-impedance connections betweencritical points.

Use low ESR capacitors for power-supply decoupling. Usea combination of a small capacitor and a large capacitor of1µF or larger. Use low-impedance tracks to connect thecapacitors to the pins.

Both grounds should be connected to a local ground plane.Both supplies can be connected together; however, bestresults are achieved with separate decoupling (to the localGND plane) and ferrite beads in series with the mainsupply. The ferrite beads decouple the DRV401, reducinginteraction with other circuits powered from the samesupply voltage source.

The reference output is referred to GND2. Alow-impedance, star-type connection is required to avoidthe driver current and the probe current modulating thevoltage drop on the ground track.

The connection wires of the difference amplifier to theshunt must be low resistance and of equal length. For bestaccuracy, avoid current in this connection. Consider usinga Kelvin Contact-type connection. The required resistancevalue can be set using two resistors.

Wires and PCB traces for S1 and S2 should be very closeor twisted. ICOMP1 and ICOMP2 should also be wired closetogether. To avoid capacitive coupling, run a ground shieldbetween the S1/S2 and ICOMP wire pair or keep themdistant from each other.

The compensation driver outputs (ICOMP) are lowfrequency only; however, the primary signal (withhigh-frequency content present) is coupled into thecompensation winding, the shunt, and the differenceamplifier. Therefore, careful layout is recommended.

The output of REFOUT and VOUT can drive some capacitiveloads, but avoid large direct capacitive loads; these loadsincrease internal pulse currents. Given the wide bandwidthof the differential amplifier, isolate any large capacitiveload with a small series resistor. A small capacitor in the pFrange can improve the transient response on a highresistive load.

The exposed thermal pad on the bottom of the packagemust be soldered to GND because it is internallyconnected to the substrate, which must be connected tothe most negative potential. It is also necessary to solderthe exposed pad to the PCB to provide structural integrityand long-term reliability.

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POWER DISSIPATION

Using the thermally-enhanced PowerPAD SO and QFNpackages dramatically reduces the thermal impedancefrom junction to case. These packages are constructedusing a down-set lead frame upon which the die ismounted, as shown in Figure 9a and Figure 9b. Thisarrangement results in the lead frame being exposed as athermal pad on the underside of the package. Figure 9shows the SO-20 package as an example. Because thisthermal pad has direct thermal contact with the die,excellent thermal performance can be achieved byproviding a good thermal path away from the thermal pad.

The two outputs ICOMP1 and ICOMP2 are linear outputs.Therefore, the power dissipation on each output isproportional to the current multiplied by the internal voltagedrop on the active transistor. For ICOMP1 and ICOMP2, thisinternal voltage drop is the voltage drop to VDD2 or GND,according to the current-conducting side of the output.

Output short-circuits are particularly critical for the driverbecause the full supply voltage can be seen across theconducting transistor, and the current is not limited byanything other than the current density limitation of theFET. Permanent damage to the device can occur.

The DRV401 does not include temperature protection orthermal shut-down.

THERMAL PADPackages with an exposed thermal pad are specificallydesigned to provide excellent power dissipation, but boardlayout greatly influences overall heat dissipation. Table 1shows the thermal resistance (TJA) for the two packageswith the exposed thermal pad soldered to a normal PCB,as described in Technical Brief SLMA002, PowerPADThermally-Enhanced Package. See also EIA/JEDEC

Specifications JESD51-0 to 7, QFN/SON PCBAttachment (SLUA271), and Quad Flatpack No-LeadLogic Packages (SCBA017). These documents areavailable for download at www.ti.com.

Table 1. JA/JP Estimations According ToEIA/JED51-7

QFN-20 SO-20

JP 9 9

JA Still Air 40 35

JA with Forced Airflow (150lfm) 38 32

JA = junction-to-ambient thermal resistance,JP = junction-to-pad thermal resistance,lfm = linear foot per minute.

NOTE: All thermal models have an accuracy ≈ 20%.

Measuring the temperature as close as possible to theexposed thermal pad is recommended. The relatively lowthermal impedance, JP, of less than 10°C/W (with someadditional °C/W to the temperature test point on the PCB)allows good estimation of the junction temperature in theapplication.

The thermal pad on the PCB should contain nine or morevias for the QFN package. The same applies for the SOpackage, where the solder pad on the PCB can be largerthan the exposed pad (for example, 6.6mm × 18mm) asrecommended in the application literature notedpreviously.

Component population, layout of traces, layers, and airflow strongly influence heat dissipation. Worst-case loadconditions should be tested in the real environment toensure proper thermal conditions. Minimize thermal stressfor proper long-term operation with a junction temperaturewell below +125°C.

Bottom View (c)

Side View (a)

DIE

DIE

End View (b)

ExposedThermal

Pad

Figure 9. SO-20 Package Example of Thermally-Enhanced PowerPAD

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Revision History

DATE REV PAGE SECTION DESCRIPTION

5/09 B1 Front Page Updated front page appearance.

5/09 B5 Pin Configurations Added DWP pinout information to the Pin Assignments table.

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

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PACKAGE OPTION ADDENDUM

www.ti.com 25-Apr-2018

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status(1)

Package Type PackageDrawing

Pins PackageQty

Eco Plan(2)

Lead/Ball Finish(6)

MSL Peak Temp(3)

Op Temp (°C) Device Marking(4/5)

Samples

DRV401AIDWP ACTIVE SO PowerPAD DWP 20 25 Green (RoHS& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR -40 to 125 DRV401A

DRV401AIDWPG4 ACTIVE SO PowerPAD DWP 20 25 Green (RoHS& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR -40 to 125 DRV401A

DRV401AIDWPR ACTIVE SO PowerPAD DWP 20 1000 Green (RoHS& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR -40 to 125 DRV401A

DRV401AIDWPRG4 ACTIVE SO PowerPAD DWP 20 1000 Green (RoHS& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR -40 to 125 DRV401A

DRV401AIRGWR ACTIVE VQFN RGW 20 3000 Green (RoHS& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR -40 to 125 HAAQ

DRV401AIRGWRG4 ACTIVE VQFN RGW 20 3000 Green (RoHS& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR -40 to 125 HAAQ

DRV401AIRGWT ACTIVE VQFN RGW 20 250 Green (RoHS& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR -40 to 125 HAAQ

DRV401AIRGWTG4 ACTIVE VQFN RGW 20 250 Green (RoHS& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR -40 to 125 HAAQ

HPA01046RGWR ACTIVE VQFN RGW 20 3000 Green (RoHS& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR -40 to 125 HAAQ

(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substancedo not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI mayreference these types of products as "Pb-Free".RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide basedflame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

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PACKAGE OPTION ADDENDUM

www.ti.com 25-Apr-2018

Addendum-Page 2

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF DRV401 :

• Automotive: DRV401-Q1

• Enhanced Product: DRV401-EP

NOTE: Qualified Version Definitions:

• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

• Enhanced Product - Supports Defense, Aerospace and Medical Applications

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TAPE AND REEL INFORMATION

*All dimensions are nominal

Device PackageType

PackageDrawing

Pins SPQ ReelDiameter

(mm)

ReelWidth

W1 (mm)

A0(mm)

B0(mm)

K0(mm)

P1(mm)

W(mm)

Pin1Quadrant

DRV401AIDWPR SOPower PAD

DWP 20 1000 330.0 24.4 10.8 13.3 2.7 12.0 24.0 Q1

DRV401AIRGWR VQFN RGW 20 3000 330.0 12.4 5.3 5.3 1.1 8.0 12.0 Q2

DRV401AIRGWT VQFN RGW 20 250 180.0 12.4 5.3 5.3 1.1 8.0 12.0 Q2

PACKAGE MATERIALS INFORMATION

www.ti.com 4-Nov-2015

Pack Materials-Page 1

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*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

DRV401AIDWPR SO PowerPAD DWP 20 1000 367.0 367.0 45.0

DRV401AIRGWR VQFN RGW 20 3000 367.0 367.0 35.0

DRV401AIRGWT VQFN RGW 20 250 210.0 185.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 4-Nov-2015

Pack Materials-Page 2

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