semiconductor manufacturing...
TRANSCRIPT
Semiconductor Manufacturing Technology
Thin Film Deposition, Lithography, and Etch
Dept. of ElectrophysicsT. S. Chao
2
Part. I
Thin Film Deposition
3
Film Layers for an MSI Era NMOS Transistor
p+ silicon substrate
p- epi layer
Field oxiden+ n+ p+ p+
n-well
ILD OxidePad
Oxide
NitrideTopside
Gate oxideSidewall oxide
Pre-metal oxide
Poly
Metal
Poly Metal
IC is a thin film engineering
4
Film Deposition
Thin Film Characteristics• Good step coverage• Ability to fill high aspect ratio gaps (conformality)• Good thickness uniformity (no pinholes)• High purity and density (Mobile ion or particle)• Controlled stoichiometry (SixNyHz)• High degree of structural perfection with low film stress• Good electrical properties• Excellent adhesion to the substrate material and
subsequent films
5
Film Coverage over Steps
Conformal step coverage Nonconformal step coverage
Uniform thickness
6
Aspect Ratio for Film Deposition
Aspect Ratio = Depth Width
=2 1
Aspect Ratio = 500 Å 250 Å
500 Å
D
250 ÅW
• CD decreases, aspect ratio increases due to non-scaled film thickness• The ability of filling high aspect ratio gap/via become the most important
7
Chemical Vapor Deposition
The Essential Aspects of CVD1. Chemical action is involved, either through
chemical reaction or by thermal decomposition (referred to as pyrolysis).
2. All material for the thin film is supplied by an external source.
3. The reactants in a CVD process must start out in the vapor phase (as a gas).
CVD: deposited a solid film on surface through a chemical reaction of a gas mixture
8
Schematic of CVD Transport and Reaction 8 Steps
CVD Reactor
Substrate
Continuous film
8) By-product removal
1) Mass transport of reactants
By-products2) Film precursor
reactions
3) Diffusion of gas molecules
4) Adsorption of precursors
5) Precursor diffusion into substrate 6) Surface reactions
7) Desorption of byproducts
Exhaust
Gas delivery
9
CVD Deposition Systems
• CVD Equipment Design– CVD reactor heating– CVD reactor configuration– CVD reactor summary
• Atmospheric Pressure CVD, APCVD • Low Pressure CVD, LPCVD• Plasma-Assisted CVD• Plasma-Enhanced CVD, PECVD• High-Density Plasma CVD, HDPCVD• Atomic Layer CVD, ALCVD
10
LPCVD Reaction Chamber for Deposition of Oxides, Nitrides, or Polysilicon
Three-zone heating element
Spike thermocouples (external, control)
Pressure gauge
Exhaust tovacuum pump
Gas inletProfile thermocouples
(internal)
• Limited by surface reaction, flow condition is not important• Films are uniformly deposited on a large number of wafer surface as
long as the temperature is tightly controlled• Conformal film coverage on the wafer• Low growth rate than APCVD and need routine maintenance• In-situ clean, using ClF3 or NF3• 3SiCl2H2 + 4NH3 Si3N4 + 6HCl + 6H2
11
Advantages of Plasma Assisted CVD
• Lower processing temperature (250 – 450°C).
• Excellent gap-fill for high aspect ratio gaps (with high-density plasma).
• Good film adhesion to the wafer.
• High deposition rates.
• High film density due to low pinholes and voids.
• Low film stress due to lower processing temperature.
12
Film Formation during Plasma-Based CVD
PECVD reactor
Continuous film
8) By-product removal
1) Reactants enter chamber
Substrate
2) Dissociation of reactants by electric fields
3) Film precursors are formed
4) Adsorption of precursors
5) Precursor diffusion into substrate 6) Surface reactions
7) Desorption of by-products
Exhaust
Gas delivery
RF generator
By-products
Electrode
Electrode
RF field
13
General Schematic of PECVD for Deposition of Oxides, Nitrides, Silicon Oxynitride or Tungsten
Process gases
Gas flow controller
Pressure controller
Roughingpump
Turbopump
Gas panel
RF generatorMatching network
Microcontroller operator Interface
Exhaust
Gas dispersion screen
Electrodes
14
High Density Plasma Deposition Chamber
Photograph courtesy of Applied Materials, Ultima HDPCVD Centura
• Popular in mid-1990s• High density plasma• Highly directional due to
wafer bias (RF)• Fills high aspect ratio
gaps (replaced PECVD)• Backside He cooling to
relieve high thermal load (high ion bombardment)
• Simultaneously deposits and etches film to prevent bread-loaf and key-hole effects
15
Silicon Epitaxial Growth on a Silicon Wafer
Si
Si
ClCl
HH
Si
Si
Si Si
Si Si
Si
Si
Si
Si
Si
ClH
Cl
H
Chemical reaction
By-products
Deposited siliconEpitaxial layer
Single silicon substrate
1. Use for raised S/D to reduce contact resistance2. When lightly doped epilayer on heavily doped: we have autodoping evaporate
from the wafer, or out-diffusion from heavily doped3. Si-epi on Si: homoepitaxy, Si-epi on Al2O3 (SOI): heteroepitaxy
16
Atomic Layer CVD
The surface is now returned to the state in which it is ready for the first reaction to begin the ALD cycle again.
Remote hydrogen plasma has been used to deposit very reactive metals, such as titanium and tantalum from their chlorides [69, 70]. Assuming that the plasma has already provided hydrogen atoms to the surface, the next reaction step would be the following:
17
Overview of Multilevel Metallization
Interlayer Dielectric
Metal interconnect structure
Diffused active region in silicon substrateSub quarter micron CMOS cross section
Via interconnect structurewith tungsten plug
Metal stack interconnect
Local interconnect (tungsten)
Initial metal contact
• Interconnection (wiring) is to conduct the signal• ILD electrically separates the metal line• ILD is patterned and etched to form via pathways for metal interconnection
18
Copper Metallization
Photograph courtesy of Integrated Circuit Engineering
19
Aluminum Interconnect
ILD-4
ILD-5
ILD-6Top Nitride
Bonding pad Metal-5 (Aluminum)
Metal-4
Via-4
Metal-4 is preceded by other vias, interlayer dielectric, and metal layers.
Metal-3
• Earliest metal, is still the most common one• Good adhesion with Si and SiO2, inexpensive (Au and Ag), easy
etching, low contact resistance (break oxide)• First Al ~ 500nm, the top Al ~ 2000nm
20
The Benefits of Copper Interconnect
1. Reduction in resistivity– 1.678 µΩ-cm vs. 2.65 µΩ-cm for Aluminum
2. Reduction in power consumption3. Tighter packing density (narrow line)4. Superior resistance to electromigration5. Fewer process steps
– 20 to 30 % fewer steps with damascene technique
21
Metal Deposition SystemsPhysical Vapor Deposition (PVD)
• Evaporation• Sputtering• Metal CVD• Copper electroplating
22
Simple Evaporator
Roughingpump
Hi-Vac valve
Hi-Vac pump
Process chamber(bell jar)Crucible
Evaporating metal
Wafer carrier
• The biggest drawback is the inability to produce uniform step coverage (not continuous)
• Limitation for depositing alloys because of different vapor pressure
• Evaporation is still used in chip package process to deposit solder bumps
23
Electron Beam Evaporator
Wafers
Aluminum Charge
Aluminum Vapor
Power SupplyTo Pump
10-6 Torr
Electron Beam
24
Some Advantages of Sputtering• Using high energy particles strike a solid slab of
high-purity target material and physically dislodge atoms
• Ability to deposit and maintain complex alloys.• Ability to deposit high-temperature and refractory
metals.• Ability to deposit controlled, uniform films on
large wafers (200 mm and larger).• Ability of multichamber cluster tools to clean the
wafer surface for contamination and native oxides before depositing metal (referred to as in situsputter etch).
25
Simple Parallel Plate DC Diode Sputtering System
Exhaust
e- e-
e-
DC diode sputterer
Substrate
1) Electric fields create Ar+ ions.
2) High-energy Ar+ ions collide with metal target.
3) Metallic atoms are dislodged from target.
Anode (+)
Cathode (-)
Argon atoms
Electric field
Metal target
Plasma
5) Metal deposits on substrate
6) Excess matter is removed from chamber by a vacuum pump.4) Metal atoms migrate toward substrate.
Gas delivery++ + +
+
DC Diode System
• It has a DC voltage applied between two electrode• It cannot be used to sputter dielectrics because the
target rapidly builds up a positive charge, which repels incoming positive ions
• It is also not capable of performing a sputter etch, it is a pre-clean step where the sputter process is reversed and argon atoms are used to remove thin native-oxide layers and remaining etch residues and contaminate contacts and vias
27
RF Sputtering System
Argon
Gas flow controller
Turbopump
RF generatorMatching network
Microcontroller operator interface
Exhaust
Chuck
Electrode
TargetSubstrate
Blocking capacitor
Roughingpump
Pressure controller
Gas panel
Figure 12.19
RF Sputtering
• 13.56 MHz is used• Due to the high frequency, the electrons respond
most strongly• The chamber and electrode behave like a diode,
creating a high amount of electron flow and resulting in a negative charge on the target electrode
• Thus self-bias attracts positive argon ions, which sputter materials from the insulator or non-insulator target
29
PVD Cluster Tool
Photo 12.3
Photo Courtesy of Applied Materials, Inc.
30
Copper Electroplating
- Cathode
+ Copper anode
Substrate
Plating solution
Inlet
OutletOutlet
Copper ion
Copper atom attached to wafer
+
+
31
Electroplating Tool
Used with permission from Novellus Systems, Inc.Photo 12.4
32
Part. II
Lithography
33
Three Dimensional Pattern in PhotoresistLinewidth Space
Thickness
Substrate
Photoresist
• Photoresist is light-sensitive film• It is temporary and is removed after ion implantation or etching
34
Section of the Electromagnetic Spectrum
Visible
Radio wavesMicro-wavesInfraredGamma rays UVX-rays
f (Hz) 1010101010101010 1010 4681012141622 1820
λ(m) 420-2-4-6-8-14 -10-12 1010101010101010 1010
365 436405248193157
ghiDUVDUVVUVλ (nm)
Common UV wavelengths used in optical lithography.
35
Important Wavelengths for Photolithography Exposure
UV Wavelength(nm)
WavelengthName UV Emission Source
436 g-line Mercury arc lamp
405 h-line Mercury arc lamp
365 i-line Mercury arc lamp
248 Deep UV (DUV)Mercury arc lamp or
Krypton Fluoride (KrF) excimer laser
193 Deep UV (DUV) Argon Fluoride (ArF) excimer laser
157 Vacuum UV (VUV) Fluorine (F2) excimer laser
• Resolution: ability to differentiate between two closely spaced features on the wafer• The actual dimensions of the patterned images are the feature sizes• The minimum feature size is the critical dimension (CD)• Resolution is important for critical dimension
36
Negative Lithography
Ultraviolet light
Island
• Areas exposed to light becomecrosslinked and resist thedeveloper chemical.
Resulting pattern after the resist is developed.
Window
Exposed area of photoresist
Shadow on photoresist
Chrome island on glass mask
Silicon substrate
PhotoresistOxide
Photoresist
Oxide
Silicon substrate
37
Positive Lithography
photoresist
silicon substrate
oxide oxide
silicon substrate
photoresist
Ultraviolet light
Island
Areas exposed to light are dissolved.
Resulting pattern after the resist is developed.
Shadow on photoresist
Exposed area of photoresist
Chrome island on glass mask
Window
Silicon substrate
PhotoresistOxide
Photoresist
Oxide
Silicon substrate
38
Eight Steps of Photolithography
8) Develop inspect5) Post-exposure bake
6) Develop 7) Hard bake
UV Light
Mask
λ
λ
4) Alignmentand Exposure
Resist
2) Spin coat 3) Soft bake1) Vapor prime
HMDS
39
Photolithography Track System• Tracks: employs robots, automated material handling, and computers to
perform all eight steps without human intervention• Improve: control delay between process steps, efficient, flexibility,
reduced contamination, increasing safety due to reduced operator exposure to chemicals
40
1. Vapor Prime
The First Step of Photolithography:• Promotes Good Photoresist-to-Wafer Adhesion• Primes Wafer with Hexamethyldisilazane, HMDS
[六甲基二矽氮]• Followed by Dehydration Bake• Ensures Wafer Surface is Clean and Dry
41
2. Spin Coat
Process Summary:• Wafer is held onto vacuum chuck• Dispense ~5ml of photoresist• Slow spin ~ 500 rpm• Ramp up to ~ 3000 to 5000 rpm• Quality measures:
– time– speed– thickness– uniformity– particles and defects Vacuum chuck
Spindle connected to spin motor
To vacuum pump
Photoresist dispenser
42
3. Soft bake
Characteristics of Soft Bake:• Improves Photoresist-to-Wafer Adhesion• Promotes Resist Uniformity on Wafer• Improves Linewidth Control During Etch• Drives Off Most of Solvent in Photoresist• Typical Bake Temperatures are 90 to 100°C
– For About 30 Seconds– On a Hot Plate– Followed by Cooling Step on Cold Plate
43
4. Alignment and Exposure
Process Summary:• Transfers the mask image to the
resist-coated wafer• Activates photo-sensitive
components of photoresist• Quality measures:
– linewidth resolution– overlay accuracy– particles and defects
UV light source
Mask
Resist
λ
44
5. Post-Exposure Bake
• Required for Deep UV Resists• Typical Temperatures 100 to 110°C on a hot
plate• Immediately after Exposure• Has Become a Virtual Standard for DUV
and Standard Resists
45
6. Photoresist Development
Process Summary:• Soluble areas of photoresist are
dissolved by developer chemical• Visible patterns appear on wafer
- windows- islands
• Quality measures:- line resolution- uniformity- particles and defects
Vacuum chuck
Spindle connected to spin motor
To vacuum pump
Develop dispenser
46
7. Hard Bake
• A Post-Development Thermal Bake• Evaporate Remaining Solvent• Improve Resist-to-Wafer Adhesion• Higher Temperature (120 to 140°C)
than Soft Bake
47
8. Develop Inspect
• Inspect to Verify a Quality Pattern– Identify Quality Problems (Defects)– Characterize the Performance of the
Photolithography Process– Prevents Passing Defects to Other Areas
• Etch• Implant
– Rework Misprocessed or Defective Resist-coated Wafers
• Typically an Automated Operation
48
HMDS Hot Plate Dehydration Bake and Vapor Prime
Wafer
Exhaust
Hot plate
Chamber coverProcess Summary:• Dehydration bake in enclosed
chamber with exhaust• Hexamethyldisilazane (HMDS) • Clean and dry wafer surface
(hydrophobic) vs. hydrophilic• Temp ~ 200 to 250°C• Time ~ 60 sec.
49
Steps of Photoresist Spin Coating
3) Spin-off 4) Solvent evaporation
1) Resist dispense
2) Spin-up
Thickness of PR < 1µm
50
Wafer Transfer System
Load station Transfer stationVapor prime
Resist coat
Develop and rinse
Edge-bead removal
Soft bake
Cool plate
Cool plate
Hard bake
Wafer stepper (Alignment/Exposure system)
Automated Wafer Track for Photolithography
51
Soft Bake on Vacuum Hot Plate
Purpose of Soft Bake:• Partial evaporation of
photoresist solvents• Improves adhesion• Improves uniformity• Improves etch resistance• Improves linewidth control• Optimizes light absorbance
characteristics of photoresistHot plate
Wafer
Solvent exhaust
Chamber cover
52
Reticle Pattern Transfer to Resist
Single field exposure, includes: focus, align, expose, step, and repeat process
UV light source
Reticle (may contain one or more die in the reticle field)
Shutter
Wafer stage controls position of wafer in X, Y, Z, θ)
Projection lens (reduces the size of reticle field for presentation to the wafer surface)
Shutter is closed during focus and alignment and removed during wafer exposure
Alignment laser
Figure 14.1
53
Step-and-Repeat Aligner (Stepper)• Step-and-repeat (stepper) is the mainstay of the 1990s microlithography equipment• Steppers have dominated IC fabrication since the later 1980s, down to 0.35 µm• A stepper uses a reticle, which contains the pattern in an exposure field
corresponding to one or more die
54
Stepper Exposure Field
UV light
Reticle field size20 mm × 15mm,4 die per field
5:1 reduction lens
Wafer
Image exposure on wafer 1/5 of reticle field4 mm × 3 mm,4 die per exposure
Serpentine stepping pattern
Figure 14.36
55
浸潤微影設備示意圖
1
2
來源：美國專利公告號US 8711323B2
56
Post Exposure Bake
• Deep UV Exposure Bake– Necessary for CA DUV
resists to catalyze chemical reactions
– Temperature Uniformity– PEB Delay
• Conventional I-Line PEB– Improve adhesion and
reducing standing waves
57
Reduction of Standing Wave Effect due to PEB
(d) Result of PEB
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC PAC
PAC
PAC
PAC
(c) PEB causes PAC diffusion
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC
PAC PAC
PAC
PAC
PAC
Unexposed photoresist
Exposed photoresist
(b) Striations in resist
PACPAC
PAC
PAC PAC
PAC
PAC
PAC
PAC
PACPAC
PAC
PAC
PAC
PAC PAC
PACPAC
PACPAC
PAC
PACPAC
Standing waves
(a) Exposure to UV light
Figure 15.2
• The increased temperature caused the PAC sensitizer to diffuse through the novolak polymer matrix, essentially producing an average effect across the standing wave boundary
58
Development of Positive Resist
Resist exposed to light dissolves in the develop chemical
Unexposedpositive resist
Crosslinked resist
Figure 15.5
• DNQ for i-line, and CA for DUV • Both are phenolic-based resin, is soluble in a base solution• TMAH is used to develop with low metal ions• The unexposed resist does not absorb developer• Using DI water to rinse
59
Puddle Resist Development
(d) Spin dry(c) DI H2O rinse
(b) Spin-off excess developer(a) Puddle dispense
Developerdispenser
Puddle formation
Figure 15.7
• Puddle development introduces fresh chemicals, improve wafer-to-wafer uniformity• It minimizes temperature gradients and permits control of the variables affecting uniformity
60
Automated Inspection Tool for Develop Inspect
Photograph courtesy of Advanced Micro Devices, Leica Auto Inspection station
Photo 15.1
61
Develop Inspect Rework Flow
1. Vapor prime
HMDS
2. Spin coat
Resist
3. Soft bake 4. Align and expose
UV light
Mask
5. Post-exposure bake
6. Develop7. Hard bake8. Develop inspect
O2
PlasmaStrip and clean
Rejected wafers
Passed wafersIon implant Etch
Rework
Figure 15.9
62
Part. III
Etch
63
Applications for Wafer Etch in CMOS Technology
Photoresist mask Film
to be etched
(a) Photoresist-patterned substrate (b) Substrate after etch
Photoresist mask Protected
film
• Etch is the process of selectively removing unneeded material from the wafer surface by using either chemical or physical means
• The patterned resist layer is not attacked significantly by etchant
64
Plasma Basics
• A plasma is an ionized gas with equal numbers of positive and negative charges.
• Three important collisions: – Ionization generates and sustains the plasma– Excitation-relaxation causes plasma glow
colors– Dissociation creates reactive free radicals
65
(1) Ionization
e + A A+ + 2 e
• Ionization collisions generate electrons and ions • It sustains the stable plasma
• Electron collides with neutral atom or molecule• Knock out one of orbital electron
66
(2) Excitation-Relaxatione + A A* + e
A* A + hν (Photos)
• Different atoms or molecules have different frequencies, that is why different gases have different glow colors.
• O2: grayish-blue, N2: pink, F: orange-red
• The change of the glow colors is used for etch andchamber clean process endpoint.
67
(3) Dissociation• Electron collides with a molecule, it can
break the chemical bond and generate free radicals:
e + AB A + B + e• Free radicals have at least one unpaired
electron and are chemically very reactive. • Increasing chemical reaction rate • Very important for both etch and CVD.
68
Anisotropic Etch with Vertical Etch Profile
Anisotropic etch - etches in only one direction
Resist
Substrate
Film
• The rate of etching is on only one direction perpendicular to the wafer surface• There is very little lateral etching activity• This leaves vertical sidewalls, permitting a higher packing density of etched
features on the chip• With smaller geometries, the etch profiles have higher aspect ratios• It is difficult to get etchant chemicals in and reaction by-products out of the
high-aspect ratio openings
69
Etch Selectivity
S = Ef
Er
Ef Nitride
Oxide
Er
Figure 16.8
• Selectivity represents how much faster one film etches than another film under the same etch conditions
• It is defined as the etch rate of the material being etching relative to the etch rate of another material
• A high selectivity etch process does not etch the underlying film (etching stops at the right depth) and the protective photoresist is not etched
• High selectivity is necessary, the smaller the CD then the higher the selectivity must be
• A good selectivity ~ 100• With poor selectivity, needs an endpoint detection system
70
Non-volatile Residue on Surface
PR PR PR
Film Film Film
Substrate
Residues
71
Polymer Sidewall Passivation for Increased Anisotropy
Plasma ions
Resist
Oxide
Polymer formationSilicon
• A polymer formation is sometimes intentionally deposited on the sidewalls of the etch feature to form an etch-resistant film that prevents lateral etching
• It produces highly anisotropic feature• The polymers comes from PR carbon converted into polymers during etching and combines
with etching gases (i.e., C2F4) and etch by-products to form• The polymer chains have strong carbon-fluorine bonds that are difficult to oxidize and remove • It must be removed after etch process, requires special gas chemistry or strong solvents
72
F/C Ratio, DC Bias and Polymerization
F/C Ratio1 2 3 40
-100
-200
C2F4 C2F6 CF4
Polymerization
Etching
Bia
s (Vo
lts)
7373/637373
• After oxide etching, the polymer should be removed, especially in contact holes. The polymer can be removed by an O2 and CF4 plasma treatment CF4 is better at removing all the polymer and even some damaged substrate.
74
Advantages of Dry Etch over Wet Etch
1. Etch profile is anisotropic with excellent control ofsidewall profiles.
2. Good CD control.
3. Minimal resist lifting or adhesion problems.
4. Good etch uniformity within wafer, wafer-to-waferand lot-to-lot.
5. Lower chemical costs for usage and disposal.
Table 16.2
• Primary disadvantages are poor selectivity to the underlying layer, risk for device damage from plasma, and expensive equipment
75
Plasma Etch Process of a Silicon Wafer
8) By-product removal
1) Etchant gases enter chamber
Substrate
Etch process chamber
2) Dissociation of reactants by electric fields
5) Adsorption of reactive ions on surface
4) Reactive +ions bombard surface 6) Surface reactions of
radicals and surface film
Exhaust
Gas delivery
RF generator
By-products
3) Recombination of electrons with atoms creates plasma
7) Desorption of by-products
Cathode
AnodeElectric field
λ
λ
Anisotropic etch Isotropic etch
76
Parallel Plate Plasma Etching
Roots pump
Process gases
Exhaust
Gas- flow controller
Pressure controller
Gas panel
RF generatorMatching network
Microcontroller Operator Interface
Gas dispersion screen
Electrodes
Endpoint signal
Pressure signal
Roughingpump
Wafer
• Wafer on the grounded electrode is the plasma etch mode• Wafer on RF power electrode, resulting in high-energy ion bombardment and said to be in the
reactive ion etch mode, its energy is ~ 10 times higher than etch mode
77
Schematic of a Downstream Reactor
Plasma chamber
Diffuser
Wafer chuck
Heat lamp
To vacuum system
Microwave energy Microwave source 2.45 GHz
• Exposure to ion bombardment increases the probability of device damage and heat• Solution: downstream reactor, in which the plasma is formed in a separate source ~ 0.1-1
torr, transferred to the process chamber, and uniformly distributed over the heated wafer surface
• Since it is no ions to create directional etching, it is chemical etching, isotropic, and are often used to remove resists or other noncritical layers
78
Triode Planar Reactor
Inductively-coupledRF generator (13.56 MHz)
Capacitively-coupled RF generator (100 kHz)
Induction coil
Capacitor
• The inductively-coupled RF generates the plasma to create the ion and reactive species at a pressure ~0.001 torr
• The low-frequency generator controls the ion bombardment• A typical use is in single-crystal silicon trench etching
High Density Plasma Etcher
• High density plasma etch with single-wafer processing in acluster tool is the most predominant dry etchingmethodology in use for critical layers
• Standard plasma ~ a few hundred mtorr, it has difficult to getetchant ion into and etch by products out of high aspect ratiofeature (ionization rate 0.01~ 0.1%)
• Solution is lower the pressure (1-10 mtorr) to increase themean free path lengths of gas molecules and ions
• Lower pressure results in lower etching rate• Solution is to increase ionization rate to 10% in the high
density plasma etcher using magnetic field
80
Schematic of Electron Cyclotron Reactor
Microwave source 2.45 GHz
Wave guide
Diffuser
Quartz window
Electrostatic chuck
Cyclotron magnet
Plasma chamber
Wafer
Additional magnet
13.56 MHz
Vacuum system
• Magnetic field parallel to the direction of reactant flow that causes free electrons to move in aspiral path
• An efficient transfer of energy: the electric field to the electrons orbit frequency equals thefrequency of the applied electric microwave field (resonance)
81
Inductively Coupled Plasma Etch
Electromagnet
Dielectric window
Inductive coil
Biased wafer chuck
RF generator
Bias RF generator
Plasma chamber
• Less complicated and less expensive than ECR and widely used• Like a transformer, also called TCP
82
Illustration of Inductive Coupling
RF current in coil
RF magnetic field
Induced electric field
83
Endpoint Detection for Plasma Etching
Endpoint detection
Normal etch Change in etch rate - detection occurs here.
Endpoint signal stops the etch.
Time
Etch
Par
amet
er• Endpoint detection is required to monitor the etch process and stop etching to minimize
overetching of the underlying layer• It measures: change in etching rate, the type of etch product removed from the etch process, or a
change in the active reactants in gas discharge (following figure)• Optical emission spectroscopy is used
84
Characteristic Wavelengths of Excited Species in Plasma Etch
Material Etchant Gas Emitting Species ofsome Products Wavelength (nm)
SiliconCF4/O2
Cl2
SiFSiCl
440; 777287
SiO2 CHF3 CO 484
AluminumCl2
BCl3
AlAlCl
391; 394; 396261
PhotoresistO2 CO
OHH
484309656
Nitrogen(indicatingchamber vacuumleak)
N2
NO337248
Table 16.6
85
Endpoint Detection
Photograph courtesy of Advanced Micro Devices, Lam Rainbow etcher