secrets of level-translation revealed _ ee times
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Prasad Dhond, Applications Specialist,Texas Instruments10/27/2004 10:00 PM EDTPost a comment
Secrets of level-translation revealed
The need for logic voltage level translation is prevalent on mostelectronic systems today. For example, an ASIC might be operatingwith supply-voltage VCCA, while an I/O device operates with adifferent supply-voltage VCCB. To enable these devices tocommunicate with each other, a level-translation solution is needed.Input-voltage thresholds and output-voltage levels of electronicdevices vary, depending on the device technology and supplyvoltage used. Figure 1 shows the logic threshold levels for differentsupply voltages and device technologies. To interface two devicessuccessfully, certain requirements must be met:
1. The VOH (Output High Voltage) of the driver must be greater thanthe VIH (Input High Voltage) of the receiver.2. The V OL (Output Low Voltage) of the driver must be less than theVIL (Input Low Voltage) of the receiver.3. The output voltage from the driver must not exceed the I/Ovoltage tolerance of the receiver.
There are several methods of achieving level translation and eachmethod has its own merits and demerits.
Figure 1. Digital Switching Levels
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Dual-supply level translators
These are unidirectional or bidirectional devices with two supplyvoltage pins: one to interface with the low-voltage side and anotherto interface with the high-voltage side. Figure 2 shows oneimplementation of how a logic signal referenced to VCCA is level-shifted to a signal referenced to VCCB. If logic high is applied to theinput, transistor T9 in the level translating block turns on, and theoutput is pulled to VCCB through T10. If logic Low is applied at theinput, transistors T6, T7 and T8 are turned on, and the output ispulled low through T11.
Figure 2. How a push-pull level translator works
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This design ensures that there is never a constant path from VCCAor VCCB to ground, which enables very low quiescent currentconsumption. Transistors T10 and T11 in the output block can besized to offer the current drive required for the application. Figure 2shows a uni-directional buffer. For bi-directional level shifting, asimilar return path is required. Figure 3 shows an implementation ofa dual-supply level-translator that uses a control signal to controlthe data flow direction. The advantage of this configuration is thatthe output drivers can be as strong as needed and maximumfrequency is restricted only by the output load and switching speedof the output transistors. Consequently, these devices are typicallydesigned to sink/source currents of up to several tens of mA andthey support frequencies of up to several hundreds of Mbps.
Figure 3. Fully Buffered Voltage Translation
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