satyendra_kumar_cv
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Curriculum-VitaeSATYENDRA KUMAR
585, G-Block, Gamma-II
Greater Noida, U.P. -201308
Contact No.:- 08800274744
Email Id: [email protected] Objective
To obtain a respective carrier as Embedded System Design/Verification engineerAcademic Profile
Achievement
Scholarship at M.Sc. for two years (July 2007-Jun 2009)
Gold Medal position in M.Sc. with 86.46%
GATE Qualified; Percentile: 92.67
Skill Set
Language: C, Embedded C, ASL, VHDL
Area of Interest: ARM-application development, DSP, Wireless CommunicationExperience:
Trainings
Working as a Trainee at ST-Ericsson India (G. Noida), from July 2010
One month Plant Training at Doordarsan Kendra Patna
Three month Analog TV signal processing & maintenance, Sponsored by BSBCF & DC,Patna
Major Project
System Performance and Analysis for Mobile Critical UseCases
Company: ST-Ericsson India Pvt. Ltd.
Responsibilities:
1. Measure the performance of IP (B2R2) in single initiator usecase on system level in
low power & no low power mode at various OPP
2. Analyse the results & correlate with previous results
3. Measure the peripheral access time/clocks
Tools Used: ARM-Debugger ICE
Software: SBAG (local IP)
Language: Embedded C
Platform: DB8500 (used Dual core Cortex-A9 as Master Processor)
EXAM SCHOOL/COLLEGE BOARD/UNIV. YEAR PERCENTAGE
M. Tech.
(MCT)
School of Electronics,
DAVV, IndoreDAVV, Indore pursuing 74.54
M.Sc.
(Electronics)
School of Electronics,
DAVV, IndoreDAVV Indore 2009 86.46
B.Sc.
(Electronics)A.N. College, Patna
Magadh University,
Bodhgaya2007 70.00
Intermediate
(PCM) S.R.K.G. College, Sitamarhi B.I.E.C., Patna 2001 72.67
Matriculation H.S. Bathanaha B.S.E.B., Patna 1999 60.14
S.No. Post Institute/Organization Duration Type
1. Visiting Faculty SCS & IT, DAVV, INDORE Jul 2009 To Dec 2009 Part-Time
2. Visiting Faculty IMS, DAVV, INDORE Aug 2009 To May 2010 Part-Time
mailto:[email protected]:[email protected]:[email protected] -
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