santa clara valley chapter report

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July 2004 • Volume 9 – Number 3 14 Formation In the fall of 1996 a colleague, Jonathan David, came into my office at Cadence Systems. He said the Solid-State Circuits Council would become a society next year and he thought a local SSCS chap- ter would be appropriate. I was involved in activities of other Santa Clara Valley IEEE chapters (Magnet- ics Society, Communications Soci- ety, and Microwave Theory and Technics Society). We discussed my experiences and I told him: “This is the place for an SSCS chapter.” After 40 years, Santa Clara Valley is still the heart of the IC design industry. The first meeting was scheduled shortly after the 1997 ISSCC. Ken Kundert, a Cadence Fellow and an expert in continuous time simula- tors, spoke on “Simulation of jitter in phase-locked loops using Spectre RF.” Spectre is the continuous time simulator part of Cadence EDA suite tools. The inaugural meeting atten- dees signed the petition to form the chapter and Jonathan David became its first Chapter Chair. The IEEE Executive Committee of the Santa Clara Valley Section advised that successful chapters operate with a fixed time and place for meetings to establish a regular attendance base. To avoid overlap- ping with other established chap- ters with similar technical interests, we picked the third Thursday of each month. We selected the cen- trally located Cadence campus as our meeting site. For over seven years we have held seven to nine technical meetings a year, recessing in July, August, and December, and sometimes in January. The Events We strive to serve our industry needs by having presentations on cutting- edge circuits, technologies, and methods, to advance the state of the industry, to broaden the knowledge of our members, and to provide net- working opportunities for the speak- ers and attendees. Past presentation topics have covered a broad range of circuits: from bandgap reference through RF power amplifiers, A/D converters, iterative decoders, filters, novel EDA tools, state-of-the-art microprocessors, and methods to achieve a 10-million-gate System On a Chip. We have touched exotic sub- jects like MEMS and even supercon- ductor quantum phenomena in elec- tronics. It has been our philosophy that a professional chapter should fulfill the professional needs of the members, rather than serve to reed- ucate with a lot of courses organized by university professors on universi- ty grounds. We let academia run those courses. Santa Clara Valley Chapter Report SOME HIGHLIGHTS FROM OUR PAST PRESENTATIONS. 6/15/00: “Mechanism of phase noise in the differential LC oscillators,” Dr. Asad Abidi, UCLA 2/15/01: “Connecting to the optical network: Requirements and state of the art,” Dr. Jeffrey Bostak, Vitesse Semi- conductor 9/18/01: “Issues in phase-locked loop design for SOC applications,” Dr. Joseph Ingino, Broadcom 10/18/01: “Analysis and simulation of PLLs for SOC applications,” Dr. Bill Egan, Santa Clara University 3/15/01: “Wideband over-sampled data converters for wireless applica- tions,” Dr. Ali Tabatabaei, Stanford Uni- versity’s Integrated Circuits Laboratory 9/26/02: “Group delay in analog fil- ters,” Dr. Narendra Rao, Silicon Mag- netic Systems 10/17/02: “Trends and challenges in multi-gigahertz microprocessor design” Mr. Stefan Rusu, Intel 11/21/02: “CMOS power ampli- fiers: Nonlinear, linear, and lin- earized,” Dr. David Su, Atheros Com- munications. There were 89 attendees in the audience. 4/17/03: “Challenges in A/D design and practical understanding of their specifications,” Dr. Ion Opris (indepen- dent consultant). The number of atten- dees was a record 102! 8/21/03: “40-GHz OC-768 optical transponder in SiGe technology: CDR, 16:4 MUX and 4:1 MUX/CMU,” Dr. Adrian Ong and Dr. Harry Tao, both from Big Bear Networks 9/08/03: “Challenges in achieving first silicon success for 10-Mgate SOC,” Aurangzeb Khan, Cadence. 10/16/03: George Vendelin, profes- sor at Santa Clara and San Jose State Universities, celebrated his induction as an IEEE Life Fellow (and his birthday!) by lecturing on “Lossless feedback amplifier design.” He was accompanied by more than ten of his university stu- dents, who enjoyed the contact with our chapter. 4/15/04: “A single-chip, dual- band, tri-mode CMOS transceiver for IEEE 802.11a/b/g wireless LAN,” Dr. Masoud Zargari and Dr. Manolis Ter- rovitis, both from Atheros Communi- cations 5/13/04: “The practice of analog IC design,” Phillip E. Allen (lectur- er), Schlumberger Professor School of Electrical and Computer Engineer- ing, Georgia Institute of Technology Kris Pister lecturing on “Dust circuits and applications” at the 19 February 2004 technical meeting. The Santa Clara Valley SSCS Chapter meets the third Thursday of every month at the centrally located Cadence facility in a well-lit auditorium that seats 100, with two projectors and an amplifier system.

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Page 1: Santa Clara Valley chapter report

July 2004 • Volume 9 – Number 314

FormationIn the fall of 1996 a colleague,Jonathan David, came into myoffice at Cadence Systems. He saidthe Solid-State Circuits Councilwould become a society next yearand he thought a local SSCS chap-ter would be appropriate. I wasinvolved in activities of other SantaClara Valley IEEE chapters (Magnet-ics Society, Communications Soci-ety, and Microwave Theory andTechnics Society). We discussed myexperiences and I told him: “This isthe place for an SSCS chapter.” After40 years, Santa Clara Valley is stillthe heart of the IC design industry.

The first meeting was scheduledshortly after the 1997 ISSCC. KenKundert, a Cadence Fellow and anexpert in continuous time simula-tors, spoke on “Simulation of jitterin phase-locked loops using SpectreRF.” Spectre is the continuous timesimulator part of Cadence EDA suitetools. The inaugural meeting atten-dees signed the petition to form thechapter and Jonathan David becameits first Chapter Chair.

The IEEE Executive Committeeof the Santa Clara Valley Sectionadvised that successful chaptersoperate with a fixed time and placefor meetings to establish a regularattendance base. To avoid overlap-ping with other established chap-ters with similar technical interests,

we picked the third Thursday ofeach month. We selected the cen-trally located Cadence campus asour meeting site. For over sevenyears we have held seven to ninetechnical meetings a year, recessingin July, August, and December, andsometimes in January.

The EventsWe strive to serve our industry needsby having presentations on cutting-edge circuits, technologies, andmethods, to advance the state of theindustry, to broaden the knowledgeof our members, and to provide net-working opportunities for the speak-ers and attendees. Past presentation

topics have covered a broad rangeof circuits: from bandgap referencethrough RF power amplifiers, A/Dconverters, iterative decoders, filters,novel EDA tools, state-of-the-artmicroprocessors, and methods toachieve a 10-million-gate System Ona Chip. We have touched exotic sub-jects like MEMS and even supercon-ductor quantum phenomena in elec-tronics. It has been our philosophythat a professional chapter shouldfulfill the professional needs of themembers, rather than serve to reed-ucate with a lot of courses organizedby university professors on universi-ty grounds. We let academia runthose courses.

Santa Clara Valley Chapter Report

SOME HIGHLIGHTS FROM OUR PAST PRESENTATIONS.6/15/00: “Mechanism of phase noisein the differential LC oscillators,” Dr.Asad Abidi, UCLA

2/15/01: “Connecting to the opticalnetwork: Requirements and state of theart,” Dr. Jeffrey Bostak, Vitesse Semi-conductor

9/18/01: “Issues in phase-locked loopdesign for SOC applications,” Dr.Joseph Ingino, Broadcom

10/18/01: “Analysis and simulationof PLLs for SOC applications,” Dr. BillEgan, Santa Clara University

3/15/01: “Wideband over-sampleddata converters for wireless applica-

tions,” Dr. Ali Tabatabaei, Stanford Uni-versity’s Integrated Circuits Laboratory

9/26/02: “Group delay in analog fil-ters,” Dr. Narendra Rao, Silicon Mag-netic Systems

10/17/02: “Trends and challenges inmulti-gigahertz microprocessordesign” Mr. Stefan Rusu, Intel

11/21/02: “CMOS power ampli-fiers: Nonlinear, linear, and lin-earized,” Dr. David Su, Atheros Com-munications. There were 89 attendeesin the audience.

4/17/03: “Challenges in A/D designand practical understanding of their

specifications,” Dr. Ion Opris (indepen-dent consultant). The number of atten-dees was a record 102!

8/21/03: “40-GHz OC-768 opticaltransponder in SiGe technology: CDR,16:4 MUX and 4:1 MUX/CMU,” Dr.Adrian Ong and Dr. Harry Tao, bothfrom Big Bear Networks

9/08/03: “Challenges in achievingfirst silicon success for 10-Mgate SOC,”Aurangzeb Khan, Cadence.

10/16/03: George Vendelin, profes-sor at Santa Clara and San Jose StateUniversities, celebrated his induction asan IEEE Life Fellow (and his birthday!)by lecturing on “Lossless feedback

amplifier design.” He was accompaniedby more than ten of his university stu-dents, who enjoyed the contact with ourchapter.

4/15/04: “A single-chip, dual-band, tri-mode CMOS transceiver forIEEE 802.11a/b/g wireless LAN,” Dr.Masoud Zargari and Dr. Manolis Ter-rovitis, both from Atheros Communi-cations

5/13/04: “The practice of analogIC design,” Phillip E. Allen (lectur-er), Schlumberger Professor School ofElectrical and Computer Engineer-ing, Georgia Institute of Technology

Kris Pister lecturing on “Dust circuits and applications” at the 19 February 2004technical meeting. The Santa Clara Valley SSCS Chapter meets the third Thursdayof every month at the centrally located Cadence facility in a well-lit auditorium thatseats 100, with two projectors and an amplifier system.

Page 2: Santa Clara Valley chapter report

Solid-State Circuits Society Newsletter 15

To determine events and speak-ers we use a variety of methods:consulting solid-state-related pro-fessional publications, readingindustry trade magazines, surveyingour attendees for suggestions andtheir interests, and reviewing ISSCCand CICC proceedings. It is a per-manent task of every officer/volun-teer to think about andsuggest speakers atplanning meetings,although we have trieda dedicated person, aprogram chair, to fulfillthat task. Our speakersare experts and special-ists from renownedcompanies in the indus-try, professors or PhDcandidates from respect-ed educational institu-tions, and IEEE Distin-guished Lecturers. Ittakes a lot of energy andtime to contact thespeaker, to agree on the content ofthe presentation, and to have thespeaker provide an abstract and ashort biographical note, all ofwhich will constitute the bulk of thescheduled meeting announcement.

While students are always wel-come to attend, we make a specialeffort each year to invite presenta-tions by PhD candidates from thelocal universities, primarily Stanfordand U.C. Berkeley, to maintain ahealthy level of communicationbetween industry and academia.

Our chapter has grown to over1600 members. Meeting attendeesare mainly IC designers in the area.Most are IEEE members. ManySenior Members and numerousIEEE Fellows belong to our chapter,so we draw from a prestigious list of“Who’s Who” in the field of solid-state circuits. Six to eight membersbecome Senior Members every year.Our forum, through its meeting top-ics and the technical breadth of thepresentations, is an incentive forattendees to become members ofIEEE (if they are not yet).

In 2002 average attendance forthree fall meetings was 77. For ournine meetings in 2003 average

attendance was 52. On May 13 thisspring we broke all previous atten-dance records when 160 partici-pants came to hear Phillip E. Allen,Schlumberger Professor School ofElectrical and Computer Engineer-ing from Georgia Institute of Tech-nology, lecture on “The practice ofanalog IC design.”

Chapter Management We meet on the Cadence Campus at6:30 p.m. Refreshments are servedand we network until 7:00 p.m.,when the presentation starts. Anhour to an hour and a half format isa more ample forum than com-pressed technical presentations atconferences such ISSCC or CICC.Mostly we use a free format, allow-ing questions during the presenta-tion, which makes the eveningvivid, interactive, and more interest-ing. We allow time after the presen-tation for further discussions withthe speaker, at his convenience. Wepresent each speaker with a logoplaque as a gesture of our appreci-ation. At times, we invite the speak-er out for dinner. We always ask thespeakers to provide us with theirpresentation (in pdf or ppt format),which we post on our Web site withother interesting presentations(ewh.ieee.org/r6/scv/ssc).

The tasks of our elected officersare described in IEEE bylaws. Wedetermined that, besides the fourelected officers, three other volun-teers are sufficient to run the chap-ter. It is essential to have an elec-tronic communications person

(Web master) to maintain our RSVPemail list and send periodic meet-ing announcements. The chapterhost (a Cadence employee)arranges access to the meeting’spremises. We would like to have athird volunteer, a hospitality chair,to organize publicity and orderrefreshments for the meetings. At

the moment we taketurns volunteering to fillthat task. Most adminis-trative matters are han-dled by email. Eventplanning is done at offi-cers’ meetings precedingor following the technicalmeetings and occasional-ly at other meetings thatare called as needed.

A great help in publicityis the San Francisco BayArea Council’s electronicCalendar & Newsletter(www.ieee-sfbac.org/ grid),where all our local chapter

events are posted. Until April 2004this was run by Doug Davolt (whorecently retired), the editor of ourlocal IEEE publication, GRID, for thelast two decades. Paul Wesling, aseasoned Web master, now runs thislocal, web-only GRID publication.

If we had the time and budget,we would organize Short Coursesand workshops, and assist with theISSCC and CICC conferences in ourlocal area. Last year we organized acourse to help job seekers retrainthemselves. We plan to have anRFIC design course for which Ihave drafted the contents. I needanother three or more volunteers toaccomplish this task.

Running a chapter, particularly onewith numerous members, is a task ofparamount importance. We areproud of our achievements and arevery satisfied to serve our profession-al community. Organizing the events,meeting the speakers, and network-ing with our peers in an elevated pro-fessional environment, which we cre-ate, is a wonderful endeavor!

Dan OpricaSanta Clara Valley Chapter [email protected]

Santa Clara Valley Chapter officers (left to right): Web master PerryChow, Chapter Chair Dan Oprica, Treasurer Eric Hoffman, SecretaryJune Song, and Host Jonathan David, the chapter founder. The ViceChair, Sorin Spanoche, was absent for the photo.