s32k148evb q176 revb sch-29644 - nxp semiconductors · 2020-03-04 · 5 5 4 4 3 3 2 2 1 1 d d c c b...

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Table of Contents

01 TITLE AND NOTES

Revisions

Rev Description

X4

Prototype

ApprovedDate

C U S T O M E R E V B

This schematic is provided for referencepurposes only. As such, NXP does not make anywarranty, implied or otherwise, as to thesuitability of circuit design or componentselection (type or value) used in theseschematics for hardware design using the NXPS32K family of Microprocessors. Customers usingany part of these schematics as a basis forhardware design, do so at their own risk andFreescale does not assume any liability for sucha hardware design.

Signals (ports) have not been routed via busses as this makes it harder to determinewhere each signal goes.

User notes are given throughtout the schematics.

3 Different test pointsused in design:

TPVx - Through Hole Padsmall

TPHx - Through Hile PadLarge (for standard 0.1"header). Also used on IOMatrix (IOMx)

TPX - Surface Mount WireLoop

Specific PCB LAYOUT notes are detailed in ITALICS

- All components and board processes are to be ROHS compliant- All connectors and headers are denoted Jx/Px and are 2.54mm pitch unless otherwise stated- All jumpers are denoted Jx. Jumpers are 2mm pitch- Jumper default positions are shown in the schematics. For 3 way jumpers, default is alwaysposn 1-2. 2 Pin jumpers generally have the "source" on pin 1.- All switches are denoted SWx- All test points (SMT wire loop style) are denoted TPx- Test point Vias (just through hole pads) are denoted TPVx

Notes:

C A U T I O N :

09 I/Os HEADERS

S32K148EVBQ144/Q176

03 S32K148 MCU

02 POWER SUPPLY / LIN / CAN

05 OPEN SDA

04 VOLTAGE TRANSLATORS

07 FLASH MEM

08 SAI AUDIO

06 ETHERNET

10 TOUCH

Designer

J.Sanchez

11 USER I/Os

A

Schematic

First ReleaseB

Drawing Title:

Size Document Number Rev

Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:

Automotive Product Group6501 William Cannon Drive WestAustin, TX 78735-8598

This document contains information proprietary to NXP and shall not be used for engineering design,procurement or manufacture in whole or in part without the express written permission of NXP Semiconductors.

ICAP Classification: CP: IUO: PUBI:

SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

B

Friday, February 02, 2018

TITLE

Jesus Sanchez

Juan Romero

Jesus Sanchez

1 11

____X____Drawing Title:


Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

B


TITLE

Jesus Sanchez

Juan Romero

Jesus Sanchez

1 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

B


TITLE

Jesus Sanchez

Juan Romero

Jesus Sanchez

1 11

____X____

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Masteroption

3.3V Switching Regulator

Input Voltage 5V, Output 3.3V at 1600mA

Layout note: follow IC datasheet recommandations forPCB layout and thermal dissipation

LIN1 InterfaceCAN /FD Interface

Test and reference points

Global Supply Jumpers and Power Selection

TX / RX

POKA-YOKE: Place both jumpers withthe same orientation and providesame airgap between their terminalsin a square fashion.

Buck/boostHS-CAN/dual LINsystem basis chip

Battery supplyinput for SMPS

SMPS outputvoltage

Bbootstrap capacitor

HVIO1-8Bidirectionalopen-drain low-sidedriver withintegrated pull-upresistance

ISO 11898-2:201x (upcoming merged ISO11898-2/5/6) compliant 1 Mbit/s high-speedCAN transceiver supporting CAN FD activecommunication up to 2 Mbit/s in the CANFD data field

Power LED Indicators

- LIN 2.x compliant- Compliant with SAE J2602- Downward compatible with LIN 1.3- Integrated LIN slave termination

- LIN 2.x compliant- Compliant with SAE J2602- Downward compatible with LIN 1.3- Integrated LIN slave termination

Masteroption

LIN2 Interface

TX / RX

POKA-YOKE: Place both jumpers withthe same orientation and providesame airgap between their terminalsin a square fashion.

TRACE

SBC_LIN1TX

SBC_LIN1RX

SBC_SPI_CS

SBC_SPI_CLK

SBC_SPI_MISO

SBC_SPI_MOSI

SBC_LIN2TX

SBC_LIN2RX

LowESR

LowESR

CAN Bus routed to I/OConnectors

LIN1and LIN2 Bus routed to I/OConnectors

LIN Bus 1

LIN Bus 2

SBC Wake-Up

VBAT VSUP

VBAT

VBAT

P5V0_V1SBC

VBAT

P3V3_SW

VCCA_LS_SBC

P5V0P3V3_SW VDD

VDD VDD_MCU VDD_MCU_PERH

VDD_MCU_PERH

VSUP

VSUP

VBAT

VSUP

P5V0_V1SBC

P5V0

P5V0

VDD

P3V3_SW

P5V0_V1SBC P5V_SDA_PSWP5V0

P5V0_V1SBC

PVEXT_SBC

PVEXT_SBC

P5V0_V2SBC

P5V0_V1SBC

VSUPVSUPP5V0_V2SBC

P5V0_V1SBC PVEXT_SBC

PTE4/TRACE_D1/FTM2_CH2/CAN0_RX/FXIO_D6page[3]PTE5/TCLK2/FTM2_CH3/CAN0_TX/FXIO_D7page[3]

PTA26/FTM5_CH1/LPSPI1_PCS0page[3,9]

PTA27/FTM5_CH2/LPSPI1_SOUT/LPUART0_TXpage[3,9]

PTA28/FTM5_CH3/LPSPI1_SCK/LPUART0_RXpage[3,9]

PTA29/FTM5_CH4/LPUART2_TX/LPSPI1_SINpage[3,9]

PTA8/LPUART2_RX/LPSPI2_SOUT/FXIO_D6/FTM3_FLT3page[3,9]PTA9/LPUART2_TX/LPSPI2_PCS0/FXIO_D7/FTM3_FLT2page[3,9]

SBC_HVIO1page[2]

SBC_HVIO1page[2]

LIN1_OUT page[9]LIN2_OUT page[9]

CANH_OUT page[9]CANL_OUT page[9]

PTE19/FTM7_CH7/FTM7_CH7/ADC1_SE25page[3,9]PTE20/FTM4_CH0/FTM4_CH0/ADC1_SE26page[3,9]

PTA5/TCLK1_2/RESETpage[3,4,5,9]

PTE19/FTM7_CH7/FTM7_CH7/ADC1_SE25_LS page[2]PTE20/FTM4_CH0/FTM4_CH0/ADC1_SE26_LS page[2]

PTE19/FTM7_CH7/FTM7_CH7/ADC1_SE25_LS page[2]PTE20/FTM4_CH0/FTM4_CH0/ADC1_SE26_LS page[2]

PTA2/LPUART0_RXpage[3,9]PTA3/LPUART0_TXpage[3,9]

Drawing Title:


Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

D

Thursday, March 01, 2018

I/O HEADERS

Jesus Sanchez

Juan Romero

Jesus Sanchez

2 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

D


I/O HEADERS

Jesus Sanchez

Juan Romero

Jesus Sanchez

2 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

D


I/O HEADERS

Jesus Sanchez

Juan Romero

Jesus Sanchez

2 11

____X____

R60 00603

U504

NTSX2102GU8H

VCCA1

A12

A23

GND4

VCCB8

B17

B26

OE5

R633 00603

TS11

1

TP502

C5130.1uF

R139 00402

R2262K

R126 00402

R512 00402

U500

NTSX2102GU8H

VCCA1

A12

A23

GND4

VCCB8

B17

B26

OE5

GND4

1

Q501MMBT3904TT1G

23

1

TP15

C5410UF

TPAD32

TP500

D5

PMEG6045ETP

AC

+ C1147uF

TP40

GND2

1

J12 HDR1X21 2

TP56

TS2

1

SW6

1 23 4

R149 00402

R517 00603

C5190.1uF

R154 00402

R543 00402

TP11

R12560

TP58

R554 00402

R13210.0K

TP503

TP10

U502

NTSX2102GU8H

VCCA1

A12

A23

GND4

VCCB8

B17

B26

OE5

JP1DNP

1

C4710UF

R537 00402

TP501

R52700603

TP51

R525 10.0K

J13HDR 1X4 RA

1234

TP59

R21500603

TPAD502

TPAD23

TS5

1

C600.1uF

R563 00402

TPAD2

C62DNP

R2762K U503

NTSX2102GU8H

VCCA1

A12

A23

GND4

VCCB8

B17

B26

OE5

R511 00402

DS1

ORANGE

AC

TP26

1

R536 00402

TP505

TP25

R520 00402

C290.01UF

+ C847uF

TPAD7

TP12

R134 00402

C5220.1uF

TPAD500

C1164700 PF

R135 00402

R203 00402

TPAD30

R9560

J18HDR TH 1X3

123

J8

HDR TH 1X3

123

C210.1uF

TP38

L8 22uH1 2

R534 00402

R129 00402

C5260.1uF

R1890

0603

TP34

L34.7uH

1 2

C4510UF

C2422uF10V

R131 00402

R13860.4

Q500MMBT3904TT1G

23

1

R921.0K1%

TP17

R550 00603

C5140.1uF

R535 00402

R4 00603

DNP

R124 00402

C15

4700 PF

TP24

TS7

1

R52310K

C52810UF

TP13

R127 00402

C65 DNP

R15310K

D9 PMEG3050EPA C

TP30

C300.1UF

C67 DNP

C63 4700 PF

TPAD501

C5710UF

C220.1uF

C260.1UF

U501

NTSX2102GU8H

VCCA1

A12

A23

GND4

VCCB8

B17

B26

OE5

R97 1.69K

TP5

1

R50000603

TP4

R519 00402

TS16

1

R334 10K

TP22

R180DNP

C5210.1uF

C140.1uF

R2792K

L2 330 OHM

1 2

TP16

R131.8K

R6320603 DNP

R150 00402

J9

CON PWR 3

1

23

SH

1S

H2

TP1

D500

PMEG6045ETP

A C

TP20

R177 00402

C7122uF

TPAD12

J7

HDR TH 1X3

123

C644700 PF

R21600603

DNP

C310.1uF

DS3

ORANGE

AC

TP3

R530 00402

C77220PF

R555 00402

C5150.1uF

R14010.0K

TP54

DS2

ORANGE

AC

C100.1uF

TPAD8

R204 00402

D4

PMEG3050EP

A C

R2252K

R59 00603

D7

AC

TP8

1

R526

0603DNP

GND3

1

R503 33K

R504 10.0K

TP41

C130.1uF

TP21

R106 00603

R564 00402

C5010.1UF

C120.1uF

TS15

1

J21 HDR1X21 2

C5120.1uF

R163 1.0K

TP39

J19

12

R53110.0K

TP45

TPAD20

TP504

R119 00402

GND5

1

TPAD17

R540 00402

C25100PF

C5200.1uF

R112 00402

TP9

R262 1.8K

C430.01UF

J14DNP

1 23 4

J17HDR 1X4 RA

1234

TPAD29

C58220PF

TPAD35

R528 00402

C20100PF

U507

NTSX2102GU8H

VCCA1

A12

A23

GND4

VCCB8

B17

B26

OE5

TS12

1

C69 4700 PF

TS10

1

TP47

TP14R130 00402

R93 1% DNP

C7022uF

R532 00402

D8 PMEG3050EPA C

J15DNP

1 23 4

657 8

R12560.4

R128 00402

TP28

TPAD505

U9

UJA1132HWF5V4

BA

TV

21

VEXT2V23

EN5 V1

6

SDI7

SDO8

SCK9

SCSN10

INTN111

RSTN12

INTN213

RXDL214 TXDL215

RXDL116 TXDL117

RXDC18 TXDC19

CANH21

CANL22

GN

D2

23

LIN124

LIN225

ADCCAP27

BATSENSE28

HVIO434 HVIO335 HVIO236 HVIO137

LIMP39

CAPB40 CAPA41

BOOTH142

L144

GN

DS

MP

S45

L246

BOOTH248

EP

AD

49

VC

AN

20

BA

T26

BA

TH

S1

38

BA

TS

MP

S43

VS

MP

S47

GN

D1

4

NC

_29

29

NC_3030

NC_3131

NC_3232

NC_3333

TP37

R542 00402

TP29

TPAD39

J11

HDR 1X4 RA

1234

TP7

+ C1647uF

TPAD15

R502 33K

R505 10.0K

U506

NTSX2102GU8H

VCCA1

A12

A23

GND4

VCCB8

B17

B26

OE5

AP1509-SG-13

U1

VIN1

OUT2

FB3

SD4

GN

D1

5

GN

D2

6

GN

D3

7

GN

D4

8

VBAT

LIN1

CAN_L

SPLIT

CAN_H

SBC_CANHSBC_CANL

SBC_LIN_OUT1

PTA27/FTM5_CH2/LPSPI1_SOUT/LPUART0_TX_LSPTA29/FTM5_CH4/LPUART2_TX/LPSPI1_SIN_LS

PTA26/FTM5_CH1/LPSPI1_PCS0_LSPTA28/FTM5_CH3/LPSPI1_SCK/LPUART0_RX_LS

PTA3/LPUART0_TX_LSPTA2/LPUART0_RX_LS

PTE5/CAN0_TX_LSPTE4/CAN0_RX_LS

VCCA_LS_SBC

PTA3/LPUART0_TX_LSPTA2/LPUART0_RX_LS

PTE5/CAN0_TX_LSPTE4/CAN0_RX_LS

PTA29/FTM5_CH4/LPUART2_TX/LPSPI1_SIN_LSPTA27/FTM5_CH2/LPSPI1_SOUT/LPUART0_TX_LS

PTA26/FTM5_CH1/LPSPI1_PCS0_LSPTA28/FTM5_CH3/LPSPI1_SCK/LPUART0_RX_LS

SBC_RESET

LIN2

PTA9/LPUART2_TXPTA8/LPUART2_RX

SBC_LIN_OUT2

SBC_EN

PTA9/LPUART2_TXPTA8/LPUART2_RX

LIN1LIN2

CAN_HCAN_L

LIN1_OUTLIN2_OUT

CANH_OUTCANL_OUT

SBC_OE

SBC_LIMP

SBC_RESET

VC

AN

_S

BC

SBC_HVIO1SBC_HVIO2

SBC_HVIO8SBC_HVIO7SBC_HVIO6SBC_HVIO5SBC_HVIO3

SBC_HVIO4

SBC_HVIO8SBC_HVIO7SBC_HVIO6SBC_HVIO5SBC_HVIO4SBC_HVIO3

SBC_LIMPSBC_ENSBC_HVIO1SBC_HVIO2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

XTAL

S32K148 Microcontroller144pins LQFP

S32K148 Microcontroller176pins LQFP

S32K148 Debugg Connector20-pin Cortex Debug D ETM connector

ENET_SPI_MOSI

ENET_SPI_MOSI

ENET_SPI_SCK

ENET_SPI_SCK

ENET_SPI_CS0

ENET_SPI_CS1

ENET_SPI_CS1

ENET_SPI_CS2

ENET_SPI_CS2

ENET_SPI_MISO

ENET_SPI_MISO

ENET_I2C_SDA

ENET_I2C_SDA

ENET_I2C_SCL

SAI

SAI

SAI

SAI

SAI

SAI

SAI

SAI

SAI

SAI

SAI

SAI

TRACE

TRACE

TRACE

TRACE

TRACE

TRACE

TRACE

TRACE

TRACE

TRACE

TRACE

TRACE

TRACE

JTAG

JTAG

JTAG

JTAG

JTAG

JTAG

JTAG

JTAG

JTAG

JTAG

JTAG

JTAG

SBC

SBC

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

TOUCH

TOUCH

TOUCH

TOUCH

TOUCH

TOUCH

TOUCH

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

TOUCH

SBC_SPI_CS

SBC_SPI_CS

SBC_SPI_CLK

SBC_SPI_CLK

SBC_SPI_MISO

SBC_SPI_MISO

SBC_SPI_MOSI

SBC_SPI_MOSI

SBC_LIN2RX

SBC_LIN2TX

SBC_LIN2RX

SBC_LIN2TX

ENET QSPI

VDDA_MCU

VDD_MCU

VDDA_MCUVDD_MCU

VDD_MCU_PERH

PTA4/CMP0_OUT/JTAG_TMS/SWD_DIO page[3,5]PTC4/FTM1_CH0/RTC_CLKOUT/JTAG_TCLK/SWD_CLK page[3,5]PTA10/FTM1_CH4/FXIO_D0/JTAG_TDO page[3]PTC5/FTM2_CH0/RTC_CLKOUT/JTAG_TDI page[3]PTA5/TCLK1_2/RESET page[2,3,4,5,9]

PTB7_EXTALpage[3]PTB6_XTALpage[3]

PTA0/ACMP0_IN0/ADC0_SE0page[9]

PTA15/FTM1_CH2/ADC1_SE12page[9]



PTA11/FTM1_CH5/FXIO_D1/CMP0_RRT/SAI0_SYNCpage[3,8,9]

PTA26/FTM5_CH1/LPSPI1_PCS0page[2,3,9]PTA27/FTM5_CH2/LPSPI1_SOUT/LPUART0_TXpage[2,3,9]

PTA28/FTM5_CH3/LPSPI1_SCK/LPUART0_RXpage[2,3,9]PTA29/FTM5_CH4/LPUART2_TX/LPSPI1_SINpage[2,3,9]

PTA5/TCLK1_2/RESETpage[2,3,4,5,9]

PTA17/FTM0_CH6/ENET_RESETpage[3,4,9]

PTA8/LPUART2_RX/LPSPI2_SOUT/FXIO_D6/FTM3_FLT3page[2,3,9]PTA9/LPUART2_TX/LPSPI2_PCS0/FXIO_D7/FTM3_FLT2page[2,3,9]

PTA4/CMP0_OUT/JTAG_TMS/SWD_DIOpage[3,5]

PTA2/LPUART0_RXpage[2,3,9]PTA3/LPUART0_TXpage[2,3,9]

PTA10/FTM1_CH4/FXIO_D0/JTAG_TDOpage[3]

PTA12/FTM1_CH6/CAN1_RX/LPI2C1_SDAS/SAI0_BCLKpage[3,8,9]

PTB12/FTM0_CH0/FTM3_FLT2/CAN2_RXpage[3,9]PTB13/FTM0_CH1/FTM3_FLT1/CAN2_TXpage[3,9]

PTB9/FTM3_CH1/LPI2C0_SCLSpage[3,6,8,9]PTB10/FTM3_CH2/LPI2C0_SDASpage[3,6,8,9]

PTB4/MII_RMII_MDIO/QSPI_B_IO0page[3,4]PTB5/MII_RMII_MDCpage[3,4]

PTB0/SBC_LPSPI0_PCS0page[3,9]PTB1/LPSPI0_SOUTpage[3,9]

PTB3/LPSPI0_SINpage[3,9]PTB2/LPSPI0_SCKpage[3,9]

PTB20/FTM6_CH0/ADC0_SE17page[3,4,9]PTB21/FTM6_CH1/ADC0_SE18page[3,9]

PTC27/FTM4_CH4/FTM4_CH4/ADC0_SE27page[3,9]PTC28/FTM4_CH7/FTM4_CH7/ADC0_SE28page[9]PTC29/FTM5_CH2/FTM5_CH2/ADC0_SE29page[3,9]

PTC30/FTM5_CH4/FXIO_D0/LPI2C1_SDAS/FXIO_D0/ADC0_SE30page[3,8,9]PTC31/FTM5_CH6/FXIO_D1/LPI2C1_SDA/FXIO_D1/ADC0_SE31page[3,8,9]

PTC6/LPUART1_RX/CAN1_RX/FTM3_CH2page[3,5,9]PTC7/LPUART1_TX/CAN1_TX/FTM3_CH3page[3,5,9]

PTC17/MII_RMII_RX_DV/QSPI_B_IO6page[3,4]

PTC16/MII_RMII_RX_ER/QSPI_B_IO7page[3,4]

PTC2/MII_RMII_TXD0/QSPI_A_IO3page[3,4]PTC1/MII_RMII_RXD0/QSPI_B_SCKpage[3,4]

PTC0/MII_RMII_RXD1/QSPI_B_RWDSpage[3,4]

PTC15/FTM1_CH3/LPSPI2_SCK/QSPI_B_CSpage[3,9]

PTC3/MII_TX_ER/QSPI_A_CS/QSPI_B_IO3page[3,4]

PTC12/FTM3_CH6/FTM2_CH6/LPUART2_CTSpage[9]PTC13/FTM3_CH7/FTM2_CH7/LPUART2_RTSpage[9]

PTC14/FTM1_CH2/LPSPI2_PCS0/ADC0_SE12page[3,9]

PTC4/FTM1_CH0/RTC_CLKOUT/JTAG_TCLK/SWD_CLKpage[3,5]

PTC8/LPUART1_RXpage[3,5,9]PTC9/LPUART1_TXpage[3,5,9]

PTC5/FTM2_CH0/RTC_CLKOUT/JTAG_TDIpage[3]

PTE19/FTM7_CH7/FTM7_CH7/ADC1_SE25 page[2,3,9]PTE20/FTM4_CH0/FTM4_CH0/ADC1_SE26 page[2,3,9]PTE21/FTM4_CH1/FTM4_CH1/ADC1_SE27 page[9]PTE22/FTM4_CH2/FTM4_CH2/ADC1_SE28 page[9]PTE23/FTM4_CH3/FTM4_CH3/ADC1_SE29 page[9]PTE24/FTM4_CH4/CAN2_TX/FTM4_CH4/ADC1_SE30 page[3,9]PTE25/FTM4_CH5/CAN2_RX/CAN2_RX/FTM4_CH5/ADC1_SE31 page[3,9]

PTE0/LPSPI0_SCK/TCLK1/LPI2C1_SDA/SAI0_D2 page[3,8,9]PTE1/LPSPI0_SIN/LPI2C0_HREQ/LPI2C1_SCL/SAI0_D1 page[3,8,9]

PTE4/TRACE_D1/FTM2_CH2/CAN0_RX/FXIO_D6 page[2,3]PTE5/TCLK2/FTM2_CH3/CAN0_TX/FXIO_D7 page[2,3]

PTD22/FTM6_CH3/FTM6_CH3/ADC1_SE18 page[3,9]PTD23/FTM6_CH4/FTM6_CH4/ADC1_SE19 page[3,9]PTD24/FTM6_CH5/FTM6_CH5/ADC1_SE20 page[3,9]

PTD4/FTM0_FLT3/ADC1_SE6 page[3,9]

PTD1/FTM0_CH3/LPSPI1_SIN/FTM2_CH1/SAI0_MCLK page[3,8,9]

PTD10/MII_RX_CLK/QSPI_A_SCK page[3,4]

PTD6/MII_TXD2/QSPI_B_IO1 page[3,4]PTD5/MII_TXD3/QSPI_B_IO2 page[3,4]

PTD9/MII_RXD2/QSPI_B_IO4 page[3,4]PTD8/MII_RXD3/QSPI_B_IO5 page[3,4]

PTD7/MII_RMII_TXD1//QSPI_A_IO1 page[3,4]

PTD12/MII_RMII_TX_EN/QSPI_A_IO2 page[3,4]PTD11/MII_RMII_TX_CLK/QSPI_A_IO0 page[3,4]

PTD27/FTM7_CH0/FTM7_CH0/ADC1_SE21 page[3,9]PTD28/FTM7_CH1/FTM7_CH1/ADC1_SE22 page[3,9]PTD29/FTM7_CH2/FTM7_CH2/ADC1_SE23 page[3,6,9]PTD30/FTM7_CH3/FTM6_FLT1/ADC1_SE24 page[3,9]


PTA30/FTM5_CH5page[3,9]PTA31/FTM5_CH6page[3,9]

PTB25/FTM6_CH5/LPSPI2_PCS0/ADC0_SE21page[3,6,9]PTB27/FTM6_CH7/LPSPI2_SOUT/ADC0_SE22page[3,6,9]

PTB28/FTM7_CH0/LPSPI2_SIN/ADC0_SE23page[3,6,9]PTB29/FTM7_CH1/LPSPI2_SCK/ADC0_SE24page[3,6,9]

PTC10/FTM3_CH4/TRGMUX_IN11page[3,9]PTC11/FTM3_CH5/FTM4_CH2/TRGMUX_IN10page[3,9]

PTC19/FTM7_CH5/ADC0_SE25page[3,9]PTC23/LPSPI0_SCK/ADC0_SE26page[3,9]

PTB14/FTM0_CH2/LPSPI1_SCK/ADC1_SE9/ADC0_SE9page[3,9]PTB15/FTM0_CH3/LPSPI1_SIN/ADC1_SE14page[3,9]

PTB16/FTM0_CH4/LPSPI1_SOUT/ADC1_SE15page[9]

PTB22/FTM6_CH2/MII_CRS/LPUART1_TX/ADC0_SE19page[3,9]PTB23/FTM6_CH3/LPUART1_RX/MII_COL/ADC0_SE20page[3,9]

PTA6/FTM0_FLT1page[3,9]PTA7/FTM0_FLT2page[3,9]

PTA25/FTM5_CH0page[3,4,9]

PTB11/FTM3_CH3/LPI2C0_HREQpage[3,9]

PTB17/FTM0_CH5/LPSPI1_PCS3/FTM5_FLT1page[3,9]PTB18/FTM5_CH7/LPSPI1_PCS1/ADC0_SE16page[3,9]

PTE15/LPSPI2_SCK/FTM2_CH6/FTM4_FLT1/FXIO_D2 page[3,8,9]PTE16/LPSPI2_SIN/FTM2_CH7/FTM4_FLT0/FXIO_D3 page[3,8,9]

PTD2/FTM3_CH4/LPSPI1_SOUT/FXIO_D4/FXIO_D6/ADC1_SE2 page[3,9]PTD3/FTM3_CH5/LPSPI1_PCS0/FXIO_D5/FXIO_D7/ADC1_SE3 page[3,9]

PTD18/FTM5_CH7/FXIO_D2/LPI2C1_SCLS/ADC1_SE16 page[3,8,9]PTD19/FTM6_CH0/FXIO_D3/LPI2C1_SCL/ADC1_SE17 page[3,8,9]

PTA13/FTM1_CH7/FTM2_QD_PHA/SAI0_D0page[3,8,9]PTA14/FTM0_FLT0/FTM3_FLT1/SAI0_D3page[3,8,9]

PTE2/LPSPI0_SOUT/FTM3_CH6/SAI1_SYNC/ADC1_SE10 page[3,8,9]PTE3/FTM0_FLT0/FTM2_FLT0/CMP0_OUT page[3,9]

PTD13/FTM2_CH4/LPUART1_RX/ENET_TMR1/RTC_CLKOUT page[3,8,9]PTD14/FTM2_CH5/LPUART1_TX/ENET_TMR0/CLKOUT page[3,8,9]PTD15/FTM0_CH0/TRACE_D3/LPSPI0_SCK/ENET_TMR2 page[3,8,9]PTD16/FTM0_CH1/TRACE_D2/LPSPI0_SIN/TRACE_CLKOUT page[3,9]PTD17/FTM0_FLT2/LPUART2_RX/FTM5_FLT1 page[3,9]

PTE10/CLKOUT/LPSPI2_PCS1/FTM2_CH4/FXIO_D4 page[3,6,8,9]PTE11/FTM2_CH5/FXIO_D5 page[3,8,9]

PTE6/LPSPI0_PCS2/FTM7_FLT1/FTM3_CH7/LPUART1_RTS/ADC1_SE11 page[3,9]PTE7/FTM0_CH7/FTM3_FLT0 page[3,9]PTE8/FTM0_CH6/MII_RMII_MDC/CMP0_IN3 page[3,9]PTE9/FTM0_CH7/LPUART2_CTS/ENET_TMR3 page[3,8,9]

PTE12/FTM0_FLT3/LPUART2_TX/FTM5_FLT0 page[3,9]PTE13/FTM4_CH5/LPSPI2_PCS2/FTM2_FLT0 page[3,6,9]PTE14/FTM0_FLT1/FTM2_FLT1 page[3,9]

PTD0/FTM0_CH2/FTM2_CH0/TRACE_D0/FXIO_D0 page[3,9]

PTB8/FTM3_CH0/SAI1_BCLKpage[3,8,9]

LED_RED page[11]LED_GREEN page[11]LED_BLUE page[11]

PTC12/BTN0page[11]PTC13/BTN1page[11]


PTA30/FTM5_CH5page[3,9]PTA31/FTM5_CH6page[3,9]

PTB25/FTM6_CH5/LPSPI2_PCS0/ADC0_SE21page[3,6,9]

PTB27/FTM6_CH7/LPSPI2_SOUT/ADC0_SE22page[3,6,9]PTB28/FTM7_CH0/LPSPI2_SIN/ADC0_SE23page[3,6,9]

PTB29/FTM7_CH1/LPSPI2_SCK/ADC0_SE24page[3,6,9]

PTC10/FTM3_CH4/TRGMUX_IN11page[3,9]PTC11/FTM3_CH5/FTM4_CH2/TRGMUX_IN10page[3,9]

PTC19/FTM7_CH5/ADC0_SE25page[3,9]

PTC23/LPSPI0_SCK/ADC0_SE26page[3,9]

PTB14/FTM0_CH2/LPSPI1_SCK/ADC1_SE9/ADC0_SE9page[3,9]PTB15/FTM0_CH3/LPSPI1_SIN/ADC1_SE14page[3,9]

PTB22/FTM6_CH2/MII_CRS/LPUART1_TX/ADC0_SE19page[3,9]PTB23/FTM6_CH3/LPUART1_RX/MII_COL/ADC0_SE20page[3,9]

PTA6/FTM0_FLT1page[3,9]PTA7/FTM0_FLT2page[3,9]

PTA25/FTM5_CH0page[3,4,9]

PTB11/FTM3_CH3/LPI2C0_HREQpage[3,9]

PTB17/FTM0_CH5/LPSPI1_PCS3/FTM5_FLT1page[3,9]PTB18/FTM5_CH7/LPSPI1_PCS1/ADC0_SE16page[3,9]

PTA13/FTM1_CH7/FTM2_QD_PHA/SAI0_D0page[3,8,9]PTA14/FTM0_FLT0/FTM3_FLT1/SAI0_D3page[3,8,9]

PTB8/FTM3_CH0/SAI1_BCLKpage[3,8,9]

PTA11/FTM1_CH5/FXIO_D1/CMP0_RRT/SAI0_SYNCpage[3,8,9]

PTA26/FTM5_CH1/LPSPI1_PCS0page[2,3,9]PTA27/FTM5_CH2/LPSPI1_SOUT/LPUART0_TXpage[2,3,9]

PTA28/FTM5_CH3/LPSPI1_SCK/LPUART0_RXpage[2,3,9]PTA29/FTM5_CH4/LPUART2_TX/LPSPI1_SINpage[2,3,9]

PTA5/TCLK1_2/RESETpage[2,3,4,5,9]

PTA17/FTM0_CH6/ENET_RESETpage[3,4,9]

PTA8/LPUART2_RX/LPSPI2_SOUT/FXIO_D6/FTM3_FLT3page[2,3,9]PTA9/LPUART2_TX/LPSPI2_PCS0/FXIO_D7/FTM3_FLT2page[2,3,9]

PTA4/CMP0_OUT/JTAG_TMS/SWD_DIOpage[3,5]

PTA2/LPUART0_RXpage[2,3,9]PTA3/LPUART0_TXpage[2,3,9]

PTA10/FTM1_CH4/FXIO_D0/JTAG_TDOpage[3]

PTA12/FTM1_CH6/CAN1_RX/LPI2C1_SDAS/SAI0_BCLKpage[3,8,9]

PTB12/FTM0_CH0/FTM3_FLT2/CAN2_RXpage[3,9]PTB13/FTM0_CH1/FTM3_FLT1/CAN2_TXpage[3,9]

PTB9/FTM3_CH1/LPI2C0_SCLSpage[3,6,8,9]PTB10/FTM3_CH2/LPI2C0_SDASpage[3,6,8,9]

PTB4/MII_RMII_MDIO/QSPI_B_IO0page[3,4]PTB5/MII_RMII_MDCpage[3,4]

PTB0/SBC_LPSPI0_PCS0page[3,9]PTB1/LPSPI0_SOUTpage[3,9]

PTB3/LPSPI0_SINpage[3,9]PTB2/LPSPI0_SCKpage[3,9]

PTB20/FTM6_CH0/ADC0_SE17page[3,4,9]PTB21/FTM6_CH1/ADC0_SE18page[3,9]

PTC27/FTM4_CH4/FTM4_CH4/ADC0_SE27page[3,9]

PTC29/FTM5_CH2/FTM5_CH2/ADC0_SE29page[3,9]PTC30/FTM5_CH4/FXIO_D0/LPI2C1_SDAS/FXIO_D0/ADC0_SE30page[3,8,9]PTC31/FTM5_CH6/FXIO_D1/LPI2C1_SDA/FXIO_D1/ADC0_SE31page[3,8,9]

PTC6/LPUART1_RX/CAN1_RX/FTM3_CH2page[3,5,9]PTC7/LPUART1_TX/CAN1_TX/FTM3_CH3page[3,5,9]

PTC17/MII_RMII_RX_DV/QSPI_B_IO6page[3,4]

PTC16/MII_RMII_RX_ER/QSPI_B_IO7page[3,4]

PTC2/MII_RMII_TXD0/QSPI_A_IO3page[3,4]PTC1/MII_RMII_RXD0/QSPI_B_SCKpage[3,4]

PTC0/MII_RMII_RXD1/QSPI_B_RWDSpage[3,4]

PTC15/FTM1_CH3/LPSPI2_SCK/QSPI_B_CSpage[3,9]

PTC3/MII_TX_ER/QSPI_A_CS/QSPI_B_IO3page[3,4]PTC4/FTM1_CH0/RTC_CLKOUT/JTAG_TCLK/SWD_CLKpage[3,5]

PTC8/LPUART1_RXpage[3,5,9]PTC9/LPUART1_TXpage[3,5,9]

PTC5/FTM2_CH0/RTC_CLKOUT/JTAG_TDIpage[3]

PTE15/LPSPI2_SCK/FTM2_CH6/FTM4_FLT1/FXIO_D2 page[3,8,9]PTE16/LPSPI2_SIN/FTM2_CH7/FTM4_FLT0/FXIO_D3 page[3,8,9]

PTD2/FTM3_CH4/LPSPI1_SOUT/FXIO_D4/FXIO_D6/ADC1_SE2 page[3,9]PTD3/FTM3_CH5/LPSPI1_PCS0/FXIO_D5/FXIO_D7/ADC1_SE3 page[3,9]

PTD18/FTM5_CH7/FXIO_D2/LPI2C1_SCLS/ADC1_SE16 page[3,8,9]PTD19/FTM6_CH0/FXIO_D3/LPI2C1_SCL/ADC1_SE17 page[3,8,9]

PTE2/LPSPI0_SOUT/FTM3_CH6/SAI1_SYNC/ADC1_SE10 page[3,8,9]PTE3/FTM0_FLT0/FTM2_FLT0/CMP0_OUT page[3,9]

PTD13/FTM2_CH4/LPUART1_RX/ENET_TMR1/RTC_CLKOUT page[3,8,9]PTD14/FTM2_CH5/LPUART1_TX/ENET_TMR0/CLKOUT page[3,8,9]PTD15/FTM0_CH0/TRACE_D3/LPSPI0_SCK/ENET_TMR2 page[3,8,9]PTD16/FTM0_CH1/TRACE_D2/LPSPI0_SIN/TRACE_CLKOUT page[3,9]PTD17/FTM0_FLT2/LPUART2_RX/FTM5_FLT1 page[3,9]

PTE10/CLKOUT/LPSPI2_PCS1/FTM2_CH4/FXIO_D4 page[3,6,8,9]PTE11/FTM2_CH5/FXIO_D5 page[3,8,9]

PTE6/LPSPI0_PCS2/FTM7_FLT1/FTM3_CH7/LPUART1_RTS/ADC1_SE11 page[3,9]PTE7/FTM0_CH7/FTM3_FLT0 page[3,9]PTE8/FTM0_CH6/MII_RMII_MDC/CMP0_IN3 page[3,9]PTE9/FTM0_CH7/LPUART2_CTS/ENET_TMR3 page[3,8,9]

PTE12/FTM0_FLT3/LPUART2_TX/FTM5_FLT0 page[3,9]PTE13/FTM4_CH5/LPSPI2_PCS2/FTM2_FLT0 page[3,6,9]PTE14/FTM0_FLT1/FTM2_FLT1 page[3,9]


PTE19/FTM7_CH7/FTM7_CH7/ADC1_SE25 page[2,3,9]PTE20/FTM4_CH0/FTM4_CH0/ADC1_SE26 page[2,3,9]

PTE24/FTM4_CH4/CAN2_TX/FTM4_CH4/ADC1_SE30 page[3,9]PTE25/FTM4_CH5/CAN2_RX/CAN2_RX/FTM4_CH5/ADC1_SE31 page[3,9]

PTE0/LPSPI0_SCK/TCLK1/LPI2C1_SDA/SAI0_D2 page[3,8,9]PTE1/LPSPI0_SIN/LPI2C0_HREQ/LPI2C1_SCL/SAI0_D1 page[3,8,9]

PTE4/TRACE_D1/FTM2_CH2/CAN0_RX/FXIO_D6 page[2,3]PTE5/TCLK2/FTM2_CH3/CAN0_TX/FXIO_D7 page[2,3]

PTD22/FTM6_CH3/FTM6_CH3/ADC1_SE18 page[3,9]PTD23/FTM6_CH4/FTM6_CH4/ADC1_SE19 page[3,9]PTD24/FTM6_CH5/FTM6_CH5/ADC1_SE20 page[3,9]

PTD4/FTM0_FLT3/ADC1_SE6 page[3,9]

PTD1/FTM0_CH3/LPSPI1_SIN/FTM2_CH1/SAI0_MCLK page[3,8,9]

PTD10/MII_RX_CLK/QSPI_A_SCK page[3,4]

PTD6/MII_TXD2/QSPI_B_IO1 page[3,4]PTD5/MII_TXD3/QSPI_B_IO2 page[3,4]

PTD9/MII_RXD2/QSPI_B_IO4 page[3,4]PTD8/MII_RXD3/QSPI_B_IO5 page[3,4]

PTD7/MII_RMII_TXD1//QSPI_A_IO1 page[3,4]

PTD12/MII_RMII_TX_EN/QSPI_A_IO2 page[3,4]PTD11/MII_RMII_TX_CLK/QSPI_A_IO0 page[3,4]

PTD27/FTM7_CH0/FTM7_CH0/ADC1_SE21 page[3,9]PTD28/FTM7_CH1/FTM7_CH1/ADC1_SE22 page[3,9]PTD29/FTM7_CH2/FTM7_CH2/ADC1_SE23 page[3,6,9]PTD30/FTM7_CH3/FTM6_FLT1/ADC1_SE24 page[3,9]

ADC_POTpage[3,11]

PTE4/TRACE_D1/FTM2_CH2/CAN0_RX/FXIO_D6 page[2,3]

PTD16/FTM0_CH1/TRACE_D2/LPSPI0_SIN/TRACE_CLKOUT page[3,9]

PTB30/FTM7_CH2page[9]PTB31/FTM7_CH3page[9]

PTB19/FTM5_CH7page[9]



PTA18/FTM4_CH0/LPUART1_TX/LPSPI1_SOUT/FTM6_CH0page[9]PTA19/FTM4_CH1/LPUART1_RX/LPSPI1_SCKpage[9]

PTA20/FTM4_CH2/LPSPI1_SINpage[9]PTA21/FTM4_CH3/FXIO_D0/LPSPI1_PCS0page[9]PTA22/FTM4_CH4/FXIO_D1/LPSPI1_PCS1page[9]

PTA23/FTM4_CH6/FXIO_D2page[9]PTA24/FTM4_CH7/FXIO_D3page[9]

PTC18/FTM7_CH4page[9]

PTC20/FTM7_CH6page[9]PTC21/FTM7_CH7/FTM7_FLT0page[9]

PTC22/FTM7_FLT1page[9]

PTC24/FTM4_CH0page[9]PTC25/FTM4_CH1page[9]PTC26/FTM4_CH3page[9]

VREFH page[9]

PTE26/FTM4_CH6 page[9]PTE27/FTM4_CH7 page[9]


PTD11/MII_RMII_TX_CLK/QSPI_A_IO0 page[3,4]

PTD15/FTM0_CH0/TRACE_D3/LPSPI0_SCK/ENET_TMR2 page[3,8,9]

PTC14/FTM1_CH2/LPSPI2_PCS0/ADC0_SE12page[3,9]

PTE17/FTM7_CH5/FXIO_D5 page[9]PTE18/FTM7_CH6/FXIO_D4 page[9]

PTD20/FTM6_CH1 page[9]PTD21/FTM6_CH2 page[9]

PTD25/FTM6_CH6 page[9]PTD26/FTM6_CH7/FXIO_D7 page[9]

PTD31/FTM7_CH4/FXIO_D6/FTM6_FLT0 page[9]

TOUCH_ADC0_Apage[10]TOUCH_ADC1_Apage[10]

TOUCH_ADC0_Bpage[10]TOUCH_ADC1_Bpage[10]

ADC_POTpage[3,11]

Drawing Title:


Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

E


I/O HEADERS

Jesus Sanchez

Juan Romero

Jesus Sanchez

3 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

E


I/O HEADERS

Jesus Sanchez

Juan Romero

Jesus Sanchez

3 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

E


I/O HEADERS

Jesus Sanchez

Juan Romero

Jesus Sanchez

3 11

____X____

R515 00402

C312PF

C500.1uF

R583 00402

C71000pF

R205 00402

R193 00402

FS32K148UAT0VLQT

U7E

PTE0/LPSPI0_SCK/TCLK1/LPI2C1_SDA/LPSPI1_SOUT/FTM1_FLT2/SAI0_D2138

PTE1/LPSPI0_SIN/LPI2C0_HREQ/LPI2C1_SCL/LPSPI1_PCS0/FTM1_FLT1/SAI0_D1137

PTE2/LPSPI0_SOUT/LPTMR0_ALT3/FTM3_CH6/LPUART1_CTS/SAI1_SYNC/ADC1_SE10122

PTE3/FTM0_FLT0/LPUART2_RTS/FTM2_FLT0/TRGMUX_IN6/CMP0_OUT21

PTE4/TRACE_D1/FTM2_QD_PHB/FTM2_CH2/CAN0_RX/FXIO_D6/EWM_OUT9

PTE5/TCLK2/FTM2_QD_PHA/FTM2_CH3/CAN0_TX/FXIO_D7/EWM_IN8

PTE6/LPSPI0_PCS2/FTM7_FLT1/FTM3_CH7/LPUART1_RTS/ADC1_SE11121

PTE7/FTM0_CH7/FTM3_FLT087

PTE8/FTM0_CH6/MII_RMII_MDC/CMP0_IN339

PTE9/FTM0_CH7/LPUART2_CTS/ENET_TMR330

PTE10/CLKOUT/LPSPI2_PCS1/FTM2_CH4/FXIO_D4/TRGMUX_OUT46

PTE11/LPSPI2_PCS0/LPTMR0_ALT1/FTM2_CH5/FXIO_D5/TRGMUX_OUT55

PTE12/FTM0_FLT3/LPUART2_TX/FTM5_FLT023

PTE13/FTM4_CH5/LPSPI2_PCS2/FTM2_FLT07

PTE14/FTM0_FLT1/FTM2_FLT120

PTE15/LPUART1_CTS/LPSPI2_SCK/FTM2_CH6/FTM4_FLT1/FXIO_D2/TRGMUX_OUT62

PTE16/LPUART1_RTS/LPSPI2_SIN/FTM2_CH7/FTM4_FLT0/FXIO_D3/TRGMUX_OUT71

PTE19/FTM7_CH7/ADC1_SE25125





PTE24/FTM4_CH4/CAN2_TX/ADC1_SE30132

PTE25/FTM4_CH5/CAN2_RX/ADC1_SE31133

C5241000pF

C441000pF

R538 00402

L1

30 OHMFER_BEAD

R51810K

C5070.1uF

C731000pF

FS32K148UAT0VLUT

U8D

PTD0/FTM0_CH2/LPSPI1_SCK/FTM2_CH0/TRACE_D0/FXIO_D0/TRGMUX_OUT18

PTD1/FTM0_CH3/LPSPI1_SIN/FTM2_CH1/SAI0_MCLK/FXIO_D1/TRGMUX_OUT27

PTD2/FTM3_CH4/LPSPI1_SOUT/FXIO_D4/FXIO_D6/TRGMUX_IN5/ADC1_SE2123

PTD3/FTM3_CH5/LPSPI1_PCS0/FXIO_D5/FXIO_D7/TRGMUX_IN4/NMI/ADC1_SE3122

PTD4/FTM0_FLT3/FTM3_FLT3/ADC1_SE6121

PTD5/FTM2_CH3/LPTMR0_ALT2/FTM2_FLT1/MII_TXD3/TRGMUX_IN7/QSPI_B_IO254

PTD6/LPUART2_RX/FTM2_FLT2/MII_TXD2/QSPI_B_IO1/CMP0_IN753

PTD7/LPUART2_TX/FTM2_FLT3/MII_RMII_TXD1/TRACE_D0/QSPI_A_IO1/CMP0_IN652

PTD8/LPI2C1_SDA/MII_RXD3/FTM2_FLT2/FXIO_D1/FTM1_CH4/QSPI_B_IO563

PTD9/LPI2C1_SCL/FXIO_D0/FTM2_FLT3/MII_RXD2/FTM1_CH5/QSPI_B_IO462

PTD10/FTM2_CH0/FTM2_QD_PHB/TRACE_D3/MII_RX_CLK/CLKOUT/QSPI_A_SCK57

PTD11/FTM2_CH1/FTM2_QD_PHA/TRACE_D2/MII_RMII_TX_CLK/LPUART2_CTS/QSPI_A_IO056

PTD12/FTM2_CH2/LPI2C1_HREQ/TRACE_D1/MII_RMII_TX_EN/LPUART2_RTS/QSPI_A_IO255

PTD13/FTM2_CH4/LPUART1_RX/ENET_TMR1/RTC_CLKOUT42

PTD14/FTM2_CH5/LPUART1_TX/ENET_TMR0/CLKOUT41

PTD15/FTM0_CH0/TRACE_D3/LPSPI0_SCK/ENET_TMR236

PTD16/FTM0_CH1/TRACE_D2/LPSPI0_SIN/CMP0_RRT/TRACE_CLKOUT35

PTD17/FTM0_FLT2/LPUART2_RX/FTM5_FLT132

PTD18/FTM5_CH7/FXIO_D2/LPI2C1_SCLS/ADC1_SE16107

PTD19/FTM6_CH0/FXIO_D3/LPI2C1_SCL/ADC1_SE17108

PTD20/FTM6_CH1113

PTD21/FTM6_CH2117

PTD22/FTM6_CH3/ADC1_SE18120



PTD25/FTM6_CH6132

PTD26/FTM6_CH7/FXIO_D7134




PTD30/FTM7_CH3/FTM6_FLT1/ADC1_SE24141

PTD31/FTM7_CH4/FXIO_D6/FTM6_FLT0142

C5050.1uF

R114 00402

R561 00402

C61000pF

D1DNP

12

TPAD44

C231000pF

R246 00402

R90DNP

R122 00402

R516 00402

FS32K148UAT0VLUT

U8B

PTB0/LPUART0_RX/LPSPI0_PCS0/LPTMR0_ALT3/CAN0_RX/FTM4_CH6/ADC0_SE4/ADC1_SE1497

PTB1/LPUART0_TX/LPSPI0_SOUT/TCLK0/CAN0_TX/FTM4_CH5/ADC0_SE5/ADC1_SE1596

PTB2/FTM1_CH0/LPSPI0_SCK/FTM1_QD_PHB/TRGMUX_IN3/ADC0_SE678

PTB3/FTM1_CH1/LPSPI0_SIN/FTM1_QD_PHA/TRGMUX_IN2/ADC0_SE773

PTB4/FTM0_CH4/LPSPI0_SOUT/MII_RMII_MDIO/TRGMUX_IN1/QSPI_B_IO049

PTB5/FTM0_CH5/LPSPI0_PCS1/LPSPI0_PCS0/CLKOUT/TRGMUX_IN0/MII_RMII_MDC48

PTB6/LPI2C0_SDA/XTAL25

PTB7/LPI2C0_SCL/EXTAL24

PTB8/FTM3_CH0/SAI1_BCLK136

PTB9/FTM3_CH1/LPI2C0_SCLS/SAI1_D0133

PTB10/FTM3_CH2/LPI2C0_SDAS/SAI1_MCLK131

PTB11/FTM3_CH3/LPI2C0_HREQ128

PTB12/FTM0_CH0/FTM3_FLT2/CAN2_RX/FTM6_FLT1/ADC1_SE7119

PTB13/FTM0_CH1/FTM3_FLT1/CAN2_TX/FTM6_FLT0/ADC1_SE8/ADC0_SE8118

PTB14/FTM0_CH2/LPSPI1_SCK/ADC1_SE9/ADC0_SE9116

PTB15/FTM0_CH3/LPSPI1_SIN/ADC1_SE14115

PTB16/FTM0_CH4/LPSPI1_SOUT/ADC1_SE15114

PTB17/FTM0_CH5/LPSPI1_PCS3/FTM5_FLT1112

PTB18/FTM5_CH7/LPSPI1_PCS1/ADC0_SE1643

PTB19/FTM5_CH744

PTB20/FTM6_CH0/ADC0_SE1745


PTB22/FTM6_CH2/MII_CRS/LPUART1_TX/ADC0_SE1966

PTB23/FTM6_CH3/LPUART1_RX/MII_COL/ADC0_SE2068

PTB24/FTM6_CH469


PTB26/FTM6_CH672



PTB29/FTM7_CH1/LPSPI2_SCK/ADC0_SE2479

PTB30/FTM7_CH280

PTB31/FTM7_CH382

TPAD14

R524 00402

C51110uF

DNP

R206 00402

C5510.1uF

R508 00402

R136 00402

C5250.1uF

R64 00402DNP

R76 00402

R544 00402

R141 00402

C5090.1uF

FS32K148UAT0VLUT

U8E

PTE0/LPSPI0_SCK/TCLK1/LPI2C1_SDA/LPSPI1_SOUT/FTM1_FLT2/SAI0_D2166

PTE1/LPSPI0_SIN/LPI2C0_HREQ/LPI2C1_SCL/LPSPI1_PCS0/FTM1_FLT1/SAI0_D1165

PTE2/LPSPI0_SOUT/LPTMR0_ALT3/FTM3_CH6/LPUART1_CTS/SAI1_SYNC/ADC1_SE10150

PTE3/FTM0_FLT0/LPUART2_RTS/FTM2_FLT0/TRGMUX_IN6/CMP0_OUT28

PTE4/TRACE_D1/FTM2_QD_PHB/FTM2_CH2/CAN0_RX/FXIO_D6/EWM_OUT15

PTE5/TCLK2/FTM2_QD_PHA/FTM2_CH3/CAN0_TX/FXIO_D7/EWM_IN14

PTE6/LPSPI0_PCS2/FTM7_FLT1/FTM3_CH7/LPUART1_RTS/ADC1_SE11149

PTE7/FTM0_CH7/FTM3_FLT0106

PTE8/FTM0_CH6/MII_RMII_MDC/CMP0_IN347

PTE9/FTM0_CH7/LPUART2_CTS/ENET_TMR337

PTE10/CLKOUT/LPSPI2_PCS1/FTM2_CH4/FXIO_D4/TRGMUX_OUT411

PTE11/LPSPI2_PCS0/LPTMR0_ALT1/FTM2_CH5/FXIO_D5/TRGMUX_OUT510

PTE12/FTM0_FLT3/LPUART2_TX/FTM5_FLT030

PTE13/FTM4_CH5/LPSPI2_PCS2/FTM2_FLT012

PTE14/FTM0_FLT1/FTM2_FLT127

PTE15/LPUART1_CTS/LPSPI2_SCK/FTM2_CH6/FTM4_FLT1/FXIO_D2/TRGMUX_OUT65

PTE16/LPUART1_RTS/LPSPI2_SIN/FTM2_CH7/FTM4_FLT0/FXIO_D3/TRGMUX_OUT74

PTE17/FTM7_CH5/FXIO_D5145

PTE18/FTM7_CH6/FXIO_D4147






PTE24/FTM4_CH4/CAN2_TX/ADC1_SE30160

PTE25/FTM4_CH5/CAN2_RX/ADC1_SE31161

PTE26/FTM4_CH6167

PTE27/FTM4_CH7174

C5161000pF

TS3

1

FS32K148UAT0VLUT

U8A

PTA0/FTM2_CH1/LPI2C0_SCLS/FXIO_D2/FTM2_QD_PHA/LPUART0_CTS/TRGMUX_OUT3/ADC0_SE0/CMP0_IN0140

PTA1/FTM1_CH1/LPI2C0_SDAS/FXIO_D3/FTM1_QD_PHA/LPUART0_RTS/TRGMUX_OUT0/ADC0_SE1/CMP0_IN1138

PTA2/FTM3_CH0/LPI2C0_SDA/EWM_OUT/FXIO_D4/LPUART0_RX/ADC1_SE0126

PTA3/FTM3_CH1/LPI2C0_SCL/EWM_IN/FXIO_D5/LPUART0_TX/ADC1_SE1125

PTA4/CMP0_OUT/EWM_OUT/JTAG_TMS/SWD_DIO173

PTA5/TCLK1/RESET170

PTA6/FTM0_FLT1/LPSPI1_PCS1/FTM5_CH5/LPUART1_CTS/ADC0_SE2104

PTA7/FTM0_FLT2/FTM5_CH3/RTC_CLKIN/LPUART1_RTS/ADC0_SE3102

PTA8/LPUART2_RX/LPSPI2_SOUT/FXIO_D6/FTM3_FLT3/FTM4_FLT1176

PTA9/LPUART2_TX/LPSPI2_PCS0/FXIO_D7/FTM3_FLT2/FTM1_FLT3/FTM4_FLT0175

PTA10/FTM1_CH4/FXIO_D0/JTAG_TDO164

PTA11/FTM1_CH5/FXIO_D1/CMP0_RRT/SAI0_SYNC163

PTA12/FTM1_CH6/CAN1_RX/LPI2C1_SDAS/FTM2_QD_PHB/SAI0_BCLK162

PTA13/FTM1_CH7/CAN1_TX/LPI2C1_SCLS/FTM2_QD_PHA/SAI0_D0158

PTA14/FTM0_FLT0/FTM3_FLT1/EWM_IN/FTM1_FLT0/SAI0_D3155

PTA15/FTM1_CH2/LPSPI0_PCS3/LPSPI2_PCS3/FTM7_FLT0/ADC1_SE12148

PTA16/FTM1_CH3/LPSPI1_PCS2/ADC1_SE13146

PTA17/FTM0_CH6/FTM3_FLT0/EWM_OUT/FTM5_FLT0111

PTA18/FTM4_CH0/LPUART1_TX/LPSPI1_SOUT/FTM6_CH01

PTA19/FTM4_CH1/LPUART1_RX/LPSPI1_SCK2

PTA20/FTM4_CH2/LPSPI1_SIN3

PTA21/FTM4_CH3/FXIO_D0/LPSPI1_PCS06

PTA22/FTM4_CH4/FXIO_D1/LPSPI1_PCS19

PTA23/FTM4_CH6/FXIO_D213

PTA24/FTM4_CH7/FXIO_D316

PTA25/FTM5_CH017

PTA26/FTM5_CH1/LPSPI1_PCS0/LPSPI0_PCS026

PTA27/FTM5_CH2/LPSPI1_SOUT/LPUART0_TX/CAN0_TX29

PTA28/FTM5_CH3/LPSPI1_SCK/LPUART0_RX/CAN0_RX31

PTA29/FTM5_CH4/LPUART2_TX/LPSPI1_SIN33

PTA30/FTM5_CH5/LPUART2_RX/LPSPI0_SOUT34

PTA31/FTM5_CH6/LPSPI0_PCS140

VDD118

VDD239

VDD359

VDD477

VDD5110

VDD6129

VDD7152

VDD8172

VDDA20

VREFH21

VREFL22

VSS119

VSS223

VSS338

VSS458

VSS576

VSS6109

VSS7130

VSS8151

VSS9171

R635 00402

R9510K

R110 00402

C5081000pF

R148 00402

R509 00603

R507 00402

R8010K

FS32K148UAT0VLQT

U7B

PTB0/LPUART0_RX/LPSPI0_PCS0/LPTMR0_ALT3/CAN0_RX/FTM4_CH6/ADC0_SE4/ADC1_SE1478

PTB1/LPUART0_TX/LPSPI0_SOUT/TCLK0/CAN0_TX/FTM4_CH5/ADC0_SE5/ADC1_SE1577

PTB2/FTM1_CH0/LPSPI0_SCK/FTM1_QD_PHB/TRGMUX_IN3/ADC0_SE668

PTB3/FTM1_CH1/LPSPI0_SIN/FTM1_QD_PHA/TRGMUX_IN2/ADC0_SE763

PTB4/FTM0_CH4/LPSPI0_SOUT/MII_RMII_MDIO/TRGMUX_IN1/QSPI_B_IO041

PTB5/FTM0_CH5/LPSPI0_PCS1/LPSPI0_PCS0/CLKOUT/TRGMUX_IN0/MII_RMII_MDC40

PTB6/LPI2C0_SDA/XTAL18

PTB7/LPI2C0_SCL/EXTAL17

PTB8/FTM3_CH0/SAI1_BCLK111

PTB9/FTM3_CH1/LPI2C0_SCLS/SAI1_D0109

PTB10/FTM3_CH2/LPI2C0_SDAS/SAI1_MCLK108

PTB11/FTM3_CH3/LPI2C0_HREQ107

PTB12/FTM0_CH0/FTM3_FLT2/CAN2_RX/FTM6_FLT1/ADC1_SE798

PTB13/FTM0_CH1/FTM3_FLT1/CAN2_TX/FTM6_FLT0/ADC1_SE8/ADC0_SE897

PTB14/FTM0_CH2/LPSPI1_SCK/ADC1_SE9/ADC0_SE996



PTB17/FTM0_CH5/LPSPI1_PCS3/FTM5_FLT193




PTB22/FTM6_CH2/MII_CRS/LPUART1_TX/ADC0_SE1958

PTB23/FTM6_CH3/LPUART1_RX/MII_COL/ADC0_SE2060




PTB29/FTM7_CH1/LPSPI2_SCK/ADC0_SE2469

R533 00402

R274 00402

D2

VC

080505C

150R

P

DNP

12

TS1

1

R78 00402

R565 00402

TPAD9

R275 00402

R113 0402 DNP

R634 0402 DNP

FS32K148UAT0VLQT

U7C

PTC0/FTM0_CH0/LPSPI2_SIN/MII_RMII_RXD1/MII_RMII_RXD0/FTM1_CH6/QSPI_B_RWDS/ADC0_SE853

PTC1/FTM0_CH1/LPSPI2_SOUT/MII_RMII_RXD1/MII_RMII_RXD0/FTM1_CH7/QSPI_B_SCK/ADC0_SE952

PTC2/FTM0_CH2/CAN0_RX/LPUART0_RX/MII_RMII_TXD0/TRACE_CLKOUT/QSPI_A_IO3/ADC0_SE10/CMP0_IN543

PTC3/FTM0_CH3/CAN0_TX/LPUART0_TX/MII_TX_ER/QSPI_A_CS/QSPI_B_IO3/ADC0_SE11/CMP0_IN442

PTC4/FTM1_CH0/RTC_CLKOUT/EWM_IN/FTM1_QD_PHB/JTAG_TCLK/SWD_CLK/CMP0_IN2140

PTC5/FTM2_CH0/RTC_CLKOUT/LPI2C1_HREQ/FTM2_QD_PHB/JTAG_TDI139

PTC6/LPUART1_RX/CAN1_RX/FTM3_CH2/FTM1_QD_PHB/ADC1_SE4118

PTC7/LPUART1_TX/CAN1_TX/FTM3_CH3/FTM1_QD_PHA/ADC1_SE5117

PTC8/LPUART1_RX/FTM1_FLT0/FTM5_CH1/LPUART0_CTS81

PTC9/LPUART1_TX/FTM1_FLT1/FTM5_CH0/LPUART0_RTS80

PTC10/FTM3_CH4/TRGMUX_IN1175

PTC11/FTM3_CH5/FTM4_CH2/TRGMUX_IN1074

PTC12/FTM3_CH6/FTM2_CH6/LPUART2_CTS71

PTC13/FTM3_CH7/FTM2_CH7/LPUART2_RTS70

PTC14/FTM1_CH2/LPSPI2_PCS0/MII_COL/TRGMUX_IN9/ADC0_SE1261

PTC15/FTM1_CH3/LPSPI2_SCK/MII_CRS/TRGMUX_IN8/QSPI_B_CS/ADC0_SE1359

PTC16/FTM1_FLT2/CAN2_RX/LPI2C1_SDAS/MII_RMII_RX_ER/QSPI_B_IO7/ADC0_SE1457

PTC17/FTM1_FLT3/CAN2_TX/LPI2C1_SCLS/MII_RMII_RX_DV/QSPI_B_IO6/ADC0_SE1556

PTC19/FTM7_CH5/LPSPI2_PCS1/ADC0_SE2572

PTC23/LPSPI0_SCK/ADC0_SE2673

PTC27/FTM4_CH4/ADC0_SE2776



PTC30/FTM5_CH4/FXIO_D0/LPI2C1_SDAS/ADC0_SE3084

PTC31/FTM5_CH6/FXIO_D1/LPI2C1_SDA/ADC0_SE3186

R529 00402

FS32K148UAT0VLUT

U8C

PTC0/FTM0_CH0/LPSPI2_SIN/MII_RMII_RXD1/MII_RMII_RXD0/FTM1_CH6/QSPI_B_RWDS/ADC0_SE861

PTC1/FTM0_CH1/LPSPI2_SOUT/MII_RMII_RXD1/MII_RMII_RXD0/FTM1_CH7/QSPI_B_SCK/ADC0_SE960

PTC2/FTM0_CH2/CAN0_RX/LPUART0_RX/MII_RMII_TXD0/TRACE_CLKOUT/QSPI_A_IO3/ADC0_SE10/CMP0_IN551

PTC3/FTM0_CH3/CAN0_TX/LPUART0_TX/MII_TX_ER/QSPI_A_CS/QSPI_B_IO3/ADC0_SE11/CMP0_IN450

PTC4/FTM1_CH0/RTC_CLKOUT/EWM_IN/FTM1_QD_PHB/JTAG_TCLK/SWD_CLK/CMP0_IN2169

PTC5/FTM2_CH0/RTC_CLKOUT/LPI2C1_HREQ/FTM2_QD_PHB/JTAG_TDI168

PTC6/LPUART1_RX/CAN1_RX/FTM3_CH2/FTM1_QD_PHB/ADC1_SE4144

PTC7/LPUART1_TX/CAN1_TX/FTM3_CH3/FTM1_QD_PHA/ADC1_SE5143

PTC8/LPUART1_RX/FTM1_FLT0/FTM5_CH1/LPUART0_CTS100

PTC9/LPUART1_TX/FTM1_FLT1/FTM5_CH0/LPUART0_RTS99

PTC10/FTM3_CH4/TRGMUX_IN1194

PTC11/FTM3_CH5/FTM4_CH2/TRGMUX_IN1092

PTC12/FTM3_CH6/FTM2_CH6/LPUART2_CTS84

PTC13/FTM3_CH7/FTM2_CH7/LPUART2_RTS81

PTC14/FTM1_CH2/LPSPI2_PCS0/MII_COL/TRGMUX_IN9/ADC0_SE1270

PTC15/FTM1_CH3/LPSPI2_SCK/MII_CRS/TRGMUX_IN8/QSPI_B_CS/ADC0_SE1367

PTC16/FTM1_FLT2/CAN2_RX/LPI2C1_SDAS/MII_RMII_RX_ER/QSPI_B_IO7/ADC0_SE1465

PTC17/FTM1_FLT3/CAN2_TX/LPI2C1_SCLS/MII_RMII_RX_DV/QSPI_B_IO6/ADC0_SE1564

PTC18/FTM7_CH483

PTC19/FTM7_CH5/LPSPI2_PCS1/ADC0_SE2585

PTC20/FTM7_CH686

PTC21/FTM7_CH7/FTM7_FLT087

PTC22/FTM7_FLT188

PTC23/LPSPI0_SCK/ADC0_SE2689

PTC24/FTM4_CH090

PTC25/FTM4_CH191

PTC26/FTM4_CH393




PTC30/FTM5_CH4/FXIO_D0/LPI2C1_SDAS/ADC0_SE30103

PTC31/FTM5_CH6/FXIO_D1/LPI2C1_SDA/ADC0_SE31105

C51010uF

DNP

R10710K

R121 0402 DNP

R510 00402

R191 00402

8MHZ

Y11 2

C510uF

R562 00402

C5040.1uF

TPAD24

J10

HDR_2X10

1 23 4

657 89 10

11 1213 1415 1617 1819 20

R302 00402

R541 00402

R7210K

TS4

1

C51810uF

DNP

C5021000pF

TPAD26

C5030.1uF

FS32K148UAT0VLQT

U7D

PTD0/FTM0_CH2/LPSPI1_SCK/FTM2_CH0/TRACE_D0/FXIO_D0/TRGMUX_OUT14

PTD1/FTM0_CH3/LPSPI1_SIN/FTM2_CH1/SAI0_MCLK/FXIO_D1/TRGMUX_OUT23

PTD2/FTM3_CH4/LPSPI1_SOUT/FXIO_D4/FXIO_D6/TRGMUX_IN5/ADC1_SE2102

PTD3/FTM3_CH5/LPSPI1_PCS0/FXIO_D5/FXIO_D7/TRGMUX_IN4/NMI/ADC1_SE3101

PTD4/FTM0_FLT3/FTM3_FLT3/ADC1_SE6100

PTD5/FTM2_CH3/LPTMR0_ALT2/FTM2_FLT1/MII_TXD3/TRGMUX_IN7/QSPI_B_IO246

PTD6/LPUART2_RX/FTM2_FLT2/MII_TXD2/QSPI_B_IO1/CMP0_IN745

PTD7/LPUART2_TX/FTM2_FLT3/MII_RMII_TXD1/TRACE_D0/QSPI_A_IO1/CMP0_IN644

PTD8/LPI2C1_SDA/MII_RXD3/FTM2_FLT2/FXIO_D1/FTM1_CH4/QSPI_B_IO555

PTD9/LPI2C1_SCL/FXIO_D0/FTM2_FLT3/MII_RXD2/FTM1_CH5/QSPI_B_IO454

PTD10/FTM2_CH0/FTM2_QD_PHB/TRACE_D3/MII_RX_CLK/CLKOUT/QSPI_A_SCK49

PTD11/FTM2_CH1/FTM2_QD_PHA/TRACE_D2/MII_RMII_TX_CLK/LPUART2_CTS/QSPI_A_IO048

PTD12/FTM2_CH2/LPI2C1_HREQ/TRACE_D1/MII_RMII_TX_EN/LPUART2_RTS/QSPI_A_IO247

PTD13/FTM2_CH4/LPUART1_RX/ENET_TMR1/RTC_CLKOUT35

PTD14/FTM2_CH5/LPUART1_TX/ENET_TMR0/CLKOUT34

PTD15/FTM0_CH0/TRACE_D3/LPSPI0_SCK/ENET_TMR229

PTD16/FTM0_CH1/TRACE_D2/LPSPI0_SIN/CMP0_RRT/TRACE_CLKOUT28

PTD17/FTM0_FLT2/LPUART2_RX/FTM5_FLT125

PTD18/FTM5_CH7/FXIO_D2/LPI2C1_SCLS/ADC1_SE1688

PTD19/FTM6_CH0/FXIO_D3/LPI2C1_SCL/ADC1_SE1789







PTD30/FTM7_CH3/FTM6_FLT1/ADC1_SE24116

R567 00402

C412PF

R506 00402

C5060.1uF

FS32K148UAT0VLQT

U7A

PTA0/FTM2_CH1/LPI2C0_SCLS/FXIO_D2/FTM2_QD_PHA/LPUART0_CTS/TRGMUX_OUT3/ADC0_SE0/CMP0_IN0115

PTA1/FTM1_CH1/LPI2C0_SDAS/FXIO_D3/FTM1_QD_PHA/LPUART0_RTS/TRGMUX_OUT0/ADC0_SE1/CMP0_IN1113

PTA2/FTM3_CH0/LPI2C0_SDA/EWM_OUT/FXIO_D4/LPUART0_RX/ADC1_SE0105

PTA3/FTM3_CH1/LPI2C0_SCL/EWM_IN/FXIO_D5/LPUART0_TX/ADC1_SE1104

PTA4/CMP0_OUT/EWM_OUT/JTAG_TMS/SWD_DIO142

PTA5/TCLK1/RESET141

PTA6/FTM0_FLT1/LPSPI1_PCS1/FTM5_CH5/LPUART1_CTS/ADC0_SE285

PTA7/FTM0_FLT2/FTM5_CH3/RTC_CLKIN/LPUART1_RTS/ADC0_SE383

PTA8/LPUART2_RX/LPSPI2_SOUT/FXIO_D6/FTM3_FLT3/FTM4_FLT1144

PTA9/LPUART2_TX/LPSPI2_PCS0/FXIO_D7/FTM3_FLT2/FTM1_FLT3/FTM4_FLT0143

PTA10/FTM1_CH4/FXIO_D0/JTAG_TDO136

PTA11/FTM1_CH5/FXIO_D1/CMP0_RRT/SAI0_SYNC135

PTA12/FTM1_CH6/CAN1_RX/LPI2C1_SDAS/FTM2_QD_PHB/SAI0_BCLK134

PTA13/FTM1_CH7/CAN1_TX/LPI2C1_SCLS/FTM2_QD_PHA/SAI0_D0130

PTA14/FTM0_FLT0/FTM3_FLT1/EWM_IN/FTM1_FLT0/SAI0_D3127

PTA15/FTM1_CH2/LPSPI0_PCS3/LPSPI2_PCS3/FTM7_FLT0/ADC1_SE12120

PTA16/FTM1_CH3/LPSPI1_PCS2/ADC1_SE13119

PTA17/FTM0_CH6/FTM3_FLT0/EWM_OUT/FTM5_FLT092

PTA25/FTM5_CH010

PTA26/FTM5_CH1/LPSPI1_PCS0/LPSPI0_PCS019

PTA27/FTM5_CH2/LPSPI1_SOUT/LPUART0_TX/CAN0_TX22

PTA28/FTM5_CH3/LPSPI1_SCK/LPUART0_RX/CAN0_RX24

PTA29/FTM5_CH4/LPUART2_TX/LPSPI1_SIN26

PTA30/FTM5_CH5/LPUART2_RX/LPSPI0_SOUT27

PTA31/FTM5_CH6/LPSPI0_PCS133

VDD132

VDD211

VDD367

VDD451

VDD591

VDD6124

VDDA13

VREFH14

VREFL15

VSS166

VSS231

VSS316

VSS412

VSS550

VSS690

VSS7123

C720.1uF

C910UF

R304 00402

PT

B7_E

XT

AL

PTE21PTE22PTE23

PTB6_XTAL

PTC12PTC13

PTE21PTE22PTE23

VREFH_MCU

VREFH_MCU

PTB16

PTA0

PTA15

PTA1

PTA16

PTC28

PTC12PTC13

PTC28

PTA0PTA1

PTA15PTA16

PTB16

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ENET

ENET

ENET

ENET

ENET

ENET

ENET

S32K148 MCU SIGNALS ENET

ENET

ENET

ENET

ENET

ENET

HYPFLASH

HYPFLASH

HYPFLASH

HYPFLASH

HYPFLASH

HYPFLASH

ENET

ENET

TRACEENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

ENET QSPI

HyperFLASH &Ethernet Connector

3.3 Voltsby Default

3.3 V / 5.0VMCU Reference

ENTHERNET LinesENABLED byDefault

VCCB_VTRANSL

VDD_MCU_PERH VCCA_VTRANSL P3V3_SWP5V0


PTD10/MII_RX_CLK/QSPI_A_SCKpage[3]

PTA17/FTM0_CH6/ENET_RESETpage[3,9]PTB20/FTM6_CH0/ADC0_SE17page[3,9]

PTB4/MII_RMII_MDIO page[6]PTD6/MII_TXD2 page[6]PTD5/MII_TXD3 page[6]

PTB4/MII_RMII_MDIO/QSPI_B_IO0page[3]PTD6/MII_TXD2/QSPI_B_IO1page[3]PTD5/MII_TXD3/QSPI_B_IO2page[3]

PTD9/MII_RXD2 page[6]PTD8/MII_RXD3 page[6]PTC17/MII_RMII_RX_DV page[6]

PTD9/MII_RXD2/QSPI_B_IO4page[3]PTD8/MII_RXD3/QSPI_B_IO5page[3]

PTC16/MII_RMII_RX_ER page[6]PTC17/MII_RMII_RX_DV/QSPI_B_IO6page[3]PTC16/MII_RMII_RX_ER/QSPI_B_IO7page[3]

PTC2/MII_RMII_TXD0/QSPI_A_IO3page[3]

PTC0/MII_RMII_RXD1 page[6]PTC1/MII_RMII_RXD0 page[6]PTC1/MII_RMII_RXD0/QSPI_B_SCKpage[3]

PTC0/MII_RMII_RXD1/QSPI_B_RWDSpage[3]

PTD10/QSPI_A_SCK page[7]

PTC2/QSPI_A_IO3 page[7]PTC2/MII_RMII_TXD0 page[6]

PTD10/MII_RX_CLK page[6]

PTB20/FTM6_CH0/ENET_INT page[6]ENETSW_RESET page[6]

PTB5/MII_RMII_MDCpage[3]

PTD7/QSPI_A_IO1 page[7]PTD7/MII_RMII_TXD1 page[6]

PTD7/MII_RMII_TXD1//QSPI_A_IO1page[3]

PTD12/MII_RMII_TX_EN/QSPI_A_IO2page[3]PTD11/MII_RMII_TX_CLK/QSPI_A_IO0page[3]

PTC3/MII_TX_ER/QSPI_A_CS/QSPI_B_IO3page[3]

PTC3/QSPI_A_CS page[7]PTC3/MII_TX_ER page[6]

PTD12/QSPI_A_IO2 page[7]

PTD11/QSPI_A_IO0 page[7]

PTD12/MII_RMII_TX_EN page[6]

PTD11/MII_RMII_TX_CLK page[6]

PTA25/FTM5_CH0page[3,9]

PTB5/ENET_MII_RMII_MDC page[6]

Drawing Title:


Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

D


06. LEVELTRANS_MUXDEMUX

J.SANCHEZ

<Approver>

Jesus Sanchez

4 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

D



J.SANCHEZ

<Approver>

Jesus Sanchez

4 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

D



J.SANCHEZ

<Approver>

Jesus Sanchez

4 11

____X____

R58451KDNP

R232 00402

C66

10uFDNP

R249 00402

C840.1UF

C550.1UF

R165 00402

R56051KDNP

R244 0402 DNP

R230 00402

R173 00402

C5910uF

U14TXB0104

VCCA1

A12

A23

A34

A45

NC6

GND7OE8

NC19

B410 B311 B212 B113

VCCB14

EXP15

R271 0402 DNP

R57151KDNP

R55851KDNP

C610.1UF

R59451KDNP

R227 00402

R21451K

R54851KDNP

C560.1UF

R25251KDNP

R55951KDNP

R272 00402

R56851KDNP

C830.1UF

R54751KDNP

TPAD42

R260 00402

U13TXB0104

VCCA1

A12

A23

A34

A45

NC6

GND7OE8

NC19

B410 B311 B212 B113

VCCB14

EXP15

R55751KDNP

C321000PF

R60051KDNP

R60351KDNP

R59251KDNP

TPAD40

C750.1UF

R198 00402

R212 00402

R604 00402

R59651KDNP

R57651KDNP

R182 00603

C460.1UF

C680.1UF

C5270.1UF

R223 00402

R56651KDNP

R57351KDNP

R250 00402

C800.1UF

R197 00402

R59351KDNP

R58951KDNP

R251 0402 DNP

R209 0402 DNP

R261 00402

R26351KDNP

C5310uF

R59951KDNP

R580 00402

R231 00402

L7

30 OHMFER_BEAD

R552 00402

DNP

R195 00402

R60151KDNP

R196 00402

R224 00402

R23451K

R277 00402

R59751KDNP

R265 00402

R208 00402

R25851KDNP

R242 00402

R56951KDNP

R175 00402

U16TXB0104

VCCA1

A12

A23

A34

A45

NC6

GND7OE8

NC19

B410 B311 B212 B113

VCCB14

EXP15

R57051KDNP

C5301000PF

C410.1UF

TPAD45

R233 00402

R57851KDNP

R253 00402

R254 0402 DNP

R259 00402

R57951KDNP

TS14

1

R211 0402 DNP

R60251KDNP

R213 0402 DNPR27351KDNP

R17651K

R57251KDNP

R270 00402

R58851KDNP

R57751KDNP

TS8

1

R264 00402

C810.1UF

R58251KDNP

R58751KDNP

U11TXB0104

VCCA1

A12

A23

A34

A45

NC6

GND7OE8

NC19

B410 B311 B212 B113

VCCB14

EXP15

R268 00402

R181 0603 DNP

U22TXB0104

VCCA1

A12

A23

A34

A45

NC6

GND7OE8

NC19

B410 B311 B212 B113

VCCB14

EXP15

R553 00402

R243 00402

R210 00402

R269 00402

R54651KDNP

R59851KDNP

PTC2/MII_RMII_TXD0/QSPI_A_IO3__B

PTC0/MII_RMII_RXD1/QSPI_B_RWDS__BPTC1/MII_RMII_RXD0/QSPI_B_SCK__B

PTB4/MII_RMII_MDIO/QSPI_B_IO0__BPTD6/MII_TXD2/QSPI_B_IO1__BPTD5/MII_TXD3/QSPI_B_IO2__B

PTD12/MII_RMII_TX_EN/QSPI_A_IO2__B

PTD7/MII_RMII_TXD1//QSPI_A_IO1__B

PTD9/MII_RXD2/QSPI_B_IO4__BPTD8/MII_RXD3/QSPI_B_IO5__BPTC17/MII_RMII_RX_DV/QSPI_B_IO6__BPTC16/MII_RMII_RX_ER/QSPI_B_IO7__B

PTD11/MII_RMII_TX_CLK/QSPI_A_IO0__BPTC3/MII_TX_ER/QSPI_A_CS/QSPI_B_IO3__B

PTD10/MII_RX_CLK/QSPI_A_SCK__B

PTD9/MII_RXD2/QSPI_B_IO4__APTD8/MII_RXD3/QSPI_B_IO5__APTC17/MII_RMII_RX_DV/QSPI_B_IO6__APTC16/MII_RMII_RX_ER/QSPI_B_IO7__A

PTB5/MII_RMII_MDC__APTB20/FTM6_CH0/ADC0_SE17__AENETSW_RESET_A

PTD12/MII_RMII_TX_EN/QSPI_A_IO2__APTD11/MII_RMII_TX_CLK/QSPI_A_IO0__APTC3/MII_TX_ER/QSPI_A_CS/QSPI_B_IO3__A

PTB4/MII_RMII_MDIO/QSPI_B_IO0__APTD6/MII_TXD2/QSPI_B_IO1__APTD5/MII_TXD3/QSPI_B_IO2__APTD7/MII_RMII_TXD1//QSPI_A_IO1__A

PTC0/MII_RMII_RXD1/QSPI_B_RWDS__APTC1/MII_RMII_RXD0/QSPI_B_SCK__APTC2/MII_RMII_TXD0/QSPI_A_IO3__APTD10/MII_RX_CLK/QSPI_A_SCK__A

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR SWITCH

ACTIVE HIGH

(To enable 5v fromUSB connector)

UART1_RX_TGTMCU

SWD_DIO_TGTMCU

UART1_TX_TGTMCU

i path

V_BRD is supportedfrom 1.8V to 5V

Power should be provided to this rail for the logicrelated to your platform I/O

I/O POWERINPUT

i path

i

OPEN SDA INPUT POWER

pathi path

SDA_VOUT33 can provide up to 120mAof power at 3.3VDC to your system

P5V_TRG_SDA can provide up to 450mA(per USB spec) of power at 5VDC to your system

3.3VDC, 10mA should be providedto this rail (P3V3_SDA) in order to power openSDA module

OPEN SDA POWER OUTPUTS

Note: You can power openSDA with your own power suppliesby replacing this rail(SDA_VOUT33)with your 3.3V power supply rail

OpenSDA INTERFACE JTAG CONNECTOR

PU/PD LOGIC:SERIAL INTERFACE IS ALWAYS RESET WHEN USB PORTIS DISCONNECTED

TARGET MCUINTERFACE SIGNALS

PU/PD LOGIC (DIR PIN):BUFFER IS TRISTATED WHEN P3V3_SDA IS UNPOWERED

{For enablement purposes only}

RESET

SHORTING HEADER ON BOTTOM LAYER

Jumper is shorted by a cut-trace on bottom layer. Cutting the trace will effectively isolate the on-board MCU from the OpenSDA debug interface.

Isolation

Resistors

RSTPushButtonBypass

HW Designer: Rafael del Rey

Output to system from Level shifter



Isolation and level shift stage(for 1.8 to 5V compatibility)

OpenSDA Interface

UART1_RX_TGTMCU

SWD_DIO_TGTMCU

UART1_TX_TGTMCU

JTAG

JTAG


P3V3_SDA

P5V_SDA

VDDV_TGTMCU

P3V3_SDA

P5V_SDA_PSW

P5V_SDA

P5V_SDA

P3V3_SDA

P5V_SDA

P3V3_SDA

P3V3_SDA

P3V3_SDA

P5V_SDA

V_TGTMCU

SDA_VOUT33

V_TGTMCU

V_TGTMCUP3V3_SDA

P3V3_SDA

P3V3_SDA

P3V3_SDA

P3V3_SDA

V_TGTMCU

V_TGTMCU

P3V3_SDA

P3V3_SDA

V_TGTMCUP3V3_SDA

V_TGTMCU

P3V3_SWSDA_VOUT33

PTA5/TCLK1_2/RESET page[2,3,4,9]

PTC6/LPUART1_RX/CAN1_RX/FTM3_CH2 page[3,9]

PTC7/LPUART1_TX/CAN1_TX/FTM3_CH3 page[3,9]

PTC4/FTM1_CH0/RTC_CLKOUT/JTAG_TCLK/SWD_CLK page[3]

PTA4/CMP0_OUT/JTAG_TMS/SWD_DIO page[3]

PTC8/LPUART1_RX page[3,9]

PTC9/LPUART1_TX page[3,9]

Drawing Title:


Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

D


I/O HEADERS

Jesus Sanchez

Juan Romero

Jesus Sanchez

5 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

D


I/O HEADERS

Jesus Sanchez

Juan Romero

Jesus Sanchez

5 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

D


I/O HEADERS

Jesus Sanchez

Juan Romero

Jesus Sanchez

5 11

____X____

R337330 OHM

R288 0603 DNP

R300 1.0K

C5440.1UF

R62610.0K

R6240

R308

220

C5451.0UF

R29615K

C5424.7uF

R29310.0KDNP

R620 0

C543DNP

R291 0603

A1 Y1

A2 Y2

GND VCC

U2374LVC2G14GV

1

2

3 4

5

6

SW5

EVQ-P2402W

1 23 4

C53610uF

R6314.7K

TPAD54

R62910.0KDNP

U512

74LVCH1T45

VCCA1

GND2

A3

B4

DIR5 VCCB

6

R298 0603

R61110.0K

J24USB_MICRO_AB

VBUS1

D-2

D+3

ID4

GND5

SH

ELL1

6

SH

ELL2

7S

HE

LL3

8

SH

ELL4

9

SHELL510

C5354.7uF

R618 33

TP55

R290 0

DNP

R62310.0K

R614180K

R6224.7K

R617 33

D11

RED

AC

TP508

R60610.0K

R28110.0K

R6104.7K

C5400.1UF

R294 0603

U515

3

2

16

4

5

R63010.0K

R6214.7K

C11110uF

R61210.0K

TP512

R295 0

DNP

C546

4.7uF

C10318PFDNP

R60710.0KDNP

C5380.1UF

L9

330 OHM

1 2

R292 0

DNP

U514

74LVCH1T45

VCCA1

GND2

A3

B4

DIR5 VCCB

6

R60510.0K

R301

10.0K

C541

2.2UF

U511

74LVCH1T45

VCCA1

GND2

A3

B4

DIR5 VCCB

6

C5394.7uF

MK20DX128VFM5

U510

VDD11

VSS12

VDDA7

VSSA8

VBAT11

JTAG_TCLK/SWD_CLK/EZP_CLK/TSI0_CH1/PTA0/UART0_CTS/UART0_COL/FTM0_CH512

JTAG_TDI/EZP_DI/TSI0_CH2/PTA1/UART0_RX/FTM0_CH613

JTAG_TDO/TRACE_SWO/EZP_DO/TSI0_CH3/PTA2/UART0_TX/FTM0_CH714

JTAG_TMS/SWD_DIO/TSI0_CH4/PTA3/UART0_RTS/FTM0_CH015

NMI/EZP_CS/TSI0_CH5/PTA4/FTM0_CH1/LLWU_P316

EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN017

XTAL0/PTA19/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT118

ADC0_SE8/TSI0_CH0/PTB0/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA/LLWU_P520

ADC0_SE9/TSI0_CH6/PTB1/I2C0_SDA/FTM1_CH1/FTM1_QD_PHB21

ADC0_SE4B/CMP1_IN0/TSI0_CH15/PTC2/SPI0_PCS2/UART1_CTS/FTM0_CH1/I2S0_TX_FS23

CMP1_IN1/PTC3/SPI0_PCS1/UART1_RX/FTM0_CH2/I2S0_TX_BCLK/LLWU_P724

PTC4/SPI0_PCS0/UART1_TX/FTM0_CH3/CMP1_OUT/LLWU_P825

PTC5/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/CMP0_OUT/LLWU_P926

CMP0_IN0/PTC6/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/I2S0_MCLK/LLWU_P1027

CMP0_IN1/PTC7/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS28

PTD4/SPI0_PCS1/UART0_RTS/FTM0_CH4/EWM_IN/LLWU_P1429

ADC0_SE6B/PTD5/SPI0_PCS2/UART0_CTS/UART0_COL/FTM0_CH5/EWM_OUT30

ADC0_SE7B/PTD6/SPI0_PCS3/UART0_RX/FTM0_CH6/FTM0_FLT0/LLWU_P1531

PTD7/CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT132

VREGIN6

VOUT335

USB0_DM4

USB0_DP3

EXTAL3210

XTAL329

RESET19

ADC0_SE15/TSI0_CH14/PTC1/SPI0_PCS3/UART1_RTS/FTM0_CH0/I2S0_TXD0/LLWU_P622

EPAD33

J22HDR TH 1X3

123

R6284.7KDNP

R2840

R61310.0K

R60810.0K

TP509

J20

HDR 2X5

1 23 4

657 89 10

U24

MIC2005-0.8YM6

VOUT6

CSLEW5

ENABLE3

GND2

VIN1

FAULT4

R61610.0K

C970.1UF

TP57

Y501

8.00MHZ

1 3

2

R28510.0K

TS6

1

R286

10.0K

U513

74LVC2T45GM,125

1A6 VCCA7

VCCB8

2A5

DIR3

GND4

1B1

2B2

R289 0

R305 0DNP

TPAD49

C53422PFDNP

TP511

R6154.7K

R636 0

D10

LED GREEN

AC

TPAD48

C5330.1UF

R6090

R619 0DNP

C89

0.1UF

TP510

R299 00603

R625 0

L501

330 OHM

1 2

U509

NTSX2102GU8H

VCCA1

A12

A23

GND4

VCCB8

B17

B26

OE5

C53722PFDNP

R627 0

VTRG_FAULT_B

VTRG_EN

MIC2005_CSLEW

POWER_EN

UART1_TX_TGTMCU_R

UART1_RX_TGTMCU_R

TC_EXTAL_TP

SDA_RST

TC_XTAL_TP

SDA_SWD_EN_B

SDA_SPI0_RST_BSDA_SPI0_CS

SDA_SWD_OE_B

SDA_EXTALSDA_XTAL

SDA_SPI0_SIN

SDA_USB_CONN_DP

SDA_SPI0_SOUT

SDA_SPI0_SCK

P5V0_SDA_USB_CONN_VBUSSDA_USB_DNSDA_USB_DP

SDA_JTAG_TDISDA_JTAG_TCLK

SDA_JTAG_TDO

SDA_SPI0_SCKUART1_RX_TGTMCU_RUART1_TX_TGTMCU_R

SDA_LED

SDA_SPI0_SIN

SDA_JTAG_TMS

SDA_RST_TGTMCU_B

SDA_USB_P5V_SENSE

SD

A_LE

D_R

POWER_ENVTRG_FAULT_B

SDA_RST_TGTMCU_J_B

SDA_SPI0_RST_B

SDA_SPI0_CS SDA_SWD_OE

SDA_SWD_EN

UART1_RX_TGTMCU_BUF

SDA_SWD_EN_B_R

SWD_DIO_TGTMCU_BUF

SDA_SWD_EN_RSDA_SWD_EN

SDA_RX_EN

SW1_RST_B

SDA_RST_LED

SDA_SWD_OE

SDA_SWD_OE_B_R

UART1_TX_TGTMCU_BUF

SDA_SWD_EN

SDA_SPI0_SOUT

SDA_SWD_OE SDA_SWD_OE_RSWD_CLK_TGTMCU_BUF

TC_SDA_USB_ID_TP

SD

A_U

SB

SH

IELD

SDA_USB_CONN_DN

LVLRST_EN

SDA_JTAG_TMS

SDA_JTAG_TDOSDA_JTAG_TDISDA_RST

SDA_JTAG_TCLK

SDA_RST_TGTMCU_J_B

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SPI_MOSI

SPI_SCK

SPI_CS

SPI_MISO

Mating conn = Samtec QTH series

Compatible Ethernet Daughter Card----------------------------------NXPU_MXEK

Ethernet Card RESET

SPI_CS

SPI_MOSI

SPI_SCK

SPI_MISO

ENET_SPI_SCK

ENET_SPI_MISO

ENET_SPI_CS0

ENET_SPI_CS1

ENET_SPI_CS2

ENET_SPI_MOSI

ENET_I2C_SDA

ENET_I2C_SCL

3.3 Voltsby Default


VSUP

VDD_MCU_PERH P3V3_SWP3V3_ENETSW

P5V0

VDD_MCU_ENETSW P5V0

P3V3_SW

P3V3_SWP3V3_SW

PTB4/MII_RMII_MDIO page[4]

PTD11/MII_RMII_TX_CLK page[4,6]

PTB5/ENET_MII_RMII_MDC page[4]

PTB20/FTM6_CH0/ENET_INT page[4]

ENETSW_RESET page[4]

PTD10/MII_RX_CLK page[4,6]

PTD6/MII_TXD2 page[4]PTD5/MII_TXD3 page[4]

PTC3/MII_TX_ERpage[4]

PTD9/MII_RXD2 page[4]PTD8/MII_RXD3 page[4]

PTC17/MII_RMII_RX_DV page[4]

PTC16/MII_RMII_RX_ERpage[4]

PTC1/MII_RMII_RXD0 page[4]PTC0/MII_RMII_RXD1 page[4]

PTC2/MII_RMII_TXD0 page[4]

PTD10/MII_RX_CLK page[4,6]

PTD7/MII_RMII_TXD1 page[4]

PTD12/MII_RMII_TX_EN page[4]

PTD10/MII_RX_CLK page[4,6]PTD11/MII_RMII_TX_CLK page[4,6]

PTB28/FTM7_CH0/LPSPI2_SIN/ADC0_SE23page[3,9]PTB29/FTM7_CH1/LPSPI2_SCK/ADC0_SE24page[3,9]

PTB27/FTM6_CH7/LPSPI2_SOUT/ADC0_SE22page[3,9]

PTB25/FTM6_CH5/LPSPI2_PCS0/ADC0_SE21page[3,9]

PTE10/CLKOUT/LPSPI2_PCS1/FTM2_CH4/FXIO_D4page[3,8,9]PTE13/FTM4_CH5/LPSPI2_PCS2/FTM2_FLT0page[3,9]

ENETSW_SPI_MOSI page[6]

ENETSW_SPI_MISO page[6]

ENETSW_SPI_SCK page[6]

ENETSW_SPI_SC page[6]

ENETSW_SPI_MOSIpage[6]

ENETSW_SPI_MISOpage[6]

ENETSW_SPI_SCKpage[6]

ENETSW_SPI_SCpage[6]

PTB9/FTM3_CH1/LPI2C0_SCLSpage[3,8,9]PTB10/FTM3_CH2/LPI2C0_SDASpage[3,8,9]

ENETSW_SCL page[6]ENETSW_SDA page[6]

ENETSW_SCL page[6]ENETSW_SDA page[6]

PTD29/FTM7_CH2/FTM7_CH2/ADC1_SE23page[3,9] ENETSW_INH page[6]

ENETSW_INH page[6]

Drawing Title:


Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

C


07. ETHERNET

J.SANCHEZ

<Approver>

Jesus Sanchez

6 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

C


07. ETHERNET

J.SANCHEZ

<Approver>

Jesus Sanchez

6 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

C


07. ETHERNET

J.SANCHEZ

<Approver>

Jesus Sanchez

6 11

____X____

R17810K

R81 33 OHM0402

C5170.1UF

R1 33 OHM0402

TPAD22

R15610K

U505

NTSX2102GU8H

VCCA1

A12

A23

GND4

VCCB8

B17

B26

OE5

C190.1UF

R6 00603

TPAD36

R8 33 OHM0402

R115 33 OHM0402

TPAD19

R62 33 OHM0402

R514 0603

U10

NTSX2102GU8H

VCCA1

A12

A23

GND4

VCCB8

B17

B26

OE5

R521 00603

R20010K

C180.1UF

R549 00402

R94 0402 DNP

TPAD28

C270.1UF

R960

0603 DNP

R91 33 OHM0402

C171000PF

C500DNP

R5 33 OHM0402

C281000PF

R20710KDNP

C5470.1uF

R7 33 OHM0402

R522 0603 DNP

R133 00603

TPAD25

R501 0603 DNP

R19010KDNP

R63 33 OHM0402

TPAD34

R21710KDNP

R14210KDNP

C5480.1uF

R98 0402 DNP

CLK

OUT

VDD

GND

OE

50MHZ

Y500DNP

42

3 1

L4 120OHM1 2

R102 33 OHM0402

R18810KDNP

R54510KDNP

R38 33 OHM0402

TPAD37

U3

NTSX2102GU8H

VCCA1

A12

A23

GND4

VCCB8

B17

B26

OE5

R35 0DNP

R2 33 OHM0402

R14410KDNP

R218 00402DNP

R61 00402

TPAD13

R53910K

R74 33 OHM0402

TPAD33

R513 DNP

R123 0603 DNP

R219 00402

TPAD5

C5490.1uF

R55610K

C5230.1UF

R109 33 OHM0402

R187 00402

R108 0402 DNP

TPAD18

R3 0DNP

R46 33 OHM0402

TPAD3

C55010UF

R220 00402DNP

R55110K TPAD503

TPAD16

R18510K

TPAD21

R55 00402

R221 00402

R41 00603

R79 33 OHM0402

R183 00402

U12

NTSX2102GU8H

VCCA1

A12

A23

GND4

VCCB8

B17

B26

OE5

TPAD4

L6

30 OHMFER_BEAD

R19910K

R111 33 OHM0402

TPAD11

R20110KDNP

R184 00402

R58 33 OHM0402

TPAD1

R192 00402

R75 0402 DNP

R137 0603 0

R179 00402

J16QSH-030-01-L-D-A-K-TR

1 23 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 60

SH1 SH2

SH3 SH4

R20210KDNP

TPAD10

TPAD31

P3V3_ENET

ENET_MII_TXC

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CMOS FLASH Memory 64M-BIT

HYPFLASHENET

HYPFLASHENET

HYPFLASHENET

HYPFLASHENET

HYPFLASHENET

HYPFLASHENET

P3V3_SW

PTC3/QSPI_A_CSpage[4]

PTD10/QSPI_A_SCKpage[4]

PTC2/QSPI_A_IO3page[4]PTD12/QSPI_A_IO2page[4]

PTD11/QSPI_A_IO0page[4]PTD7/QSPI_A_IO1page[4]

Drawing Title:


Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

B


09. HYPERFLASH

J.SANCHEZ

<Approver>

Jesus Sanchez

7 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

B


09. HYPERFLASH

J.SANCHEZ

<Approver>

Jesus Sanchez

7 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

B


09. HYPERFLASH

J.SANCHEZ

<Approver>

Jesus Sanchez

7 11

____X____

R585 33 OHM

R57510.0K

R586 33 OHM

L500

30 OHMFER_BEADR574 00402

MX

25

L6

43

3F

M2

R-0

8G

U508

CS1

SO/SIO12

WP/SIO23

GN

D4

SI/SIO05

SCLK6

HOLD/SIO37

VC

C8

GND1

1

C53210uF

R590 33 OHM

R581 33 OHM

C5310.1UF

TPAD504

C5291000PF

R595 33 OHM

R591 33 OHM

VCC_HYPRFLASH

HYPFLASH/QSPI_A_IO0HYPFLASH/QSPI_A_IO1HYPFLASH/QSPI_A_IO2HYPFLASH/QSPI_A_IO3

HYPFLASH/QSPI_A_CS

HYPFLASH/QSPI_A_SCK

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SAI Audio

(GPIO Control)

(ENET0_TMR0)

(ENET1_TMR2)

(ENET0_TMR2)

(I2C_SCL2)

(I2C_SDA2)

(I2C_SDA3)

(I2C_SCL3)

(SAI1_DATA0)

(SAI1_BCLK)

(SAI1_SYNC)

(SAI1_MCLK)

(SAI2_DATA0)

(SAI2_BCLK)

(SAI2_SYNC)

(SAI2_MCLK)

ENET_SPI_CS1

ENET_I2C_SDA

ENET_I2C_SCL

SAI

SAI

SAI

SAI

SAI

SAI

SAI

TRACE

P3V3_SWP5V0

PTA12/FTM1_CH6/CAN1_RX/LPI2C1_SDAS/SAI0_BCLKpage[3,9]PTA11/FTM1_CH5/FXIO_D1/CMP0_RRT/SAI0_SYNCpage[3,9]

PTD1/FTM0_CH3/LPSPI1_SIN/FTM2_CH1/SAI0_MCLKpage[3,9]

PTA13/FTM1_CH7/FTM2_QD_PHA/SAI0_D0page[3,9]

PTA14/FTM0_FLT0/FTM3_FLT1/SAI0_D3page[3,9]

PTE0/LPSPI0_SCK/TCLK1/LPI2C1_SDA/SAI0_D2page[3,9]PTE1/LPSPI0_SIN/LPI2C0_HREQ/LPI2C1_SCL/SAI0_D1page[3,9]

PTD15/FTM0_CH0/TRACE_D3/LPSPI0_SCK/ENET_TMR2page[3,9]

PTD14/FTM2_CH5/LPUART1_TX/ENET_TMR0/CLKOUTpage[3,9]

PTD13/FTM2_CH4/LPUART1_RX/ENET_TMR1/RTC_CLKOUTpage[3,9]

PTE9/FTM0_CH7/LPUART2_CTS/ENET_TMR3page[3,9]

PTB10/FTM3_CH2/LPI2C0_SDASpage[3,6,9]

PTB8/FTM3_CH0/SAI1_BCLKpage[3,9]

PTE2/LPSPI0_SOUT/FTM3_CH6/SAI1_SYNC/ADC1_SE10page[3,9]

PTD18/FTM5_CH7/FXIO_D2/LPI2C1_SCLS/ADC1_SE16page[3,9]

PTE15/LPSPI2_SCK/FTM2_CH6/FTM4_FLT1/FXIO_D2page[3,9]PTE16/LPSPI2_SIN/FTM2_CH7/FTM4_FLT0/FXIO_D3page[3,9]PTE10/CLKOUT/LPSPI2_PCS1/FTM2_CH4/FXIO_D4page[3,6,9]

PTE11/FTM2_CH5/FXIO_D5page[3,9]

PTB9/FTM3_CH1/LPI2C0_SCLSpage[3,6,9]PTC30/FTM5_CH4/FXIO_D0/LPI2C1_SDAS/FXIO_D0/ADC0_SE30page[3,9]

PTD19/FTM6_CH0/FXIO_D3/LPI2C1_SCL/ADC1_SE17page[3,9]PTC31/FTM5_CH6/FXIO_D1/LPI2C1_SDA/FXIO_D1/ADC0_SE31page[3,9]

Drawing Title:


Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29559 PDF: SPF-29559 B

S32K148EVB-Q176

B


10. SAI AUDIO

J.SANCHEZ

<Approver>

Jesus Sanchez

8 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29559 PDF: SPF-29559 B

S32K148EVB-Q176

B


10. SAI AUDIO

J.SANCHEZ

<Approver>

Jesus Sanchez

8 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29559 PDF: SPF-29559 B

S32K148EVB-Q176

B


10. SAI AUDIO

J.SANCHEZ

<Approver>

Jesus Sanchez

8 11

____X____

R325 33 OHM

R318 33 OHM

R332 33 OHMR309 33 OHM

TPAD50

R321 33 OHM

R323 33 OHM

C11310uF

R316 33 OHM

R327 33 OHM

P1

TSW-125-07-F-D

1 23 4

657 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 50

C990.1uF

R324 33 OHM

C10410uF

R310 33 OHM

TPAD51

R311 33 OHM

C1120.1uF

R313 33 OHM

R328 33 OHMR329 33 OHM

R322 33 OHM

R331 33 OHM

R326 33 OHM

R320 33 OHM

R317 33 OHM

R315 33 OHM

R312 33 OHM

R314 33 OHM

R319 33 OHM

SAI0_DATA3SAI0_DATA2SAI0_DATA1SAI0_DATA0SAI0_BCLKSAI0_SYNCSAI0_MCLK

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RX

TX

ADC

PWM

PWM

PWM

PWMPWM

PWM

PWM

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ENET_SPI_CS1

SAI

SAI

TRACE

TRACE

GPIO/MOSI

GPIO/MISO

GPIO/SCK

VREFH

GPIO/SS

PWM

PWM

SAI

SAI

SAI

SAI

SAI

ADC

ADC

ENET_SPI_MOSI

ENET_SPI_SCK

ENET_SPI_CS0

ENET_SPI_MISO

SBC_LIN2RX

SBC_LIN2TX

SBC_SPI_CS

SBC_SPI_CLK

SBC_SPI_MISO

SBC_SPI_MOSI

TRACE

SPI2_MISO RX4

SPI2_MOSI TX4

SPI2_SCK RXD5

SPI2_SS TXD5

RX

TX

PWM

P3V3_SWP5V0

GND

VDD_MCU_PERH

VDD_MCU_PERH

VDD_MCU_PERH

VBAT

VDD_MCU_PERH

PTD22/FTM6_CH3/FTM6_CH3/ADC1_SE18page[3]PTD23/FTM6_CH4/FTM6_CH4/ADC1_SE19page[3]PTD24/FTM6_CH5/FTM6_CH5/ADC1_SE20page[3]PTD27/FTM7_CH0/FTM7_CH0/ADC1_SE21page[3]PTD28/FTM7_CH1/FTM7_CH1/ADC1_SE22page[3]PTD29/FTM7_CH2/FTM7_CH2/ADC1_SE23page[3,6]

PTD30/FTM7_CH3/FTM6_FLT1/ADC1_SE24page[3]

PTD4/FTM0_FLT3/ADC1_SE6page[3]

PTC27/FTM4_CH4/FTM4_CH4/ADC0_SE27page[3]PTC28/FTM4_CH7/FTM4_CH7/ADC0_SE28page[3]PTC29/FTM5_CH2/FTM5_CH2/ADC0_SE29page[3]

PTC30/FTM5_CH4/FXIO_D0/LPI2C1_SDAS/FXIO_D0/ADC0_SE30page[3,8]PTC31/FTM5_CH6/FXIO_D1/LPI2C1_SDA/FXIO_D1/ADC0_SE31page[3,8]

PTE19/FTM7_CH7/FTM7_CH7/ADC1_SE25page[2,3]PTE20/FTM4_CH0/FTM4_CH0/ADC1_SE26page[2,3]

PTE21/FTM4_CH1/FTM4_CH1/ADC1_SE27 page[3]PTE22/FTM4_CH2/FTM4_CH2/ADC1_SE28 page[3]PTE23/FTM4_CH3/FTM4_CH3/ADC1_SE29 page[3]PTE24/FTM4_CH4/CAN2_TX/FTM4_CH4/ADC1_SE30 page[3]PTE25/FTM4_CH5/CAN2_RX/CAN2_RX/FTM4_CH5/ADC1_SE31 page[3]

PTA2/LPUART0_RXpage[2,3]PTA3/LPUART0_TXpage[2,3]

PTC10/FTM3_CH4/TRGMUX_IN11page[3]PTC11/FTM3_CH5/FTM4_CH2/TRGMUX_IN10page[3]

PTC19/FTM7_CH5/ADC0_SE25 page[3]

PTB14/FTM0_CH2/LPSPI1_SCK/ADC1_SE9/ADC0_SE9 page[3]PTB15/FTM0_CH3/LPSPI1_SIN/ADC1_SE14 page[3]PTB16/FTM0_CH4/LPSPI1_SOUT/ADC1_SE15 page[3]

PTA13/FTM1_CH7/FTM2_QD_PHA/SAI0_D0 page[3,8]PTA14/FTM0_FLT0/FTM3_FLT1/SAI0_D3 page[3,8]

PTE2/LPSPI0_SOUT/FTM3_CH6/SAI1_SYNC/ADC1_SE10 page[3,8]PTE3/FTM0_FLT0/FTM2_FLT0/CMP0_OUT page[3]

PTD14/FTM2_CH5/LPUART1_TX/ENET_TMR0/CLKOUTpage[3,8]PTD15/FTM0_CH0/TRACE_D3/LPSPI0_SCK/ENET_TMR2page[3,8]

PTD16/FTM0_CH1/TRACE_D2/LPSPI0_SIN/TRACE_CLKOUTpage[3]PTD17/FTM0_FLT2/LPUART2_RX/FTM5_FLT1page[3,9]

PTE6/LPSPI0_PCS2/FTM7_FLT1/FTM3_CH7/LPUART1_RTS/ADC1_SE11 page[3]PTE7/FTM0_CH7/FTM3_FLT0 page[3,9]PTE8/FTM0_CH6/MII_RMII_MDC/CMP0_IN3 page[3]PTE9/FTM0_CH7/LPUART2_CTS/ENET_TMR3 page[3,8]

PTB19/FTM5_CH7 page[3]

PTA20/FTM4_CH2/LPSPI1_SIN page[3]PTA21/FTM4_CH3/FXIO_D0/LPSPI1_PCS0 page[3]PTA22/FTM4_CH4/FXIO_D1/LPSPI1_PCS1 page[3]PTA23/FTM4_CH6/FXIO_D2 page[3]PTA24/FTM4_CH7/FXIO_D3 page[3]

PTA6/FTM0_FLT1page[3,9]PTA7/FTM0_FLT2page[3]

PTA25/FTM5_CH0page[3,4]

PTB18/FTM5_CH7/LPSPI1_PCS1/ADC0_SE16page[3]PTB17/FTM0_CH5/LPSPI1_PCS3/FTM5_FLT1page[3,9]

PTB11/FTM3_CH3/LPI2C0_HREQpage[3]

PTE10/CLKOUT/LPSPI2_PCS1/FTM2_CH4/FXIO_D4page[3,6,8]PTE11/FTM2_CH5/FXIO_D5page[3,8]

PTB12/FTM0_CH0/FTM3_FLT2/CAN2_RXpage[3]PTB13/FTM0_CH1/FTM3_FLT1/CAN2_TXpage[3]

PTE26/FTM4_CH6 page[3]PTE27/FTM4_CH7 page[3]

PTA30/FTM5_CH5page[3]PTA31/FTM5_CH6page[3]

PTE15/LPSPI2_SCK/FTM2_CH6/FTM4_FLT1/FXIO_D2page[3,8]PTE16/LPSPI2_SIN/FTM2_CH7/FTM4_FLT0/FXIO_D3page[3,8]

VREFHpage[3]

PTB0/SBC_LPSPI0_PCS0page[3]PTB1/LPSPI0_SOUTpage[3]

PTB3/LPSPI0_SINpage[3]PTB2/LPSPI0_SCKpage[3]


PTA12/FTM1_CH6/CAN1_RX/LPI2C1_SDAS/SAI0_BCLK page[3,8]PTA11/FTM1_CH5/FXIO_D1/CMP0_RRT/SAI0_SYNC page[3,8]

PTD1/FTM0_CH3/LPSPI1_SIN/FTM2_CH1/SAI0_MCLK page[3,8]

PTE0/LPSPI0_SCK/TCLK1/LPI2C1_SDA/SAI0_D2 page[3,8]

PTD13/FTM2_CH4/LPUART1_RX/ENET_TMR1/RTC_CLKOUT page[3,8]

PTE1/LPSPI0_SIN/LPI2C0_HREQ/LPI2C1_SCL/SAI0_D1 page[3,8]

PTB8/FTM3_CH0/SAI1_BCLK page[3,8]

PTC23/LPSPI0_SCK/ADC0_SE26page[3]

PTE17/FTM7_CH5/FXIO_D5 page[3]PTE18/FTM7_CH6/FXIO_D4 page[3]

PTC15/FTM1_CH3/LPSPI2_SCK/QSPI_B_CS page[3]

PTA17/FTM0_CH6/ENET_RESETpage[3,4]

PTC14/FTM1_CH2/LPSPI2_PCS0/ADC0_SE12 page[3]

PTB25/FTM6_CH5/LPSPI2_PCS0/ADC0_SE21page[3,6]

PTB27/FTM6_CH7/LPSPI2_SOUT/ADC0_SE22page[3,6]PTB28/FTM7_CH0/LPSPI2_SIN/ADC0_SE23page[3,6]

PTB29/FTM7_CH1/LPSPI2_SCK/ADC0_SE24page[3,6]PTB22/FTM6_CH2/MII_CRS/LPUART1_TX/ADC0_SE19page[3]PTB23/FTM6_CH3/LPUART1_RX/MII_COL/ADC0_SE20page[3]

PTA8/LPUART2_RX/LPSPI2_SOUT/FXIO_D6/FTM3_FLT3page[2,3]PTA9/LPUART2_TX/LPSPI2_PCS0/FXIO_D7/FTM3_FLT2page[2,3]

LIN1_OUTpage[2]LIN2_OUTpage[2]

CANH_OUTpage[2]CANL_OUTpage[2]

PTA26/FTM5_CH1/LPSPI1_PCS0page[2,3]PTA27/FTM5_CH2/LPSPI1_SOUT/LPUART0_TXpage[2,3]PTA28/FTM5_CH3/LPSPI1_SCK/LPUART0_RXpage[2,3]PTA29/FTM5_CH4/LPUART2_TX/LPSPI1_SINpage[2,3]


PTA15/FTM1_CH2/ADC1_SE12page[3]PTA1/ACMP0_IN1/ADC0_SE1page[3]


PTA6/FTM0_FLT1page[3,9]PTB17/FTM0_CH5/LPSPI1_PCS3/FTM5_FLT1page[3,9]

PTD25/FTM6_CH6page[3]PTD26/FTM6_CH7/FXIO_D7page[3]

PTD31/FTM7_CH4/FXIO_D6/FTM6_FLT0page[3]

PTC20/FTM7_CH6page[3]PTC18/FTM7_CH4page[3]

PTC22/FTM7_FLT1page[3]PTC21/FTM7_CH7/FTM7_FLT0page[3]

PTC26/FTM4_CH3page[3]PTC25/FTM4_CH1page[3]PTC24/FTM4_CH0page[3]

PTD21/FTM6_CH2 page[3]PTD20/FTM6_CH1 page[3]

PTB30/FTM7_CH2 page[3]PTB31/FTM7_CH3 page[3,9]

PTB24/FTM6_CH4 page[3]PTB26/FTM6_CH6 page[3]

PTC12/FTM3_CH6/FTM2_CH6/LPUART2_CTS page[3]PTC13/FTM3_CH7/FTM2_CH7/LPUART2_RTS page[3]

PTD0/FTM0_CH2/FTM2_CH0/TRACE_D0/FXIO_D0 page[3]PTE14/FTM0_FLT1/FTM2_FLT1 page[3]PTE13/FTM4_CH5/LPSPI2_PCS2/FTM2_FLT0 page[3,6]PTE12/FTM0_FLT3/LPUART2_TX/FTM5_FLT0 page[3]

PTC7/LPUART1_TX/CAN1_TX/FTM3_CH3 page[3,5]PTC6/LPUART1_RX/CAN1_RX/FTM3_CH2 page[3,5]

PTB9/FTM3_CH1/LPI2C0_SCLS page[3,6,8]PTB10/FTM3_CH2/LPI2C0_SDAS page[3,6,8]PTB21/FTM6_CH1/ADC0_SE18 page[3]PTB20/FTM6_CH0/ADC0_SE17 page[3,4]

PTD18/FTM5_CH7/FXIO_D2/LPI2C1_SCLS/ADC1_SE16 page[3,8]PTD19/FTM6_CH0/FXIO_D3/LPI2C1_SCL/ADC1_SE17 page[3,8]PTD2/FTM3_CH4/LPSPI1_SOUT/FXIO_D4/FXIO_D6/ADC1_SE2 page[3]PTD3/FTM3_CH5/LPSPI1_PCS0/FXIO_D5/FXIO_D7/ADC1_SE3 page[3]

PTA18/FTM4_CH0/LPUART1_TX/LPSPI1_SOUT/FTM6_CH0 page[3]PTA19/FTM4_CH1/LPUART1_RX/LPSPI1_SCK page[3]

PTC9/LPUART1_TXpage[3,5]PTC8/LPUART1_RXpage[3,5]

PTE7/FTM0_CH7/FTM3_FLT0page[3,9]

PTD17/FTM0_FLT2/LPUART2_RX/FTM5_FLT1 page[3,9]

PTB31/FTM7_CH3page[3,9]

PTD17/FTM0_FLT2/LPUART2_RX/FTM5_FLT1 page[3,9]

Drawing Title:


Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

D


I/O HEADERS

Jesus Sanchez

Juan Romero

Jesus Sanchez

9 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

D


I/O HEADERS

Jesus Sanchez

Juan Romero

Jesus Sanchez

9 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

D


I/O HEADERS

Jesus Sanchez

Juan Romero

Jesus Sanchez

9 11

____X____

C820.1uF

TPAD6

J1

ESQ-108-33-T-T

147

10

13

3912

15

25811

14

16

18

17

19

21

20

22

23

24

6

R267 0603 DNP

J4

ES

Q-1

08-3

3-T

-T

1 4 7 10

13

3 9

12

152 5 8

11

14

16

18

17

19

21

20

22

23

246

R40 00402

R640 0402 DNP

R39 00402

TP52

R637 0402 DNP

R641 00402

TP53

R283 00402DNP

TP6

TP2

R638 00402

C860.1uF

J3E

SQ

-108-3

3-T

-T

1 4 7 10

13

3 9

12

152 5 8

11

14

16

18

17

19

21

20

22

23

246

R639 00402

TS13

1

R287 00402

C870.1uF

J5

CON 2X10

12

34 6

5 78

910

11

12

13

14

15

16

17

18

19

20

R34 0402 DNP

R642 0402 DNP

TP50

C850.1uF

C10.1uF

R266 00603

C880.1uF

C790.1uF

C20.1uF

J6ESQ-110-33-T-T

147

10

13

36912

15

25811

14

16

18

17

19

21

22

24

20

23

26

29

25

28

27

30

R643 0402 DNP

R282 00402DNP

R3610KDNP

R14 0402 DNP

J2

ESQ-110-33-T-T

147

10

13

36912

15

25811

14

16

18

17

19

21

22

24

20

23

26

29

25

28

27

30

R3710KDNP

VBATVBAT

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Touch PADsTOUCH

TOUCH

TOUCH_ADC1_Apage[3]

TOUCH_ADC0_Apage[3]

TOUCH_ADC0_Bpage[3]

TOUCH_ADC1_Bpage[3]

Drawing Title:


Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

B


11. TOUCHPAD

J.SANCHEZ

<Approver>

Jesus Sanchez

10 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

B


11. TOUCHPAD

J.SANCHEZ

<Approver>

Jesus Sanchez

10 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

B


11. TOUCHPAD

J.SANCHEZ

<Approver>

Jesus Sanchez

10 11

____X____

SW1

Electrode

11R280 0

TPAD52

R3304.7K

TPAD53

C784.7pF

R333 0

SW2

Electrode

11

TPAD46

TPAD47

C1084.7pF

R2784.7K

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RGB LEDUser buttons

Potentiometer3.3 V / 5.0VMCU Reference

VDD_MCU_PERH

VDD_MCU_PERH

P5V0

PTC12/BTN0 page[3]

PTC13/BTN1 page[3]

LED_REDpage[3]

LED_GREENpage[3]

LED_BLUEpage[3]

ADC_POT page[3]

Drawing Title:


Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

B


USER PERIPHERALS

Jesus Sanchez

Juan Romero

Jesus Sanchez

11 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

B


USER PERIPHERALS

Jesus Sanchez

Juan Romero

Jesus Sanchez

11 11



Date: Sheet of

Page Title:

Designer:

Drawn by:

Approved:




SCH-29642 PDF: SPF-29642 B

S32K148EVB-Q176

B


USER PERIPHERALS

Jesus Sanchez

Juan Romero

Jesus Sanchez

11 11

____X____

R222 10.0K

C480.1uF

TP27

TP507

R245 10.0K

R306220

R33610.0K

R256 560

TPAD43

TP506

R255 10.0K

TP43

R161 00603

R228 33K

R247 560

TPAD38

TP60

TP61

SW3 EVQ-P2402W

1 23 4

R307220

R248 33K

R229 560

TP46

C1150.1uF

D6

LED RED/GRN/BL

A2 C2

A1 C1

C3A3

Q1MMBT3904TT1G

23

1

R257 33K

TP42TP48 TP44 TP49

R194220

SW4 EVQ-P2402W

1 23 4

Q2MMBT3904TT1G

23

1

C1090.1uF

R33510.0K

Q3MMBT3904TT1G

23

1

TS9

1

C1100.1uF

C1140.1uF

TPAD41

R1865K

13

2

C490.1uF

LEDRGB_RED

LEDRGB_BLUE

LEDRGB_GREEN

s32k148evb q176 revb sch-29644 - nxp semiconductors · 2020-03-04 · 5 5 4 4 3 3 2 2 1 1 d d c c b...

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