rtss 2018 – 39th ieee real-time systems...
TRANSCRIPT
![Page 1: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/1.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The SRP Resource Sharing Protocol for Self-Suspending TasksGeoffrey Nelissen and Alessandro Biondi
![Page 2: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/2.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The SRP Resource Sharing Protocol for Self-Suspending TasksGeoffrey Nelissen and Alessandro Biondi
![Page 3: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/3.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The SRP Resource Sharing Protocol for Self-Suspending Tasks (on single core platforms)Geoffrey Nelissen and Alessandro Biondi
![Page 4: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/4.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Motivation
Evolution of the state of practice
![Page 5: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/5.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Motivation
Parallel applications
Evolution of the state of practice
![Page 6: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/6.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Motivation
Parallel applications
Multicore processors
Evolution of the state of practice
![Page 7: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/7.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Motivation
Parallel applications
Multicore processors
Partitioned FP scheduling
Evolution of the state of practice
![Page 8: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/8.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Motivation
Parallel applications partitioned on multicore platforms can be modelled as sets of self-suspending tasks running on single core processors
Response Time Analysis of Sporadic DAG Tasks under
Partitioned Scheduling
José Fonseca, Geoffrey Nelissen, Vincent Nélis and Luis Miguel Pinho
![Page 9: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/9.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Motivation
Parallel applications partitioned on multicore platforms can be modelled as sets of self-suspending tasks running on single core processors
Partitioned Fixed-Priority Scheduling of Parallel Tasks
Without Preemptions
Daniel Casini, Alessandro Biondi, Geoffrey Nelissen and Giorgio Buttazzo
This afternoon @ RTSS
Response Time Analysis of Sporadic DAG Tasks under
Partitioned Scheduling
José Fonseca, Geoffrey Nelissen, Vincent Nélis and Luis Miguel Pinho
![Page 10: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/10.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Motivation
Parallel applications partitioned on multicore platforms can be modelled as sets of self-suspending tasks running on single core processors
Most applications will share resources through locks
![Page 11: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/11.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Motivation
Parallel applications partitioned on multicore platforms can be modelled as sets of self-suspending tasks running on single core processors
Most applications will share resources through locks
Standards such as AUTOSAR mandates the use of the SRP for sharing resources
![Page 12: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/12.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The Stack Resource Policy (SRP)
![Page 13: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/13.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The Stack Resource Policy (SRP)
Task 1
Task 2
Sharedresource 1
![Page 14: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/14.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The Stack Resource Policy (SRP)
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
![Page 15: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/15.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The Stack Resource Policy (SRP)
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
priority of highest priority taskaccessing that resource
![Page 16: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/16.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The Stack Resource Policy (SRP)
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
0
priority of the last resourcelocked and not unlocked
![Page 17: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/17.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The Stack Resource Policy (SRP)
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
0
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
priority of the last resourcelocked and not unlocked
![Page 18: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/18.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The Stack Resource Policy (SRP)
Execution time
Critical section
Blocking time
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
0
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
priority of the last resourcelocked and not unlocked
![Page 19: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/19.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The Stack Resource Policy (SRP)
Execution time
Critical section
Blocking time
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
2
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
priority of the last resourcelocked and not unlocked
![Page 20: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/20.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The Stack Resource Policy (SRP)
Execution time
Critical section
Blocking time
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
2
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
priority of the last resourcelocked and not unlocked
![Page 21: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/21.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The Stack Resource Policy (SRP)
Execution time
Critical section
Blocking time
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
0
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
priority of the last resourcelocked and not unlocked
![Page 22: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/22.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The Stack Resource Policy (SRP)
Execution time
Critical section
Blocking time
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=?
System ceiling
0
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
priority of the last resourcelocked and not unlocked
![Page 23: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/23.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
The Stack Resource Policy (SRP)
Execution time
Critical section
Blocking time
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=?
System ceiling
0
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
priority of the last resourcelocked and not unlocked
![Page 24: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/24.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
WCRT analysis for the SRP
![Page 25: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/25.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
WCRT analysis for the SRP
Blocking time
Critical section length whose priority ≥ prio(task i)
![Page 26: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/26.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP and self-suspending tasks
![Page 27: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/27.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP and self-suspending tasks
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
0
Execution time Critical section Blocking time Suspension
![Page 28: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/28.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP and self-suspending tasks
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
2
Execution time Critical section Blocking time Suspension
![Page 29: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/29.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP and self-suspending tasks
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
0
Execution time Critical section Blocking time Suspension
![Page 30: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/30.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP and self-suspending tasks
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
0
Execution time Critical section Blocking time Suspension
![Page 31: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/31.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP and self-suspending tasks
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
0
Execution time Critical section Blocking time Suspension
![Page 32: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/32.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP and self-suspending tasks
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
2
Execution time Critical section Blocking time Suspension
![Page 33: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/33.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP and self-suspending tasks
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
0
Execution time Critical section Blocking time Suspension
![Page 34: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/34.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP and self-suspending tasks
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
0
Execution time Critical section Blocking time Suspension
![Page 35: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/35.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP and self-suspending tasks
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
2
Execution time Critical section Blocking time Suspension
![Page 36: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/36.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP and self-suspending tasks
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
0
Execution time Critical section Blocking time Suspension
![Page 37: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/37.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP and self-suspending tasks
Task 1
Task 2
Prio=2
Prio=1
Sharedresource 1
Prio=2
System ceiling
0
Execution time Critical section Blocking time Suspension
A task may be blocked as many times as it self-suspends
![Page 38: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/38.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP + self-suspending tasksStraightforward analysis
Maximum number of times task i self-suspends
![Page 39: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/39.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP + self-suspending tasksImproved analysis
![Page 40: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/40.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP + self-suspending tasksImproved analysis
• Identify all the critical sections that may block task iduring its response time
![Page 41: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/41.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP + self-suspending tasksImproved analysis
• Identify all the critical sections that may block task iduring its response time
• Save their length in a multi-set 𝑆𝑖(𝑅𝑖)
![Page 42: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/42.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP + self-suspending tasksImproved analysis
• Identify all the critical sections that may block task iduring its response time
• Save their length in a multi-set 𝑆𝑖(𝑅𝑖)
• The blocking 𝐵𝑖 is bounded by the sum of the 𝑋𝑖 + 1 longest critical sections in 𝑆𝑖 𝑅𝑖
![Page 43: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/43.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
SRP + self-suspending tasksImproved analysis
• Identify all the critical sections that may block task iduring its response time
• Save their length in a multi-set 𝑆𝑖(𝑅𝑖)
• The blocking 𝐵𝑖 is bounded by the sum of the 𝑋𝑖 + 1 longest critical sections in 𝑆𝑖 𝑅𝑖
Note that the content of 𝑆𝑖(𝑅𝑖) depends on
the worst-case response time of all tasks
➔ 𝑆𝑖(𝑅𝑖) must be iteratively computed
![Page 44: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/44.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Improving the locking protocol
![Page 45: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/45.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
Improving the locking protocol
Task 1
Task 3
Sharedresource 1
Prio=3
System ceiling
0
Execution time Critical section Blocking time
Task 2
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
Prio=3
Prio=1
Prio=2
![Page 46: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/46.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
Improving the locking protocol
Task 1
Task 3
Sharedresource 1
Prio=3
System ceiling
0
Execution time Critical section Blocking time
Task 2
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
Prio=3
Prio=1
Prio=2
![Page 47: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/47.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
Improving the locking protocol
Task 1
Task 3
Sharedresource 1
Prio=3
System ceiling
0
Execution time Critical section Blocking time
Task 2
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
Prio=3
Prio=1
Prio=2
System Priority
0
![Page 48: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/48.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
Improving the locking protocol
Task 1
Task 3
Sharedresource 1
Prio=3
System ceiling
0
Execution time Critical section Blocking time
Task 2
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
Prio=3
Prio=1
Prio=2
System Priority
0
A task Ti is eligible to execute ifprio(Ti) > system priority
![Page 49: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/49.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
Improving the locking protocol
Task 1
Task 3
Sharedresource 1
Prio=3
System ceiling
0
Execution time Critical section Blocking time
Task 2
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
Prio=3
Prio=1
Prio=2
System Priority
0
A task Ti is eligible to execute ifprio(Ti) > system priority
![Page 50: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/50.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
The Stack Resource Policy for Self-Suspending tasks (SRP-SS)
Task 1
Task 3
Prio=3
Prio=1
Sharedresource 1
Prio=3
System ceiling
0
Execution time Critical section Blocking time
Task 2 Prio=2
System Priority
0
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
𝝅𝒔𝒔= 1
𝝅𝒔𝒔= 0
𝝅𝒔𝒔= 1
A task Ti is eligible to execute ifprio(Ti) > system priority
![Page 51: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/51.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
The Stack Resource Policy for Self-Suspending tasks (SRP-SS)
Task 1
Task 3
Prio=3
Prio=1
Sharedresource 1
Prio=3
System ceiling
0
Execution time Critical section Blocking time
Task 2 Prio=2
System Priority
0
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
Maximum 𝜋𝑠𝑠
among all active tasks, i.e., started
and not completed
𝝅𝒔𝒔= 1
𝝅𝒔𝒔= 0
𝝅𝒔𝒔= 1
A task Ti is eligible to execute ifprio(Ti) > system priority
![Page 52: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/52.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
The Stack Resource Policy for Self-Suspending tasks (SRP-SS)
Task 1
Task 3
Prio=3
Prio=1
Sharedresource 1
Prio=3
System ceiling
0
Execution time Critical section Blocking time
Task 2 Prio=2
System Priority
0
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
𝜋𝑠𝑠= 1
𝜋𝑠𝑠= 0
𝜋𝑠𝑠= 1
A task Ti is eligible to execute ifprio(Ti) > system priority
Maximum 𝜋𝑠𝑠
among all active tasks, i.e., started
and not completed
![Page 53: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/53.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
The Stack Resource Policy for Self-Suspending tasks (SRP-SS)
Task 1
Task 3
Prio=3
Prio=1
Sharedresource 1
Prio=3
System ceiling
3
Execution time Critical section Blocking time
Task 2 Prio=2
System Priority
0
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
𝜋𝑠𝑠= 1
𝜋𝑠𝑠= 0
𝜋𝑠𝑠= 1
A task Ti is eligible to execute ifprio(Ti) > system priority
Maximum 𝜋𝑠𝑠
among all active tasks, i.e., started
and not completed
![Page 54: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/54.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
The Stack Resource Policy for Self-Suspending tasks (SRP-SS)
Task 1
Task 3
Prio=3
Prio=1
Sharedresource 1
Prio=3
System ceiling
3
Execution time Critical section Blocking time
Task 2 Prio=2
System Priority
0
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
𝜋𝑠𝑠= 1
𝜋𝑠𝑠= 0
𝜋𝑠𝑠= 1
A task Ti is eligible to execute ifprio(Ti) > system priority
Maximum 𝜋𝑠𝑠
among all active tasks, i.e., started
and not completed
![Page 55: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/55.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
The Stack Resource Policy for Self-Suspending tasks (SRP-SS)
Task 1
Task 3
Prio=3
Prio=1
Sharedresource 1
Prio=3
System ceiling
0
Execution time Critical section Blocking time
Task 2 Prio=2
System Priority
0
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
𝜋𝑠𝑠= 1
𝜋𝑠𝑠= 0
𝜋𝑠𝑠= 1
A task Ti is eligible to execute ifprio(Ti) > system priority
Maximum 𝜋𝑠𝑠
among all active tasks, i.e., started
and not completed
![Page 56: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/56.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
The Stack Resource Policy for Self-Suspending tasks (SRP-SS)
Task 1
Task 3
Prio=3
Prio=1
Sharedresource 1
Prio=3
System ceiling
0
Execution time Critical section Blocking time
Task 2 Prio=2
System Priority
1
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
𝜋𝑠𝑠= 1
𝜋𝑠𝑠= 0
𝜋𝑠𝑠= 1
A task Ti is eligible to execute ifprio(Ti) > system priority
Maximum 𝜋𝑠𝑠
among all active tasks, i.e., started
and not completed
![Page 57: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/57.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
The Stack Resource Policy for Self-Suspending tasks (SRP-SS)
Task 1
Task 3
Prio=3
Prio=1
Sharedresource 1
Prio=3
System ceiling
0
Execution time Critical section Blocking time
Task 2 Prio=2
System Priority
1
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
𝜋𝑠𝑠= 1
𝜋𝑠𝑠= 0
𝜋𝑠𝑠= 1
A task Ti is eligible to execute ifprio(Ti) > system priority
Maximum 𝜋𝑠𝑠
among all active tasks, i.e., started
and not completed
![Page 58: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/58.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
The Stack Resource Policy for Self-Suspending tasks (SRP-SS)
Task 1
Task 3
Prio=3
Prio=1
Sharedresource 1
Prio=3
System ceiling
0
Execution time Critical section Blocking time
Task 2 Prio=2
System Priority
0
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
𝜋𝑠𝑠= 1
𝜋𝑠𝑠= 0
𝜋𝑠𝑠= 1
A task Ti is eligible to execute ifprio(Ti) > system priority
Maximum 𝜋𝑠𝑠
among all active tasks, i.e., started
and not completed
![Page 59: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/59.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
The Stack Resource Policy for Self-Suspending tasks (SRP-SS)
Task 1
Task 3
Prio=3
Prio=1
Sharedresource 1
Prio=3
System ceiling
0
Execution time Critical section Blocking time
Task 2 Prio=2
System Priority
0
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
𝜋𝑠𝑠= 1
𝜋𝑠𝑠= 0
𝜋𝑠𝑠= 1
A task Ti is eligible to execute ifprio(Ti) > system priority
Maximum 𝜋𝑠𝑠
among all active tasks, i.e., started
and not completed
![Page 60: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/60.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Suspension
The Stack Resource Policy for Self-Suspending tasks (SRP-SS)
Task 1
Task 3
Prio=3
Prio=1
Sharedresource 1
Prio=2
System ceiling
0
Execution time Critical section Blocking time
Task 2 Prio=2
System Priority
0
A task T1 can preempt another task T2 if prio(T1) > prio(T2) and prio(T1) > system ceiling
𝜋𝑠𝑠= 1
𝜋𝑠𝑠= 0
𝜋𝑠𝑠= 1
A task Ti is eligible to execute ifprio(Ti) > system priority
Maximum 𝜋𝑠𝑠
among all active tasks, i.e., started
and not completed
Task 1 is not blocked by Task 3 anymore, but Task 3 may be blocked by Task 1➔ we avoided thepriority inversion
anymore
![Page 61: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/61.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Configuring SRP-SS
![Page 62: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/62.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Configuring SRP-SS
• New challenge:How do we assign values to the parameters 𝝅𝒔𝒔 in order to balance PI-blocking and blocking by self-suspensions?
![Page 63: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/63.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Configuring SRP-SS
• New challenge:How do we assign values to the parameters 𝝅𝒔𝒔 in order to balance PI-blocking and blocking by self-suspensions?
• A schedulability test and an iterative configuration algorithm is presented in the paper
• Effective but not optimal
![Page 64: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/64.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Configuring SRP-SS
• New challenge:How do we assign values to the parameters 𝝅𝒔𝒔 in order to balance PI-blocking and blocking by self-suspensions?
• A schedulability test and an iterative configuration algorithm is presented in the paper
• Effective but not optimal
• If all 𝜋𝑠𝑠=0, then SRP-SS is identical to SRP
![Page 65: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/65.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Configuring SRP-SS
• New challenge:How do we assign values to the parameters 𝝅𝒔𝒔 in order to balance PI-blocking and blocking by self-suspensions?
• A schedulability test and an iterative configuration algorithm is presented in the paper
• Effective but not optimal
• If all 𝜋𝑠𝑠=0, then SRP-SS is identical to SRP
• ➔ SRP-SS dominates SRP
![Page 66: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/66.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Results
![Page 67: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/67.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Results
SRPsimple analysis
Ideal locking protocol
![Page 68: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/68.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Results
SRPsimple analysis
SRPimproved analysis
Ideal locking protocol
![Page 69: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/69.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Results
SRPsimple analysis
SRPimproved analysis
SRP-SS
Ideal locking protocol
![Page 70: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/70.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Results
SRPsimple analysis
SRPimproved analysis
SRP-SS
Ideal locking protocol
![Page 71: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/71.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Conclusion
![Page 72: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/72.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Conclusion
• We developed a new response time analysis forself-suspending tasks using SRP
![Page 73: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/73.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Conclusion
• We developed a new response time analysis forself-suspending tasks using SRP
• We extended SRP to limit the number of priority inversions self-suspending tasks may suffer
• Adding one task parameter and system priority
![Page 74: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/74.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Conclusion
• We developed a new response time analysis forself-suspending tasks using SRP
• We extended SRP to limit the number of priority inversions self-suspending tasks may suffer
• Adding one task parameter and system priority
• The SRP-SS dominates the SRP
![Page 75: RTSS 2018 – 39th IEEE Real-Time Systems …2018.rtss.org/wp-content/uploads/2018/12/10-1.pdf2018/12/10 · Parallel applications partitioned on multicore platforms can be modelled](https://reader034.vdocuments.us/reader034/viewer/2022050217/5f634016bf235d77b60119a4/html5/thumbnails/75.jpg)
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
CISTER – Research Centre in
Real-Time & Embedded Computing Systems
Conclusion
• We developed a new response time analysis forself-suspending tasks using SRP
• We extended SRP to limit the number of priority inversions self-suspending tasks may suffer
• Adding one task parameter and system priority
• The SRP-SS dominates the SRP
• We propose a configuration algorithm of theSRP-SS to balance PI-blocking and interference suffered by low priority tasks