Radio Frequency (RF) Data CommunicationsBy Danny TonCourse: CSE 498Professor: Gaetano Borriello

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OverviewRadio Frequency (RF) IntroductionRF CharacteristicsRegulations on RF ProductsVirtual Wire RF Monolithics TransceiversRFM FeaturesRFM Data radio boardI/O interfaceTransmitterReceiverAGC/Antenna switch

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Overview (contd)Packet protocol boardI/O interfaceRS232 interfaceProtocol microcontrollerCMOS/RS232 level converterRFM link-layer packet protocolProtocol featuresPrinciples of operationFlow control

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Radio Frequency (RF) Intro.Where RF fits in the frequency spectrum

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Radio Frequency (RF) Intro. (contd)Wireless communication technologyRF is an alternating current which, if supplied to an antenna, will give rise to an electromagnetic field that propagates through spaceCheap and widely used Over 40 millions systems manufactured each year utilizing low-power wireless (RF) technology for data links, telemetry, control and securityWide range of applicationsCordless and cellular telephones, radio and television broadcast stations, hand-held computer and PDA data links, wireless bar-code readers, wireless keyboards for PCs, wireless security systems, consumer electronic remote control, etc.

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RF CharacteristicsLow powerTypically transmit less than 1mW of powerGood operating rangeOperate over distances of 3 to 30 metersSupports data rate up to 1-2 Mbps Penetrates wallsDoes not require a direct transmission path (as opposed to IR)

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Regulations On RF ProductsLow-power wireless (RF) systems operate on shared radio channels and hence are subject to regulation (by FCC in the US)Regulation general philosophy: Products do not significantly interfere with licensed radio systemsSpecify limitations on fundamental power, harmonic and spurious emission levels, transmitter frequency stability, and transmission bandwidthHowever, once certified to comply with communication regulations, RF products do not require a license (air-time fee) for operation

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Virtual Wire RF Monolithics TransceiversCommunication nodes capable of transmitting and receiving dataIntended for use to implement low-power wireless communications based on two-way half-duplex packet transmissions

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RFM FeaturesSerial interface (RS232)Power supply4.5 Vdc from three 1.5 V AAA batteriesOperating frequency: 916.50 MHzMaximum data rate: 22.5 kbpsOperating range: up to 25 metersObtained in an electrically quiet outdoor locationGreatly influenced by building construction materials and contents, other radio systems operating in the vicinity, and noise generated by nearby equipmentProvide link-layer packet protocol

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RFM ModulesRadio moduleRFM data radio boardTransmit and receive RF signalsProtocol module8-bit ATMEL AT89C2051 microcontroller on the protocol boardImplement link-layer packet protocolRS232 moduleMaxim MAX218 Dual RS232 transceiver on the protocol boardConvert to and from 4.5V CMOS and RS232 levelsInterface to host

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Data Radio Board

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Data Radio Board (contd)Maximum data rate 22.5 kbpsFrequency options916.5 MHzAntennaSimple base-loaded monopole soldered to the pad provided for the 50 ohm RF inputAlternatively, a 50-ohm coaxial cable can be soldered to the RF input pad and the adjacent ground, if a remotely located antenna is used

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Data Radio Board (contd)AGC adjustmentData radio boards are adjusted at RFM for an AGC voltage between 1.75 and 1.80 V on the node between the potentiometer, R10, and resistor R11 with no RF signal appliedThis setting doesnt affect the sensitivity level of the receiverAGC adjustment purposeThe desired signal must be larger than the undesired signal for the intelligible information to be obtained from the receiverAGC circuit is not to level the desired signal level but, rather, to prevent the saturation and eventual capture of the receivers demodulator by interfering in-band CW or FM signals (signals more than 20dB above the receiver sensitivity level)Turning the potentiometer counter-clockwise causes AGC voltage to increase and, thus, engages the gain control at a lower signal level and vice versa

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Data Radio Board - I/O InterfaceConnector P18-pin connector interface to the protocol boardPin 1Transmitter data input with input impedance of ~18 KCan be driven directly by a CMOS gateA high level voltage turns the transmitter oscillator on and a low level turns it offPin 2 and Pin 5VCC for the transmitter and GNDPin 3PTT line that enable the transmit mode

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Data Radio Board - I/O Interface (contd)When it is high (2.5 V minimum at 2.0 mA maximum), this line puts the transmit/receive RF switch in the transmit modePin 4Power line to the receiver AGC circuitry: 2.7 - 3.3 VPin 6Reference voltage output (VRef) from the hybrid receiver used in the low battery detection process on the protocol boardPin 7Power line to the receiver hybrid: 2.7 - 3.3 VPin 8Data output from the comparator in the receiver hybridCMOS compatible and capable of driving a single CMOS gate

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Data Radio Board - TransmitterAn HX surface mount hybrid device (HX2000)Pin 1Transmitter data input (connected to Pin 1 of connector P1)Pin 2Transmitter VCC power connectionHX hybrids are specified to draw a maximum peak current of 10 - 11 mA with a VCC of 3 V. Since the transmitter is only turned on when the data line is high, the average transmitter current depends on the duty cycle of the incoming dataPin 3Ground

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Data Radio Board - Transmitter (contd)Pin 4RF ouputThe RF output power of the HX is nominally 0dBm with a 50 loadThe transmitter power is applied to the antenna port through the transmit/receive switch Q1When the PTT line is pulled high, Q1 is turned on to connect the transmitter to the antenna, Q3 is turned on to short the receiver input to GND and Q2 is turned off to disconnect the receiver input from the antenna during transmission

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Data Radio Board - ReceiverAn RX hybrid receiver (RX2056)Pin 1VCC is applied to this pin from Pin 7 of connector P1Also connected to a 10 uF bypass capacitor, C5, which keeps the RX internal comparator switching noise out of the data base-band amplifier circuitry in the RXPin 2Base-band data outputSignal at Pin 2 is the demodulated filtered data before it is applied to the comparator input, on Pin 3Output from this Pin is DC coupled to the internal detector output

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Data Radio Board - Receiver (Contd)Pin 3Comparator inputOutput from Pin 2 is connected to this pin by the coupling capacitor C6Coupling capacitor C6Prevent the change in DC offset of the base-band amplifier from false triggering the comparatorPrevent the DC output from the detector, produced by an in-band CW or FM interfering signal, from triggering the comparator while allowing changes in DC level, due to the desired signal, to pass through to the comparator inputThe value of the coupling capacitor is determined by the longest pulse width to be encountered in the data stream

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Data Radio Board - Receiver (Contd)The capacitor must be large enough to prevent the long data pulses from sagging at the comparator inputPin 4DC GNDPin 5The comparator threshold override pinIf it is left open, the threshold voltage for comparator is 25mV. This voltage level is very desirable for the lower frequency, full sensitivity receivers to reduce spurious noise at the comparator outputIf it is grounded, the threshold voltage is zero volts. This is desirable for the 916.5 MHz receivers to obtain maximum sensitivity possible

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Data Radio Board - Receiver (Contd)To avoid spurious noise on the comparator output of the 916.5 MHz receivers, use a 10 M resistor, R4, from Pin 3 to GND. This resistor effectively reduces to DC offset on the comparator output, which is equivalent to using a very low threshold levelPin 6The reference voltage output of the power supply included in the custom IC used in the RXThis pin must be bypassed by a 1 uF capacitor, C4, to avoid comparator switching noise in the base-band amplifier.Pin 7The comparator output or data outputThe comparator is capable of driving a single CMOS gate input

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Data Radio Board - Receiver (Contd)Pins 8 and 9RF groundsPin 10RF input port of the RX deviceThis port is driven from a 50 source

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Data Radio Board - AGC/Antenna SwitchIssueThe out-of-band interfering signal rejection of the amplifier-sequenced receiver architecture is excellent and allows the receiver to perform in the presence of large interfering signals without range degradationHowever, this does not take care of in-band interference. The majority of in-band interference encountered is CW and primarily comes from unintentional radiators such as clock harmonics from computers or local oscillators from superheterodyne receiversAn AGC circuit primarily intended for CW or FM in-band interfering signals. These signals are of particular concern in an office environment

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Data Radio Board - AGC/Antenna Switch (contd)The RX receiver has capacitive coupling between the base-band amplifier output and the comparator inputHence, the DC level generated in the detector and base-band amplifier by either an FM or a CW signal is blocked from the comparator input and only desired signal passesHowever, the DC level at which the detector and its associated base-band amplifier saturate is limited (approximately -80 dBm for 433.92 MHz, and -50 dBm for 916.5 MHz)

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Data Radio Board - AGC/Antenna Switch (contd)The AGC circuit used on the data radio board is to prevent saturation of the detector and base-band amplifier by keeping such in-band interfering signals below the saturation level at the receiver inputAn RF attenuator (particularly transistors Q2 and Q3) is placed between the antenna and the receiver input, effectively extends the range over which the receiver can operate w/o saturation by 40 dB (20 dB for each transistor)

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Data Radio Board - AGC/Antenna Switch (contd)The RF attenuators Q1, Q2, and Q3 also serve as the transmit/receive RF switch for the radio boardIn transmit mode, the PTT line is pulled high, overriding the AGC circuit by directly biasing the bases of Q1 and Q3 on and turning the base of Q2 off through R15 and U1B. This connects the transmitter to the antenna port and disconnects the receiver from the antenna portIn receive mode, PTT is low, allowing the receiver to be connected to the antenna port with its input level controlled by the AGC circuit only

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Packet Protocol Board

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Packet Protocol Board (contd)Why not connect the data radio board directly to a computer serial port using an RS232 to CMOS level converter?Error detection limited to byte parity checking: many errors go undetectedGreatly reduce the data radios range due to very poor DC balance in the dataThe protocol microcontroller provides data-link protocolerror dectectionautomatic message retransmissionmessage routinglink alarms and DC-balanced packet coding

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Packet Protocol Board (contd)Node address programmingMaximum of 15 nodes addresses, set by placing jumpers on the double row of pins located between the two ICs

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Packet Protocol Board (contd)Power supply options4.5 Vdc nominal from three 1.5 V AAA batteriesRS232 interfaceLevel conversion from 4.5V CMOS to RS232 levels is provided by the MAX 218 IC.It is possible to remove this IC and jumper socket Pin 7 to 14 and Pin 9 to 12 for direct CMOS operationLED functions: Three LED indicators are provided on the protocol boardRXI indicates RF signals are being received (Diode D5)RF RCV indicates a valid RF packet has been received (DiodeD4)PC RCV indicates a message has been received from PC (Diode D3)

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Packet Protocol Board - I/O InterfaceConnector J1The I/O interface between the protocol and data radio boards8 pinsPin 1Carry the transmit data stream from U2-Pin 7 to the RTX input on the data radio boardPin 2Provide power to the transmitter hybrid on the radio boardPin 3Provide the transmit enable signal (PTT) from PNP transitor Q2The data radio board requires 2 mA at 2.5 V on the PTT input to enable the transmit mode

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Packet Protocol Board - I/O Interface (contd)Pin 4Provide power to the receiver AGC circuitryPin 5 - GNDPin 6The reference voltage input (VREF) from the hybrid receiver to the protocol board, used in the low battery detection processPin 7Provide power to the receiver hybridPin 8Receiver output signal (RRX) from the data radio boardFET Q1 provides the required high input impedance buffer between this signal and the input to U2

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Packet Protocol Board - RS232 InterfaceConnector J29-pin female connector configured to appear as a DCE (modem)The protocol board implements software flow control, so only Pins 2 and 3 carry active signalPin 2 (RD or PTX)Send data to the host computerPin 3 (TD or PRX)Receive data from the host computerPins 4 and 6 (DTR & DSR) are connected; Pins 1, 7, and 8 are also connectedPin 5 - GND

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Packet Protocol BoardProtocol MicrocontrollerImplements the link-layer protocolAn 8-bit ATMEL AT89C2051 Microcontroller (U2)Operates from an 22.118 MHz quartz crystal2 Kbytes of flash PEROM memory and 128 bytes of RAMTwo 16-bit timers A hardware serial portThe timers and hardware serial port makes it especially suitable as a link-layer packet controllerThe timers, serial port and input interrupts remain active while the processor is in the power-saving idle mode, allowing the link-layer protocol to be implemented on a low average current budget

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Packet Protocol BoardProtocol Microcontroller (contd)Inputs to the microcontrollerNode programming pins ID0 - ID3 (Pins 14, 15, 16, and 17)The buffered receive data (RRX) on Pin 6The CMOS-level input from the host computer (Pin 2)The reference voltage (VREF) input on Pin 13Outputs from the microcontrollerThe transmit data on Pin 7The data output to the host computer on Pin 3The transmit enable signal on Pin 19The RS232-transceiver control on Pin 18The LED outputs on Pins 8 (RXI), 9 (RF RCV) and 11 (PC RCV)Diode D2 and capacitor C7 form the power-up reset circuit for the microcontroller

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Packet Protocol BoardCMOS/RS232 Level ConverterConversion to and from RS232 and 4.5V CMOS logic levels is done by a Maxim MAX218 Dual RS232 Transceiver (U1)The operation of MAX218 is controlled by the microcontroller (U2) to minimize average current consumptionL1, D1, and C5 operate in conjunction with the ICs switch-mode power supply to generate +/-6.5 V for the transmitter and receiver conversionsPin 3 on the MAX 218Controls the switched-mode supply via U2 Pin 18

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Packet Protocol BoardCMOS/RS232 Level Converter (contd)The RS232 serial input signal from J2-Pin 3 is input on U1-Pin 12 and is converted to a 3V CMOS level (note inversion) and output on U1-Pin 9The CMOS serial output signal from U2-Pin 2 is input on U1-Pin 9 and converted to an RS232 output (note inversion) on U1-Pin 12. This signal is found on J2-Pin 3Bypass RS232 conversion for direct CMOS operation by removing U1 from its socket and placing one jumper in socket Pins 7 and 14 and a second jumper in socket Pins 9 and 12

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RFM Link-Layer Packet ProtocolFirmware running on the protocol boardProvide automatic, verified, error-free transmission of messages between Virtual Wire radio nodesRadio packet formatProvide link-layer interface between a Virtual Wire transceiver and its host processor via serial connectionRS232 packet format

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RFM Link-Layer Packet Protocol (contd)Radio packet formatTo/From:

To (higher 4 bits): receiver node addressFrom (lower 4 bits): sender node address0x00: broadcast packet15 different node addresses availablePacket number byte: 1-7Data size byte:Number of actual data bytesMessage dataASCII or binary, up to 32 bytes16-bit FCS (Frame Check Sequence)16-bit ISO 3309 error detection calculation to test message integrityThe calculation is based on all bits in the message following the start symbol

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RFM Link-Layer Packet Protocol (contd)RS232-side packet formatRadio packet format without the Start symbol and the 16-bit FCSExample of a RS232-side packet from node 3 to node 2, with one is the packet number, containing 3 bytes of data 23 01 03 02 1C 03

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RFM Link-Layer Packet Protocol (contd)Automatic packet retransmission until acknowledgment is received; 8 retries with semi-random back-off delays (0, 120, 240, or 360 ms)ACK and NAK alarm messages to hostOperation on both the RS232 side and the radio side is half-duplexThe protocol software services one input line at a time (radio or RS232 receive line)Since the protocol does not support hardware flow control, host software will have to do some timekeeping to interface to the protocol software (avoid sending data if RFM is busy)

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Theory of OperationOperation of RS232 serial connections19.2 kbpsEight data bits (byte), one stop bit, and no parity bitRadio operationTransmission rate of 22.5 kbps, using 12-bit dc-balanced symbol representing the data byteRadio receiver is slightly squelched when not receiving data, and will output occasional random positive noise spikesMessages are sent and received from the RS232 interface in standard asynchronous format via PTX and PRX

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Theory of Operation (contd)I/O lines on the protocol microcontrollerRRX - radio receive line (J1-8)RTX - radio transmit line (J1-1)PTT - radio transmit/receive control line, high on transmit (J1-3)PRX - RS232 receive line (J2-3)PTX - RS232 transmit line (J2-2)RXI, RF RCV, PC RCV - three LED control lines

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Theory of Operation (contd)The protocol software continually tests the RRX and the PRX lines searching for a start bitWhen the start bit is detected on one of the input lines (radio or RS232), the software will attempt to receive a message on that input lineIf error is detected, the message will be discarded and the software will resume testing the input linesIf a valid message is received on the PRX input line, the software will format a radio packet from the message and queue the packet for xmission

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Theory of Operation (contd)Each byte xmitted by the radio is converted into a 12 bit, dc-balanced symbol for best noise immunityThe queued packet is xmitted (RTX line with PTT high), and the software then looks for a packet received ACK (on the RRX line)Radio ACK: | 0x55 | RS232 ACK | FCS |On acknowledgement of the queued packet, an ACK (less Start symbol and FCS) is sent to host on PTX line, and the queued packet is discarded. The software then resumes testing the input lines

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Theory of Operation (contd)If an acknowledgement packet is not received in 120ms, the packet is then resent after a randomly selected delay of 0, 120, 240 or 360ms.If the packed is not acknowledged after a total of eight tries, the software will send a NAK message to host on the PTX line, discard the queued packet, and resume testing the input lines

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Theory of Operation (contd)When a start symbol is detected on the RRX line, the software will attempt to receive and verify a message by checking for a correct TO/FROM address, a valid packet sequence number, and a valid number of data bytes (or ACK character), and a correct FCS calculationIf the message is not valid, it is discarded and testing the input lines is resumed

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Theory of Operation (contd)If the packet is verified and the TO nibble matches, the TO/FROM address, packet sequence number, number of data bytes and the data bytes of the message (i.e a RS232-side packet) are sent out on the PTX line, and a radio ACK is transmitted back on the RTX line.If an acknowledged packet is received a second time (based on the current value of the message sequence counter), it is reacked on RTX but not retransmitted on PTX

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Theory of Operation (contd)The software will accept message packets and acknowledgement packets in any sesquenceBroadcastingThe TO/FROM address of 0x00 is treated as a broadcast packet. In this case, a received packet is sent out on the PTX line if the number of data bytes are in a valid range and the FCS calculation matches.A broadcast packet is not acknowledged by the receiving node(s)In the broadcast mode, the packet is transmitted eight times to enhance probability or reception.

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Flow ControlThe protocol software does not support flow control If a start bit is detected on either RRX or PRX, the software receives and acts on the information on that input line and doesnt service the other input line until it has received and acted on the data of the first input lineHost application will have to do some timekeeping to make sure that the RFM is not busy. This is done by sending just the To/From address byte to the RFM

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Flow Control (contd)If this byte is echoed back within 50ms, host application has control of the PRX interrupt process and can send the rest of the packet in the following 200msElse, it can assume that the RFM is busy on an RRX interrupt either receiving a packet or tripped by receiver output noise. The host program should hold off about 100ms and retry.An inbound packet can occur at any time, so any character with the high nibble equal to the local node address or any 0x00 byte should be processed to test for a valid message

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Sample CodesRFSend(Byte ToFrom, Char* Data){FIRST:SerSend(ToFrom, 1);

SECOND:begin = TimGetTicks();do {end = TimGetTicks();SerReceiveCheck(&numBytes);} while(numBytes < 0 && (end-begin/100) < .05);

THIRD:if(numBytes > 0) { SerReceive(rcvQueue, numBytes); if(rcvQueue[0] == ToFrom) { SerSend(pktNum, 1); SerSend(StrLen(data), 1); SerSend(data, StrLen(data));FIRST:Send ToFrom byte to RFMSECOND:Check to see if anything is echoed back in 50msTHIRD:Check to see if this byte is the ToFrom byteIf it is, then RFM is ready for the rest of the packet: packet number, data size, and actual data; else, can assume that RFM is busy.Note: assume data size is less than 32 bytes, which is the maximum number of bytes that a packet can take

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Sample Codes (contd)FOURTH: SerReceive(rcvQueue, 3); switch(rcvQueue[2]) {case 0xE1:case 0xE2:case 0xE3:case 0xE4:case 0xE5:case 0xE6:case 0xE7:case 0xE8: if(++pktNum >= 8) pktNum = 1;return true;case 0xDD: return false; } }}return false;}FOURTH:Receive the echo-back packet (3 bytes in size)If the last byte is 0xEn where n = 1 - 8 (the number of retries), then the packet is the ACK, and data is successfully sent and received; Else, if the last byte is 0xDD, it is the NAK, signaling a link failure

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Sample Codes (contd)RFReceive(Byte localAddr, Byte* From, Byte* PktNum, Char* retData){FIRST:SerReceiveCheck(&numBytes);if (numBytes > 3) { SerReceive(rcvQueue, 1);SECOND: if ((rcvQueue[0] >> 4) == localAddr) {SerReceive(rcvQueue+1, 2);*From = rcvQueue[0] & 0x0F; // Get FROM nibble*PktNum = rcvQueue[1];SerReceive(rcvQueue+3, rcvQueue[2]);StrCopy(retData, rcvQueue+3);return true; }}return false;}FIRST:Check the serial receive queue to see whether at least 3 bytes have been received (To/From, packet number, packet size)SECOND:Get the first byte to see if it is equal to the local node addressIf it is, get the next 2 bytes: packet number and packet size, and then get the rest of the packet based on the packet size received;Else, do nothing

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