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RF circuits designGrzegorz BeziukGrzegorz Beziuk
RF Amplifier design
References[1] Tietze U., Schenk C., Electronic circuits : handbook for design and applications, Springer
2008
[2] Pozar D. M., Microwave engineering –3rd edition, 2005, John Wiley and Sons, Inc.
[3] Bowick C., RF circuit design, 1997, Newnes, Elsevier Science
[4] Wadell B. C., Transmission line design handbook, 1991, Artech House, Inc.
[5] Agilent Technology, A comparison of various bipolar transistor biasing circuits, Agilent
Technology Application Note 1293
[6] Avago Technologies, Microwave transistor bias consideration, Avago Technologies
Application Note 944 – 1.
Amplifier block diagram
RF
transistor
[S]
Output
matching
circuit
Input
matching
circuit
BIAS
circuit
ZG
ZL
Amplifier parameters
- Gain – maximum or specified
- Bandwidth – wide bandwidth or single
frequency
- Noise Figure
- Source impedance
- Load Impedance
- Output power for a power amplifier
Transistor selection
- Gain – maximum
- Cut off frequency (fT)
- Noise characteristic
- Maximum power for a power amplifier
Datasheet and/or *.s2p (measured for
selected operating point) file delivered by
transistor manufacturer
Transistor selection - datasheet
Transistor selection - datasheet
Transistor selection - datasheet
Transistor selection - datasheet
Transistor selection –
datasheet/*.s2p file
Transistor S matrix can be taken from a datasheet
or downloaded from transistor manufacturer
website as a *s2p file.
The *.s2p file can be created also with the
transistor S parameters taken from datasheet.
Transistor selection
– *.s2p file
! Filename: BFR92AC.S2P Version: 2.0
! Philips part #: BFR92A Date: May 1990
! Bias condition: Vce=5V, Ic=10mA
!
# MHz S MA R 50
! Freq S11 S21 S12 S22 !GUM [dB]
40 .669 -16.6 23.024 164.2 .008 79.9 .970 -8.2 ! 42.1
100 .593 -39.2 19.631 145.4 .020 72.1 .873 -17.5 ! 34.0
200 .449 -67.6 14.753 125.9 .033 68.7 .716 -24.7 ! 27.5
300 .356 -86.7 11.181 113.9 .043 66.2 .620 -26.8 ! 23.7
400 .313 -99.2 8.899 106.3 .052 68.0 .562 -27.2 ! 21.1
500 .275 -113.9 7.512 99.9 .060 67.4 .531 -26.9 ! 19.3
600 .243 -120.1 6.336 95.7 .070 69.7 .512 -26.9 ! 17.6
700 .219 -127.0 5.513 92.2 .078 71.3 .499 -26.9 ! 16.3
800 .213 -139.5 4.868 88.8 .089 72.4 .494 -27.0 ! 15.2
900 .194 -144.7 4.391 85.8 .098 72.5 .488 -27.2 ! 14.2
1000 .182 -156.2 3.953 82.4 .106 73.1 .479 -27.4 ! 13.2
1200 .190 -163.4 3.339 77.5 .125 73.5 .472 -28.3 ! 11.7
1400 .193 -175.5 2.945 72.4 .144 73.3 .465 -30.1 ! 10.6
1600 .185 -179.0 2.626 69.3 .163 73.6 .466 -31.4 ! 9.6
1800 .163 163.1 2.316 65.0 .181 73.3 .465 -32.8 ! 8.5
2000 .179 156.0 2.174 61.7 .200 72.6 .462 -34.0 ! 7.9
2200 .210 142.6 1.977 57.6 .219 72.5 .443 -35.4 ! 7.1
2400 .216 144.8 1.857 54.6 .240 71.1 .429 -38.9 ! 6.5
2600 .230 143.8 1.762 52.1 .258 70.5 .424 -42.4 ! 6.0
2800 .213 136.1 1.657 49.3 .279 70.0 .427 -44.9 ! 5.5
3000 .240 127.1 1.571 45.5 .299 68.6 .419 -46.0 ! 5.0
Ansoft Designer
Transistor
selection –
*.s2p file
( )
++
++=
=
jsimsrejsimsre
jsimsrejsimsre
ss
ssS
)()()()(
)()()(
22222121
12121111
2221
1211
Transistor selection – stability check
Test for unconditional
stability:
(eq. 1 and eq. 2)
<⋅−⋅=∆
>∆+−−
=
1
12
1
21122211
2112
22
22
2
11
ssss
ss
ssK
Transistor selection – gain
definitionsPower Gain = G = PL/Pin – the ratio of the power dissipated in the
load ZL to the power delivered to the amplifier input
Available Power Gain = GA = Pavn/Pavs – the ratio of the power
available from the amplifier to the power available from the
source. This assumes conjugate matching of both the source and
the load. Depends on ZS and ZL
Transducer Power Gain = GT = PL/Pavs – the ratio of the power
delivered to the load to the power available from the source.
Depends on ZS and ZL
Transistor selection – gain definitions
RF
transistor
[S]
G0
Output
matching
circuit
GL
Input
matching
circuit
GS
ZG
ZL
ΓS
Γin
Γout
ΓL
2
11
2
1
1
S
S
S
sG
Γ−
Γ−=
2
210 sG =
2
22
2
1
1
L
L
L
sG
Γ−
Γ−=
(eq. 4)(eq. 3)
(eq. 5)
0
0
ZZ
ZZ
S
SS
+
−=Γ
0
0
ZZ
ZZ
L
LL
+
−=Γ
(eq. 6) (eq. 7)
unilateral case (s12 = 0):
LSTU GGGG 0max = ][][][][ 0max dBGdBGdBGdBG LSTU ++=or (eq. 9)(eq. 8)
-----------------------------------------------------------------------------------------------------------------
Transistor input and output reflection
coefficients
RF
transistor
[S]
G0
Output
matching
circuit
GL
Input
matching
circuit
GS
ZG
ZL
ΓS
Γin
Γout
ΓL
L
L
in
inin
s
sss
ZZ
ZZ
Γ−
Γ+=
+
−=Γ
22
211211
0
0
1S
S
out
outout
s
sss
ZZ
ZZ
Γ−
Γ+=
+
−=Γ
11
211222
0
0
1
Remark: every reflection coefficient definition is related to Z0. Thus, Z0
( = usually 50 Ω) is treated as reference impedance.
(eq. 10) (eq. 11)
Maximum power transfer -
impedance matching
Lg
Lgout
RR
RVU
+=
gL
g
outRR
VI
+=
( )22
gL
Lg
outoutoutRR
RVIUP
+==
( ) ( )( )
0max =→L
outout
Rd
PdP
( )( ) ( ) ( )3
2
2
2 2
gL
gL
gL
g
L
out
RR
VR
RR
V
Rd
Pd
+−
+=
( )( ) gL
L
out RRRd
Pd=⇒= 0
Maximum power transfer -
conjugate matching idea
⇒
⇓gL XX −=
(for the specific frequency)
⇐
Transistor input and output
conjugate matching
Maximum power transfer from input to transistor and from
transistor to output occur for:
*
Sin Γ=Γ *
Lout Γ=Γand
The input and output must be matched simultaneously:
Γ−
Γ+=Γ
Γ−
Γ+=Γ
S
SL
L
LS
s
sss
s
sss
11
211222
*
22
211211
*
1
1
(eq.12) (eq.13)
Transistor input and output
conjugate matching
From the system of equations we obtain quadratic equation
for ΓS (or ΓL):
( ) ( ) ( ) 01 22
**
11
2
22
2
11
22*
2211 =∆−+Γ−+−∆+Γ∆− ssssss SS
The solution is:
1
2
1
2
11
2
4
C
CBBS
−±=Γ
2
2
2
2
22
2
4
C
CBBL
−±=Γ
22
22
2
111 1 ∆−−+= ssB
22
11
2
222 1 ∆−−+= ssB
*
22111 ssC ∆−=
*
11222 ssC ∆−=
The signs in eq. 14 and 15 are opposite to signs of B1 and B1, respectively.
(eq.14)
(eq.15)
Transistor input and output
conjugate matchingThen, from (eq.3 and eq.4) we can calculate the
impedances Zin and Zout that satisfy conjugate matching at
transistor input and output:
*
0
*
1
1
Γ−
+Γ==
S
SSin ZZZ
*
0
*
1
1
Γ−
+Γ==
L
LLout ZZZ(eq.16) (eq.17)
Now, we have to choice the matching circuit implementation
(type): lumped elements, distributed elements, single or
double stubs tuning technique, tappered line a. s. o..
Matching with shunt single stub
technique
General circuit
YL
d
lopen or
shorted
stub
Y0
Y0
Y0 = 1/Z
0 ZL = R
L + jX
L
d
lopen
stub
Z0
Z0
Z0
d
lshorted
stub
Z0
Z0
Z0
ZL = R
L + jX
L
Zg = R
g = Z
0
Zg = R
g = Z
0
⇒
Matching circuit fabricated with
microstrip technique
Matching with shunt single stub
technique
( )
( )( )
<+
≥
=
0,2
1
0,2
1
tfortarctg
tfortarctgd
ππ
π
λ
( )[ ]
=−
≠−
+−±
=
0
0
0
0
0
22
0
,2
,/
ZRforZ
X
ZRforZR
ZXRZRX
t
LL
L
L
LLLL
A distance from load to the stub:
(eq.18)
(eq.19)
Matching with shunt single stub
techniqueStub length:
Open: ( )BZarctglopen
02
1
πλ−=
=
BZarctg
lshorted
0
1
2
1
πλShorted:
( )( )( )[ ]20
2
0
00
2
tZXRZ
tZXtXZtRB
LL
LLL
++
+−−=
(eq.20)
(eq.21)
The other microstrip matching circuit types are described in details in [2]. The
references [1,3] describe the matching techniques, as well: [1] briefly, [3] for RF
frequency region f <1 GHz (circuits with lumped elements).
RF Transistor Bias CircuitsTransistor RF properties (S parameters vs. frequency) depends on its
operating point.
The operating point is set up by appropriate transistor bias circuit delivered IB,
IC and UCE to RF transistor.
For low and middle frequency region of RF frequency band (f > 2GHz) the
biasing circuits usually are similar to bias circuits use at low frequencies
(passive, resistive), described in details on Electronic Circuits course and in
[5,6]. One difference is that the bias circuit is connected to the transistor
terminals through RF chokes.
For middle and high frequency band (f > 1GHz) active bias circuits (current
sources or mirrors) are applied to improve a temperature stability of the
transistor parameters. They were considered on Electronic Circuit course, as
well.
RF Transistor Bias CircuitsThe separation between DC bias amplifier circuit and RF amplifier part.
BIAS
CIRCUIT
RF CHOKE RF CHOKE
BYPEPASS
CAPACITOR
BYPEPASS
CAPACITOR
INPUT
MATCHING
CIRCUIT
OUTPUT
MATCHING
CIRCUIT
DC
BLOCK
DC
BLOCK
RF
OUTPUT
RF
INPUT
RF Transistor Bias CircuitsThe separation between DC bias amplifier circuit and RF amplifier part in
microstrip technique.
Radial Stub dimentions
can be calculated with
[4] or using web
calculator :
http://www.flambda.com/
php/stub/stub.phpRF CHOKE
BYPEPASS
CAPACITOR
RADIAL
STUB
λ/4
to bias
circuit
or
λ/4
λ/4
to bias
circuit
As narrow as possible
(high Z) microstrip
transmission lines
Uto transistor to transistor
Example of RF amplifier design
Task: Design RF amplifier for maximum gain at 1.5 GHz
using single, open stub, shunt matching section; Zg = ZL =
Z0 = 50Ω. The amplifier will be fabricated on FR4
substrate:εr = 4.5, H = 1.5mm, copper thickness 35 µm.
Supply voltage UCC = 9V.
1. Transistor selection (on the basis of datasheet) : BFR92A
(βDC = 90, GUM = 14 dB (1 GHz), fT = 5GHz)
2. With Ansoft Designer you can determine S parameters at
1.5GHz, for selected operating point.
Example of RF amplifier design2a. Create schematic as below (use N-port element instead of
transistor).
2b. Choose transistor operating point UCE = 5V, IC = 10 mA. Download to N-
port element the BFR92AC.s2p file (S parameters measured for selected
operating point).
2c. Simulate circuit for a frequencies 0.1 – 3GHz, with step 0.01GHz.
2d. Read out magnitude and angle values of every sXX parameter at 1.5
GHz.
Example of RF amplifier design
Mag(S)
Example of RF amplifier design
Angle(S)
Example of RF amplifier design
°−∠=°∠=
°∠=°−∠==
77.3047.08.7078.2
46.7315.031.17719.0
2221
1211
ss
ssS
S matrix:
3. With eq. 1 and eq. 2 calculate transistor stability factor
=⋅−⋅=∆
=∆+−−
=
328.0
02.12
1
21122211
2112
22
22
2
11
ssss
ss
ssK
Because K>1 and |∆|<1 at f = 1.5 GHz transistor is unconditional stable.
3a. Check transistor stability frequency range with Ansoft.
Example of RF amplifier design
Example of RF amplifier designTransistor is stable for frequencies from 0.95 GHz to 2.48 GHz. Stability coefficient
K at 1.5 GHz is equal to 1.01; the difference between calculated and simulated K
values is caused by a precision of S matrix reading out from the sxx traces.
4. For maximum gain you should design matching sections for a conjugate match.
Using eq. 14 and eq. 15 determine source and load reflection coefficients:
°−∠=−±
=Γ 32.1787831.02
4
1
2
1
2
11
C
CBBS
°∠=−±
=Γ 9.318532.02
4
2
2
2
2
22
C
CBBL
Example of RF amplifier design
5. Maximum (unilateral) amplifier gain can be calculated with eq.: 5,6,7,8, and 9.
5859.21
12
11
2
=Γ−
Γ−=
S
S
S
sG
7284.72
210 == sG
7579.01
12
22
2
=Γ−
Γ−
L
L
L
sG
1454.150max == LSTU GGGG
][8.11][][][][ 0 dBdBGdBGdBGdBG LSTUma =++=
)log(10][ GdBG =Remember:
remark: The gain of amplifier will be less than calculated GTUmax because
transistor is not unilateral (s12 ≠ 0).
Example of RF amplifier design6. Now you can calculate input and output transistor impedances (using eq.
16 and eq. 17):
jZZZS
SSin 72.00826.6
1
1*
0
* +=
Γ−
+Γ==
jZZZL
LLout 4.16168.48
1
1*
0
* −=
Γ−
+Γ==
7. Next, calculate the parameters of the input and the output matching
circuits using eq. 18, 19 and 20.
Example of RF amplifier design7a. Input matching circuit calculation:
( )[ ]3652.0
/
0
0
22
0
1 −=−
+−+=
ZR
ZXRZRXt
L
LLLL
in
( )[ ]3324.0
/
0
0
22
0
2 =−
+−+=
ZR
ZXRZRXt
L
LLLL
in
( ) °=== 39.180511.02
12 λπλ
tarctgd in
( )( ) °==+= 94.159443.02
11 λππλ
tarctgd in
Stub distance from the amplifier input:
Stub length:
( )( )( )[ ] 0504.0
2
10
2
0
1010
2
1 =++
+−−=
inLL
inLinLLin
tZXRZ
tZXtXZtRB
( )( )( )[ ] 0504.0
2
20
2
0
2020
2
2 −=++
+−−=
inLL
inLinLLin
tZXRZ
tZXtXZtRB
( )
°=+−=
=−=−=
67.1115.01898.0
1898.02
110
1
λλ
λπλ
in
inopenBZarctg
l
( ) °==−= 32.681898.02
120
2 λπλ
in
inopenBZarctg
l
Example of RF amplifier designnote1: if some od calculated dimension of d or l is negative just add to it
0.5λ.
note2: you got two solutions od the matching circuit dimensions, both of
them are valid.
7b. Output matching circuit calculation:
Let’s choose the solutions: d2in = 18.39o, lopen2in = 68.32
o, d2out = 89.76o, lopen2out = 73
o.
6209.11 =outt °== 32.58162.01 λλoutd
0654.01 =outB°=+−=
=−=
99.1065.02028.0
2028.01
λλ
λλ
outopenl
31.2432 =outt °== 76.892493.02 λλoutd
0654.02 −=outB °== 732028.02 λ
λ
outopenl
Example of RF amplifier design
Amplifier circuit without DC biasing circuit. The Transmission Lines (TL) impedance
is equal to 50Ω. TL width (2.77 mm) was calculated with Ansoft TL calculator.
Example of RF amplifier design
Example of RF amplifier design
Example of RF amplifier design
Example of RF amplifier design
Example of RF amplifier design8. Bias circuit.
Bias circuit was calculated for:
UCE = 5V, IC = 10mA, UCC = 9V,
UBE = 0.65V, βDC = 0.65V. RB3
= 1k was assumed. After the
resistors calculations the circuit
Pspice simulation was carried
out. Pspice BFR92A model
requires modification of BF
parameter from 120 to 102 in
order to simulate with betaDC =
90. Finally, UCE = 4.95V and IC =
10.1mA operating point was
achieved.
Example of RF amplifier design9. RF chokes.
Dimentions of Radial Stub,
with assumption that RI =
0.5W, were calculated with
calculator on:
http://www.flambda.com/php/st
ub/stub.php.
The length of l\4 line was
calculated with Ansoft TL
Calculator. The line width was
assumed 0.4mm.
P = λ/4=29.2mm
U
W = 0.4mm
RI = 0.15mm
RL = 15.53mm
A = 90o
Example of RF amplifier design
Final
amplifier
circuit
Example of RF amplifier design
Example of RF amplifier design
Example of RF amplifier design
Example of RF amplifier design
Example of RF amplifier design
Example of RF amplifier design
Example of RF amplifier design
Example of RF amplifier design
Example of RF amplifier design