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Master of Technology IIT,Hyderabad Kunal Yadav 25, Male, +91-8985201547 Languages: English, Hindi Gmail id:kunalyadav2@gmail.com linkedin:in.linkedin.com/in/kunalyadav2 Objective Always seeking innovative and challenging career in the professionally managed and dynamic organization, which provides the best opportunities for the development and greater responsibilities to contribute towards organization. Academic Qualification Year Qualification Institution CGPA/% 2016 M-Tech (Microelectronics & VLSI) IIT Hyderabad 9.38 (as of Nov’15) 2011 B-Tech (Electronics & Communication) Kurukshetra University 71.94% 2007 AISSCE Pratap Public School, Karnal 76.20% 2005 AISSE Pratap Public School, Karnal 77.80% Area of interest Analog/Mixed signal integrated circuit design, Data convertors, Digital circuit & Memory design, Embedded System. Research Projects Design of Ultra Low Power 10 bit Successive Approximation Analog to Digital Converter for Biomedical Application. (180nm CMOS Technology, VDD=1V, Itotal=43nA) (Aug’13 present) Designed 10 bit, 1KSps, 43nW charge redistribution SAR ADC in 180nm technology node. Designed single ended and fully differential architecture. Experimenting with new topology of charge redistribution (Merged capacitor, Split capacitor) to achieve low power. Design of Ultra Low Power Analog Front End for ECG signal. (180nm CMOS Technology, VDD=1V, Itotal=300nA, Bandwidth= .05 - 250Hz) (Jan’15) Designed Instrumentation amplifier, Programmable gain amplifier (PGA), mixed signal Automatic gain control for PGA. Trans-conductance cancellation technique used in instrumentation amplifier to lower common mode gain (CMRR=70dB). Design of Band-gap Reference Circuit. (180nm CMOS Technology, VDD=1.8V) (Jul’15) Designed a 1.12V BGR circuit with temperature coefficient of 28.4 ppm/ 0 C in the range of -40 to +120 0 C.

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Page 1: Resume_updated@25-04-2016

Master of Technology IIT,Hyderabad

Kunal Yadav

25, Male, +91-8985201547

Languages: English, Hindi

Gmail id:[email protected]

linkedin:in.linkedin.com/in/kunalyadav2

Objective

Always seeking innovative and challenging career in the professionally managed and dynamic organization, which

provides the best opportunities for the development and greater responsibilities to contribute towards organization.

Academic Qualification

Year Qualification Institution CGPA/%

2016 M-Tech

(Microelectronics & VLSI) IIT Hyderabad 9.38 (as of Nov’15)

2011 B-Tech

(Electronics & Communication) Kurukshetra University 71.94%

2007 AISSCE Pratap Public School, Karnal 76.20%

2005 AISSE Pratap Public School, Karnal 77.80%

Area of interest

Analog/Mixed signal integrated circuit design, Data convertors, Digital circuit & Memory design,

Embedded System.

Research Projects

Design of Ultra Low Power 10 bit Successive Approximation Analog to Digital

Converter for Biomedical Application. (180nm CMOS Technology, VDD=1V, Itotal=43nA) (Aug’13 –present)

Designed 10 bit, 1KSps, 43nW charge redistribution SAR ADC in 180nm technology node.

Designed single ended and fully differential architecture.

Experimenting with new topology of charge redistribution (Merged capacitor, Split capacitor) to

achieve low power.

Design of Ultra Low Power Analog Front End for ECG signal. (180nm CMOS Technology, VDD=1V, Itotal=300nA, Bandwidth= .05 - 250Hz) (Jan’15)

Designed Instrumentation amplifier, Programmable gain amplifier (PGA), mixed signal Automatic

gain control for PGA.

Trans-conductance cancellation technique used in instrumentation amplifier to lower common mode

gain (CMRR=70dB).

Design of Band-gap Reference Circuit. (180nm CMOS Technology, VDD=1.8V) (Jul’15)

Designed a 1.12V BGR circuit with temperature coefficient of 28.4 ppm/0C in the range of -40 to +1200C.

Page 2: Resume_updated@25-04-2016

Master of Technology IIT,Hyderabad

Design of 256x64 6T SRAM Array using 65nm Technology.

(65nm CMOS Technology, VDD=1V) (June’14)

Designed different sub circuits like bit line conditioning circuit, sense amplifier, row and column

read/write circuitry and clock generator.

A Low Complexity ECG Feature Extraction Algorithm for Mobile Healthcare

Application (Aug’14) Employed DWT transform with HAAR function being the mother wavelet as our principal analysis

method. From modulus maxima analysis on DWT coefficients, an approximation of the ECG fiducial point is extracted.

Microcontroller based Automatic Liquid Filling Machine (ALFM) (July’11) Used LDR sensor and ATS51 microcontroller to provide low cost alternative to commercial cost

intensive ALFM.

Low cost, high speed Microcontroller based Digital Speedometer cum Odometer (July’10) Used AT89C2051 microcontroller and REED Switch sensor to provide low cost alternative to

available commercial speedometer.

Professional Experience

TATA Consultancy services (Jan’12 – July’13) (Assistant System Engineer)

Project : SAP Crossgate AG (EDI & B2B domain)

Worked on B2B integration, automation of business process, database management and

communication setups like FTP/SFTP, OFTP, HTTPS.

Handled end to end project management activities during landscape layout.

Negotiate with Client on different technology platforms, delivery dates and suggested functional

modifications.

Training Coordinator for the project. Responsible for organizing technical and functional trainings

for team members.

Internship Summer Internship Summer Internship Summer Internship

Indian Air force (July’10)

Did a three month internship with Indian air force -3BRD Chandigarh on electronic subsystem of

MI-35 attack helicopter and MI-17 transport helicopter.

Studied the functioning of radar, targeting, weather, recognizance system.

Complete project on wireless transmission of on board data to base station using satellite and

terrestrial link.

Doordarshan Kendra Karnal (July’09) Did two month summer internship with Doordarshan Kendra, Karnal.

Worked on Broadcasting, Receiving & Signal Conditioning of high power TV signals.

Page 3: Resume_updated@25-04-2016

Master of Technology IIT,Hyderabad

Technical Skills

Exposure to CADANCE VIRTUOSO, MODELSIM, MATLAB, SILVACO, XILINX ISE.

HDL & programming language: Verilog, C.

Publications

A True 1V 1µW Biomedical Front End with Reconfigurable ADC for Self powered Smarter IoT

Healthcare Systems IEEE TENCON-2015.

A 43-nW 10-bit 1-kS/s SAR ADC in 180nm CMOS for Biomedical Applications IEEE Prime Asia-

2015.

A 343nW Biomedical Signal Acquisition System Powered by Energy Efficient (62.8%) Power Aware

RF Energy Harvesting Circuit IEEE ISCAS-2016

Awards & Distinctions

Won Second prize in Cadence Design Contest-2015.

Got Silver Leaf Certificate for my paper at PrimeAsia’15 conference.

Got Research excellence award for year 2016 at IIT-H.

Won first prize in the event ‘Track the Wave’ organized during Pragyam’09, an inter college

technical fest organized by JMIT Radaur.

Won first prize in the event ‘Movie Making’ organized during Pragyam’09, an inter college technical

fest organized by JMIT Radaur.

Scored A grade in Pearson versant English proficiency test.

Scored 98% on edX ISSCC Previews - Circuit and System Insights course.

Won Silver medal at Inter-departmental Basketball league at IIT-H

Position of Responsibility

Placement Coordinator for year 2015-16 at IIT Hyderabad.

Organizer of ‘Vedanta’ the Electronics Quiz in Pragyam’09, inter college technical festival of JMIT

Radaur.

Coordinator for batch of the TCS ILP training.

Represented college in various basketball events.

Extra Curricular Activities

Enjoy playing Basketball & cricket.

Reading Novels. Specially love to read Indian Authors.