research article high-electron-mobility sige on sapphire...
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Research ArticleHigh-Electron-Mobility SiGe on Sapphire Substrate forFast Chipsets
Hyun Jung Kim1 Yeonjoon Park1 Hyung Bin Bae2 and Sang H Choi3
1National Institute of Aerospace (NIA) 100 Exploration Way Hampton VA 23666 USA2KAIST Research Analysis Center (KARA) Korea Advanced Institute of Science and Technology (KAIST) Science RoadYuseong-Gu Daejeon 305-701 Republic of Korea3NASA Langley Research Center Hampton VA 23681-2199 USA
Correspondence should be addressed to Hyun Jung Kim hyunjungkimnasagov
Received 1 September 2014 Revised 28 November 2014 Accepted 29 November 2014
Academic Editor Yi Zhao
Copyright copy 2015 Hyun Jung Kim et alThis is an open access article distributed under the Creative CommonsAttribution Licensewhich permits unrestricted use distribution and reproduction in any medium provided the original work is properly cited
High-quality strain-relaxed SiGe films with a low twin defect density high electron mobility and smooth surface are critical fordevice fabrication to achieve designed performance The mobilities of SiGe can be a few times higher than those of silicon due tothe content of high carrier mobilities of germanium (p-type Si 430 cm2Vsdots p-type Ge 2200 cm2Vsdots n-type Si 1300 cm2Vsdots andn-type Ge 3000 cm2Vsdots at 1016 per cm3 doping density) Therefore radio frequency devices which are made with rhombohedralSiGe on 119888-plane sapphire can potentially run a few times faster than RF devices on SOS wafers NASA Langley has successfullygrown highly ordered single crystal rhombohedral epitaxy using an atomic alignment of the [111] direction of cubic SiGe on topof the [0001] direction of the sapphire basal plane Several samples of rhombohedrally grown SiGe on 119888-plane sapphire show highpercentage of a single crystalline over 95 to 995 The electron mobilities of the tested samples are between those of singlecrystals Si and Ge The measured electron mobility of 95 single crystal SiGe was 1538 cm2Vsdots which is between 350 cm2Vsdots (Si)and 1550 cm2Vsdots (Ge) at 6 times 1017cm3 doping concentration
1 Introduction
The clock frequency of conventional silicon based chipset hasachieved several gigahertzrsquo levels by increasing line resolutionof microcircuit Time after time critics have claimed thatsilicon transistors of smaller dimensions will soon come tothe end of shrinking Also further speed enhancement facesintrinsic limit by the material properties such as electroncharge mobility Pure single crystal of silicon has electroncharge mobility slightly above 1000 cm2Vsdots To build fastchipsets a different kind of materials that exhibit higherelectron charge mobility than siliconrsquos but is still compatiblewith silicon based fab technology is clearly required In thisregard previously many efforts had been carried out todevelop single crystal SiGe which is compatible with thecurrent silicon based fab lines and offers higher mobility butwithout success [1] We developed a rhombohedrally alignedsilicon-germanium (SiGe) on 119888-plane sapphire substrateThis
lattice-matched SiGewidely opens a possibility of chipset spe-ed improvement without the costly efforts to reduce featuresize A lattice-matched SiGe has its own oxide as an insulatorSiO2 unlike the arsenide antimonide or other compound
semiconductors Such an oxide with a proper insulator exist-ing SiGe allowsmass fabrication of several hundreds of chipson wafer basis
The attainable speed of silicon-germanium chipsets isbased on the gate length and the charge mobility which is rel-ated to a defect pattern such as twin population and crystalstructure Lattice-matched SiGe has very high mobility fora possibility of chipset speed improvement The film surfacemorphology number of twins and dislocations will directlyaffect the wafer surface topography which sets the limits onyielding rate through device fabrication process The surfaceroughness of wafers affects submicron photolithographywafer bonding [2] edge loss [3 4] and overall yielding rateFor CPU and memory the generally known required root
Hindawi Publishing CorporationAdvances in Condensed Matter PhysicsVolume 2015 Article ID 785415 9 pageshttpdxdoiorg1011552015785415
2 Advances in Condensed Matter Physics
mean square (rms) surface roughness is 05 nmsim1 nm Themost tolerant case of surface roughness is for the solar cellfabrication requirement which varies from 1 nm to 100 nmThe defect densities on wafer are the key issue for sustaininghigh yield of nanofab devices [5] To keep manufacturingcosts low the amount of epitaxy should be kept minimumboth for lower consumption or sourcematerials and for incre-ased throughput
SiGe on sapphire is one of themost important approachesto build silicon-germanium on insulator (SGOI) devices suchas a highmobility transistor for119870-band and higher frequencyapplications up to 116GHz [6ndash8] Because sapphire is one ofthe best insulators the high frequency parasitic capacitancebetween the semiconductor layer and the substrate can bealleviated for better performance at high frequency Manyepitaxial growths in this regard utilize silicon on sapphire(SOS) and silicon-germanium on sapphire (SGOS SGOI)technologies to take advantage of the rectangular 119903-plane ofsapphire aligned with the square-faced (001) plane or rectan-gle-faced (110) plane of the Si and Ge diamond structureHowever it was reported that this approach often shows 90∘rotated twin defects [9] On the other hand growth of SiGelayers on the trigonal (0001) plane that is 119888-plane of sapphirehas not been utilized for device fabrication so far due to theformation of 60∘ rotated twin defects
In this paper we present a possibility that rhombohe-drally oriented single crystal SiGe could be a candidate mate-rial of next generation chipset by showing that electron mob-ilities of SiGe grown on 119888-plane sapphire substrate are higherthan those of Si Andwe investigated the effect of twin densityon room temperature (RT) electron mobilities in SiGe grownon 119888-plane sapphire substrate Also our report includes theresults of crystalline defects with chemical etching of SiGefilm in order to determine the failure analysis required toproduce useful SiGe layer for device
2 Experimental
21 Film Growth The epitaxial layer growth of SiGe wascarried out in amagnetron sputtering systemThe 2-inch sap-phire substrate was cleaned with acetone isopropanol anddeionized water before being placed onto the wafer holderwithin vacuum chamber The back sides of the sapphire sub-strates were coated with carbon for effective heating of sap-phire substrate to a desired level of epigrowth temperatureThe sapphire wafer is transparent to infrared (IR) and visiblelight and most of the heating due to IR light passes directlythrough the sapphire wafer without heating it up Thereforethe actual temperature of the sapphire wafer surface wasmuch lower than the temperature measured by the thermo-couple of the substrate heater In order to solve this problembackside carbon coated sapphire wafers were prepared beforethe actual SiGe growthThe substrates were then baked underinfrared heat at 200∘C for 1 hour The chamber temperaturewas then increased to 1000∘C for a short time to removeany volatile contaminants 95 single crystal SiGe film wasgrown at 890∘C growth temperature a 5-sccm of high-purityargon gas and 5mTorr chamber pressureThe rhombohedralalignment of cubic SiGe depends on the growth conditions
especially the growth temperature and the surface termina-tion of the 119888-plane sapphire wafer The number of twins wascontrolled by film deposition temperature during the SiGedeposition and sapphire wafer treatment before the SiGe dep-osition
22 Film Characterization The epilayer grown on sapphiresubstrate was characterized by several XRD methods devel-oped by NASA Langley The vertical atomic alignment wasmeasured with a symmetric 2120579-Ω scan which probes the sur-face normal directionThe prominent SiGe (111) peak at 2120579 sim275∘ which appears next to the sapphire (0006) and (00012)peaks shows [111] oriented SiGeThe horizontal atomic alig-nment is measured with phi (120601) scan of the SiGe (220) peaksThree strong peaks in the 120601 scan indicate the majority singlecrystalline SiGe and three small peaks indicate the 60∘ rotatedSiGe twin crystal
Phi (120601) Scan Method [10] When the sample is tilted by angle120594 the sample normal 119899 is tilted by angle 120594 with respect to the119911-axis of the XRD goniometer This situation is indicated inFigure 1 For example when we grow SiGe (111) on 119888-planesapphire (0001) the growth direction is aligned to [111] = 119899while the asymmetric SiGe (220) planes are contained on thegreen plane with the angle 120594 = 120573 = 35264∘ which is theinterplanar angle between (111) and (220) planes of SiGe If weconsider all of the 220 planes of the single crystal SiGe therewill be a total of 12 planes However 6 of these are located atthe backside of the substrate while the three planes (02-2)(20-2) and (2-20) are oriented 90∘ with respect to the samplenormal [111] and hence do not diffract X-rays Only the threeplanes (022) (202) and (220) strongly diffract When SiGelayer contains twin defects comprised of both bulk domainand microtwin defects the defects align as the 60∘ rotatedtwin crystal along [111]-axis Therefore the 220 reflectionsof twin crystal will be 60∘ off in the 120601 plane from the originalcrystalrsquos 220 reflections The twin crystalrsquos 220 reflectionsare now shown as blue dots in Figure 1 Therefore the 120601 scanwith the angle 120594 = 120573 = 35264∘ shows the 220 peaks fromboth the original crystal and the 60∘ rotated twin crystal
The 119910-axis is plotted in a log-scale and the twin crystalrsquospeak is very weak compared with the majority single crystalrsquospeak And the untilted symmetric phi scan of SiGe 440reflections shows three strong single crystal peaks and threeweak twin defect peaks By setting the samplersquos azimuthal 120601angle to the desired peak (one of the strong single crystalpeaks or one of the weak twin defect peaks) and translatingthe wafer in the119883 and 119884 directions we obtain the119883-119884map-ping image of the SiGe film on 119888-plane sapphire wafer Themajority single crystal map shows a uniformly strong signalover the entire wafer surface with a small concentrated regionof twin defects at the edge The twin defects on edge weredeveloped due to both the shadow by the wafer holder andthe temperature gradient at the edge
Atomic forcemicroscope (AFM)measurements show thesurface topographic variation and root mean square (rms)roughness of the SiGe layer The crystal structure and layerthickness of the SiGe thin filmwere characterized using TEM
Advances in Condensed Matter Physics 3
(0000)
K-vector of X-ray
Measurement point
Twin defectrsquos (220)
Single crystalrsquos (220)
Angle 120594
120∘
Angle 120601
2120579998400
Ω(sim120579998400)120594 = 120573
rarrn
rarrZ
Figure 1 Phi (120601) scan with tilted 120594 for twin crystal detection
Table 1 Etchant composition for etch-pit density tests and its effects
Etch Composition (Mol ) Results on 100Solventlowast HF Oxidizerlowastlowast Line defects ldquoPointrdquo defects
Secco 676 322 017 Pits Shallow pits or hillocksSirtl 712 263 25 Pits or mounds mdashWright 785 161 54 Pits Shallow pitsSeiter 785 59 156 Mounds MoundslowastH2O + CH3COOH (HAc) lowastlowastCrO3 + HNO3
(FEI Tecnai G2 F30 300KV) The room temperature elec-tron mobilities and carrier densities of the SiGe films weremeasured using the Hall effect measurement system To obt-ain reproducible results the films were cut into several piecesof a standard sized square Each corner of the square-cut SiGefilm with specific doping concentration was soldered ontothe four arms of the sample test platform to ensure ohmiccontacts The ohmic contacts can be also checked during themeasurement process of Hall mobility
To reveal the crystalline defects on fab silicon wafer somechemical etching methods such as Wright [11] SECCO [12]Sirtl [13] and Dash [14] etches have been widely used infailure analysis of semiconductor SECCOetch is a very usefulchemical etching method for the characterization of defectson surface of bare silicon wafer [15]
SECCO etch uses an etchant composition of sol-vent hydrofluoric acid (HF) and K
2Cr2O7oxidizer as tab-
ulated in Table 1 SECCO etch compositions are as follows[12] hydrofluoric acid (HF) 67 by volume and 015MK2Cr2O7in H2O 33 by volumeWhenmixing the solution
1452 g of K2Cr2O7should be dissolved in 330mL of H
2O
Then the K2Cr2O7solution is poured into 670mL of HF
After mixing the total volume of the solution is kept inplastic chemical bottleThe defect area is under higher stresshence it will etch more quickly in SECCO etchant than thebulk semiconductor In most of the cases the result appearsas an elliptical pit on substrate at the location of the defectOptical microscopy is performed to inspect the crystallinedefects pitted by SEC-CO etch
3 Results and Discussion
Figure 2 shows the quality of crystalline SiGe film on 119888-planesapphire through TEM and XRD XRD normal scan datashows very strong SiGe (111) peak (Figure 2(a)) In orderto check the distribution of SiGe crystal in azimuthal in-plane angles we used the phi scan method for SiGe 220peaks and sapphire 10ndash14 peaks The phi scan of SiGe220 peaks shows a large difference in alignment and ratioof majority single crystal The majority peaks and minorityprimary-twin peaks that are rotated by 60∘ are noted as (i)and (ii) in Figure 2(b) respectively The area ratio of thepeaks is 95 5 In the mapping a point X-ray source with a5 nm beam mask was used (c) shows that almost completesingle crystalline SiGe layer was fabricated on the basal planeof trigonal sapphire Three 10ndash14 peaks show the trig-onal space symmetry of a sapphire crystal (Figure 2(d))From the SAED pattern in the upper inset of Figure 2(e)the epitaxial relationship between majority SiGe film andsapphire substrate was found to be (111)SiGe(0001)sapphireand [-112]SiGe[01-10]sapphireThese results demonstrate thatthe [111]-oriented rhombohedral heterostructure epitaxy ofa cubic single crystalline SiGe layer on trigonal 119888-planesapphire has been achieved The SiGe layer was grown inlayer-by-layermode with fewmicrometers of thicknesses anda smooth interface (Figure 2(f))
The charge mobility in semiconductor materials is deter-mined and limited by several factors such as alloy composi-tion interface roughness interface charge scattering lattice
4 Advances in Condensed Matter Physics
0 50 100 1500
10000
40000
90000
160000
Inte
nsity
(cps
)
SiGe
Sapphire
10 20 30 40 50 60 70 80 90 100110
313
103
1003
10003
100003
1000003
Inte
nsity
(cps
)SiGe (111) 95
Sapphire(0006)
Sapphire
(a) (b) (e)
(00012)
(i) (i)
(ii)
(i)
(ii) (ii)
minus150 minus100 minus50
0 50 100 1500
10000
40000
90000
160000
Inte
nsity
(cps
)
(d) (f)(c)
minus150 minus100 minus50
120601 (∘)
120601 (∘)
1ndash110003minus2110220
Al2
O 3SiG
e
SiGe
1120583m
0 20 40
0102030
509
203
645
80
814
212
722
1832
024
935
3256
941
220
5088
861
575
7327
986
001
9974
111
449
913
027
414
706
816
487
918
370
720
355
422
441
8
minus10
minus20
minus30
minus40 minus20
Y
X
(∘)2120579-Ω
Figure 2 Analysis of the 95 single crystal SiGe film Plot (a) shows 120579-2120579 scan in the direction normal to the surface graph (b) shows phi scanof SiGe peaks for the relative atomic alignment (c)119883-119884wafer mapping withmajority 440 peak shows the distribution of a single crystal (d)shows phi scan of sapphire 10ndash14 peaks for relative atomic alignment (e) shows HRTEM and its SAED result of the SiGe (green)sapphire(yellow) interface and (f) shows low magnification TEM image after the ion milling process
mismatch or segregation and strain relaxation of strainedSiGe layers with large Ge content and layer width as dis-cussed in a recent reviewbyWhall andParker (2000) [18]Theresults by Hall effect measurements indicate that the densityof twin lattices is correlated with the electron mobility in theSiGe films Figure 3(a) shows the calculated electronmobilityfor relaxed SiGe alloys as a function of their Ge contentAs shown in Figure 3(a) relaxed SiGe alloys exhibit drasticdecline in mobility mainly due to alloy interface scattering indislocation populated polycrystal region except for varyinghigh Ge content (gt085) where they start behaving like Ge[16 17] In Figure 3(a) the left side 119910-axis indicates the pureSi with 120583
119899Si = 1400 cm2Vsdots and the right side 119910-axis the pureGewith 120583
119899Ge = 4000 cm2Vsdots [19 20]When epitaxial layer is
grown on Si or Ge substrate in either case alloy compositionfrom pure Si or pure Ge lowers the electron carrier mobilityrapidly and they often become polycrystal with many defectsin the middle SiGe composition In spite of the high mobilityof Ge the mobility of SiGe layer is substantially lowereddue to the formation of strain caused dislocation defectsThe strain caused dislocation defects occur mainly due tothe lattice mismatch between Si whose lattice constant is5431 A and Ge with 6657 A [21] However if a substrate
allows growing a lattice-matched SiGe layer on it these defectformation problems can be avoided and the mobility can bedrastically enhanced beyond that of Si Of course not onlyis the growth of lattice-matched SiGe layer guaranteed by thecrystal symmetry of substrate but also the growth conditionssuch as epilayer speed substrate temperature and pressureof processing gases will dictate the formation of lattice-matched crystalline structuresWe observed that the electronmobility is also strongly correlated with the dopant electrondensity In Figure 3(b) we figured out the dependence ofroom temperature electron mobilities on defect density anddopant density in SiGe films The measured dopant electrondensities in three SiGe films are 221 times 1017cm3 602 times10
17cm3 and 146 times 1018cm3 On the other hand the
defect densitymeasurementsweremade by theXRDphi scanThe electron mobilities of the tested samples are betweenthose of single crystal Si (120583
119899Si = 1400 cm2Vsdots) and Ge(120583119899Ge = 4000 cm2Vsdots) The measured electron mobility of
a 95 single crystal SiGe was 1538 cm2Vsdots which is between350 cm2Vsdots (Si) and 1550 cm2Vsdots (Ge) at 602 times 1017cm3dopant concentration And the electron mobility of 995single crystal SiGe is 1552 cm2Vsdots at the 602 times 1017cm3dopant concentration Figure 3(a) shows that the room
Advances in Condensed Matter Physics 5
Polycrystal
100 Si
100 Ge
Dislocation
Dislo
catio
n
4000
3000
2000
1000
00 20 40 60 80 100
Ge content x ()
Elec
tron
mob
ility120583n
(cm2V
middots)
(a)
012
34
56
6008001000
1200
1400
1600
1800
2000
2200
TMs (
)
020406
08
10
12
14
16
Electron density (cm 3)
Elec
tron
mob
ility
(cm
2 Vs)
times1018
(b)
Figure 3 (a) Calculated phonon-limited 300K electron low-field mobility in relaxed Si1minus119909
Ge119909alloys Results with (circle) and without
(triangle) the inclusion of alloy scattering are shown [16 17] (b) Three pairs in three-dimensional (3D) plot for room temperature electronmobilities in SiGe films as a function of twin density (TM) and dopant concentration Red and blue dots show the data points for 995 and95 single crystal SiGe samples grown on 119888-plane sapphire substrates respectively
0 025 050 075 1000
025
050
075
100
(120583m)
70
35
00
(nm
)
(a)
0 025 050 075 100
Section analysis450
0
450
(nm
)
Surface distanceHorizontal distance (L)Vertical distanceAngle
21489nm21484nm0316nm
0842∘
(b)
Figure 4 AFM image of SiGe layer on 119888-plane sapphire (a) 1 120583m times 1 120583m area of a SiGe and (b) line profile of cross-section measured alongthe dark line in (a)
temperature electron mobility in the SiGe films grown onsapphire substrates becomes slightly higher as defect densitiesare decreased
Since the topographical and morphological properties ofthe layer directly influence the charge carrier properties andthe channel carrier transport characteristic of the device thelayer needs to be flat in atomic level The SiGe layer shows arootmean square (rms) roughness of 2 nm for 1times1 120583m2 scanThe AFM analysis shows that the epitaxial layer grows in alayer-by-layer growthmode [22 23] as shown in Figure 4(a)Figure 4(b) shows a line scan profile along the line indicatedwhich was selected to pass through a step It is important to
control the SiGe composition to reduce the lattice mismatchwith the 119888-plane sapphire maintain an appropriatemolecularbeam flux rate to ensure flat smooth layer-by-layer growthand have 2D layer-by-layer growth in electronic microdevicefabrication
Fine and delicate growth control of SiGe epitaxy to allevi-ate crystalline defects is a serious matter that directly affectsyield in device fabrication In particular the collective effectof threading dislocations (TDs) attributed to performancedegradation has been observed when other types of crystaldefects exist individually [24] In MOSFET interface misfitdislocations (MDs) which extend between the source and
6 Advances in Condensed Matter Physics
500120583m
(a) (b)
03 04 05 06 07 08 09500
1000
1500
2000
Content of Ge (Si1minusxGex)
TDP
etch
-pit
dens
ity (
cm2)
(c)
Figure 5 Etch-pit test results of (a) typical SiGe on Si(100) wafer with Ge content = 35 and of (b) rhombohedral SiGe on 119888-plane sapphirewith Ge content = 35 (c) threading dislocation etch-pit density of Si
1minus119909Ge119909on sapphire substrate based on the Ge content
the drain may become electrically active resulting in incr-eased off-state leakage [25] The electrical impact of stackingfaults (SFs) on device operation can be seen as a combinationof the individual effects of misfit and TDs A single SF inthe strained Si channel can degrade the device operationat both off- and on-state conditions [26] SECCO etch is achemical etchingmethod used to delineath crystalline defectson silicon substrate and SiGe filmWhen SECCO etch is useddirectly crystalline defects are revealed on silicon substrateor SiGe film after 2 minutes at some areas Industry standardSECCO etch-pit density measurements were performed on aconventional SiGe layer on Si and 95 single crystalline SiGelayers with 35 Ge content on 119888-plane sapphire A typicalSiGe layer with 35 Ge content on a Si(100) wafer shows ahigh density of dislocation line and etch pits (see Figure 5(a))On the other hand the rhombohedral SiGe grown on 119888-plane sapphire with 35 Ge composition ratio shows twoorders of magnitude less etch pits and no dislocation linesafter performing the SECCO etching (see Figure 5) Theconventional SiGe on a Si(100) wafer reveals a threading dis-location pit (TDP) density of 39times 104cm2 line defect densityof 173 times 104cm2 and a lot of cross-hatch patterns as shownin Figure 5(a) The rhombohedral SiGe grown on 119888-planesapphire has only a TD etch-pit density of 19 times 102cm2
no visible line defects and no cross-hatch patterns as shownin Figure 5(b) Therefore the rhombohedral SiGe shows a200 times less defect density than conventional SiGe onSi(100) wafer under the SECCO etching tests Conclusivelywe confirmed that a new SiGe film growth technique of fullyrelaxed SiGe alloy layers yields low TD density epitaxiallygrown on sapphire substrate [27] The TD etch-pit densityof SiGe on sapphire decreases to 800cm2 as Ge contentincreases (see Figure 5(c)) The SiGe films with low TDPdensity high electron mobility based on the high Ge contentlike 85 and smooth surface were grown on 119888-plane sapphiresubstrateThese kinds of films are sufficiently qualified for thefabrication of the ultrafast chipsets like bipolar junction tran-sistors
The SGOI structures are currently fabricated mainly bytwo methods layer transfer [28] and Ge condensation [2930] In the layer transfer method hydrogen implantation isemployed in order to separate a thin SiGe layer from gradedSiGe substrates In the Ge condensation method a SiGe layerwith a low Ge concentration grown on a silicon-on-insulator(SOI) substrate is thermally oxidized where Ge atoms in theSiGe layer are ejected from the oxide interface resulting in aSiGe layer with a highGe concentration However thesemet-hods require complex processing routines and do not always
Advances in Condensed Matter Physics 7
Table 2 Comparison of Si SOI and SiGe on Si and LM-SGOI technologies
Technology Si SOISGOI SiGe on Si SiGe on sapphire (NASA LaRC)
Fabrication Single crystal ingot Hydrogen crack Gradient layer superlattice Lattice-matched growth
Growth method Czochralski Wafer bonding Epitaxial growth Epitaxial growthLattice-matched Gecontent 0 0 0 85 with sapphire substrate
Ge content in strainedlayer before defects 0 Usually 0sim8 Usually 0sim8 85 achieved
Ge content in relaxedlayer 0 (not available) Up to 25 with severe
defectsUp to 25 with severe
defects 85 achieved with 02 defects
Parasitic capacitancereduction No Yes No Yes
Device Bipolar junctiontransistor (BJT) CMOS
BJTCMOSheterojunctionbipolar transistor (HBT)
CMOS
HBT HBT CMOS
Improvement Conventionaltechnology
High speed withinsulating substrate
High speed (ultrathinSiGe lower collectorvoltage of HBT)
High speed with thick and thinSiGe layer with insulating
substrate higher device yieldwith lower defects
produce high-quality fully relaxed SiGe layer [31] A differentapproach reported is an amorphous SiGe layer deposited onSOI substrate and then annealed above the melting pointof SiGe after the formation of the SiO
2capping layer [32]
This process has the advantage of simplicity However it isdifficult to obtain the SiGe layer with high Ge concentrationby this process because the annealing temperature must bereduced below the melting point resulting in the unusuallylong annealing time Rapid thermal annealing (RTA)was alsoproposed in order to obtain the homogeneous SiGe layer[16] However high-quality and uniform SiGe layers were notobtained in the previous study
We demonstrated the fabrication of high-quality SiGelayers on sapphire substrate by sputtering The ideal of thisprocess is that a fundamental governing relationship existsin rhombohedral epitaxy process that is the growth of⟨111⟩-oriented cubic crystals on the basal 119888-plane of trigonalsapphire crystals [33ndash35] One of the concerns with this epi-taxy relationship is that two crystal structures tend to beformed which exhibit a twin lattice structureThis atomic ali-gnment allows polytype crystalline structures with stackingfaults on the (111) plane Rhombohedral alignment that is ali-gning the [111] direction of a cubic structure to the [0001]direction of a trigonal structure can have two possible azim-uthal configurations Two crystals are twin to each other andthey can be formed by a stacking fault during the crystalgrowth process We gained an experience to control the amo-unt of the twins based on the growth conditions especiallythe growth temperature and deposition power Our processenables the forming of the SiGe layer of high Ge concentra-tion (85) For semiconductor device applications highcarriermobility SiGe layers can bemade by reducing stacking
faults and microtwin defects The measurement and controlof stacking faults and twin crystals are therefore importantin the microelectronics applications
Table 2 illustrates the key features of lattice-matched SiGeon insulator (LM-SGOI) currently under development atNASA Langley [36ndash42] compared to existing products ortechnologiesThe far right columnofTable 2 shows theNASALangley developed SiGe material that is compatible with theconventional insulator silicon oxide The new rhombohedralepitaxy allows new lattice matching condition of SiGe onsapphire insulator with 85 Ge content and 05 defectsWhile the carrier mobilities of silicon-on-insulator (SOI) arelimited by the silicon material the mobilities of SiGe on119888-plane sapphire can be a few times higher than those ofsilicon due to the high carrier mobilities of germanium Thesilicon-on-sapphire (SOS) became crucial in devices usingSOI wafers because sapphire is one of the best insulatorsTheSOS wafer provides electrically separated regions because ofthe insulating properties of the sapphire itself as opposedto other typical devices where the regions are electricallyseparated using reverse bias between the substrate and devicearea The space charge region (carrier depletion region) inthe reverse bias case is very thin in the micrometer rangeand the capacitance between a device and the substrate ishigh and causes the device to have a leakage current at highfrequency operating speeds On the contrary sapphire is verythick and has an ultrasmall capacitance thereby reducingparasitic capacitance and leakage currents at high operatingfrequencies The lattice-matched SiGe is also complementedby silicon oxide as an insulator and stable gate oxide withSiO2can make short gate length for RF device Therefore
RF devices like heterojunction bipolar transistor (HBT) that
8 Advances in Condensed Matter Physics
are made with rhombohedral SiGe on 119888-plane sapphire canpotentially run a few times faster than RF devices on SOSwafers at high frequencies up to several hundred GHz
4 Summary and Conclusions
In summary we have experimentally demonstrated the fab-rication of high-quality SiGe layers with a high Ge concen-tration of more than 85 on sapphire wafer by sputteringWe also report that the defect dependence of the electronmobility by the twinning of SiGe thin films on sapphire(0001) substrates was measured Currently a standard SiGetechnology uses only ultrathin (30sim100 nm) layer of SiGe forbase layer of heterojunction bipolar transistor (HBT) to avoiddislocation defects With the lattice-matched SiGe layer wedeveloped a thin or thick SiGe layer can be also fabricatedfor any designated applications since the lattice-matchedmaterials do not have a critical thickness limit In rhombo-hedral SiGe on 119888-plane (0001) sapphire the SiGe layer can bealso grown in layer-by-layer mode from sub-100 nm to fewmicrometers of thicknesses Therefore thin rhombohedralSiGe on 119888-plane sapphire has many commercial applicationpotentials as do SOI wafers in addition to solar cell applica-tions Typically a rhombohedral single crystal SiGe has 2 or3 times higher carrier mobility than monocrystalline siliconThe high Ge-content SiGe film shows high mobility lowcost and simple structure when grown directly on sapphiresubstrate with sputtering process If the defects in SiGe canbe removed transistors with higher operational frequenciescan be fabricated for a new generation of ultrafast chipsetsbecause of the high mobility of SiGe film
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
References
[1] D L Harame and B S Meyerson ldquoThe early history of IBMrsquosSiGe mixed signal technologyrdquo IEEE Transactions on ElectronDevices vol 48 no 11 pp 2555ndash2567 2001
[2] C Gui M Elwenspoek N Tas and J G E Gardeniers ldquoTheeffect of surface roughness on direct wafer bondingrdquo Journal ofApplied Physics vol 85 no 10 pp 7448ndash7454 1999
[3] ldquoSemiconductorWafer edge analysisrdquo ChapmanTechnical NoteTW-1 1998
[4] H Ahmataku and K Kipli in Proceedings of the IEEE Inter-national Conference on Semiconductor Electronics (ICSE rsquo10)Melaka Malaysia June 2010
[5] I McMackin W Martin J Perez et al ldquoPatterned wafer defectdensity analysis of step and flash imprint lithographyrdquo Journal ofVacuum Science amp Technology B vol 26 no 1 pp 151ndash155 2008
[6] S A Alterovitz C H Mueller and E T Croke ldquoHigh mobilitySiGeSi transistor structures on sapphire substrates using ionimplantationrdquo Journal of Vacuum Science amp Technology B vol22 p 1776 2004
[7] K Ismail M Arafa K L Saenger J O Chu and B SMeyersonldquoExtremely high electron mobility in SiSiGe modulation-doped heterostructuresrdquo Applied Physics Letters vol 66 no 9pp 1077ndash1079 1995
[8] S J Koester R Hammond J O Chu et al ldquoSiGe pMODFETson silicon-on-sapphire substrates with 116GHz fmaxrdquo IEEEElectron Device Letters vol 22 no 2 pp 92ndash94 2001
[9] W B Dubbelday and K L Kavanagh ldquoGrowth of SiGe on sap-phire using rapid thermal chemical vapor depositionrdquo Journalof Crystal Growth vol 222 no 1-2 pp 20ndash28 2001
[10] Y Park H J Kim G C King and S H Choi ldquoX-ray diffractionwafer mapping method for SiGe twin defects characterizationrdquoin Nanosensors Biosensors and Info-Tech Sensors and Systemsvol 7980 of Proceedings of SPIE April 2011
[11] M W Jenkins ldquoA new preferential etch for defects in siliconcrystalsrdquo Journal of the Electrochemical Society Solid-StateScience and Technology vol 124 no 5 pp 757ndash762 1977
[12] F Secco drsquoAragona ldquoDislocation etch for (100) planes in siliconrdquoJournal ofTheElectrochemical Society vol 119 no 7 pp 948ndash9511972
[13] E Sirtl and A Adler ldquoChromic acid-hydrofluoric acid asspecific reagents for the development of etching pits in siliconrdquoZeitschrift fur Metallkunde vol 52 pp 529ndash534 1961
[14] W C Dash ldquoCopper precipitation on dislocations in siliconrdquoJournal of Applied Physics vol 27 no 10 pp 1193ndash1195 1956
[15] H RauhWackerrsquos Atlas for Characterization ofDefects in SiliconA Part of the Wacker Tutorial Series 1986
[16] M Glicksman ldquoMobility of Electrons in Germanium-SiliconAlloysrdquo Physical Review vol 111 no 1 pp 125ndash128 1958
[17] M V Fischetti and S E Laux ldquoBand structure deformationpotentials and carrier mobility in strained Si Ge and SiGealloysrdquo Journal of Applied Physics vol 80 no 4 pp 2234ndash22521996
[18] T E Whall and E H C Parker ldquoSiSiGeSi pMOS performa-ncemdashalloy scattering and other considerationsrdquo Thin SolidFilms vol 368 pp 297ndash305 2000
[19] C Jacoboni C Canali G Ottaviani and A Alberigi QuarantaldquoA review of some charge transport properties of siliconrdquo SolidState Electronics vol 20 no 2 pp 77ndash89 1977
[20] V I Fistul M I Iglitsyn and E M Omelyanovskii ldquoMobilityof electrons in germanium strongly doped with arsenicrdquo SovietPhysics Solid State vol 4 no 4 pp 784ndash785 1962
[21] Landolt-Bornstein New Series Group III vol 17a SpringerBerlin Germany 1982
[22] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions I Static theoryrdquoProceedings of the Royal Society of LondonSeries A vol 198 no 1053 pp 205ndash216 1949
[23] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions IV Dynamicsrdquo Proceedings of the Royal Society of LondonA vol 201 no 1065 pp 261ndash268 1950
[24] E Escobedo-Cousin SHOlsenAGOrsquoNeill andHCoulsonldquoDefect identification in strained SiSiGe heterolayers for deviceapplicationsrdquo Journal of Physics D Applied Physics vol 42 no17 Article ID 175306 2009
[25] J G Fiorenza G Braithwaite C W Leitz et al ldquoFilm thicknessconstraints for manufacturable strained silicon CMOSrdquo Semi-conductor Science and Technology vol 19 no 1 article L4 2004
[26] J N Yang G W Neudeck and J P Denton ldquoElectrical effectsof a single stacking fault on fully depleted thin-film silicon-on-insulator P-channel metal-oxide-semiconductor field-effect
Advances in Condensed Matter Physics 9
transistorsrdquo Journal of Applied Physics vol 91 no 1 pp 420ndash426 2002
[27] P I Gaiduk A Nylandsted Larsen and J LundsgaardHansen ldquoStrain-relaxed SiGeSi heteroepitaxial structures oflow threading-dislocation densityrdquoThin Solid Films vol 367 no1-2 pp 120ndash125 2000
[28] L J Huang J O Chu D F Canaperi et al ldquoSiGe-on-insulatorprepared by wafer bonding and layer transfer for high-perfor-mance field-effect transistorsrdquo Applied Physics Letters vol 78no 9 pp 1267ndash1269 2001
[29] T Tezuka N Sugiyama TMizunoM Suzuki and S Takagi ldquoAnovel fabrication technique of ultrathin and relaxed SiGe bufferlayers with highGe fraction for Sub-100 nm strained silicon-on-insulator MOSFETsrdquo Japanese Journal of Applied Physics vol40 part 1 no 4B pp 2866ndash2874 2001
[30] S Nakaharai T Tezuka N Sugiyama Y Moriyama andS-I Takagi ldquoCharacterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation techniquerdquoApplied Physics Letters vol 83 no 17 pp 3516ndash3518 2003
[31] T Shimura K Kawamura M Asakawa et al ldquoCharacterizationof strained Si wafers by X-ray diffraction techniquesrdquo Journalof Materials Science Materials in Electronics vol 19 no 1supplement pp S189ndashS193 2008
[32] N Sugii S Yamaguchi and K Washio ldquoSiGe-on-insulatorsubstrate fabricated by melt solidification for a strained-siliconcomplementary metalndashoxidendashsemiconductorrdquo Journal of Vac-uum Science amp Technology B vol 20 no 5 pp 1891ndash1896 2002
[33] H-J Kim H-B Bae Y Park K Lee and S H Choi ldquoTempera-ture dependence of crystalline SiGe growth on sapphire (0001)substrates by sputteringrdquo Journal of Crystal Growth vol 353 no1 pp 124ndash128 2012
[34] Y Park G C King and S H Choi ldquoRhombohedral epitaxy ofcubic SiGe on trigonal c-plane sapphirerdquo Journal of Crystal Gro-wth vol 310 no 11 pp 2724ndash2731 2008
[35] H J Kim H B Bae Y Park and S H Choi ldquoDefect-engineered Si
1minus119909Ge119909alloy under electron beam irradiation
for thermoelectricsrdquo RSC Advances vol 2 no 33 pp 12670ndash12674 2012
[36] Y Park S H Choi and G C King ldquoSilicon germanium semi-conductive alloy andmethod of fabricating samerdquoUS Patent no7341883 2008
[37] Y Park S H Choi G C King J R Elliott Jr and D MStoakley ldquoGraded index silicon geranium on lattice matchedsilicon geranium semiconductor alloyrdquo US Patent No 7514726B2 2009
[38] Y Park S Hyouk Choi G C King and J R Elliott ldquoMethodof generating X-ray diffraction data for integral detection oftwin defects in super-hetero-epitaxial materialsrdquo US Patent no7558371 B2 2009
[39] Y Park S H Choi and G C King ldquoEpitaxial growth of cubiccrystalline semiconductor alloys on basal plane of trigonal orhexagonal crystalrdquo US Patent no 7906358 B2 2011
[40] T Maniwa ldquoSteering apparatusrdquo US Patent No 8826767 2012[41] Y Park S H Choi G C King and J R Elliott ldquoRhombohedral
cubic semiconductor materials on trigonal substrate with singlecrystal properties and devices based on such materialsrdquo USPatent no 8257491 B2 2012
[42] Y Park S H Choi G C King J R Elliott and A L Dimarcan-tonio ldquoX-ray diffraction wafermappingmethod for rhombohe-dral super-hetero-epitaxyrdquo US Patent No 7769135 B2 2010
Submit your manuscripts athttpwwwhindawicom
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
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FluidsJournal of
Atomic and Molecular Physics
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Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Advances in Condensed Matter Physics
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Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Superconductivity
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
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ThermodynamicsJournal of
2 Advances in Condensed Matter Physics
mean square (rms) surface roughness is 05 nmsim1 nm Themost tolerant case of surface roughness is for the solar cellfabrication requirement which varies from 1 nm to 100 nmThe defect densities on wafer are the key issue for sustaininghigh yield of nanofab devices [5] To keep manufacturingcosts low the amount of epitaxy should be kept minimumboth for lower consumption or sourcematerials and for incre-ased throughput
SiGe on sapphire is one of themost important approachesto build silicon-germanium on insulator (SGOI) devices suchas a highmobility transistor for119870-band and higher frequencyapplications up to 116GHz [6ndash8] Because sapphire is one ofthe best insulators the high frequency parasitic capacitancebetween the semiconductor layer and the substrate can bealleviated for better performance at high frequency Manyepitaxial growths in this regard utilize silicon on sapphire(SOS) and silicon-germanium on sapphire (SGOS SGOI)technologies to take advantage of the rectangular 119903-plane ofsapphire aligned with the square-faced (001) plane or rectan-gle-faced (110) plane of the Si and Ge diamond structureHowever it was reported that this approach often shows 90∘rotated twin defects [9] On the other hand growth of SiGelayers on the trigonal (0001) plane that is 119888-plane of sapphirehas not been utilized for device fabrication so far due to theformation of 60∘ rotated twin defects
In this paper we present a possibility that rhombohe-drally oriented single crystal SiGe could be a candidate mate-rial of next generation chipset by showing that electron mob-ilities of SiGe grown on 119888-plane sapphire substrate are higherthan those of Si Andwe investigated the effect of twin densityon room temperature (RT) electron mobilities in SiGe grownon 119888-plane sapphire substrate Also our report includes theresults of crystalline defects with chemical etching of SiGefilm in order to determine the failure analysis required toproduce useful SiGe layer for device
2 Experimental
21 Film Growth The epitaxial layer growth of SiGe wascarried out in amagnetron sputtering systemThe 2-inch sap-phire substrate was cleaned with acetone isopropanol anddeionized water before being placed onto the wafer holderwithin vacuum chamber The back sides of the sapphire sub-strates were coated with carbon for effective heating of sap-phire substrate to a desired level of epigrowth temperatureThe sapphire wafer is transparent to infrared (IR) and visiblelight and most of the heating due to IR light passes directlythrough the sapphire wafer without heating it up Thereforethe actual temperature of the sapphire wafer surface wasmuch lower than the temperature measured by the thermo-couple of the substrate heater In order to solve this problembackside carbon coated sapphire wafers were prepared beforethe actual SiGe growthThe substrates were then baked underinfrared heat at 200∘C for 1 hour The chamber temperaturewas then increased to 1000∘C for a short time to removeany volatile contaminants 95 single crystal SiGe film wasgrown at 890∘C growth temperature a 5-sccm of high-purityargon gas and 5mTorr chamber pressureThe rhombohedralalignment of cubic SiGe depends on the growth conditions
especially the growth temperature and the surface termina-tion of the 119888-plane sapphire wafer The number of twins wascontrolled by film deposition temperature during the SiGedeposition and sapphire wafer treatment before the SiGe dep-osition
22 Film Characterization The epilayer grown on sapphiresubstrate was characterized by several XRD methods devel-oped by NASA Langley The vertical atomic alignment wasmeasured with a symmetric 2120579-Ω scan which probes the sur-face normal directionThe prominent SiGe (111) peak at 2120579 sim275∘ which appears next to the sapphire (0006) and (00012)peaks shows [111] oriented SiGeThe horizontal atomic alig-nment is measured with phi (120601) scan of the SiGe (220) peaksThree strong peaks in the 120601 scan indicate the majority singlecrystalline SiGe and three small peaks indicate the 60∘ rotatedSiGe twin crystal
Phi (120601) Scan Method [10] When the sample is tilted by angle120594 the sample normal 119899 is tilted by angle 120594 with respect to the119911-axis of the XRD goniometer This situation is indicated inFigure 1 For example when we grow SiGe (111) on 119888-planesapphire (0001) the growth direction is aligned to [111] = 119899while the asymmetric SiGe (220) planes are contained on thegreen plane with the angle 120594 = 120573 = 35264∘ which is theinterplanar angle between (111) and (220) planes of SiGe If weconsider all of the 220 planes of the single crystal SiGe therewill be a total of 12 planes However 6 of these are located atthe backside of the substrate while the three planes (02-2)(20-2) and (2-20) are oriented 90∘ with respect to the samplenormal [111] and hence do not diffract X-rays Only the threeplanes (022) (202) and (220) strongly diffract When SiGelayer contains twin defects comprised of both bulk domainand microtwin defects the defects align as the 60∘ rotatedtwin crystal along [111]-axis Therefore the 220 reflectionsof twin crystal will be 60∘ off in the 120601 plane from the originalcrystalrsquos 220 reflections The twin crystalrsquos 220 reflectionsare now shown as blue dots in Figure 1 Therefore the 120601 scanwith the angle 120594 = 120573 = 35264∘ shows the 220 peaks fromboth the original crystal and the 60∘ rotated twin crystal
The 119910-axis is plotted in a log-scale and the twin crystalrsquospeak is very weak compared with the majority single crystalrsquospeak And the untilted symmetric phi scan of SiGe 440reflections shows three strong single crystal peaks and threeweak twin defect peaks By setting the samplersquos azimuthal 120601angle to the desired peak (one of the strong single crystalpeaks or one of the weak twin defect peaks) and translatingthe wafer in the119883 and 119884 directions we obtain the119883-119884map-ping image of the SiGe film on 119888-plane sapphire wafer Themajority single crystal map shows a uniformly strong signalover the entire wafer surface with a small concentrated regionof twin defects at the edge The twin defects on edge weredeveloped due to both the shadow by the wafer holder andthe temperature gradient at the edge
Atomic forcemicroscope (AFM)measurements show thesurface topographic variation and root mean square (rms)roughness of the SiGe layer The crystal structure and layerthickness of the SiGe thin filmwere characterized using TEM
Advances in Condensed Matter Physics 3
(0000)
K-vector of X-ray
Measurement point
Twin defectrsquos (220)
Single crystalrsquos (220)
Angle 120594
120∘
Angle 120601
2120579998400
Ω(sim120579998400)120594 = 120573
rarrn
rarrZ
Figure 1 Phi (120601) scan with tilted 120594 for twin crystal detection
Table 1 Etchant composition for etch-pit density tests and its effects
Etch Composition (Mol ) Results on 100Solventlowast HF Oxidizerlowastlowast Line defects ldquoPointrdquo defects
Secco 676 322 017 Pits Shallow pits or hillocksSirtl 712 263 25 Pits or mounds mdashWright 785 161 54 Pits Shallow pitsSeiter 785 59 156 Mounds MoundslowastH2O + CH3COOH (HAc) lowastlowastCrO3 + HNO3
(FEI Tecnai G2 F30 300KV) The room temperature elec-tron mobilities and carrier densities of the SiGe films weremeasured using the Hall effect measurement system To obt-ain reproducible results the films were cut into several piecesof a standard sized square Each corner of the square-cut SiGefilm with specific doping concentration was soldered ontothe four arms of the sample test platform to ensure ohmiccontacts The ohmic contacts can be also checked during themeasurement process of Hall mobility
To reveal the crystalline defects on fab silicon wafer somechemical etching methods such as Wright [11] SECCO [12]Sirtl [13] and Dash [14] etches have been widely used infailure analysis of semiconductor SECCOetch is a very usefulchemical etching method for the characterization of defectson surface of bare silicon wafer [15]
SECCO etch uses an etchant composition of sol-vent hydrofluoric acid (HF) and K
2Cr2O7oxidizer as tab-
ulated in Table 1 SECCO etch compositions are as follows[12] hydrofluoric acid (HF) 67 by volume and 015MK2Cr2O7in H2O 33 by volumeWhenmixing the solution
1452 g of K2Cr2O7should be dissolved in 330mL of H
2O
Then the K2Cr2O7solution is poured into 670mL of HF
After mixing the total volume of the solution is kept inplastic chemical bottleThe defect area is under higher stresshence it will etch more quickly in SECCO etchant than thebulk semiconductor In most of the cases the result appearsas an elliptical pit on substrate at the location of the defectOptical microscopy is performed to inspect the crystallinedefects pitted by SEC-CO etch
3 Results and Discussion
Figure 2 shows the quality of crystalline SiGe film on 119888-planesapphire through TEM and XRD XRD normal scan datashows very strong SiGe (111) peak (Figure 2(a)) In orderto check the distribution of SiGe crystal in azimuthal in-plane angles we used the phi scan method for SiGe 220peaks and sapphire 10ndash14 peaks The phi scan of SiGe220 peaks shows a large difference in alignment and ratioof majority single crystal The majority peaks and minorityprimary-twin peaks that are rotated by 60∘ are noted as (i)and (ii) in Figure 2(b) respectively The area ratio of thepeaks is 95 5 In the mapping a point X-ray source with a5 nm beam mask was used (c) shows that almost completesingle crystalline SiGe layer was fabricated on the basal planeof trigonal sapphire Three 10ndash14 peaks show the trig-onal space symmetry of a sapphire crystal (Figure 2(d))From the SAED pattern in the upper inset of Figure 2(e)the epitaxial relationship between majority SiGe film andsapphire substrate was found to be (111)SiGe(0001)sapphireand [-112]SiGe[01-10]sapphireThese results demonstrate thatthe [111]-oriented rhombohedral heterostructure epitaxy ofa cubic single crystalline SiGe layer on trigonal 119888-planesapphire has been achieved The SiGe layer was grown inlayer-by-layermode with fewmicrometers of thicknesses anda smooth interface (Figure 2(f))
The charge mobility in semiconductor materials is deter-mined and limited by several factors such as alloy composi-tion interface roughness interface charge scattering lattice
4 Advances in Condensed Matter Physics
0 50 100 1500
10000
40000
90000
160000
Inte
nsity
(cps
)
SiGe
Sapphire
10 20 30 40 50 60 70 80 90 100110
313
103
1003
10003
100003
1000003
Inte
nsity
(cps
)SiGe (111) 95
Sapphire(0006)
Sapphire
(a) (b) (e)
(00012)
(i) (i)
(ii)
(i)
(ii) (ii)
minus150 minus100 minus50
0 50 100 1500
10000
40000
90000
160000
Inte
nsity
(cps
)
(d) (f)(c)
minus150 minus100 minus50
120601 (∘)
120601 (∘)
1ndash110003minus2110220
Al2
O 3SiG
e
SiGe
1120583m
0 20 40
0102030
509
203
645
80
814
212
722
1832
024
935
3256
941
220
5088
861
575
7327
986
001
9974
111
449
913
027
414
706
816
487
918
370
720
355
422
441
8
minus10
minus20
minus30
minus40 minus20
Y
X
(∘)2120579-Ω
Figure 2 Analysis of the 95 single crystal SiGe film Plot (a) shows 120579-2120579 scan in the direction normal to the surface graph (b) shows phi scanof SiGe peaks for the relative atomic alignment (c)119883-119884wafer mapping withmajority 440 peak shows the distribution of a single crystal (d)shows phi scan of sapphire 10ndash14 peaks for relative atomic alignment (e) shows HRTEM and its SAED result of the SiGe (green)sapphire(yellow) interface and (f) shows low magnification TEM image after the ion milling process
mismatch or segregation and strain relaxation of strainedSiGe layers with large Ge content and layer width as dis-cussed in a recent reviewbyWhall andParker (2000) [18]Theresults by Hall effect measurements indicate that the densityof twin lattices is correlated with the electron mobility in theSiGe films Figure 3(a) shows the calculated electronmobilityfor relaxed SiGe alloys as a function of their Ge contentAs shown in Figure 3(a) relaxed SiGe alloys exhibit drasticdecline in mobility mainly due to alloy interface scattering indislocation populated polycrystal region except for varyinghigh Ge content (gt085) where they start behaving like Ge[16 17] In Figure 3(a) the left side 119910-axis indicates the pureSi with 120583
119899Si = 1400 cm2Vsdots and the right side 119910-axis the pureGewith 120583
119899Ge = 4000 cm2Vsdots [19 20]When epitaxial layer is
grown on Si or Ge substrate in either case alloy compositionfrom pure Si or pure Ge lowers the electron carrier mobilityrapidly and they often become polycrystal with many defectsin the middle SiGe composition In spite of the high mobilityof Ge the mobility of SiGe layer is substantially lowereddue to the formation of strain caused dislocation defectsThe strain caused dislocation defects occur mainly due tothe lattice mismatch between Si whose lattice constant is5431 A and Ge with 6657 A [21] However if a substrate
allows growing a lattice-matched SiGe layer on it these defectformation problems can be avoided and the mobility can bedrastically enhanced beyond that of Si Of course not onlyis the growth of lattice-matched SiGe layer guaranteed by thecrystal symmetry of substrate but also the growth conditionssuch as epilayer speed substrate temperature and pressureof processing gases will dictate the formation of lattice-matched crystalline structuresWe observed that the electronmobility is also strongly correlated with the dopant electrondensity In Figure 3(b) we figured out the dependence ofroom temperature electron mobilities on defect density anddopant density in SiGe films The measured dopant electrondensities in three SiGe films are 221 times 1017cm3 602 times10
17cm3 and 146 times 1018cm3 On the other hand the
defect densitymeasurementsweremade by theXRDphi scanThe electron mobilities of the tested samples are betweenthose of single crystal Si (120583
119899Si = 1400 cm2Vsdots) and Ge(120583119899Ge = 4000 cm2Vsdots) The measured electron mobility of
a 95 single crystal SiGe was 1538 cm2Vsdots which is between350 cm2Vsdots (Si) and 1550 cm2Vsdots (Ge) at 602 times 1017cm3dopant concentration And the electron mobility of 995single crystal SiGe is 1552 cm2Vsdots at the 602 times 1017cm3dopant concentration Figure 3(a) shows that the room
Advances in Condensed Matter Physics 5
Polycrystal
100 Si
100 Ge
Dislocation
Dislo
catio
n
4000
3000
2000
1000
00 20 40 60 80 100
Ge content x ()
Elec
tron
mob
ility120583n
(cm2V
middots)
(a)
012
34
56
6008001000
1200
1400
1600
1800
2000
2200
TMs (
)
020406
08
10
12
14
16
Electron density (cm 3)
Elec
tron
mob
ility
(cm
2 Vs)
times1018
(b)
Figure 3 (a) Calculated phonon-limited 300K electron low-field mobility in relaxed Si1minus119909
Ge119909alloys Results with (circle) and without
(triangle) the inclusion of alloy scattering are shown [16 17] (b) Three pairs in three-dimensional (3D) plot for room temperature electronmobilities in SiGe films as a function of twin density (TM) and dopant concentration Red and blue dots show the data points for 995 and95 single crystal SiGe samples grown on 119888-plane sapphire substrates respectively
0 025 050 075 1000
025
050
075
100
(120583m)
70
35
00
(nm
)
(a)
0 025 050 075 100
Section analysis450
0
450
(nm
)
Surface distanceHorizontal distance (L)Vertical distanceAngle
21489nm21484nm0316nm
0842∘
(b)
Figure 4 AFM image of SiGe layer on 119888-plane sapphire (a) 1 120583m times 1 120583m area of a SiGe and (b) line profile of cross-section measured alongthe dark line in (a)
temperature electron mobility in the SiGe films grown onsapphire substrates becomes slightly higher as defect densitiesare decreased
Since the topographical and morphological properties ofthe layer directly influence the charge carrier properties andthe channel carrier transport characteristic of the device thelayer needs to be flat in atomic level The SiGe layer shows arootmean square (rms) roughness of 2 nm for 1times1 120583m2 scanThe AFM analysis shows that the epitaxial layer grows in alayer-by-layer growthmode [22 23] as shown in Figure 4(a)Figure 4(b) shows a line scan profile along the line indicatedwhich was selected to pass through a step It is important to
control the SiGe composition to reduce the lattice mismatchwith the 119888-plane sapphire maintain an appropriatemolecularbeam flux rate to ensure flat smooth layer-by-layer growthand have 2D layer-by-layer growth in electronic microdevicefabrication
Fine and delicate growth control of SiGe epitaxy to allevi-ate crystalline defects is a serious matter that directly affectsyield in device fabrication In particular the collective effectof threading dislocations (TDs) attributed to performancedegradation has been observed when other types of crystaldefects exist individually [24] In MOSFET interface misfitdislocations (MDs) which extend between the source and
6 Advances in Condensed Matter Physics
500120583m
(a) (b)
03 04 05 06 07 08 09500
1000
1500
2000
Content of Ge (Si1minusxGex)
TDP
etch
-pit
dens
ity (
cm2)
(c)
Figure 5 Etch-pit test results of (a) typical SiGe on Si(100) wafer with Ge content = 35 and of (b) rhombohedral SiGe on 119888-plane sapphirewith Ge content = 35 (c) threading dislocation etch-pit density of Si
1minus119909Ge119909on sapphire substrate based on the Ge content
the drain may become electrically active resulting in incr-eased off-state leakage [25] The electrical impact of stackingfaults (SFs) on device operation can be seen as a combinationof the individual effects of misfit and TDs A single SF inthe strained Si channel can degrade the device operationat both off- and on-state conditions [26] SECCO etch is achemical etchingmethod used to delineath crystalline defectson silicon substrate and SiGe filmWhen SECCO etch is useddirectly crystalline defects are revealed on silicon substrateor SiGe film after 2 minutes at some areas Industry standardSECCO etch-pit density measurements were performed on aconventional SiGe layer on Si and 95 single crystalline SiGelayers with 35 Ge content on 119888-plane sapphire A typicalSiGe layer with 35 Ge content on a Si(100) wafer shows ahigh density of dislocation line and etch pits (see Figure 5(a))On the other hand the rhombohedral SiGe grown on 119888-plane sapphire with 35 Ge composition ratio shows twoorders of magnitude less etch pits and no dislocation linesafter performing the SECCO etching (see Figure 5) Theconventional SiGe on a Si(100) wafer reveals a threading dis-location pit (TDP) density of 39times 104cm2 line defect densityof 173 times 104cm2 and a lot of cross-hatch patterns as shownin Figure 5(a) The rhombohedral SiGe grown on 119888-planesapphire has only a TD etch-pit density of 19 times 102cm2
no visible line defects and no cross-hatch patterns as shownin Figure 5(b) Therefore the rhombohedral SiGe shows a200 times less defect density than conventional SiGe onSi(100) wafer under the SECCO etching tests Conclusivelywe confirmed that a new SiGe film growth technique of fullyrelaxed SiGe alloy layers yields low TD density epitaxiallygrown on sapphire substrate [27] The TD etch-pit densityof SiGe on sapphire decreases to 800cm2 as Ge contentincreases (see Figure 5(c)) The SiGe films with low TDPdensity high electron mobility based on the high Ge contentlike 85 and smooth surface were grown on 119888-plane sapphiresubstrateThese kinds of films are sufficiently qualified for thefabrication of the ultrafast chipsets like bipolar junction tran-sistors
The SGOI structures are currently fabricated mainly bytwo methods layer transfer [28] and Ge condensation [2930] In the layer transfer method hydrogen implantation isemployed in order to separate a thin SiGe layer from gradedSiGe substrates In the Ge condensation method a SiGe layerwith a low Ge concentration grown on a silicon-on-insulator(SOI) substrate is thermally oxidized where Ge atoms in theSiGe layer are ejected from the oxide interface resulting in aSiGe layer with a highGe concentration However thesemet-hods require complex processing routines and do not always
Advances in Condensed Matter Physics 7
Table 2 Comparison of Si SOI and SiGe on Si and LM-SGOI technologies
Technology Si SOISGOI SiGe on Si SiGe on sapphire (NASA LaRC)
Fabrication Single crystal ingot Hydrogen crack Gradient layer superlattice Lattice-matched growth
Growth method Czochralski Wafer bonding Epitaxial growth Epitaxial growthLattice-matched Gecontent 0 0 0 85 with sapphire substrate
Ge content in strainedlayer before defects 0 Usually 0sim8 Usually 0sim8 85 achieved
Ge content in relaxedlayer 0 (not available) Up to 25 with severe
defectsUp to 25 with severe
defects 85 achieved with 02 defects
Parasitic capacitancereduction No Yes No Yes
Device Bipolar junctiontransistor (BJT) CMOS
BJTCMOSheterojunctionbipolar transistor (HBT)
CMOS
HBT HBT CMOS
Improvement Conventionaltechnology
High speed withinsulating substrate
High speed (ultrathinSiGe lower collectorvoltage of HBT)
High speed with thick and thinSiGe layer with insulating
substrate higher device yieldwith lower defects
produce high-quality fully relaxed SiGe layer [31] A differentapproach reported is an amorphous SiGe layer deposited onSOI substrate and then annealed above the melting pointof SiGe after the formation of the SiO
2capping layer [32]
This process has the advantage of simplicity However it isdifficult to obtain the SiGe layer with high Ge concentrationby this process because the annealing temperature must bereduced below the melting point resulting in the unusuallylong annealing time Rapid thermal annealing (RTA)was alsoproposed in order to obtain the homogeneous SiGe layer[16] However high-quality and uniform SiGe layers were notobtained in the previous study
We demonstrated the fabrication of high-quality SiGelayers on sapphire substrate by sputtering The ideal of thisprocess is that a fundamental governing relationship existsin rhombohedral epitaxy process that is the growth of⟨111⟩-oriented cubic crystals on the basal 119888-plane of trigonalsapphire crystals [33ndash35] One of the concerns with this epi-taxy relationship is that two crystal structures tend to beformed which exhibit a twin lattice structureThis atomic ali-gnment allows polytype crystalline structures with stackingfaults on the (111) plane Rhombohedral alignment that is ali-gning the [111] direction of a cubic structure to the [0001]direction of a trigonal structure can have two possible azim-uthal configurations Two crystals are twin to each other andthey can be formed by a stacking fault during the crystalgrowth process We gained an experience to control the amo-unt of the twins based on the growth conditions especiallythe growth temperature and deposition power Our processenables the forming of the SiGe layer of high Ge concentra-tion (85) For semiconductor device applications highcarriermobility SiGe layers can bemade by reducing stacking
faults and microtwin defects The measurement and controlof stacking faults and twin crystals are therefore importantin the microelectronics applications
Table 2 illustrates the key features of lattice-matched SiGeon insulator (LM-SGOI) currently under development atNASA Langley [36ndash42] compared to existing products ortechnologiesThe far right columnofTable 2 shows theNASALangley developed SiGe material that is compatible with theconventional insulator silicon oxide The new rhombohedralepitaxy allows new lattice matching condition of SiGe onsapphire insulator with 85 Ge content and 05 defectsWhile the carrier mobilities of silicon-on-insulator (SOI) arelimited by the silicon material the mobilities of SiGe on119888-plane sapphire can be a few times higher than those ofsilicon due to the high carrier mobilities of germanium Thesilicon-on-sapphire (SOS) became crucial in devices usingSOI wafers because sapphire is one of the best insulatorsTheSOS wafer provides electrically separated regions because ofthe insulating properties of the sapphire itself as opposedto other typical devices where the regions are electricallyseparated using reverse bias between the substrate and devicearea The space charge region (carrier depletion region) inthe reverse bias case is very thin in the micrometer rangeand the capacitance between a device and the substrate ishigh and causes the device to have a leakage current at highfrequency operating speeds On the contrary sapphire is verythick and has an ultrasmall capacitance thereby reducingparasitic capacitance and leakage currents at high operatingfrequencies The lattice-matched SiGe is also complementedby silicon oxide as an insulator and stable gate oxide withSiO2can make short gate length for RF device Therefore
RF devices like heterojunction bipolar transistor (HBT) that
8 Advances in Condensed Matter Physics
are made with rhombohedral SiGe on 119888-plane sapphire canpotentially run a few times faster than RF devices on SOSwafers at high frequencies up to several hundred GHz
4 Summary and Conclusions
In summary we have experimentally demonstrated the fab-rication of high-quality SiGe layers with a high Ge concen-tration of more than 85 on sapphire wafer by sputteringWe also report that the defect dependence of the electronmobility by the twinning of SiGe thin films on sapphire(0001) substrates was measured Currently a standard SiGetechnology uses only ultrathin (30sim100 nm) layer of SiGe forbase layer of heterojunction bipolar transistor (HBT) to avoiddislocation defects With the lattice-matched SiGe layer wedeveloped a thin or thick SiGe layer can be also fabricatedfor any designated applications since the lattice-matchedmaterials do not have a critical thickness limit In rhombo-hedral SiGe on 119888-plane (0001) sapphire the SiGe layer can bealso grown in layer-by-layer mode from sub-100 nm to fewmicrometers of thicknesses Therefore thin rhombohedralSiGe on 119888-plane sapphire has many commercial applicationpotentials as do SOI wafers in addition to solar cell applica-tions Typically a rhombohedral single crystal SiGe has 2 or3 times higher carrier mobility than monocrystalline siliconThe high Ge-content SiGe film shows high mobility lowcost and simple structure when grown directly on sapphiresubstrate with sputtering process If the defects in SiGe canbe removed transistors with higher operational frequenciescan be fabricated for a new generation of ultrafast chipsetsbecause of the high mobility of SiGe film
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
References
[1] D L Harame and B S Meyerson ldquoThe early history of IBMrsquosSiGe mixed signal technologyrdquo IEEE Transactions on ElectronDevices vol 48 no 11 pp 2555ndash2567 2001
[2] C Gui M Elwenspoek N Tas and J G E Gardeniers ldquoTheeffect of surface roughness on direct wafer bondingrdquo Journal ofApplied Physics vol 85 no 10 pp 7448ndash7454 1999
[3] ldquoSemiconductorWafer edge analysisrdquo ChapmanTechnical NoteTW-1 1998
[4] H Ahmataku and K Kipli in Proceedings of the IEEE Inter-national Conference on Semiconductor Electronics (ICSE rsquo10)Melaka Malaysia June 2010
[5] I McMackin W Martin J Perez et al ldquoPatterned wafer defectdensity analysis of step and flash imprint lithographyrdquo Journal ofVacuum Science amp Technology B vol 26 no 1 pp 151ndash155 2008
[6] S A Alterovitz C H Mueller and E T Croke ldquoHigh mobilitySiGeSi transistor structures on sapphire substrates using ionimplantationrdquo Journal of Vacuum Science amp Technology B vol22 p 1776 2004
[7] K Ismail M Arafa K L Saenger J O Chu and B SMeyersonldquoExtremely high electron mobility in SiSiGe modulation-doped heterostructuresrdquo Applied Physics Letters vol 66 no 9pp 1077ndash1079 1995
[8] S J Koester R Hammond J O Chu et al ldquoSiGe pMODFETson silicon-on-sapphire substrates with 116GHz fmaxrdquo IEEEElectron Device Letters vol 22 no 2 pp 92ndash94 2001
[9] W B Dubbelday and K L Kavanagh ldquoGrowth of SiGe on sap-phire using rapid thermal chemical vapor depositionrdquo Journalof Crystal Growth vol 222 no 1-2 pp 20ndash28 2001
[10] Y Park H J Kim G C King and S H Choi ldquoX-ray diffractionwafer mapping method for SiGe twin defects characterizationrdquoin Nanosensors Biosensors and Info-Tech Sensors and Systemsvol 7980 of Proceedings of SPIE April 2011
[11] M W Jenkins ldquoA new preferential etch for defects in siliconcrystalsrdquo Journal of the Electrochemical Society Solid-StateScience and Technology vol 124 no 5 pp 757ndash762 1977
[12] F Secco drsquoAragona ldquoDislocation etch for (100) planes in siliconrdquoJournal ofTheElectrochemical Society vol 119 no 7 pp 948ndash9511972
[13] E Sirtl and A Adler ldquoChromic acid-hydrofluoric acid asspecific reagents for the development of etching pits in siliconrdquoZeitschrift fur Metallkunde vol 52 pp 529ndash534 1961
[14] W C Dash ldquoCopper precipitation on dislocations in siliconrdquoJournal of Applied Physics vol 27 no 10 pp 1193ndash1195 1956
[15] H RauhWackerrsquos Atlas for Characterization ofDefects in SiliconA Part of the Wacker Tutorial Series 1986
[16] M Glicksman ldquoMobility of Electrons in Germanium-SiliconAlloysrdquo Physical Review vol 111 no 1 pp 125ndash128 1958
[17] M V Fischetti and S E Laux ldquoBand structure deformationpotentials and carrier mobility in strained Si Ge and SiGealloysrdquo Journal of Applied Physics vol 80 no 4 pp 2234ndash22521996
[18] T E Whall and E H C Parker ldquoSiSiGeSi pMOS performa-ncemdashalloy scattering and other considerationsrdquo Thin SolidFilms vol 368 pp 297ndash305 2000
[19] C Jacoboni C Canali G Ottaviani and A Alberigi QuarantaldquoA review of some charge transport properties of siliconrdquo SolidState Electronics vol 20 no 2 pp 77ndash89 1977
[20] V I Fistul M I Iglitsyn and E M Omelyanovskii ldquoMobilityof electrons in germanium strongly doped with arsenicrdquo SovietPhysics Solid State vol 4 no 4 pp 784ndash785 1962
[21] Landolt-Bornstein New Series Group III vol 17a SpringerBerlin Germany 1982
[22] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions I Static theoryrdquoProceedings of the Royal Society of LondonSeries A vol 198 no 1053 pp 205ndash216 1949
[23] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions IV Dynamicsrdquo Proceedings of the Royal Society of LondonA vol 201 no 1065 pp 261ndash268 1950
[24] E Escobedo-Cousin SHOlsenAGOrsquoNeill andHCoulsonldquoDefect identification in strained SiSiGe heterolayers for deviceapplicationsrdquo Journal of Physics D Applied Physics vol 42 no17 Article ID 175306 2009
[25] J G Fiorenza G Braithwaite C W Leitz et al ldquoFilm thicknessconstraints for manufacturable strained silicon CMOSrdquo Semi-conductor Science and Technology vol 19 no 1 article L4 2004
[26] J N Yang G W Neudeck and J P Denton ldquoElectrical effectsof a single stacking fault on fully depleted thin-film silicon-on-insulator P-channel metal-oxide-semiconductor field-effect
Advances in Condensed Matter Physics 9
transistorsrdquo Journal of Applied Physics vol 91 no 1 pp 420ndash426 2002
[27] P I Gaiduk A Nylandsted Larsen and J LundsgaardHansen ldquoStrain-relaxed SiGeSi heteroepitaxial structures oflow threading-dislocation densityrdquoThin Solid Films vol 367 no1-2 pp 120ndash125 2000
[28] L J Huang J O Chu D F Canaperi et al ldquoSiGe-on-insulatorprepared by wafer bonding and layer transfer for high-perfor-mance field-effect transistorsrdquo Applied Physics Letters vol 78no 9 pp 1267ndash1269 2001
[29] T Tezuka N Sugiyama TMizunoM Suzuki and S Takagi ldquoAnovel fabrication technique of ultrathin and relaxed SiGe bufferlayers with highGe fraction for Sub-100 nm strained silicon-on-insulator MOSFETsrdquo Japanese Journal of Applied Physics vol40 part 1 no 4B pp 2866ndash2874 2001
[30] S Nakaharai T Tezuka N Sugiyama Y Moriyama andS-I Takagi ldquoCharacterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation techniquerdquoApplied Physics Letters vol 83 no 17 pp 3516ndash3518 2003
[31] T Shimura K Kawamura M Asakawa et al ldquoCharacterizationof strained Si wafers by X-ray diffraction techniquesrdquo Journalof Materials Science Materials in Electronics vol 19 no 1supplement pp S189ndashS193 2008
[32] N Sugii S Yamaguchi and K Washio ldquoSiGe-on-insulatorsubstrate fabricated by melt solidification for a strained-siliconcomplementary metalndashoxidendashsemiconductorrdquo Journal of Vac-uum Science amp Technology B vol 20 no 5 pp 1891ndash1896 2002
[33] H-J Kim H-B Bae Y Park K Lee and S H Choi ldquoTempera-ture dependence of crystalline SiGe growth on sapphire (0001)substrates by sputteringrdquo Journal of Crystal Growth vol 353 no1 pp 124ndash128 2012
[34] Y Park G C King and S H Choi ldquoRhombohedral epitaxy ofcubic SiGe on trigonal c-plane sapphirerdquo Journal of Crystal Gro-wth vol 310 no 11 pp 2724ndash2731 2008
[35] H J Kim H B Bae Y Park and S H Choi ldquoDefect-engineered Si
1minus119909Ge119909alloy under electron beam irradiation
for thermoelectricsrdquo RSC Advances vol 2 no 33 pp 12670ndash12674 2012
[36] Y Park S H Choi and G C King ldquoSilicon germanium semi-conductive alloy andmethod of fabricating samerdquoUS Patent no7341883 2008
[37] Y Park S H Choi G C King J R Elliott Jr and D MStoakley ldquoGraded index silicon geranium on lattice matchedsilicon geranium semiconductor alloyrdquo US Patent No 7514726B2 2009
[38] Y Park S Hyouk Choi G C King and J R Elliott ldquoMethodof generating X-ray diffraction data for integral detection oftwin defects in super-hetero-epitaxial materialsrdquo US Patent no7558371 B2 2009
[39] Y Park S H Choi and G C King ldquoEpitaxial growth of cubiccrystalline semiconductor alloys on basal plane of trigonal orhexagonal crystalrdquo US Patent no 7906358 B2 2011
[40] T Maniwa ldquoSteering apparatusrdquo US Patent No 8826767 2012[41] Y Park S H Choi G C King and J R Elliott ldquoRhombohedral
cubic semiconductor materials on trigonal substrate with singlecrystal properties and devices based on such materialsrdquo USPatent no 8257491 B2 2012
[42] Y Park S H Choi G C King J R Elliott and A L Dimarcan-tonio ldquoX-ray diffraction wafermappingmethod for rhombohe-dral super-hetero-epitaxyrdquo US Patent No 7769135 B2 2010
Submit your manuscripts athttpwwwhindawicom
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
High Energy PhysicsAdvances in
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FluidsJournal of
Atomic and Molecular Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Advances in Condensed Matter Physics
OpticsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstronomyAdvances in
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Superconductivity
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Statistical MechanicsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
GravityJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstrophysicsJournal of
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Physics Research International
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
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Computational Methods in Physics
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Soft MatterJournal of
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PhotonicsJournal of
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Journal of
Biophysics
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
ThermodynamicsJournal of
Advances in Condensed Matter Physics 3
(0000)
K-vector of X-ray
Measurement point
Twin defectrsquos (220)
Single crystalrsquos (220)
Angle 120594
120∘
Angle 120601
2120579998400
Ω(sim120579998400)120594 = 120573
rarrn
rarrZ
Figure 1 Phi (120601) scan with tilted 120594 for twin crystal detection
Table 1 Etchant composition for etch-pit density tests and its effects
Etch Composition (Mol ) Results on 100Solventlowast HF Oxidizerlowastlowast Line defects ldquoPointrdquo defects
Secco 676 322 017 Pits Shallow pits or hillocksSirtl 712 263 25 Pits or mounds mdashWright 785 161 54 Pits Shallow pitsSeiter 785 59 156 Mounds MoundslowastH2O + CH3COOH (HAc) lowastlowastCrO3 + HNO3
(FEI Tecnai G2 F30 300KV) The room temperature elec-tron mobilities and carrier densities of the SiGe films weremeasured using the Hall effect measurement system To obt-ain reproducible results the films were cut into several piecesof a standard sized square Each corner of the square-cut SiGefilm with specific doping concentration was soldered ontothe four arms of the sample test platform to ensure ohmiccontacts The ohmic contacts can be also checked during themeasurement process of Hall mobility
To reveal the crystalline defects on fab silicon wafer somechemical etching methods such as Wright [11] SECCO [12]Sirtl [13] and Dash [14] etches have been widely used infailure analysis of semiconductor SECCOetch is a very usefulchemical etching method for the characterization of defectson surface of bare silicon wafer [15]
SECCO etch uses an etchant composition of sol-vent hydrofluoric acid (HF) and K
2Cr2O7oxidizer as tab-
ulated in Table 1 SECCO etch compositions are as follows[12] hydrofluoric acid (HF) 67 by volume and 015MK2Cr2O7in H2O 33 by volumeWhenmixing the solution
1452 g of K2Cr2O7should be dissolved in 330mL of H
2O
Then the K2Cr2O7solution is poured into 670mL of HF
After mixing the total volume of the solution is kept inplastic chemical bottleThe defect area is under higher stresshence it will etch more quickly in SECCO etchant than thebulk semiconductor In most of the cases the result appearsas an elliptical pit on substrate at the location of the defectOptical microscopy is performed to inspect the crystallinedefects pitted by SEC-CO etch
3 Results and Discussion
Figure 2 shows the quality of crystalline SiGe film on 119888-planesapphire through TEM and XRD XRD normal scan datashows very strong SiGe (111) peak (Figure 2(a)) In orderto check the distribution of SiGe crystal in azimuthal in-plane angles we used the phi scan method for SiGe 220peaks and sapphire 10ndash14 peaks The phi scan of SiGe220 peaks shows a large difference in alignment and ratioof majority single crystal The majority peaks and minorityprimary-twin peaks that are rotated by 60∘ are noted as (i)and (ii) in Figure 2(b) respectively The area ratio of thepeaks is 95 5 In the mapping a point X-ray source with a5 nm beam mask was used (c) shows that almost completesingle crystalline SiGe layer was fabricated on the basal planeof trigonal sapphire Three 10ndash14 peaks show the trig-onal space symmetry of a sapphire crystal (Figure 2(d))From the SAED pattern in the upper inset of Figure 2(e)the epitaxial relationship between majority SiGe film andsapphire substrate was found to be (111)SiGe(0001)sapphireand [-112]SiGe[01-10]sapphireThese results demonstrate thatthe [111]-oriented rhombohedral heterostructure epitaxy ofa cubic single crystalline SiGe layer on trigonal 119888-planesapphire has been achieved The SiGe layer was grown inlayer-by-layermode with fewmicrometers of thicknesses anda smooth interface (Figure 2(f))
The charge mobility in semiconductor materials is deter-mined and limited by several factors such as alloy composi-tion interface roughness interface charge scattering lattice
4 Advances in Condensed Matter Physics
0 50 100 1500
10000
40000
90000
160000
Inte
nsity
(cps
)
SiGe
Sapphire
10 20 30 40 50 60 70 80 90 100110
313
103
1003
10003
100003
1000003
Inte
nsity
(cps
)SiGe (111) 95
Sapphire(0006)
Sapphire
(a) (b) (e)
(00012)
(i) (i)
(ii)
(i)
(ii) (ii)
minus150 minus100 minus50
0 50 100 1500
10000
40000
90000
160000
Inte
nsity
(cps
)
(d) (f)(c)
minus150 minus100 minus50
120601 (∘)
120601 (∘)
1ndash110003minus2110220
Al2
O 3SiG
e
SiGe
1120583m
0 20 40
0102030
509
203
645
80
814
212
722
1832
024
935
3256
941
220
5088
861
575
7327
986
001
9974
111
449
913
027
414
706
816
487
918
370
720
355
422
441
8
minus10
minus20
minus30
minus40 minus20
Y
X
(∘)2120579-Ω
Figure 2 Analysis of the 95 single crystal SiGe film Plot (a) shows 120579-2120579 scan in the direction normal to the surface graph (b) shows phi scanof SiGe peaks for the relative atomic alignment (c)119883-119884wafer mapping withmajority 440 peak shows the distribution of a single crystal (d)shows phi scan of sapphire 10ndash14 peaks for relative atomic alignment (e) shows HRTEM and its SAED result of the SiGe (green)sapphire(yellow) interface and (f) shows low magnification TEM image after the ion milling process
mismatch or segregation and strain relaxation of strainedSiGe layers with large Ge content and layer width as dis-cussed in a recent reviewbyWhall andParker (2000) [18]Theresults by Hall effect measurements indicate that the densityof twin lattices is correlated with the electron mobility in theSiGe films Figure 3(a) shows the calculated electronmobilityfor relaxed SiGe alloys as a function of their Ge contentAs shown in Figure 3(a) relaxed SiGe alloys exhibit drasticdecline in mobility mainly due to alloy interface scattering indislocation populated polycrystal region except for varyinghigh Ge content (gt085) where they start behaving like Ge[16 17] In Figure 3(a) the left side 119910-axis indicates the pureSi with 120583
119899Si = 1400 cm2Vsdots and the right side 119910-axis the pureGewith 120583
119899Ge = 4000 cm2Vsdots [19 20]When epitaxial layer is
grown on Si or Ge substrate in either case alloy compositionfrom pure Si or pure Ge lowers the electron carrier mobilityrapidly and they often become polycrystal with many defectsin the middle SiGe composition In spite of the high mobilityof Ge the mobility of SiGe layer is substantially lowereddue to the formation of strain caused dislocation defectsThe strain caused dislocation defects occur mainly due tothe lattice mismatch between Si whose lattice constant is5431 A and Ge with 6657 A [21] However if a substrate
allows growing a lattice-matched SiGe layer on it these defectformation problems can be avoided and the mobility can bedrastically enhanced beyond that of Si Of course not onlyis the growth of lattice-matched SiGe layer guaranteed by thecrystal symmetry of substrate but also the growth conditionssuch as epilayer speed substrate temperature and pressureof processing gases will dictate the formation of lattice-matched crystalline structuresWe observed that the electronmobility is also strongly correlated with the dopant electrondensity In Figure 3(b) we figured out the dependence ofroom temperature electron mobilities on defect density anddopant density in SiGe films The measured dopant electrondensities in three SiGe films are 221 times 1017cm3 602 times10
17cm3 and 146 times 1018cm3 On the other hand the
defect densitymeasurementsweremade by theXRDphi scanThe electron mobilities of the tested samples are betweenthose of single crystal Si (120583
119899Si = 1400 cm2Vsdots) and Ge(120583119899Ge = 4000 cm2Vsdots) The measured electron mobility of
a 95 single crystal SiGe was 1538 cm2Vsdots which is between350 cm2Vsdots (Si) and 1550 cm2Vsdots (Ge) at 602 times 1017cm3dopant concentration And the electron mobility of 995single crystal SiGe is 1552 cm2Vsdots at the 602 times 1017cm3dopant concentration Figure 3(a) shows that the room
Advances in Condensed Matter Physics 5
Polycrystal
100 Si
100 Ge
Dislocation
Dislo
catio
n
4000
3000
2000
1000
00 20 40 60 80 100
Ge content x ()
Elec
tron
mob
ility120583n
(cm2V
middots)
(a)
012
34
56
6008001000
1200
1400
1600
1800
2000
2200
TMs (
)
020406
08
10
12
14
16
Electron density (cm 3)
Elec
tron
mob
ility
(cm
2 Vs)
times1018
(b)
Figure 3 (a) Calculated phonon-limited 300K electron low-field mobility in relaxed Si1minus119909
Ge119909alloys Results with (circle) and without
(triangle) the inclusion of alloy scattering are shown [16 17] (b) Three pairs in three-dimensional (3D) plot for room temperature electronmobilities in SiGe films as a function of twin density (TM) and dopant concentration Red and blue dots show the data points for 995 and95 single crystal SiGe samples grown on 119888-plane sapphire substrates respectively
0 025 050 075 1000
025
050
075
100
(120583m)
70
35
00
(nm
)
(a)
0 025 050 075 100
Section analysis450
0
450
(nm
)
Surface distanceHorizontal distance (L)Vertical distanceAngle
21489nm21484nm0316nm
0842∘
(b)
Figure 4 AFM image of SiGe layer on 119888-plane sapphire (a) 1 120583m times 1 120583m area of a SiGe and (b) line profile of cross-section measured alongthe dark line in (a)
temperature electron mobility in the SiGe films grown onsapphire substrates becomes slightly higher as defect densitiesare decreased
Since the topographical and morphological properties ofthe layer directly influence the charge carrier properties andthe channel carrier transport characteristic of the device thelayer needs to be flat in atomic level The SiGe layer shows arootmean square (rms) roughness of 2 nm for 1times1 120583m2 scanThe AFM analysis shows that the epitaxial layer grows in alayer-by-layer growthmode [22 23] as shown in Figure 4(a)Figure 4(b) shows a line scan profile along the line indicatedwhich was selected to pass through a step It is important to
control the SiGe composition to reduce the lattice mismatchwith the 119888-plane sapphire maintain an appropriatemolecularbeam flux rate to ensure flat smooth layer-by-layer growthand have 2D layer-by-layer growth in electronic microdevicefabrication
Fine and delicate growth control of SiGe epitaxy to allevi-ate crystalline defects is a serious matter that directly affectsyield in device fabrication In particular the collective effectof threading dislocations (TDs) attributed to performancedegradation has been observed when other types of crystaldefects exist individually [24] In MOSFET interface misfitdislocations (MDs) which extend between the source and
6 Advances in Condensed Matter Physics
500120583m
(a) (b)
03 04 05 06 07 08 09500
1000
1500
2000
Content of Ge (Si1minusxGex)
TDP
etch
-pit
dens
ity (
cm2)
(c)
Figure 5 Etch-pit test results of (a) typical SiGe on Si(100) wafer with Ge content = 35 and of (b) rhombohedral SiGe on 119888-plane sapphirewith Ge content = 35 (c) threading dislocation etch-pit density of Si
1minus119909Ge119909on sapphire substrate based on the Ge content
the drain may become electrically active resulting in incr-eased off-state leakage [25] The electrical impact of stackingfaults (SFs) on device operation can be seen as a combinationof the individual effects of misfit and TDs A single SF inthe strained Si channel can degrade the device operationat both off- and on-state conditions [26] SECCO etch is achemical etchingmethod used to delineath crystalline defectson silicon substrate and SiGe filmWhen SECCO etch is useddirectly crystalline defects are revealed on silicon substrateor SiGe film after 2 minutes at some areas Industry standardSECCO etch-pit density measurements were performed on aconventional SiGe layer on Si and 95 single crystalline SiGelayers with 35 Ge content on 119888-plane sapphire A typicalSiGe layer with 35 Ge content on a Si(100) wafer shows ahigh density of dislocation line and etch pits (see Figure 5(a))On the other hand the rhombohedral SiGe grown on 119888-plane sapphire with 35 Ge composition ratio shows twoorders of magnitude less etch pits and no dislocation linesafter performing the SECCO etching (see Figure 5) Theconventional SiGe on a Si(100) wafer reveals a threading dis-location pit (TDP) density of 39times 104cm2 line defect densityof 173 times 104cm2 and a lot of cross-hatch patterns as shownin Figure 5(a) The rhombohedral SiGe grown on 119888-planesapphire has only a TD etch-pit density of 19 times 102cm2
no visible line defects and no cross-hatch patterns as shownin Figure 5(b) Therefore the rhombohedral SiGe shows a200 times less defect density than conventional SiGe onSi(100) wafer under the SECCO etching tests Conclusivelywe confirmed that a new SiGe film growth technique of fullyrelaxed SiGe alloy layers yields low TD density epitaxiallygrown on sapphire substrate [27] The TD etch-pit densityof SiGe on sapphire decreases to 800cm2 as Ge contentincreases (see Figure 5(c)) The SiGe films with low TDPdensity high electron mobility based on the high Ge contentlike 85 and smooth surface were grown on 119888-plane sapphiresubstrateThese kinds of films are sufficiently qualified for thefabrication of the ultrafast chipsets like bipolar junction tran-sistors
The SGOI structures are currently fabricated mainly bytwo methods layer transfer [28] and Ge condensation [2930] In the layer transfer method hydrogen implantation isemployed in order to separate a thin SiGe layer from gradedSiGe substrates In the Ge condensation method a SiGe layerwith a low Ge concentration grown on a silicon-on-insulator(SOI) substrate is thermally oxidized where Ge atoms in theSiGe layer are ejected from the oxide interface resulting in aSiGe layer with a highGe concentration However thesemet-hods require complex processing routines and do not always
Advances in Condensed Matter Physics 7
Table 2 Comparison of Si SOI and SiGe on Si and LM-SGOI technologies
Technology Si SOISGOI SiGe on Si SiGe on sapphire (NASA LaRC)
Fabrication Single crystal ingot Hydrogen crack Gradient layer superlattice Lattice-matched growth
Growth method Czochralski Wafer bonding Epitaxial growth Epitaxial growthLattice-matched Gecontent 0 0 0 85 with sapphire substrate
Ge content in strainedlayer before defects 0 Usually 0sim8 Usually 0sim8 85 achieved
Ge content in relaxedlayer 0 (not available) Up to 25 with severe
defectsUp to 25 with severe
defects 85 achieved with 02 defects
Parasitic capacitancereduction No Yes No Yes
Device Bipolar junctiontransistor (BJT) CMOS
BJTCMOSheterojunctionbipolar transistor (HBT)
CMOS
HBT HBT CMOS
Improvement Conventionaltechnology
High speed withinsulating substrate
High speed (ultrathinSiGe lower collectorvoltage of HBT)
High speed with thick and thinSiGe layer with insulating
substrate higher device yieldwith lower defects
produce high-quality fully relaxed SiGe layer [31] A differentapproach reported is an amorphous SiGe layer deposited onSOI substrate and then annealed above the melting pointof SiGe after the formation of the SiO
2capping layer [32]
This process has the advantage of simplicity However it isdifficult to obtain the SiGe layer with high Ge concentrationby this process because the annealing temperature must bereduced below the melting point resulting in the unusuallylong annealing time Rapid thermal annealing (RTA)was alsoproposed in order to obtain the homogeneous SiGe layer[16] However high-quality and uniform SiGe layers were notobtained in the previous study
We demonstrated the fabrication of high-quality SiGelayers on sapphire substrate by sputtering The ideal of thisprocess is that a fundamental governing relationship existsin rhombohedral epitaxy process that is the growth of⟨111⟩-oriented cubic crystals on the basal 119888-plane of trigonalsapphire crystals [33ndash35] One of the concerns with this epi-taxy relationship is that two crystal structures tend to beformed which exhibit a twin lattice structureThis atomic ali-gnment allows polytype crystalline structures with stackingfaults on the (111) plane Rhombohedral alignment that is ali-gning the [111] direction of a cubic structure to the [0001]direction of a trigonal structure can have two possible azim-uthal configurations Two crystals are twin to each other andthey can be formed by a stacking fault during the crystalgrowth process We gained an experience to control the amo-unt of the twins based on the growth conditions especiallythe growth temperature and deposition power Our processenables the forming of the SiGe layer of high Ge concentra-tion (85) For semiconductor device applications highcarriermobility SiGe layers can bemade by reducing stacking
faults and microtwin defects The measurement and controlof stacking faults and twin crystals are therefore importantin the microelectronics applications
Table 2 illustrates the key features of lattice-matched SiGeon insulator (LM-SGOI) currently under development atNASA Langley [36ndash42] compared to existing products ortechnologiesThe far right columnofTable 2 shows theNASALangley developed SiGe material that is compatible with theconventional insulator silicon oxide The new rhombohedralepitaxy allows new lattice matching condition of SiGe onsapphire insulator with 85 Ge content and 05 defectsWhile the carrier mobilities of silicon-on-insulator (SOI) arelimited by the silicon material the mobilities of SiGe on119888-plane sapphire can be a few times higher than those ofsilicon due to the high carrier mobilities of germanium Thesilicon-on-sapphire (SOS) became crucial in devices usingSOI wafers because sapphire is one of the best insulatorsTheSOS wafer provides electrically separated regions because ofthe insulating properties of the sapphire itself as opposedto other typical devices where the regions are electricallyseparated using reverse bias between the substrate and devicearea The space charge region (carrier depletion region) inthe reverse bias case is very thin in the micrometer rangeand the capacitance between a device and the substrate ishigh and causes the device to have a leakage current at highfrequency operating speeds On the contrary sapphire is verythick and has an ultrasmall capacitance thereby reducingparasitic capacitance and leakage currents at high operatingfrequencies The lattice-matched SiGe is also complementedby silicon oxide as an insulator and stable gate oxide withSiO2can make short gate length for RF device Therefore
RF devices like heterojunction bipolar transistor (HBT) that
8 Advances in Condensed Matter Physics
are made with rhombohedral SiGe on 119888-plane sapphire canpotentially run a few times faster than RF devices on SOSwafers at high frequencies up to several hundred GHz
4 Summary and Conclusions
In summary we have experimentally demonstrated the fab-rication of high-quality SiGe layers with a high Ge concen-tration of more than 85 on sapphire wafer by sputteringWe also report that the defect dependence of the electronmobility by the twinning of SiGe thin films on sapphire(0001) substrates was measured Currently a standard SiGetechnology uses only ultrathin (30sim100 nm) layer of SiGe forbase layer of heterojunction bipolar transistor (HBT) to avoiddislocation defects With the lattice-matched SiGe layer wedeveloped a thin or thick SiGe layer can be also fabricatedfor any designated applications since the lattice-matchedmaterials do not have a critical thickness limit In rhombo-hedral SiGe on 119888-plane (0001) sapphire the SiGe layer can bealso grown in layer-by-layer mode from sub-100 nm to fewmicrometers of thicknesses Therefore thin rhombohedralSiGe on 119888-plane sapphire has many commercial applicationpotentials as do SOI wafers in addition to solar cell applica-tions Typically a rhombohedral single crystal SiGe has 2 or3 times higher carrier mobility than monocrystalline siliconThe high Ge-content SiGe film shows high mobility lowcost and simple structure when grown directly on sapphiresubstrate with sputtering process If the defects in SiGe canbe removed transistors with higher operational frequenciescan be fabricated for a new generation of ultrafast chipsetsbecause of the high mobility of SiGe film
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
References
[1] D L Harame and B S Meyerson ldquoThe early history of IBMrsquosSiGe mixed signal technologyrdquo IEEE Transactions on ElectronDevices vol 48 no 11 pp 2555ndash2567 2001
[2] C Gui M Elwenspoek N Tas and J G E Gardeniers ldquoTheeffect of surface roughness on direct wafer bondingrdquo Journal ofApplied Physics vol 85 no 10 pp 7448ndash7454 1999
[3] ldquoSemiconductorWafer edge analysisrdquo ChapmanTechnical NoteTW-1 1998
[4] H Ahmataku and K Kipli in Proceedings of the IEEE Inter-national Conference on Semiconductor Electronics (ICSE rsquo10)Melaka Malaysia June 2010
[5] I McMackin W Martin J Perez et al ldquoPatterned wafer defectdensity analysis of step and flash imprint lithographyrdquo Journal ofVacuum Science amp Technology B vol 26 no 1 pp 151ndash155 2008
[6] S A Alterovitz C H Mueller and E T Croke ldquoHigh mobilitySiGeSi transistor structures on sapphire substrates using ionimplantationrdquo Journal of Vacuum Science amp Technology B vol22 p 1776 2004
[7] K Ismail M Arafa K L Saenger J O Chu and B SMeyersonldquoExtremely high electron mobility in SiSiGe modulation-doped heterostructuresrdquo Applied Physics Letters vol 66 no 9pp 1077ndash1079 1995
[8] S J Koester R Hammond J O Chu et al ldquoSiGe pMODFETson silicon-on-sapphire substrates with 116GHz fmaxrdquo IEEEElectron Device Letters vol 22 no 2 pp 92ndash94 2001
[9] W B Dubbelday and K L Kavanagh ldquoGrowth of SiGe on sap-phire using rapid thermal chemical vapor depositionrdquo Journalof Crystal Growth vol 222 no 1-2 pp 20ndash28 2001
[10] Y Park H J Kim G C King and S H Choi ldquoX-ray diffractionwafer mapping method for SiGe twin defects characterizationrdquoin Nanosensors Biosensors and Info-Tech Sensors and Systemsvol 7980 of Proceedings of SPIE April 2011
[11] M W Jenkins ldquoA new preferential etch for defects in siliconcrystalsrdquo Journal of the Electrochemical Society Solid-StateScience and Technology vol 124 no 5 pp 757ndash762 1977
[12] F Secco drsquoAragona ldquoDislocation etch for (100) planes in siliconrdquoJournal ofTheElectrochemical Society vol 119 no 7 pp 948ndash9511972
[13] E Sirtl and A Adler ldquoChromic acid-hydrofluoric acid asspecific reagents for the development of etching pits in siliconrdquoZeitschrift fur Metallkunde vol 52 pp 529ndash534 1961
[14] W C Dash ldquoCopper precipitation on dislocations in siliconrdquoJournal of Applied Physics vol 27 no 10 pp 1193ndash1195 1956
[15] H RauhWackerrsquos Atlas for Characterization ofDefects in SiliconA Part of the Wacker Tutorial Series 1986
[16] M Glicksman ldquoMobility of Electrons in Germanium-SiliconAlloysrdquo Physical Review vol 111 no 1 pp 125ndash128 1958
[17] M V Fischetti and S E Laux ldquoBand structure deformationpotentials and carrier mobility in strained Si Ge and SiGealloysrdquo Journal of Applied Physics vol 80 no 4 pp 2234ndash22521996
[18] T E Whall and E H C Parker ldquoSiSiGeSi pMOS performa-ncemdashalloy scattering and other considerationsrdquo Thin SolidFilms vol 368 pp 297ndash305 2000
[19] C Jacoboni C Canali G Ottaviani and A Alberigi QuarantaldquoA review of some charge transport properties of siliconrdquo SolidState Electronics vol 20 no 2 pp 77ndash89 1977
[20] V I Fistul M I Iglitsyn and E M Omelyanovskii ldquoMobilityof electrons in germanium strongly doped with arsenicrdquo SovietPhysics Solid State vol 4 no 4 pp 784ndash785 1962
[21] Landolt-Bornstein New Series Group III vol 17a SpringerBerlin Germany 1982
[22] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions I Static theoryrdquoProceedings of the Royal Society of LondonSeries A vol 198 no 1053 pp 205ndash216 1949
[23] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions IV Dynamicsrdquo Proceedings of the Royal Society of LondonA vol 201 no 1065 pp 261ndash268 1950
[24] E Escobedo-Cousin SHOlsenAGOrsquoNeill andHCoulsonldquoDefect identification in strained SiSiGe heterolayers for deviceapplicationsrdquo Journal of Physics D Applied Physics vol 42 no17 Article ID 175306 2009
[25] J G Fiorenza G Braithwaite C W Leitz et al ldquoFilm thicknessconstraints for manufacturable strained silicon CMOSrdquo Semi-conductor Science and Technology vol 19 no 1 article L4 2004
[26] J N Yang G W Neudeck and J P Denton ldquoElectrical effectsof a single stacking fault on fully depleted thin-film silicon-on-insulator P-channel metal-oxide-semiconductor field-effect
Advances in Condensed Matter Physics 9
transistorsrdquo Journal of Applied Physics vol 91 no 1 pp 420ndash426 2002
[27] P I Gaiduk A Nylandsted Larsen and J LundsgaardHansen ldquoStrain-relaxed SiGeSi heteroepitaxial structures oflow threading-dislocation densityrdquoThin Solid Films vol 367 no1-2 pp 120ndash125 2000
[28] L J Huang J O Chu D F Canaperi et al ldquoSiGe-on-insulatorprepared by wafer bonding and layer transfer for high-perfor-mance field-effect transistorsrdquo Applied Physics Letters vol 78no 9 pp 1267ndash1269 2001
[29] T Tezuka N Sugiyama TMizunoM Suzuki and S Takagi ldquoAnovel fabrication technique of ultrathin and relaxed SiGe bufferlayers with highGe fraction for Sub-100 nm strained silicon-on-insulator MOSFETsrdquo Japanese Journal of Applied Physics vol40 part 1 no 4B pp 2866ndash2874 2001
[30] S Nakaharai T Tezuka N Sugiyama Y Moriyama andS-I Takagi ldquoCharacterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation techniquerdquoApplied Physics Letters vol 83 no 17 pp 3516ndash3518 2003
[31] T Shimura K Kawamura M Asakawa et al ldquoCharacterizationof strained Si wafers by X-ray diffraction techniquesrdquo Journalof Materials Science Materials in Electronics vol 19 no 1supplement pp S189ndashS193 2008
[32] N Sugii S Yamaguchi and K Washio ldquoSiGe-on-insulatorsubstrate fabricated by melt solidification for a strained-siliconcomplementary metalndashoxidendashsemiconductorrdquo Journal of Vac-uum Science amp Technology B vol 20 no 5 pp 1891ndash1896 2002
[33] H-J Kim H-B Bae Y Park K Lee and S H Choi ldquoTempera-ture dependence of crystalline SiGe growth on sapphire (0001)substrates by sputteringrdquo Journal of Crystal Growth vol 353 no1 pp 124ndash128 2012
[34] Y Park G C King and S H Choi ldquoRhombohedral epitaxy ofcubic SiGe on trigonal c-plane sapphirerdquo Journal of Crystal Gro-wth vol 310 no 11 pp 2724ndash2731 2008
[35] H J Kim H B Bae Y Park and S H Choi ldquoDefect-engineered Si
1minus119909Ge119909alloy under electron beam irradiation
for thermoelectricsrdquo RSC Advances vol 2 no 33 pp 12670ndash12674 2012
[36] Y Park S H Choi and G C King ldquoSilicon germanium semi-conductive alloy andmethod of fabricating samerdquoUS Patent no7341883 2008
[37] Y Park S H Choi G C King J R Elliott Jr and D MStoakley ldquoGraded index silicon geranium on lattice matchedsilicon geranium semiconductor alloyrdquo US Patent No 7514726B2 2009
[38] Y Park S Hyouk Choi G C King and J R Elliott ldquoMethodof generating X-ray diffraction data for integral detection oftwin defects in super-hetero-epitaxial materialsrdquo US Patent no7558371 B2 2009
[39] Y Park S H Choi and G C King ldquoEpitaxial growth of cubiccrystalline semiconductor alloys on basal plane of trigonal orhexagonal crystalrdquo US Patent no 7906358 B2 2011
[40] T Maniwa ldquoSteering apparatusrdquo US Patent No 8826767 2012[41] Y Park S H Choi G C King and J R Elliott ldquoRhombohedral
cubic semiconductor materials on trigonal substrate with singlecrystal properties and devices based on such materialsrdquo USPatent no 8257491 B2 2012
[42] Y Park S H Choi G C King J R Elliott and A L Dimarcan-tonio ldquoX-ray diffraction wafermappingmethod for rhombohe-dral super-hetero-epitaxyrdquo US Patent No 7769135 B2 2010
Submit your manuscripts athttpwwwhindawicom
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
High Energy PhysicsAdvances in
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Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
FluidsJournal of
Atomic and Molecular Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Advances in Condensed Matter Physics
OpticsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstronomyAdvances in
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Superconductivity
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Statistical MechanicsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
GravityJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstrophysicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Physics Research International
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Solid State PhysicsJournal of
Computational Methods in Physics
Journal of
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Soft MatterJournal of
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PhotonicsJournal of
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Journal of
Biophysics
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ThermodynamicsJournal of
4 Advances in Condensed Matter Physics
0 50 100 1500
10000
40000
90000
160000
Inte
nsity
(cps
)
SiGe
Sapphire
10 20 30 40 50 60 70 80 90 100110
313
103
1003
10003
100003
1000003
Inte
nsity
(cps
)SiGe (111) 95
Sapphire(0006)
Sapphire
(a) (b) (e)
(00012)
(i) (i)
(ii)
(i)
(ii) (ii)
minus150 minus100 minus50
0 50 100 1500
10000
40000
90000
160000
Inte
nsity
(cps
)
(d) (f)(c)
minus150 minus100 minus50
120601 (∘)
120601 (∘)
1ndash110003minus2110220
Al2
O 3SiG
e
SiGe
1120583m
0 20 40
0102030
509
203
645
80
814
212
722
1832
024
935
3256
941
220
5088
861
575
7327
986
001
9974
111
449
913
027
414
706
816
487
918
370
720
355
422
441
8
minus10
minus20
minus30
minus40 minus20
Y
X
(∘)2120579-Ω
Figure 2 Analysis of the 95 single crystal SiGe film Plot (a) shows 120579-2120579 scan in the direction normal to the surface graph (b) shows phi scanof SiGe peaks for the relative atomic alignment (c)119883-119884wafer mapping withmajority 440 peak shows the distribution of a single crystal (d)shows phi scan of sapphire 10ndash14 peaks for relative atomic alignment (e) shows HRTEM and its SAED result of the SiGe (green)sapphire(yellow) interface and (f) shows low magnification TEM image after the ion milling process
mismatch or segregation and strain relaxation of strainedSiGe layers with large Ge content and layer width as dis-cussed in a recent reviewbyWhall andParker (2000) [18]Theresults by Hall effect measurements indicate that the densityof twin lattices is correlated with the electron mobility in theSiGe films Figure 3(a) shows the calculated electronmobilityfor relaxed SiGe alloys as a function of their Ge contentAs shown in Figure 3(a) relaxed SiGe alloys exhibit drasticdecline in mobility mainly due to alloy interface scattering indislocation populated polycrystal region except for varyinghigh Ge content (gt085) where they start behaving like Ge[16 17] In Figure 3(a) the left side 119910-axis indicates the pureSi with 120583
119899Si = 1400 cm2Vsdots and the right side 119910-axis the pureGewith 120583
119899Ge = 4000 cm2Vsdots [19 20]When epitaxial layer is
grown on Si or Ge substrate in either case alloy compositionfrom pure Si or pure Ge lowers the electron carrier mobilityrapidly and they often become polycrystal with many defectsin the middle SiGe composition In spite of the high mobilityof Ge the mobility of SiGe layer is substantially lowereddue to the formation of strain caused dislocation defectsThe strain caused dislocation defects occur mainly due tothe lattice mismatch between Si whose lattice constant is5431 A and Ge with 6657 A [21] However if a substrate
allows growing a lattice-matched SiGe layer on it these defectformation problems can be avoided and the mobility can bedrastically enhanced beyond that of Si Of course not onlyis the growth of lattice-matched SiGe layer guaranteed by thecrystal symmetry of substrate but also the growth conditionssuch as epilayer speed substrate temperature and pressureof processing gases will dictate the formation of lattice-matched crystalline structuresWe observed that the electronmobility is also strongly correlated with the dopant electrondensity In Figure 3(b) we figured out the dependence ofroom temperature electron mobilities on defect density anddopant density in SiGe films The measured dopant electrondensities in three SiGe films are 221 times 1017cm3 602 times10
17cm3 and 146 times 1018cm3 On the other hand the
defect densitymeasurementsweremade by theXRDphi scanThe electron mobilities of the tested samples are betweenthose of single crystal Si (120583
119899Si = 1400 cm2Vsdots) and Ge(120583119899Ge = 4000 cm2Vsdots) The measured electron mobility of
a 95 single crystal SiGe was 1538 cm2Vsdots which is between350 cm2Vsdots (Si) and 1550 cm2Vsdots (Ge) at 602 times 1017cm3dopant concentration And the electron mobility of 995single crystal SiGe is 1552 cm2Vsdots at the 602 times 1017cm3dopant concentration Figure 3(a) shows that the room
Advances in Condensed Matter Physics 5
Polycrystal
100 Si
100 Ge
Dislocation
Dislo
catio
n
4000
3000
2000
1000
00 20 40 60 80 100
Ge content x ()
Elec
tron
mob
ility120583n
(cm2V
middots)
(a)
012
34
56
6008001000
1200
1400
1600
1800
2000
2200
TMs (
)
020406
08
10
12
14
16
Electron density (cm 3)
Elec
tron
mob
ility
(cm
2 Vs)
times1018
(b)
Figure 3 (a) Calculated phonon-limited 300K electron low-field mobility in relaxed Si1minus119909
Ge119909alloys Results with (circle) and without
(triangle) the inclusion of alloy scattering are shown [16 17] (b) Three pairs in three-dimensional (3D) plot for room temperature electronmobilities in SiGe films as a function of twin density (TM) and dopant concentration Red and blue dots show the data points for 995 and95 single crystal SiGe samples grown on 119888-plane sapphire substrates respectively
0 025 050 075 1000
025
050
075
100
(120583m)
70
35
00
(nm
)
(a)
0 025 050 075 100
Section analysis450
0
450
(nm
)
Surface distanceHorizontal distance (L)Vertical distanceAngle
21489nm21484nm0316nm
0842∘
(b)
Figure 4 AFM image of SiGe layer on 119888-plane sapphire (a) 1 120583m times 1 120583m area of a SiGe and (b) line profile of cross-section measured alongthe dark line in (a)
temperature electron mobility in the SiGe films grown onsapphire substrates becomes slightly higher as defect densitiesare decreased
Since the topographical and morphological properties ofthe layer directly influence the charge carrier properties andthe channel carrier transport characteristic of the device thelayer needs to be flat in atomic level The SiGe layer shows arootmean square (rms) roughness of 2 nm for 1times1 120583m2 scanThe AFM analysis shows that the epitaxial layer grows in alayer-by-layer growthmode [22 23] as shown in Figure 4(a)Figure 4(b) shows a line scan profile along the line indicatedwhich was selected to pass through a step It is important to
control the SiGe composition to reduce the lattice mismatchwith the 119888-plane sapphire maintain an appropriatemolecularbeam flux rate to ensure flat smooth layer-by-layer growthand have 2D layer-by-layer growth in electronic microdevicefabrication
Fine and delicate growth control of SiGe epitaxy to allevi-ate crystalline defects is a serious matter that directly affectsyield in device fabrication In particular the collective effectof threading dislocations (TDs) attributed to performancedegradation has been observed when other types of crystaldefects exist individually [24] In MOSFET interface misfitdislocations (MDs) which extend between the source and
6 Advances in Condensed Matter Physics
500120583m
(a) (b)
03 04 05 06 07 08 09500
1000
1500
2000
Content of Ge (Si1minusxGex)
TDP
etch
-pit
dens
ity (
cm2)
(c)
Figure 5 Etch-pit test results of (a) typical SiGe on Si(100) wafer with Ge content = 35 and of (b) rhombohedral SiGe on 119888-plane sapphirewith Ge content = 35 (c) threading dislocation etch-pit density of Si
1minus119909Ge119909on sapphire substrate based on the Ge content
the drain may become electrically active resulting in incr-eased off-state leakage [25] The electrical impact of stackingfaults (SFs) on device operation can be seen as a combinationof the individual effects of misfit and TDs A single SF inthe strained Si channel can degrade the device operationat both off- and on-state conditions [26] SECCO etch is achemical etchingmethod used to delineath crystalline defectson silicon substrate and SiGe filmWhen SECCO etch is useddirectly crystalline defects are revealed on silicon substrateor SiGe film after 2 minutes at some areas Industry standardSECCO etch-pit density measurements were performed on aconventional SiGe layer on Si and 95 single crystalline SiGelayers with 35 Ge content on 119888-plane sapphire A typicalSiGe layer with 35 Ge content on a Si(100) wafer shows ahigh density of dislocation line and etch pits (see Figure 5(a))On the other hand the rhombohedral SiGe grown on 119888-plane sapphire with 35 Ge composition ratio shows twoorders of magnitude less etch pits and no dislocation linesafter performing the SECCO etching (see Figure 5) Theconventional SiGe on a Si(100) wafer reveals a threading dis-location pit (TDP) density of 39times 104cm2 line defect densityof 173 times 104cm2 and a lot of cross-hatch patterns as shownin Figure 5(a) The rhombohedral SiGe grown on 119888-planesapphire has only a TD etch-pit density of 19 times 102cm2
no visible line defects and no cross-hatch patterns as shownin Figure 5(b) Therefore the rhombohedral SiGe shows a200 times less defect density than conventional SiGe onSi(100) wafer under the SECCO etching tests Conclusivelywe confirmed that a new SiGe film growth technique of fullyrelaxed SiGe alloy layers yields low TD density epitaxiallygrown on sapphire substrate [27] The TD etch-pit densityof SiGe on sapphire decreases to 800cm2 as Ge contentincreases (see Figure 5(c)) The SiGe films with low TDPdensity high electron mobility based on the high Ge contentlike 85 and smooth surface were grown on 119888-plane sapphiresubstrateThese kinds of films are sufficiently qualified for thefabrication of the ultrafast chipsets like bipolar junction tran-sistors
The SGOI structures are currently fabricated mainly bytwo methods layer transfer [28] and Ge condensation [2930] In the layer transfer method hydrogen implantation isemployed in order to separate a thin SiGe layer from gradedSiGe substrates In the Ge condensation method a SiGe layerwith a low Ge concentration grown on a silicon-on-insulator(SOI) substrate is thermally oxidized where Ge atoms in theSiGe layer are ejected from the oxide interface resulting in aSiGe layer with a highGe concentration However thesemet-hods require complex processing routines and do not always
Advances in Condensed Matter Physics 7
Table 2 Comparison of Si SOI and SiGe on Si and LM-SGOI technologies
Technology Si SOISGOI SiGe on Si SiGe on sapphire (NASA LaRC)
Fabrication Single crystal ingot Hydrogen crack Gradient layer superlattice Lattice-matched growth
Growth method Czochralski Wafer bonding Epitaxial growth Epitaxial growthLattice-matched Gecontent 0 0 0 85 with sapphire substrate
Ge content in strainedlayer before defects 0 Usually 0sim8 Usually 0sim8 85 achieved
Ge content in relaxedlayer 0 (not available) Up to 25 with severe
defectsUp to 25 with severe
defects 85 achieved with 02 defects
Parasitic capacitancereduction No Yes No Yes
Device Bipolar junctiontransistor (BJT) CMOS
BJTCMOSheterojunctionbipolar transistor (HBT)
CMOS
HBT HBT CMOS
Improvement Conventionaltechnology
High speed withinsulating substrate
High speed (ultrathinSiGe lower collectorvoltage of HBT)
High speed with thick and thinSiGe layer with insulating
substrate higher device yieldwith lower defects
produce high-quality fully relaxed SiGe layer [31] A differentapproach reported is an amorphous SiGe layer deposited onSOI substrate and then annealed above the melting pointof SiGe after the formation of the SiO
2capping layer [32]
This process has the advantage of simplicity However it isdifficult to obtain the SiGe layer with high Ge concentrationby this process because the annealing temperature must bereduced below the melting point resulting in the unusuallylong annealing time Rapid thermal annealing (RTA)was alsoproposed in order to obtain the homogeneous SiGe layer[16] However high-quality and uniform SiGe layers were notobtained in the previous study
We demonstrated the fabrication of high-quality SiGelayers on sapphire substrate by sputtering The ideal of thisprocess is that a fundamental governing relationship existsin rhombohedral epitaxy process that is the growth of⟨111⟩-oriented cubic crystals on the basal 119888-plane of trigonalsapphire crystals [33ndash35] One of the concerns with this epi-taxy relationship is that two crystal structures tend to beformed which exhibit a twin lattice structureThis atomic ali-gnment allows polytype crystalline structures with stackingfaults on the (111) plane Rhombohedral alignment that is ali-gning the [111] direction of a cubic structure to the [0001]direction of a trigonal structure can have two possible azim-uthal configurations Two crystals are twin to each other andthey can be formed by a stacking fault during the crystalgrowth process We gained an experience to control the amo-unt of the twins based on the growth conditions especiallythe growth temperature and deposition power Our processenables the forming of the SiGe layer of high Ge concentra-tion (85) For semiconductor device applications highcarriermobility SiGe layers can bemade by reducing stacking
faults and microtwin defects The measurement and controlof stacking faults and twin crystals are therefore importantin the microelectronics applications
Table 2 illustrates the key features of lattice-matched SiGeon insulator (LM-SGOI) currently under development atNASA Langley [36ndash42] compared to existing products ortechnologiesThe far right columnofTable 2 shows theNASALangley developed SiGe material that is compatible with theconventional insulator silicon oxide The new rhombohedralepitaxy allows new lattice matching condition of SiGe onsapphire insulator with 85 Ge content and 05 defectsWhile the carrier mobilities of silicon-on-insulator (SOI) arelimited by the silicon material the mobilities of SiGe on119888-plane sapphire can be a few times higher than those ofsilicon due to the high carrier mobilities of germanium Thesilicon-on-sapphire (SOS) became crucial in devices usingSOI wafers because sapphire is one of the best insulatorsTheSOS wafer provides electrically separated regions because ofthe insulating properties of the sapphire itself as opposedto other typical devices where the regions are electricallyseparated using reverse bias between the substrate and devicearea The space charge region (carrier depletion region) inthe reverse bias case is very thin in the micrometer rangeand the capacitance between a device and the substrate ishigh and causes the device to have a leakage current at highfrequency operating speeds On the contrary sapphire is verythick and has an ultrasmall capacitance thereby reducingparasitic capacitance and leakage currents at high operatingfrequencies The lattice-matched SiGe is also complementedby silicon oxide as an insulator and stable gate oxide withSiO2can make short gate length for RF device Therefore
RF devices like heterojunction bipolar transistor (HBT) that
8 Advances in Condensed Matter Physics
are made with rhombohedral SiGe on 119888-plane sapphire canpotentially run a few times faster than RF devices on SOSwafers at high frequencies up to several hundred GHz
4 Summary and Conclusions
In summary we have experimentally demonstrated the fab-rication of high-quality SiGe layers with a high Ge concen-tration of more than 85 on sapphire wafer by sputteringWe also report that the defect dependence of the electronmobility by the twinning of SiGe thin films on sapphire(0001) substrates was measured Currently a standard SiGetechnology uses only ultrathin (30sim100 nm) layer of SiGe forbase layer of heterojunction bipolar transistor (HBT) to avoiddislocation defects With the lattice-matched SiGe layer wedeveloped a thin or thick SiGe layer can be also fabricatedfor any designated applications since the lattice-matchedmaterials do not have a critical thickness limit In rhombo-hedral SiGe on 119888-plane (0001) sapphire the SiGe layer can bealso grown in layer-by-layer mode from sub-100 nm to fewmicrometers of thicknesses Therefore thin rhombohedralSiGe on 119888-plane sapphire has many commercial applicationpotentials as do SOI wafers in addition to solar cell applica-tions Typically a rhombohedral single crystal SiGe has 2 or3 times higher carrier mobility than monocrystalline siliconThe high Ge-content SiGe film shows high mobility lowcost and simple structure when grown directly on sapphiresubstrate with sputtering process If the defects in SiGe canbe removed transistors with higher operational frequenciescan be fabricated for a new generation of ultrafast chipsetsbecause of the high mobility of SiGe film
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
References
[1] D L Harame and B S Meyerson ldquoThe early history of IBMrsquosSiGe mixed signal technologyrdquo IEEE Transactions on ElectronDevices vol 48 no 11 pp 2555ndash2567 2001
[2] C Gui M Elwenspoek N Tas and J G E Gardeniers ldquoTheeffect of surface roughness on direct wafer bondingrdquo Journal ofApplied Physics vol 85 no 10 pp 7448ndash7454 1999
[3] ldquoSemiconductorWafer edge analysisrdquo ChapmanTechnical NoteTW-1 1998
[4] H Ahmataku and K Kipli in Proceedings of the IEEE Inter-national Conference on Semiconductor Electronics (ICSE rsquo10)Melaka Malaysia June 2010
[5] I McMackin W Martin J Perez et al ldquoPatterned wafer defectdensity analysis of step and flash imprint lithographyrdquo Journal ofVacuum Science amp Technology B vol 26 no 1 pp 151ndash155 2008
[6] S A Alterovitz C H Mueller and E T Croke ldquoHigh mobilitySiGeSi transistor structures on sapphire substrates using ionimplantationrdquo Journal of Vacuum Science amp Technology B vol22 p 1776 2004
[7] K Ismail M Arafa K L Saenger J O Chu and B SMeyersonldquoExtremely high electron mobility in SiSiGe modulation-doped heterostructuresrdquo Applied Physics Letters vol 66 no 9pp 1077ndash1079 1995
[8] S J Koester R Hammond J O Chu et al ldquoSiGe pMODFETson silicon-on-sapphire substrates with 116GHz fmaxrdquo IEEEElectron Device Letters vol 22 no 2 pp 92ndash94 2001
[9] W B Dubbelday and K L Kavanagh ldquoGrowth of SiGe on sap-phire using rapid thermal chemical vapor depositionrdquo Journalof Crystal Growth vol 222 no 1-2 pp 20ndash28 2001
[10] Y Park H J Kim G C King and S H Choi ldquoX-ray diffractionwafer mapping method for SiGe twin defects characterizationrdquoin Nanosensors Biosensors and Info-Tech Sensors and Systemsvol 7980 of Proceedings of SPIE April 2011
[11] M W Jenkins ldquoA new preferential etch for defects in siliconcrystalsrdquo Journal of the Electrochemical Society Solid-StateScience and Technology vol 124 no 5 pp 757ndash762 1977
[12] F Secco drsquoAragona ldquoDislocation etch for (100) planes in siliconrdquoJournal ofTheElectrochemical Society vol 119 no 7 pp 948ndash9511972
[13] E Sirtl and A Adler ldquoChromic acid-hydrofluoric acid asspecific reagents for the development of etching pits in siliconrdquoZeitschrift fur Metallkunde vol 52 pp 529ndash534 1961
[14] W C Dash ldquoCopper precipitation on dislocations in siliconrdquoJournal of Applied Physics vol 27 no 10 pp 1193ndash1195 1956
[15] H RauhWackerrsquos Atlas for Characterization ofDefects in SiliconA Part of the Wacker Tutorial Series 1986
[16] M Glicksman ldquoMobility of Electrons in Germanium-SiliconAlloysrdquo Physical Review vol 111 no 1 pp 125ndash128 1958
[17] M V Fischetti and S E Laux ldquoBand structure deformationpotentials and carrier mobility in strained Si Ge and SiGealloysrdquo Journal of Applied Physics vol 80 no 4 pp 2234ndash22521996
[18] T E Whall and E H C Parker ldquoSiSiGeSi pMOS performa-ncemdashalloy scattering and other considerationsrdquo Thin SolidFilms vol 368 pp 297ndash305 2000
[19] C Jacoboni C Canali G Ottaviani and A Alberigi QuarantaldquoA review of some charge transport properties of siliconrdquo SolidState Electronics vol 20 no 2 pp 77ndash89 1977
[20] V I Fistul M I Iglitsyn and E M Omelyanovskii ldquoMobilityof electrons in germanium strongly doped with arsenicrdquo SovietPhysics Solid State vol 4 no 4 pp 784ndash785 1962
[21] Landolt-Bornstein New Series Group III vol 17a SpringerBerlin Germany 1982
[22] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions I Static theoryrdquoProceedings of the Royal Society of LondonSeries A vol 198 no 1053 pp 205ndash216 1949
[23] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions IV Dynamicsrdquo Proceedings of the Royal Society of LondonA vol 201 no 1065 pp 261ndash268 1950
[24] E Escobedo-Cousin SHOlsenAGOrsquoNeill andHCoulsonldquoDefect identification in strained SiSiGe heterolayers for deviceapplicationsrdquo Journal of Physics D Applied Physics vol 42 no17 Article ID 175306 2009
[25] J G Fiorenza G Braithwaite C W Leitz et al ldquoFilm thicknessconstraints for manufacturable strained silicon CMOSrdquo Semi-conductor Science and Technology vol 19 no 1 article L4 2004
[26] J N Yang G W Neudeck and J P Denton ldquoElectrical effectsof a single stacking fault on fully depleted thin-film silicon-on-insulator P-channel metal-oxide-semiconductor field-effect
Advances in Condensed Matter Physics 9
transistorsrdquo Journal of Applied Physics vol 91 no 1 pp 420ndash426 2002
[27] P I Gaiduk A Nylandsted Larsen and J LundsgaardHansen ldquoStrain-relaxed SiGeSi heteroepitaxial structures oflow threading-dislocation densityrdquoThin Solid Films vol 367 no1-2 pp 120ndash125 2000
[28] L J Huang J O Chu D F Canaperi et al ldquoSiGe-on-insulatorprepared by wafer bonding and layer transfer for high-perfor-mance field-effect transistorsrdquo Applied Physics Letters vol 78no 9 pp 1267ndash1269 2001
[29] T Tezuka N Sugiyama TMizunoM Suzuki and S Takagi ldquoAnovel fabrication technique of ultrathin and relaxed SiGe bufferlayers with highGe fraction for Sub-100 nm strained silicon-on-insulator MOSFETsrdquo Japanese Journal of Applied Physics vol40 part 1 no 4B pp 2866ndash2874 2001
[30] S Nakaharai T Tezuka N Sugiyama Y Moriyama andS-I Takagi ldquoCharacterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation techniquerdquoApplied Physics Letters vol 83 no 17 pp 3516ndash3518 2003
[31] T Shimura K Kawamura M Asakawa et al ldquoCharacterizationof strained Si wafers by X-ray diffraction techniquesrdquo Journalof Materials Science Materials in Electronics vol 19 no 1supplement pp S189ndashS193 2008
[32] N Sugii S Yamaguchi and K Washio ldquoSiGe-on-insulatorsubstrate fabricated by melt solidification for a strained-siliconcomplementary metalndashoxidendashsemiconductorrdquo Journal of Vac-uum Science amp Technology B vol 20 no 5 pp 1891ndash1896 2002
[33] H-J Kim H-B Bae Y Park K Lee and S H Choi ldquoTempera-ture dependence of crystalline SiGe growth on sapphire (0001)substrates by sputteringrdquo Journal of Crystal Growth vol 353 no1 pp 124ndash128 2012
[34] Y Park G C King and S H Choi ldquoRhombohedral epitaxy ofcubic SiGe on trigonal c-plane sapphirerdquo Journal of Crystal Gro-wth vol 310 no 11 pp 2724ndash2731 2008
[35] H J Kim H B Bae Y Park and S H Choi ldquoDefect-engineered Si
1minus119909Ge119909alloy under electron beam irradiation
for thermoelectricsrdquo RSC Advances vol 2 no 33 pp 12670ndash12674 2012
[36] Y Park S H Choi and G C King ldquoSilicon germanium semi-conductive alloy andmethod of fabricating samerdquoUS Patent no7341883 2008
[37] Y Park S H Choi G C King J R Elliott Jr and D MStoakley ldquoGraded index silicon geranium on lattice matchedsilicon geranium semiconductor alloyrdquo US Patent No 7514726B2 2009
[38] Y Park S Hyouk Choi G C King and J R Elliott ldquoMethodof generating X-ray diffraction data for integral detection oftwin defects in super-hetero-epitaxial materialsrdquo US Patent no7558371 B2 2009
[39] Y Park S H Choi and G C King ldquoEpitaxial growth of cubiccrystalline semiconductor alloys on basal plane of trigonal orhexagonal crystalrdquo US Patent no 7906358 B2 2011
[40] T Maniwa ldquoSteering apparatusrdquo US Patent No 8826767 2012[41] Y Park S H Choi G C King and J R Elliott ldquoRhombohedral
cubic semiconductor materials on trigonal substrate with singlecrystal properties and devices based on such materialsrdquo USPatent no 8257491 B2 2012
[42] Y Park S H Choi G C King J R Elliott and A L Dimarcan-tonio ldquoX-ray diffraction wafermappingmethod for rhombohe-dral super-hetero-epitaxyrdquo US Patent No 7769135 B2 2010
Submit your manuscripts athttpwwwhindawicom
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
High Energy PhysicsAdvances in
The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
FluidsJournal of
Atomic and Molecular Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Advances in Condensed Matter Physics
OpticsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstronomyAdvances in
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Superconductivity
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Statistical MechanicsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
GravityJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstrophysicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Physics Research International
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Solid State PhysicsJournal of
Computational Methods in Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Soft MatterJournal of
Hindawi Publishing Corporationhttpwwwhindawicom
AerodynamicsJournal of
Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
PhotonicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Journal of
Biophysics
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
ThermodynamicsJournal of
Advances in Condensed Matter Physics 5
Polycrystal
100 Si
100 Ge
Dislocation
Dislo
catio
n
4000
3000
2000
1000
00 20 40 60 80 100
Ge content x ()
Elec
tron
mob
ility120583n
(cm2V
middots)
(a)
012
34
56
6008001000
1200
1400
1600
1800
2000
2200
TMs (
)
020406
08
10
12
14
16
Electron density (cm 3)
Elec
tron
mob
ility
(cm
2 Vs)
times1018
(b)
Figure 3 (a) Calculated phonon-limited 300K electron low-field mobility in relaxed Si1minus119909
Ge119909alloys Results with (circle) and without
(triangle) the inclusion of alloy scattering are shown [16 17] (b) Three pairs in three-dimensional (3D) plot for room temperature electronmobilities in SiGe films as a function of twin density (TM) and dopant concentration Red and blue dots show the data points for 995 and95 single crystal SiGe samples grown on 119888-plane sapphire substrates respectively
0 025 050 075 1000
025
050
075
100
(120583m)
70
35
00
(nm
)
(a)
0 025 050 075 100
Section analysis450
0
450
(nm
)
Surface distanceHorizontal distance (L)Vertical distanceAngle
21489nm21484nm0316nm
0842∘
(b)
Figure 4 AFM image of SiGe layer on 119888-plane sapphire (a) 1 120583m times 1 120583m area of a SiGe and (b) line profile of cross-section measured alongthe dark line in (a)
temperature electron mobility in the SiGe films grown onsapphire substrates becomes slightly higher as defect densitiesare decreased
Since the topographical and morphological properties ofthe layer directly influence the charge carrier properties andthe channel carrier transport characteristic of the device thelayer needs to be flat in atomic level The SiGe layer shows arootmean square (rms) roughness of 2 nm for 1times1 120583m2 scanThe AFM analysis shows that the epitaxial layer grows in alayer-by-layer growthmode [22 23] as shown in Figure 4(a)Figure 4(b) shows a line scan profile along the line indicatedwhich was selected to pass through a step It is important to
control the SiGe composition to reduce the lattice mismatchwith the 119888-plane sapphire maintain an appropriatemolecularbeam flux rate to ensure flat smooth layer-by-layer growthand have 2D layer-by-layer growth in electronic microdevicefabrication
Fine and delicate growth control of SiGe epitaxy to allevi-ate crystalline defects is a serious matter that directly affectsyield in device fabrication In particular the collective effectof threading dislocations (TDs) attributed to performancedegradation has been observed when other types of crystaldefects exist individually [24] In MOSFET interface misfitdislocations (MDs) which extend between the source and
6 Advances in Condensed Matter Physics
500120583m
(a) (b)
03 04 05 06 07 08 09500
1000
1500
2000
Content of Ge (Si1minusxGex)
TDP
etch
-pit
dens
ity (
cm2)
(c)
Figure 5 Etch-pit test results of (a) typical SiGe on Si(100) wafer with Ge content = 35 and of (b) rhombohedral SiGe on 119888-plane sapphirewith Ge content = 35 (c) threading dislocation etch-pit density of Si
1minus119909Ge119909on sapphire substrate based on the Ge content
the drain may become electrically active resulting in incr-eased off-state leakage [25] The electrical impact of stackingfaults (SFs) on device operation can be seen as a combinationof the individual effects of misfit and TDs A single SF inthe strained Si channel can degrade the device operationat both off- and on-state conditions [26] SECCO etch is achemical etchingmethod used to delineath crystalline defectson silicon substrate and SiGe filmWhen SECCO etch is useddirectly crystalline defects are revealed on silicon substrateor SiGe film after 2 minutes at some areas Industry standardSECCO etch-pit density measurements were performed on aconventional SiGe layer on Si and 95 single crystalline SiGelayers with 35 Ge content on 119888-plane sapphire A typicalSiGe layer with 35 Ge content on a Si(100) wafer shows ahigh density of dislocation line and etch pits (see Figure 5(a))On the other hand the rhombohedral SiGe grown on 119888-plane sapphire with 35 Ge composition ratio shows twoorders of magnitude less etch pits and no dislocation linesafter performing the SECCO etching (see Figure 5) Theconventional SiGe on a Si(100) wafer reveals a threading dis-location pit (TDP) density of 39times 104cm2 line defect densityof 173 times 104cm2 and a lot of cross-hatch patterns as shownin Figure 5(a) The rhombohedral SiGe grown on 119888-planesapphire has only a TD etch-pit density of 19 times 102cm2
no visible line defects and no cross-hatch patterns as shownin Figure 5(b) Therefore the rhombohedral SiGe shows a200 times less defect density than conventional SiGe onSi(100) wafer under the SECCO etching tests Conclusivelywe confirmed that a new SiGe film growth technique of fullyrelaxed SiGe alloy layers yields low TD density epitaxiallygrown on sapphire substrate [27] The TD etch-pit densityof SiGe on sapphire decreases to 800cm2 as Ge contentincreases (see Figure 5(c)) The SiGe films with low TDPdensity high electron mobility based on the high Ge contentlike 85 and smooth surface were grown on 119888-plane sapphiresubstrateThese kinds of films are sufficiently qualified for thefabrication of the ultrafast chipsets like bipolar junction tran-sistors
The SGOI structures are currently fabricated mainly bytwo methods layer transfer [28] and Ge condensation [2930] In the layer transfer method hydrogen implantation isemployed in order to separate a thin SiGe layer from gradedSiGe substrates In the Ge condensation method a SiGe layerwith a low Ge concentration grown on a silicon-on-insulator(SOI) substrate is thermally oxidized where Ge atoms in theSiGe layer are ejected from the oxide interface resulting in aSiGe layer with a highGe concentration However thesemet-hods require complex processing routines and do not always
Advances in Condensed Matter Physics 7
Table 2 Comparison of Si SOI and SiGe on Si and LM-SGOI technologies
Technology Si SOISGOI SiGe on Si SiGe on sapphire (NASA LaRC)
Fabrication Single crystal ingot Hydrogen crack Gradient layer superlattice Lattice-matched growth
Growth method Czochralski Wafer bonding Epitaxial growth Epitaxial growthLattice-matched Gecontent 0 0 0 85 with sapphire substrate
Ge content in strainedlayer before defects 0 Usually 0sim8 Usually 0sim8 85 achieved
Ge content in relaxedlayer 0 (not available) Up to 25 with severe
defectsUp to 25 with severe
defects 85 achieved with 02 defects
Parasitic capacitancereduction No Yes No Yes
Device Bipolar junctiontransistor (BJT) CMOS
BJTCMOSheterojunctionbipolar transistor (HBT)
CMOS
HBT HBT CMOS
Improvement Conventionaltechnology
High speed withinsulating substrate
High speed (ultrathinSiGe lower collectorvoltage of HBT)
High speed with thick and thinSiGe layer with insulating
substrate higher device yieldwith lower defects
produce high-quality fully relaxed SiGe layer [31] A differentapproach reported is an amorphous SiGe layer deposited onSOI substrate and then annealed above the melting pointof SiGe after the formation of the SiO
2capping layer [32]
This process has the advantage of simplicity However it isdifficult to obtain the SiGe layer with high Ge concentrationby this process because the annealing temperature must bereduced below the melting point resulting in the unusuallylong annealing time Rapid thermal annealing (RTA)was alsoproposed in order to obtain the homogeneous SiGe layer[16] However high-quality and uniform SiGe layers were notobtained in the previous study
We demonstrated the fabrication of high-quality SiGelayers on sapphire substrate by sputtering The ideal of thisprocess is that a fundamental governing relationship existsin rhombohedral epitaxy process that is the growth of⟨111⟩-oriented cubic crystals on the basal 119888-plane of trigonalsapphire crystals [33ndash35] One of the concerns with this epi-taxy relationship is that two crystal structures tend to beformed which exhibit a twin lattice structureThis atomic ali-gnment allows polytype crystalline structures with stackingfaults on the (111) plane Rhombohedral alignment that is ali-gning the [111] direction of a cubic structure to the [0001]direction of a trigonal structure can have two possible azim-uthal configurations Two crystals are twin to each other andthey can be formed by a stacking fault during the crystalgrowth process We gained an experience to control the amo-unt of the twins based on the growth conditions especiallythe growth temperature and deposition power Our processenables the forming of the SiGe layer of high Ge concentra-tion (85) For semiconductor device applications highcarriermobility SiGe layers can bemade by reducing stacking
faults and microtwin defects The measurement and controlof stacking faults and twin crystals are therefore importantin the microelectronics applications
Table 2 illustrates the key features of lattice-matched SiGeon insulator (LM-SGOI) currently under development atNASA Langley [36ndash42] compared to existing products ortechnologiesThe far right columnofTable 2 shows theNASALangley developed SiGe material that is compatible with theconventional insulator silicon oxide The new rhombohedralepitaxy allows new lattice matching condition of SiGe onsapphire insulator with 85 Ge content and 05 defectsWhile the carrier mobilities of silicon-on-insulator (SOI) arelimited by the silicon material the mobilities of SiGe on119888-plane sapphire can be a few times higher than those ofsilicon due to the high carrier mobilities of germanium Thesilicon-on-sapphire (SOS) became crucial in devices usingSOI wafers because sapphire is one of the best insulatorsTheSOS wafer provides electrically separated regions because ofthe insulating properties of the sapphire itself as opposedto other typical devices where the regions are electricallyseparated using reverse bias between the substrate and devicearea The space charge region (carrier depletion region) inthe reverse bias case is very thin in the micrometer rangeand the capacitance between a device and the substrate ishigh and causes the device to have a leakage current at highfrequency operating speeds On the contrary sapphire is verythick and has an ultrasmall capacitance thereby reducingparasitic capacitance and leakage currents at high operatingfrequencies The lattice-matched SiGe is also complementedby silicon oxide as an insulator and stable gate oxide withSiO2can make short gate length for RF device Therefore
RF devices like heterojunction bipolar transistor (HBT) that
8 Advances in Condensed Matter Physics
are made with rhombohedral SiGe on 119888-plane sapphire canpotentially run a few times faster than RF devices on SOSwafers at high frequencies up to several hundred GHz
4 Summary and Conclusions
In summary we have experimentally demonstrated the fab-rication of high-quality SiGe layers with a high Ge concen-tration of more than 85 on sapphire wafer by sputteringWe also report that the defect dependence of the electronmobility by the twinning of SiGe thin films on sapphire(0001) substrates was measured Currently a standard SiGetechnology uses only ultrathin (30sim100 nm) layer of SiGe forbase layer of heterojunction bipolar transistor (HBT) to avoiddislocation defects With the lattice-matched SiGe layer wedeveloped a thin or thick SiGe layer can be also fabricatedfor any designated applications since the lattice-matchedmaterials do not have a critical thickness limit In rhombo-hedral SiGe on 119888-plane (0001) sapphire the SiGe layer can bealso grown in layer-by-layer mode from sub-100 nm to fewmicrometers of thicknesses Therefore thin rhombohedralSiGe on 119888-plane sapphire has many commercial applicationpotentials as do SOI wafers in addition to solar cell applica-tions Typically a rhombohedral single crystal SiGe has 2 or3 times higher carrier mobility than monocrystalline siliconThe high Ge-content SiGe film shows high mobility lowcost and simple structure when grown directly on sapphiresubstrate with sputtering process If the defects in SiGe canbe removed transistors with higher operational frequenciescan be fabricated for a new generation of ultrafast chipsetsbecause of the high mobility of SiGe film
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
References
[1] D L Harame and B S Meyerson ldquoThe early history of IBMrsquosSiGe mixed signal technologyrdquo IEEE Transactions on ElectronDevices vol 48 no 11 pp 2555ndash2567 2001
[2] C Gui M Elwenspoek N Tas and J G E Gardeniers ldquoTheeffect of surface roughness on direct wafer bondingrdquo Journal ofApplied Physics vol 85 no 10 pp 7448ndash7454 1999
[3] ldquoSemiconductorWafer edge analysisrdquo ChapmanTechnical NoteTW-1 1998
[4] H Ahmataku and K Kipli in Proceedings of the IEEE Inter-national Conference on Semiconductor Electronics (ICSE rsquo10)Melaka Malaysia June 2010
[5] I McMackin W Martin J Perez et al ldquoPatterned wafer defectdensity analysis of step and flash imprint lithographyrdquo Journal ofVacuum Science amp Technology B vol 26 no 1 pp 151ndash155 2008
[6] S A Alterovitz C H Mueller and E T Croke ldquoHigh mobilitySiGeSi transistor structures on sapphire substrates using ionimplantationrdquo Journal of Vacuum Science amp Technology B vol22 p 1776 2004
[7] K Ismail M Arafa K L Saenger J O Chu and B SMeyersonldquoExtremely high electron mobility in SiSiGe modulation-doped heterostructuresrdquo Applied Physics Letters vol 66 no 9pp 1077ndash1079 1995
[8] S J Koester R Hammond J O Chu et al ldquoSiGe pMODFETson silicon-on-sapphire substrates with 116GHz fmaxrdquo IEEEElectron Device Letters vol 22 no 2 pp 92ndash94 2001
[9] W B Dubbelday and K L Kavanagh ldquoGrowth of SiGe on sap-phire using rapid thermal chemical vapor depositionrdquo Journalof Crystal Growth vol 222 no 1-2 pp 20ndash28 2001
[10] Y Park H J Kim G C King and S H Choi ldquoX-ray diffractionwafer mapping method for SiGe twin defects characterizationrdquoin Nanosensors Biosensors and Info-Tech Sensors and Systemsvol 7980 of Proceedings of SPIE April 2011
[11] M W Jenkins ldquoA new preferential etch for defects in siliconcrystalsrdquo Journal of the Electrochemical Society Solid-StateScience and Technology vol 124 no 5 pp 757ndash762 1977
[12] F Secco drsquoAragona ldquoDislocation etch for (100) planes in siliconrdquoJournal ofTheElectrochemical Society vol 119 no 7 pp 948ndash9511972
[13] E Sirtl and A Adler ldquoChromic acid-hydrofluoric acid asspecific reagents for the development of etching pits in siliconrdquoZeitschrift fur Metallkunde vol 52 pp 529ndash534 1961
[14] W C Dash ldquoCopper precipitation on dislocations in siliconrdquoJournal of Applied Physics vol 27 no 10 pp 1193ndash1195 1956
[15] H RauhWackerrsquos Atlas for Characterization ofDefects in SiliconA Part of the Wacker Tutorial Series 1986
[16] M Glicksman ldquoMobility of Electrons in Germanium-SiliconAlloysrdquo Physical Review vol 111 no 1 pp 125ndash128 1958
[17] M V Fischetti and S E Laux ldquoBand structure deformationpotentials and carrier mobility in strained Si Ge and SiGealloysrdquo Journal of Applied Physics vol 80 no 4 pp 2234ndash22521996
[18] T E Whall and E H C Parker ldquoSiSiGeSi pMOS performa-ncemdashalloy scattering and other considerationsrdquo Thin SolidFilms vol 368 pp 297ndash305 2000
[19] C Jacoboni C Canali G Ottaviani and A Alberigi QuarantaldquoA review of some charge transport properties of siliconrdquo SolidState Electronics vol 20 no 2 pp 77ndash89 1977
[20] V I Fistul M I Iglitsyn and E M Omelyanovskii ldquoMobilityof electrons in germanium strongly doped with arsenicrdquo SovietPhysics Solid State vol 4 no 4 pp 784ndash785 1962
[21] Landolt-Bornstein New Series Group III vol 17a SpringerBerlin Germany 1982
[22] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions I Static theoryrdquoProceedings of the Royal Society of LondonSeries A vol 198 no 1053 pp 205ndash216 1949
[23] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions IV Dynamicsrdquo Proceedings of the Royal Society of LondonA vol 201 no 1065 pp 261ndash268 1950
[24] E Escobedo-Cousin SHOlsenAGOrsquoNeill andHCoulsonldquoDefect identification in strained SiSiGe heterolayers for deviceapplicationsrdquo Journal of Physics D Applied Physics vol 42 no17 Article ID 175306 2009
[25] J G Fiorenza G Braithwaite C W Leitz et al ldquoFilm thicknessconstraints for manufacturable strained silicon CMOSrdquo Semi-conductor Science and Technology vol 19 no 1 article L4 2004
[26] J N Yang G W Neudeck and J P Denton ldquoElectrical effectsof a single stacking fault on fully depleted thin-film silicon-on-insulator P-channel metal-oxide-semiconductor field-effect
Advances in Condensed Matter Physics 9
transistorsrdquo Journal of Applied Physics vol 91 no 1 pp 420ndash426 2002
[27] P I Gaiduk A Nylandsted Larsen and J LundsgaardHansen ldquoStrain-relaxed SiGeSi heteroepitaxial structures oflow threading-dislocation densityrdquoThin Solid Films vol 367 no1-2 pp 120ndash125 2000
[28] L J Huang J O Chu D F Canaperi et al ldquoSiGe-on-insulatorprepared by wafer bonding and layer transfer for high-perfor-mance field-effect transistorsrdquo Applied Physics Letters vol 78no 9 pp 1267ndash1269 2001
[29] T Tezuka N Sugiyama TMizunoM Suzuki and S Takagi ldquoAnovel fabrication technique of ultrathin and relaxed SiGe bufferlayers with highGe fraction for Sub-100 nm strained silicon-on-insulator MOSFETsrdquo Japanese Journal of Applied Physics vol40 part 1 no 4B pp 2866ndash2874 2001
[30] S Nakaharai T Tezuka N Sugiyama Y Moriyama andS-I Takagi ldquoCharacterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation techniquerdquoApplied Physics Letters vol 83 no 17 pp 3516ndash3518 2003
[31] T Shimura K Kawamura M Asakawa et al ldquoCharacterizationof strained Si wafers by X-ray diffraction techniquesrdquo Journalof Materials Science Materials in Electronics vol 19 no 1supplement pp S189ndashS193 2008
[32] N Sugii S Yamaguchi and K Washio ldquoSiGe-on-insulatorsubstrate fabricated by melt solidification for a strained-siliconcomplementary metalndashoxidendashsemiconductorrdquo Journal of Vac-uum Science amp Technology B vol 20 no 5 pp 1891ndash1896 2002
[33] H-J Kim H-B Bae Y Park K Lee and S H Choi ldquoTempera-ture dependence of crystalline SiGe growth on sapphire (0001)substrates by sputteringrdquo Journal of Crystal Growth vol 353 no1 pp 124ndash128 2012
[34] Y Park G C King and S H Choi ldquoRhombohedral epitaxy ofcubic SiGe on trigonal c-plane sapphirerdquo Journal of Crystal Gro-wth vol 310 no 11 pp 2724ndash2731 2008
[35] H J Kim H B Bae Y Park and S H Choi ldquoDefect-engineered Si
1minus119909Ge119909alloy under electron beam irradiation
for thermoelectricsrdquo RSC Advances vol 2 no 33 pp 12670ndash12674 2012
[36] Y Park S H Choi and G C King ldquoSilicon germanium semi-conductive alloy andmethod of fabricating samerdquoUS Patent no7341883 2008
[37] Y Park S H Choi G C King J R Elliott Jr and D MStoakley ldquoGraded index silicon geranium on lattice matchedsilicon geranium semiconductor alloyrdquo US Patent No 7514726B2 2009
[38] Y Park S Hyouk Choi G C King and J R Elliott ldquoMethodof generating X-ray diffraction data for integral detection oftwin defects in super-hetero-epitaxial materialsrdquo US Patent no7558371 B2 2009
[39] Y Park S H Choi and G C King ldquoEpitaxial growth of cubiccrystalline semiconductor alloys on basal plane of trigonal orhexagonal crystalrdquo US Patent no 7906358 B2 2011
[40] T Maniwa ldquoSteering apparatusrdquo US Patent No 8826767 2012[41] Y Park S H Choi G C King and J R Elliott ldquoRhombohedral
cubic semiconductor materials on trigonal substrate with singlecrystal properties and devices based on such materialsrdquo USPatent no 8257491 B2 2012
[42] Y Park S H Choi G C King J R Elliott and A L Dimarcan-tonio ldquoX-ray diffraction wafermappingmethod for rhombohe-dral super-hetero-epitaxyrdquo US Patent No 7769135 B2 2010
Submit your manuscripts athttpwwwhindawicom
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
High Energy PhysicsAdvances in
The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
FluidsJournal of
Atomic and Molecular Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Advances in Condensed Matter Physics
OpticsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstronomyAdvances in
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Superconductivity
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Statistical MechanicsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
GravityJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstrophysicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Physics Research International
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Solid State PhysicsJournal of
Computational Methods in Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Soft MatterJournal of
Hindawi Publishing Corporationhttpwwwhindawicom
AerodynamicsJournal of
Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
PhotonicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Journal of
Biophysics
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
ThermodynamicsJournal of
6 Advances in Condensed Matter Physics
500120583m
(a) (b)
03 04 05 06 07 08 09500
1000
1500
2000
Content of Ge (Si1minusxGex)
TDP
etch
-pit
dens
ity (
cm2)
(c)
Figure 5 Etch-pit test results of (a) typical SiGe on Si(100) wafer with Ge content = 35 and of (b) rhombohedral SiGe on 119888-plane sapphirewith Ge content = 35 (c) threading dislocation etch-pit density of Si
1minus119909Ge119909on sapphire substrate based on the Ge content
the drain may become electrically active resulting in incr-eased off-state leakage [25] The electrical impact of stackingfaults (SFs) on device operation can be seen as a combinationof the individual effects of misfit and TDs A single SF inthe strained Si channel can degrade the device operationat both off- and on-state conditions [26] SECCO etch is achemical etchingmethod used to delineath crystalline defectson silicon substrate and SiGe filmWhen SECCO etch is useddirectly crystalline defects are revealed on silicon substrateor SiGe film after 2 minutes at some areas Industry standardSECCO etch-pit density measurements were performed on aconventional SiGe layer on Si and 95 single crystalline SiGelayers with 35 Ge content on 119888-plane sapphire A typicalSiGe layer with 35 Ge content on a Si(100) wafer shows ahigh density of dislocation line and etch pits (see Figure 5(a))On the other hand the rhombohedral SiGe grown on 119888-plane sapphire with 35 Ge composition ratio shows twoorders of magnitude less etch pits and no dislocation linesafter performing the SECCO etching (see Figure 5) Theconventional SiGe on a Si(100) wafer reveals a threading dis-location pit (TDP) density of 39times 104cm2 line defect densityof 173 times 104cm2 and a lot of cross-hatch patterns as shownin Figure 5(a) The rhombohedral SiGe grown on 119888-planesapphire has only a TD etch-pit density of 19 times 102cm2
no visible line defects and no cross-hatch patterns as shownin Figure 5(b) Therefore the rhombohedral SiGe shows a200 times less defect density than conventional SiGe onSi(100) wafer under the SECCO etching tests Conclusivelywe confirmed that a new SiGe film growth technique of fullyrelaxed SiGe alloy layers yields low TD density epitaxiallygrown on sapphire substrate [27] The TD etch-pit densityof SiGe on sapphire decreases to 800cm2 as Ge contentincreases (see Figure 5(c)) The SiGe films with low TDPdensity high electron mobility based on the high Ge contentlike 85 and smooth surface were grown on 119888-plane sapphiresubstrateThese kinds of films are sufficiently qualified for thefabrication of the ultrafast chipsets like bipolar junction tran-sistors
The SGOI structures are currently fabricated mainly bytwo methods layer transfer [28] and Ge condensation [2930] In the layer transfer method hydrogen implantation isemployed in order to separate a thin SiGe layer from gradedSiGe substrates In the Ge condensation method a SiGe layerwith a low Ge concentration grown on a silicon-on-insulator(SOI) substrate is thermally oxidized where Ge atoms in theSiGe layer are ejected from the oxide interface resulting in aSiGe layer with a highGe concentration However thesemet-hods require complex processing routines and do not always
Advances in Condensed Matter Physics 7
Table 2 Comparison of Si SOI and SiGe on Si and LM-SGOI technologies
Technology Si SOISGOI SiGe on Si SiGe on sapphire (NASA LaRC)
Fabrication Single crystal ingot Hydrogen crack Gradient layer superlattice Lattice-matched growth
Growth method Czochralski Wafer bonding Epitaxial growth Epitaxial growthLattice-matched Gecontent 0 0 0 85 with sapphire substrate
Ge content in strainedlayer before defects 0 Usually 0sim8 Usually 0sim8 85 achieved
Ge content in relaxedlayer 0 (not available) Up to 25 with severe
defectsUp to 25 with severe
defects 85 achieved with 02 defects
Parasitic capacitancereduction No Yes No Yes
Device Bipolar junctiontransistor (BJT) CMOS
BJTCMOSheterojunctionbipolar transistor (HBT)
CMOS
HBT HBT CMOS
Improvement Conventionaltechnology
High speed withinsulating substrate
High speed (ultrathinSiGe lower collectorvoltage of HBT)
High speed with thick and thinSiGe layer with insulating
substrate higher device yieldwith lower defects
produce high-quality fully relaxed SiGe layer [31] A differentapproach reported is an amorphous SiGe layer deposited onSOI substrate and then annealed above the melting pointof SiGe after the formation of the SiO
2capping layer [32]
This process has the advantage of simplicity However it isdifficult to obtain the SiGe layer with high Ge concentrationby this process because the annealing temperature must bereduced below the melting point resulting in the unusuallylong annealing time Rapid thermal annealing (RTA)was alsoproposed in order to obtain the homogeneous SiGe layer[16] However high-quality and uniform SiGe layers were notobtained in the previous study
We demonstrated the fabrication of high-quality SiGelayers on sapphire substrate by sputtering The ideal of thisprocess is that a fundamental governing relationship existsin rhombohedral epitaxy process that is the growth of⟨111⟩-oriented cubic crystals on the basal 119888-plane of trigonalsapphire crystals [33ndash35] One of the concerns with this epi-taxy relationship is that two crystal structures tend to beformed which exhibit a twin lattice structureThis atomic ali-gnment allows polytype crystalline structures with stackingfaults on the (111) plane Rhombohedral alignment that is ali-gning the [111] direction of a cubic structure to the [0001]direction of a trigonal structure can have two possible azim-uthal configurations Two crystals are twin to each other andthey can be formed by a stacking fault during the crystalgrowth process We gained an experience to control the amo-unt of the twins based on the growth conditions especiallythe growth temperature and deposition power Our processenables the forming of the SiGe layer of high Ge concentra-tion (85) For semiconductor device applications highcarriermobility SiGe layers can bemade by reducing stacking
faults and microtwin defects The measurement and controlof stacking faults and twin crystals are therefore importantin the microelectronics applications
Table 2 illustrates the key features of lattice-matched SiGeon insulator (LM-SGOI) currently under development atNASA Langley [36ndash42] compared to existing products ortechnologiesThe far right columnofTable 2 shows theNASALangley developed SiGe material that is compatible with theconventional insulator silicon oxide The new rhombohedralepitaxy allows new lattice matching condition of SiGe onsapphire insulator with 85 Ge content and 05 defectsWhile the carrier mobilities of silicon-on-insulator (SOI) arelimited by the silicon material the mobilities of SiGe on119888-plane sapphire can be a few times higher than those ofsilicon due to the high carrier mobilities of germanium Thesilicon-on-sapphire (SOS) became crucial in devices usingSOI wafers because sapphire is one of the best insulatorsTheSOS wafer provides electrically separated regions because ofthe insulating properties of the sapphire itself as opposedto other typical devices where the regions are electricallyseparated using reverse bias between the substrate and devicearea The space charge region (carrier depletion region) inthe reverse bias case is very thin in the micrometer rangeand the capacitance between a device and the substrate ishigh and causes the device to have a leakage current at highfrequency operating speeds On the contrary sapphire is verythick and has an ultrasmall capacitance thereby reducingparasitic capacitance and leakage currents at high operatingfrequencies The lattice-matched SiGe is also complementedby silicon oxide as an insulator and stable gate oxide withSiO2can make short gate length for RF device Therefore
RF devices like heterojunction bipolar transistor (HBT) that
8 Advances in Condensed Matter Physics
are made with rhombohedral SiGe on 119888-plane sapphire canpotentially run a few times faster than RF devices on SOSwafers at high frequencies up to several hundred GHz
4 Summary and Conclusions
In summary we have experimentally demonstrated the fab-rication of high-quality SiGe layers with a high Ge concen-tration of more than 85 on sapphire wafer by sputteringWe also report that the defect dependence of the electronmobility by the twinning of SiGe thin films on sapphire(0001) substrates was measured Currently a standard SiGetechnology uses only ultrathin (30sim100 nm) layer of SiGe forbase layer of heterojunction bipolar transistor (HBT) to avoiddislocation defects With the lattice-matched SiGe layer wedeveloped a thin or thick SiGe layer can be also fabricatedfor any designated applications since the lattice-matchedmaterials do not have a critical thickness limit In rhombo-hedral SiGe on 119888-plane (0001) sapphire the SiGe layer can bealso grown in layer-by-layer mode from sub-100 nm to fewmicrometers of thicknesses Therefore thin rhombohedralSiGe on 119888-plane sapphire has many commercial applicationpotentials as do SOI wafers in addition to solar cell applica-tions Typically a rhombohedral single crystal SiGe has 2 or3 times higher carrier mobility than monocrystalline siliconThe high Ge-content SiGe film shows high mobility lowcost and simple structure when grown directly on sapphiresubstrate with sputtering process If the defects in SiGe canbe removed transistors with higher operational frequenciescan be fabricated for a new generation of ultrafast chipsetsbecause of the high mobility of SiGe film
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
References
[1] D L Harame and B S Meyerson ldquoThe early history of IBMrsquosSiGe mixed signal technologyrdquo IEEE Transactions on ElectronDevices vol 48 no 11 pp 2555ndash2567 2001
[2] C Gui M Elwenspoek N Tas and J G E Gardeniers ldquoTheeffect of surface roughness on direct wafer bondingrdquo Journal ofApplied Physics vol 85 no 10 pp 7448ndash7454 1999
[3] ldquoSemiconductorWafer edge analysisrdquo ChapmanTechnical NoteTW-1 1998
[4] H Ahmataku and K Kipli in Proceedings of the IEEE Inter-national Conference on Semiconductor Electronics (ICSE rsquo10)Melaka Malaysia June 2010
[5] I McMackin W Martin J Perez et al ldquoPatterned wafer defectdensity analysis of step and flash imprint lithographyrdquo Journal ofVacuum Science amp Technology B vol 26 no 1 pp 151ndash155 2008
[6] S A Alterovitz C H Mueller and E T Croke ldquoHigh mobilitySiGeSi transistor structures on sapphire substrates using ionimplantationrdquo Journal of Vacuum Science amp Technology B vol22 p 1776 2004
[7] K Ismail M Arafa K L Saenger J O Chu and B SMeyersonldquoExtremely high electron mobility in SiSiGe modulation-doped heterostructuresrdquo Applied Physics Letters vol 66 no 9pp 1077ndash1079 1995
[8] S J Koester R Hammond J O Chu et al ldquoSiGe pMODFETson silicon-on-sapphire substrates with 116GHz fmaxrdquo IEEEElectron Device Letters vol 22 no 2 pp 92ndash94 2001
[9] W B Dubbelday and K L Kavanagh ldquoGrowth of SiGe on sap-phire using rapid thermal chemical vapor depositionrdquo Journalof Crystal Growth vol 222 no 1-2 pp 20ndash28 2001
[10] Y Park H J Kim G C King and S H Choi ldquoX-ray diffractionwafer mapping method for SiGe twin defects characterizationrdquoin Nanosensors Biosensors and Info-Tech Sensors and Systemsvol 7980 of Proceedings of SPIE April 2011
[11] M W Jenkins ldquoA new preferential etch for defects in siliconcrystalsrdquo Journal of the Electrochemical Society Solid-StateScience and Technology vol 124 no 5 pp 757ndash762 1977
[12] F Secco drsquoAragona ldquoDislocation etch for (100) planes in siliconrdquoJournal ofTheElectrochemical Society vol 119 no 7 pp 948ndash9511972
[13] E Sirtl and A Adler ldquoChromic acid-hydrofluoric acid asspecific reagents for the development of etching pits in siliconrdquoZeitschrift fur Metallkunde vol 52 pp 529ndash534 1961
[14] W C Dash ldquoCopper precipitation on dislocations in siliconrdquoJournal of Applied Physics vol 27 no 10 pp 1193ndash1195 1956
[15] H RauhWackerrsquos Atlas for Characterization ofDefects in SiliconA Part of the Wacker Tutorial Series 1986
[16] M Glicksman ldquoMobility of Electrons in Germanium-SiliconAlloysrdquo Physical Review vol 111 no 1 pp 125ndash128 1958
[17] M V Fischetti and S E Laux ldquoBand structure deformationpotentials and carrier mobility in strained Si Ge and SiGealloysrdquo Journal of Applied Physics vol 80 no 4 pp 2234ndash22521996
[18] T E Whall and E H C Parker ldquoSiSiGeSi pMOS performa-ncemdashalloy scattering and other considerationsrdquo Thin SolidFilms vol 368 pp 297ndash305 2000
[19] C Jacoboni C Canali G Ottaviani and A Alberigi QuarantaldquoA review of some charge transport properties of siliconrdquo SolidState Electronics vol 20 no 2 pp 77ndash89 1977
[20] V I Fistul M I Iglitsyn and E M Omelyanovskii ldquoMobilityof electrons in germanium strongly doped with arsenicrdquo SovietPhysics Solid State vol 4 no 4 pp 784ndash785 1962
[21] Landolt-Bornstein New Series Group III vol 17a SpringerBerlin Germany 1982
[22] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions I Static theoryrdquoProceedings of the Royal Society of LondonSeries A vol 198 no 1053 pp 205ndash216 1949
[23] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions IV Dynamicsrdquo Proceedings of the Royal Society of LondonA vol 201 no 1065 pp 261ndash268 1950
[24] E Escobedo-Cousin SHOlsenAGOrsquoNeill andHCoulsonldquoDefect identification in strained SiSiGe heterolayers for deviceapplicationsrdquo Journal of Physics D Applied Physics vol 42 no17 Article ID 175306 2009
[25] J G Fiorenza G Braithwaite C W Leitz et al ldquoFilm thicknessconstraints for manufacturable strained silicon CMOSrdquo Semi-conductor Science and Technology vol 19 no 1 article L4 2004
[26] J N Yang G W Neudeck and J P Denton ldquoElectrical effectsof a single stacking fault on fully depleted thin-film silicon-on-insulator P-channel metal-oxide-semiconductor field-effect
Advances in Condensed Matter Physics 9
transistorsrdquo Journal of Applied Physics vol 91 no 1 pp 420ndash426 2002
[27] P I Gaiduk A Nylandsted Larsen and J LundsgaardHansen ldquoStrain-relaxed SiGeSi heteroepitaxial structures oflow threading-dislocation densityrdquoThin Solid Films vol 367 no1-2 pp 120ndash125 2000
[28] L J Huang J O Chu D F Canaperi et al ldquoSiGe-on-insulatorprepared by wafer bonding and layer transfer for high-perfor-mance field-effect transistorsrdquo Applied Physics Letters vol 78no 9 pp 1267ndash1269 2001
[29] T Tezuka N Sugiyama TMizunoM Suzuki and S Takagi ldquoAnovel fabrication technique of ultrathin and relaxed SiGe bufferlayers with highGe fraction for Sub-100 nm strained silicon-on-insulator MOSFETsrdquo Japanese Journal of Applied Physics vol40 part 1 no 4B pp 2866ndash2874 2001
[30] S Nakaharai T Tezuka N Sugiyama Y Moriyama andS-I Takagi ldquoCharacterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation techniquerdquoApplied Physics Letters vol 83 no 17 pp 3516ndash3518 2003
[31] T Shimura K Kawamura M Asakawa et al ldquoCharacterizationof strained Si wafers by X-ray diffraction techniquesrdquo Journalof Materials Science Materials in Electronics vol 19 no 1supplement pp S189ndashS193 2008
[32] N Sugii S Yamaguchi and K Washio ldquoSiGe-on-insulatorsubstrate fabricated by melt solidification for a strained-siliconcomplementary metalndashoxidendashsemiconductorrdquo Journal of Vac-uum Science amp Technology B vol 20 no 5 pp 1891ndash1896 2002
[33] H-J Kim H-B Bae Y Park K Lee and S H Choi ldquoTempera-ture dependence of crystalline SiGe growth on sapphire (0001)substrates by sputteringrdquo Journal of Crystal Growth vol 353 no1 pp 124ndash128 2012
[34] Y Park G C King and S H Choi ldquoRhombohedral epitaxy ofcubic SiGe on trigonal c-plane sapphirerdquo Journal of Crystal Gro-wth vol 310 no 11 pp 2724ndash2731 2008
[35] H J Kim H B Bae Y Park and S H Choi ldquoDefect-engineered Si
1minus119909Ge119909alloy under electron beam irradiation
for thermoelectricsrdquo RSC Advances vol 2 no 33 pp 12670ndash12674 2012
[36] Y Park S H Choi and G C King ldquoSilicon germanium semi-conductive alloy andmethod of fabricating samerdquoUS Patent no7341883 2008
[37] Y Park S H Choi G C King J R Elliott Jr and D MStoakley ldquoGraded index silicon geranium on lattice matchedsilicon geranium semiconductor alloyrdquo US Patent No 7514726B2 2009
[38] Y Park S Hyouk Choi G C King and J R Elliott ldquoMethodof generating X-ray diffraction data for integral detection oftwin defects in super-hetero-epitaxial materialsrdquo US Patent no7558371 B2 2009
[39] Y Park S H Choi and G C King ldquoEpitaxial growth of cubiccrystalline semiconductor alloys on basal plane of trigonal orhexagonal crystalrdquo US Patent no 7906358 B2 2011
[40] T Maniwa ldquoSteering apparatusrdquo US Patent No 8826767 2012[41] Y Park S H Choi G C King and J R Elliott ldquoRhombohedral
cubic semiconductor materials on trigonal substrate with singlecrystal properties and devices based on such materialsrdquo USPatent no 8257491 B2 2012
[42] Y Park S H Choi G C King J R Elliott and A L Dimarcan-tonio ldquoX-ray diffraction wafermappingmethod for rhombohe-dral super-hetero-epitaxyrdquo US Patent No 7769135 B2 2010
Submit your manuscripts athttpwwwhindawicom
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
High Energy PhysicsAdvances in
The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
FluidsJournal of
Atomic and Molecular Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Advances in Condensed Matter Physics
OpticsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstronomyAdvances in
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Superconductivity
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Statistical MechanicsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
GravityJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstrophysicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Physics Research International
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Solid State PhysicsJournal of
Computational Methods in Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Soft MatterJournal of
Hindawi Publishing Corporationhttpwwwhindawicom
AerodynamicsJournal of
Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
PhotonicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Journal of
Biophysics
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
ThermodynamicsJournal of
Advances in Condensed Matter Physics 7
Table 2 Comparison of Si SOI and SiGe on Si and LM-SGOI technologies
Technology Si SOISGOI SiGe on Si SiGe on sapphire (NASA LaRC)
Fabrication Single crystal ingot Hydrogen crack Gradient layer superlattice Lattice-matched growth
Growth method Czochralski Wafer bonding Epitaxial growth Epitaxial growthLattice-matched Gecontent 0 0 0 85 with sapphire substrate
Ge content in strainedlayer before defects 0 Usually 0sim8 Usually 0sim8 85 achieved
Ge content in relaxedlayer 0 (not available) Up to 25 with severe
defectsUp to 25 with severe
defects 85 achieved with 02 defects
Parasitic capacitancereduction No Yes No Yes
Device Bipolar junctiontransistor (BJT) CMOS
BJTCMOSheterojunctionbipolar transistor (HBT)
CMOS
HBT HBT CMOS
Improvement Conventionaltechnology
High speed withinsulating substrate
High speed (ultrathinSiGe lower collectorvoltage of HBT)
High speed with thick and thinSiGe layer with insulating
substrate higher device yieldwith lower defects
produce high-quality fully relaxed SiGe layer [31] A differentapproach reported is an amorphous SiGe layer deposited onSOI substrate and then annealed above the melting pointof SiGe after the formation of the SiO
2capping layer [32]
This process has the advantage of simplicity However it isdifficult to obtain the SiGe layer with high Ge concentrationby this process because the annealing temperature must bereduced below the melting point resulting in the unusuallylong annealing time Rapid thermal annealing (RTA)was alsoproposed in order to obtain the homogeneous SiGe layer[16] However high-quality and uniform SiGe layers were notobtained in the previous study
We demonstrated the fabrication of high-quality SiGelayers on sapphire substrate by sputtering The ideal of thisprocess is that a fundamental governing relationship existsin rhombohedral epitaxy process that is the growth of⟨111⟩-oriented cubic crystals on the basal 119888-plane of trigonalsapphire crystals [33ndash35] One of the concerns with this epi-taxy relationship is that two crystal structures tend to beformed which exhibit a twin lattice structureThis atomic ali-gnment allows polytype crystalline structures with stackingfaults on the (111) plane Rhombohedral alignment that is ali-gning the [111] direction of a cubic structure to the [0001]direction of a trigonal structure can have two possible azim-uthal configurations Two crystals are twin to each other andthey can be formed by a stacking fault during the crystalgrowth process We gained an experience to control the amo-unt of the twins based on the growth conditions especiallythe growth temperature and deposition power Our processenables the forming of the SiGe layer of high Ge concentra-tion (85) For semiconductor device applications highcarriermobility SiGe layers can bemade by reducing stacking
faults and microtwin defects The measurement and controlof stacking faults and twin crystals are therefore importantin the microelectronics applications
Table 2 illustrates the key features of lattice-matched SiGeon insulator (LM-SGOI) currently under development atNASA Langley [36ndash42] compared to existing products ortechnologiesThe far right columnofTable 2 shows theNASALangley developed SiGe material that is compatible with theconventional insulator silicon oxide The new rhombohedralepitaxy allows new lattice matching condition of SiGe onsapphire insulator with 85 Ge content and 05 defectsWhile the carrier mobilities of silicon-on-insulator (SOI) arelimited by the silicon material the mobilities of SiGe on119888-plane sapphire can be a few times higher than those ofsilicon due to the high carrier mobilities of germanium Thesilicon-on-sapphire (SOS) became crucial in devices usingSOI wafers because sapphire is one of the best insulatorsTheSOS wafer provides electrically separated regions because ofthe insulating properties of the sapphire itself as opposedto other typical devices where the regions are electricallyseparated using reverse bias between the substrate and devicearea The space charge region (carrier depletion region) inthe reverse bias case is very thin in the micrometer rangeand the capacitance between a device and the substrate ishigh and causes the device to have a leakage current at highfrequency operating speeds On the contrary sapphire is verythick and has an ultrasmall capacitance thereby reducingparasitic capacitance and leakage currents at high operatingfrequencies The lattice-matched SiGe is also complementedby silicon oxide as an insulator and stable gate oxide withSiO2can make short gate length for RF device Therefore
RF devices like heterojunction bipolar transistor (HBT) that
8 Advances in Condensed Matter Physics
are made with rhombohedral SiGe on 119888-plane sapphire canpotentially run a few times faster than RF devices on SOSwafers at high frequencies up to several hundred GHz
4 Summary and Conclusions
In summary we have experimentally demonstrated the fab-rication of high-quality SiGe layers with a high Ge concen-tration of more than 85 on sapphire wafer by sputteringWe also report that the defect dependence of the electronmobility by the twinning of SiGe thin films on sapphire(0001) substrates was measured Currently a standard SiGetechnology uses only ultrathin (30sim100 nm) layer of SiGe forbase layer of heterojunction bipolar transistor (HBT) to avoiddislocation defects With the lattice-matched SiGe layer wedeveloped a thin or thick SiGe layer can be also fabricatedfor any designated applications since the lattice-matchedmaterials do not have a critical thickness limit In rhombo-hedral SiGe on 119888-plane (0001) sapphire the SiGe layer can bealso grown in layer-by-layer mode from sub-100 nm to fewmicrometers of thicknesses Therefore thin rhombohedralSiGe on 119888-plane sapphire has many commercial applicationpotentials as do SOI wafers in addition to solar cell applica-tions Typically a rhombohedral single crystal SiGe has 2 or3 times higher carrier mobility than monocrystalline siliconThe high Ge-content SiGe film shows high mobility lowcost and simple structure when grown directly on sapphiresubstrate with sputtering process If the defects in SiGe canbe removed transistors with higher operational frequenciescan be fabricated for a new generation of ultrafast chipsetsbecause of the high mobility of SiGe film
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
References
[1] D L Harame and B S Meyerson ldquoThe early history of IBMrsquosSiGe mixed signal technologyrdquo IEEE Transactions on ElectronDevices vol 48 no 11 pp 2555ndash2567 2001
[2] C Gui M Elwenspoek N Tas and J G E Gardeniers ldquoTheeffect of surface roughness on direct wafer bondingrdquo Journal ofApplied Physics vol 85 no 10 pp 7448ndash7454 1999
[3] ldquoSemiconductorWafer edge analysisrdquo ChapmanTechnical NoteTW-1 1998
[4] H Ahmataku and K Kipli in Proceedings of the IEEE Inter-national Conference on Semiconductor Electronics (ICSE rsquo10)Melaka Malaysia June 2010
[5] I McMackin W Martin J Perez et al ldquoPatterned wafer defectdensity analysis of step and flash imprint lithographyrdquo Journal ofVacuum Science amp Technology B vol 26 no 1 pp 151ndash155 2008
[6] S A Alterovitz C H Mueller and E T Croke ldquoHigh mobilitySiGeSi transistor structures on sapphire substrates using ionimplantationrdquo Journal of Vacuum Science amp Technology B vol22 p 1776 2004
[7] K Ismail M Arafa K L Saenger J O Chu and B SMeyersonldquoExtremely high electron mobility in SiSiGe modulation-doped heterostructuresrdquo Applied Physics Letters vol 66 no 9pp 1077ndash1079 1995
[8] S J Koester R Hammond J O Chu et al ldquoSiGe pMODFETson silicon-on-sapphire substrates with 116GHz fmaxrdquo IEEEElectron Device Letters vol 22 no 2 pp 92ndash94 2001
[9] W B Dubbelday and K L Kavanagh ldquoGrowth of SiGe on sap-phire using rapid thermal chemical vapor depositionrdquo Journalof Crystal Growth vol 222 no 1-2 pp 20ndash28 2001
[10] Y Park H J Kim G C King and S H Choi ldquoX-ray diffractionwafer mapping method for SiGe twin defects characterizationrdquoin Nanosensors Biosensors and Info-Tech Sensors and Systemsvol 7980 of Proceedings of SPIE April 2011
[11] M W Jenkins ldquoA new preferential etch for defects in siliconcrystalsrdquo Journal of the Electrochemical Society Solid-StateScience and Technology vol 124 no 5 pp 757ndash762 1977
[12] F Secco drsquoAragona ldquoDislocation etch for (100) planes in siliconrdquoJournal ofTheElectrochemical Society vol 119 no 7 pp 948ndash9511972
[13] E Sirtl and A Adler ldquoChromic acid-hydrofluoric acid asspecific reagents for the development of etching pits in siliconrdquoZeitschrift fur Metallkunde vol 52 pp 529ndash534 1961
[14] W C Dash ldquoCopper precipitation on dislocations in siliconrdquoJournal of Applied Physics vol 27 no 10 pp 1193ndash1195 1956
[15] H RauhWackerrsquos Atlas for Characterization ofDefects in SiliconA Part of the Wacker Tutorial Series 1986
[16] M Glicksman ldquoMobility of Electrons in Germanium-SiliconAlloysrdquo Physical Review vol 111 no 1 pp 125ndash128 1958
[17] M V Fischetti and S E Laux ldquoBand structure deformationpotentials and carrier mobility in strained Si Ge and SiGealloysrdquo Journal of Applied Physics vol 80 no 4 pp 2234ndash22521996
[18] T E Whall and E H C Parker ldquoSiSiGeSi pMOS performa-ncemdashalloy scattering and other considerationsrdquo Thin SolidFilms vol 368 pp 297ndash305 2000
[19] C Jacoboni C Canali G Ottaviani and A Alberigi QuarantaldquoA review of some charge transport properties of siliconrdquo SolidState Electronics vol 20 no 2 pp 77ndash89 1977
[20] V I Fistul M I Iglitsyn and E M Omelyanovskii ldquoMobilityof electrons in germanium strongly doped with arsenicrdquo SovietPhysics Solid State vol 4 no 4 pp 784ndash785 1962
[21] Landolt-Bornstein New Series Group III vol 17a SpringerBerlin Germany 1982
[22] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions I Static theoryrdquoProceedings of the Royal Society of LondonSeries A vol 198 no 1053 pp 205ndash216 1949
[23] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions IV Dynamicsrdquo Proceedings of the Royal Society of LondonA vol 201 no 1065 pp 261ndash268 1950
[24] E Escobedo-Cousin SHOlsenAGOrsquoNeill andHCoulsonldquoDefect identification in strained SiSiGe heterolayers for deviceapplicationsrdquo Journal of Physics D Applied Physics vol 42 no17 Article ID 175306 2009
[25] J G Fiorenza G Braithwaite C W Leitz et al ldquoFilm thicknessconstraints for manufacturable strained silicon CMOSrdquo Semi-conductor Science and Technology vol 19 no 1 article L4 2004
[26] J N Yang G W Neudeck and J P Denton ldquoElectrical effectsof a single stacking fault on fully depleted thin-film silicon-on-insulator P-channel metal-oxide-semiconductor field-effect
Advances in Condensed Matter Physics 9
transistorsrdquo Journal of Applied Physics vol 91 no 1 pp 420ndash426 2002
[27] P I Gaiduk A Nylandsted Larsen and J LundsgaardHansen ldquoStrain-relaxed SiGeSi heteroepitaxial structures oflow threading-dislocation densityrdquoThin Solid Films vol 367 no1-2 pp 120ndash125 2000
[28] L J Huang J O Chu D F Canaperi et al ldquoSiGe-on-insulatorprepared by wafer bonding and layer transfer for high-perfor-mance field-effect transistorsrdquo Applied Physics Letters vol 78no 9 pp 1267ndash1269 2001
[29] T Tezuka N Sugiyama TMizunoM Suzuki and S Takagi ldquoAnovel fabrication technique of ultrathin and relaxed SiGe bufferlayers with highGe fraction for Sub-100 nm strained silicon-on-insulator MOSFETsrdquo Japanese Journal of Applied Physics vol40 part 1 no 4B pp 2866ndash2874 2001
[30] S Nakaharai T Tezuka N Sugiyama Y Moriyama andS-I Takagi ldquoCharacterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation techniquerdquoApplied Physics Letters vol 83 no 17 pp 3516ndash3518 2003
[31] T Shimura K Kawamura M Asakawa et al ldquoCharacterizationof strained Si wafers by X-ray diffraction techniquesrdquo Journalof Materials Science Materials in Electronics vol 19 no 1supplement pp S189ndashS193 2008
[32] N Sugii S Yamaguchi and K Washio ldquoSiGe-on-insulatorsubstrate fabricated by melt solidification for a strained-siliconcomplementary metalndashoxidendashsemiconductorrdquo Journal of Vac-uum Science amp Technology B vol 20 no 5 pp 1891ndash1896 2002
[33] H-J Kim H-B Bae Y Park K Lee and S H Choi ldquoTempera-ture dependence of crystalline SiGe growth on sapphire (0001)substrates by sputteringrdquo Journal of Crystal Growth vol 353 no1 pp 124ndash128 2012
[34] Y Park G C King and S H Choi ldquoRhombohedral epitaxy ofcubic SiGe on trigonal c-plane sapphirerdquo Journal of Crystal Gro-wth vol 310 no 11 pp 2724ndash2731 2008
[35] H J Kim H B Bae Y Park and S H Choi ldquoDefect-engineered Si
1minus119909Ge119909alloy under electron beam irradiation
for thermoelectricsrdquo RSC Advances vol 2 no 33 pp 12670ndash12674 2012
[36] Y Park S H Choi and G C King ldquoSilicon germanium semi-conductive alloy andmethod of fabricating samerdquoUS Patent no7341883 2008
[37] Y Park S H Choi G C King J R Elliott Jr and D MStoakley ldquoGraded index silicon geranium on lattice matchedsilicon geranium semiconductor alloyrdquo US Patent No 7514726B2 2009
[38] Y Park S Hyouk Choi G C King and J R Elliott ldquoMethodof generating X-ray diffraction data for integral detection oftwin defects in super-hetero-epitaxial materialsrdquo US Patent no7558371 B2 2009
[39] Y Park S H Choi and G C King ldquoEpitaxial growth of cubiccrystalline semiconductor alloys on basal plane of trigonal orhexagonal crystalrdquo US Patent no 7906358 B2 2011
[40] T Maniwa ldquoSteering apparatusrdquo US Patent No 8826767 2012[41] Y Park S H Choi G C King and J R Elliott ldquoRhombohedral
cubic semiconductor materials on trigonal substrate with singlecrystal properties and devices based on such materialsrdquo USPatent no 8257491 B2 2012
[42] Y Park S H Choi G C King J R Elliott and A L Dimarcan-tonio ldquoX-ray diffraction wafermappingmethod for rhombohe-dral super-hetero-epitaxyrdquo US Patent No 7769135 B2 2010
Submit your manuscripts athttpwwwhindawicom
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
High Energy PhysicsAdvances in
The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
FluidsJournal of
Atomic and Molecular Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Advances in Condensed Matter Physics
OpticsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstronomyAdvances in
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Superconductivity
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Statistical MechanicsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
GravityJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstrophysicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Physics Research International
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Solid State PhysicsJournal of
Computational Methods in Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Soft MatterJournal of
Hindawi Publishing Corporationhttpwwwhindawicom
AerodynamicsJournal of
Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
PhotonicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Journal of
Biophysics
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
ThermodynamicsJournal of
8 Advances in Condensed Matter Physics
are made with rhombohedral SiGe on 119888-plane sapphire canpotentially run a few times faster than RF devices on SOSwafers at high frequencies up to several hundred GHz
4 Summary and Conclusions
In summary we have experimentally demonstrated the fab-rication of high-quality SiGe layers with a high Ge concen-tration of more than 85 on sapphire wafer by sputteringWe also report that the defect dependence of the electronmobility by the twinning of SiGe thin films on sapphire(0001) substrates was measured Currently a standard SiGetechnology uses only ultrathin (30sim100 nm) layer of SiGe forbase layer of heterojunction bipolar transistor (HBT) to avoiddislocation defects With the lattice-matched SiGe layer wedeveloped a thin or thick SiGe layer can be also fabricatedfor any designated applications since the lattice-matchedmaterials do not have a critical thickness limit In rhombo-hedral SiGe on 119888-plane (0001) sapphire the SiGe layer can bealso grown in layer-by-layer mode from sub-100 nm to fewmicrometers of thicknesses Therefore thin rhombohedralSiGe on 119888-plane sapphire has many commercial applicationpotentials as do SOI wafers in addition to solar cell applica-tions Typically a rhombohedral single crystal SiGe has 2 or3 times higher carrier mobility than monocrystalline siliconThe high Ge-content SiGe film shows high mobility lowcost and simple structure when grown directly on sapphiresubstrate with sputtering process If the defects in SiGe canbe removed transistors with higher operational frequenciescan be fabricated for a new generation of ultrafast chipsetsbecause of the high mobility of SiGe film
Conflict of Interests
The authors declare that there is no conflict of interestsregarding the publication of this paper
References
[1] D L Harame and B S Meyerson ldquoThe early history of IBMrsquosSiGe mixed signal technologyrdquo IEEE Transactions on ElectronDevices vol 48 no 11 pp 2555ndash2567 2001
[2] C Gui M Elwenspoek N Tas and J G E Gardeniers ldquoTheeffect of surface roughness on direct wafer bondingrdquo Journal ofApplied Physics vol 85 no 10 pp 7448ndash7454 1999
[3] ldquoSemiconductorWafer edge analysisrdquo ChapmanTechnical NoteTW-1 1998
[4] H Ahmataku and K Kipli in Proceedings of the IEEE Inter-national Conference on Semiconductor Electronics (ICSE rsquo10)Melaka Malaysia June 2010
[5] I McMackin W Martin J Perez et al ldquoPatterned wafer defectdensity analysis of step and flash imprint lithographyrdquo Journal ofVacuum Science amp Technology B vol 26 no 1 pp 151ndash155 2008
[6] S A Alterovitz C H Mueller and E T Croke ldquoHigh mobilitySiGeSi transistor structures on sapphire substrates using ionimplantationrdquo Journal of Vacuum Science amp Technology B vol22 p 1776 2004
[7] K Ismail M Arafa K L Saenger J O Chu and B SMeyersonldquoExtremely high electron mobility in SiSiGe modulation-doped heterostructuresrdquo Applied Physics Letters vol 66 no 9pp 1077ndash1079 1995
[8] S J Koester R Hammond J O Chu et al ldquoSiGe pMODFETson silicon-on-sapphire substrates with 116GHz fmaxrdquo IEEEElectron Device Letters vol 22 no 2 pp 92ndash94 2001
[9] W B Dubbelday and K L Kavanagh ldquoGrowth of SiGe on sap-phire using rapid thermal chemical vapor depositionrdquo Journalof Crystal Growth vol 222 no 1-2 pp 20ndash28 2001
[10] Y Park H J Kim G C King and S H Choi ldquoX-ray diffractionwafer mapping method for SiGe twin defects characterizationrdquoin Nanosensors Biosensors and Info-Tech Sensors and Systemsvol 7980 of Proceedings of SPIE April 2011
[11] M W Jenkins ldquoA new preferential etch for defects in siliconcrystalsrdquo Journal of the Electrochemical Society Solid-StateScience and Technology vol 124 no 5 pp 757ndash762 1977
[12] F Secco drsquoAragona ldquoDislocation etch for (100) planes in siliconrdquoJournal ofTheElectrochemical Society vol 119 no 7 pp 948ndash9511972
[13] E Sirtl and A Adler ldquoChromic acid-hydrofluoric acid asspecific reagents for the development of etching pits in siliconrdquoZeitschrift fur Metallkunde vol 52 pp 529ndash534 1961
[14] W C Dash ldquoCopper precipitation on dislocations in siliconrdquoJournal of Applied Physics vol 27 no 10 pp 1193ndash1195 1956
[15] H RauhWackerrsquos Atlas for Characterization ofDefects in SiliconA Part of the Wacker Tutorial Series 1986
[16] M Glicksman ldquoMobility of Electrons in Germanium-SiliconAlloysrdquo Physical Review vol 111 no 1 pp 125ndash128 1958
[17] M V Fischetti and S E Laux ldquoBand structure deformationpotentials and carrier mobility in strained Si Ge and SiGealloysrdquo Journal of Applied Physics vol 80 no 4 pp 2234ndash22521996
[18] T E Whall and E H C Parker ldquoSiSiGeSi pMOS performa-ncemdashalloy scattering and other considerationsrdquo Thin SolidFilms vol 368 pp 297ndash305 2000
[19] C Jacoboni C Canali G Ottaviani and A Alberigi QuarantaldquoA review of some charge transport properties of siliconrdquo SolidState Electronics vol 20 no 2 pp 77ndash89 1977
[20] V I Fistul M I Iglitsyn and E M Omelyanovskii ldquoMobilityof electrons in germanium strongly doped with arsenicrdquo SovietPhysics Solid State vol 4 no 4 pp 784ndash785 1962
[21] Landolt-Bornstein New Series Group III vol 17a SpringerBerlin Germany 1982
[22] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions I Static theoryrdquoProceedings of the Royal Society of LondonSeries A vol 198 no 1053 pp 205ndash216 1949
[23] F C Frank and J H van de Merwe ldquoOne-dimensional disloca-tions IV Dynamicsrdquo Proceedings of the Royal Society of LondonA vol 201 no 1065 pp 261ndash268 1950
[24] E Escobedo-Cousin SHOlsenAGOrsquoNeill andHCoulsonldquoDefect identification in strained SiSiGe heterolayers for deviceapplicationsrdquo Journal of Physics D Applied Physics vol 42 no17 Article ID 175306 2009
[25] J G Fiorenza G Braithwaite C W Leitz et al ldquoFilm thicknessconstraints for manufacturable strained silicon CMOSrdquo Semi-conductor Science and Technology vol 19 no 1 article L4 2004
[26] J N Yang G W Neudeck and J P Denton ldquoElectrical effectsof a single stacking fault on fully depleted thin-film silicon-on-insulator P-channel metal-oxide-semiconductor field-effect
Advances in Condensed Matter Physics 9
transistorsrdquo Journal of Applied Physics vol 91 no 1 pp 420ndash426 2002
[27] P I Gaiduk A Nylandsted Larsen and J LundsgaardHansen ldquoStrain-relaxed SiGeSi heteroepitaxial structures oflow threading-dislocation densityrdquoThin Solid Films vol 367 no1-2 pp 120ndash125 2000
[28] L J Huang J O Chu D F Canaperi et al ldquoSiGe-on-insulatorprepared by wafer bonding and layer transfer for high-perfor-mance field-effect transistorsrdquo Applied Physics Letters vol 78no 9 pp 1267ndash1269 2001
[29] T Tezuka N Sugiyama TMizunoM Suzuki and S Takagi ldquoAnovel fabrication technique of ultrathin and relaxed SiGe bufferlayers with highGe fraction for Sub-100 nm strained silicon-on-insulator MOSFETsrdquo Japanese Journal of Applied Physics vol40 part 1 no 4B pp 2866ndash2874 2001
[30] S Nakaharai T Tezuka N Sugiyama Y Moriyama andS-I Takagi ldquoCharacterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation techniquerdquoApplied Physics Letters vol 83 no 17 pp 3516ndash3518 2003
[31] T Shimura K Kawamura M Asakawa et al ldquoCharacterizationof strained Si wafers by X-ray diffraction techniquesrdquo Journalof Materials Science Materials in Electronics vol 19 no 1supplement pp S189ndashS193 2008
[32] N Sugii S Yamaguchi and K Washio ldquoSiGe-on-insulatorsubstrate fabricated by melt solidification for a strained-siliconcomplementary metalndashoxidendashsemiconductorrdquo Journal of Vac-uum Science amp Technology B vol 20 no 5 pp 1891ndash1896 2002
[33] H-J Kim H-B Bae Y Park K Lee and S H Choi ldquoTempera-ture dependence of crystalline SiGe growth on sapphire (0001)substrates by sputteringrdquo Journal of Crystal Growth vol 353 no1 pp 124ndash128 2012
[34] Y Park G C King and S H Choi ldquoRhombohedral epitaxy ofcubic SiGe on trigonal c-plane sapphirerdquo Journal of Crystal Gro-wth vol 310 no 11 pp 2724ndash2731 2008
[35] H J Kim H B Bae Y Park and S H Choi ldquoDefect-engineered Si
1minus119909Ge119909alloy under electron beam irradiation
for thermoelectricsrdquo RSC Advances vol 2 no 33 pp 12670ndash12674 2012
[36] Y Park S H Choi and G C King ldquoSilicon germanium semi-conductive alloy andmethod of fabricating samerdquoUS Patent no7341883 2008
[37] Y Park S H Choi G C King J R Elliott Jr and D MStoakley ldquoGraded index silicon geranium on lattice matchedsilicon geranium semiconductor alloyrdquo US Patent No 7514726B2 2009
[38] Y Park S Hyouk Choi G C King and J R Elliott ldquoMethodof generating X-ray diffraction data for integral detection oftwin defects in super-hetero-epitaxial materialsrdquo US Patent no7558371 B2 2009
[39] Y Park S H Choi and G C King ldquoEpitaxial growth of cubiccrystalline semiconductor alloys on basal plane of trigonal orhexagonal crystalrdquo US Patent no 7906358 B2 2011
[40] T Maniwa ldquoSteering apparatusrdquo US Patent No 8826767 2012[41] Y Park S H Choi G C King and J R Elliott ldquoRhombohedral
cubic semiconductor materials on trigonal substrate with singlecrystal properties and devices based on such materialsrdquo USPatent no 8257491 B2 2012
[42] Y Park S H Choi G C King J R Elliott and A L Dimarcan-tonio ldquoX-ray diffraction wafermappingmethod for rhombohe-dral super-hetero-epitaxyrdquo US Patent No 7769135 B2 2010
Submit your manuscripts athttpwwwhindawicom
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
High Energy PhysicsAdvances in
The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
FluidsJournal of
Atomic and Molecular Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Advances in Condensed Matter Physics
OpticsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstronomyAdvances in
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Superconductivity
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Statistical MechanicsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
GravityJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstrophysicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Physics Research International
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Solid State PhysicsJournal of
Computational Methods in Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Soft MatterJournal of
Hindawi Publishing Corporationhttpwwwhindawicom
AerodynamicsJournal of
Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
PhotonicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Journal of
Biophysics
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
ThermodynamicsJournal of
Advances in Condensed Matter Physics 9
transistorsrdquo Journal of Applied Physics vol 91 no 1 pp 420ndash426 2002
[27] P I Gaiduk A Nylandsted Larsen and J LundsgaardHansen ldquoStrain-relaxed SiGeSi heteroepitaxial structures oflow threading-dislocation densityrdquoThin Solid Films vol 367 no1-2 pp 120ndash125 2000
[28] L J Huang J O Chu D F Canaperi et al ldquoSiGe-on-insulatorprepared by wafer bonding and layer transfer for high-perfor-mance field-effect transistorsrdquo Applied Physics Letters vol 78no 9 pp 1267ndash1269 2001
[29] T Tezuka N Sugiyama TMizunoM Suzuki and S Takagi ldquoAnovel fabrication technique of ultrathin and relaxed SiGe bufferlayers with highGe fraction for Sub-100 nm strained silicon-on-insulator MOSFETsrdquo Japanese Journal of Applied Physics vol40 part 1 no 4B pp 2866ndash2874 2001
[30] S Nakaharai T Tezuka N Sugiyama Y Moriyama andS-I Takagi ldquoCharacterization of 7-nm-thick strained Ge-on-insulator layer fabricated by Ge-condensation techniquerdquoApplied Physics Letters vol 83 no 17 pp 3516ndash3518 2003
[31] T Shimura K Kawamura M Asakawa et al ldquoCharacterizationof strained Si wafers by X-ray diffraction techniquesrdquo Journalof Materials Science Materials in Electronics vol 19 no 1supplement pp S189ndashS193 2008
[32] N Sugii S Yamaguchi and K Washio ldquoSiGe-on-insulatorsubstrate fabricated by melt solidification for a strained-siliconcomplementary metalndashoxidendashsemiconductorrdquo Journal of Vac-uum Science amp Technology B vol 20 no 5 pp 1891ndash1896 2002
[33] H-J Kim H-B Bae Y Park K Lee and S H Choi ldquoTempera-ture dependence of crystalline SiGe growth on sapphire (0001)substrates by sputteringrdquo Journal of Crystal Growth vol 353 no1 pp 124ndash128 2012
[34] Y Park G C King and S H Choi ldquoRhombohedral epitaxy ofcubic SiGe on trigonal c-plane sapphirerdquo Journal of Crystal Gro-wth vol 310 no 11 pp 2724ndash2731 2008
[35] H J Kim H B Bae Y Park and S H Choi ldquoDefect-engineered Si
1minus119909Ge119909alloy under electron beam irradiation
for thermoelectricsrdquo RSC Advances vol 2 no 33 pp 12670ndash12674 2012
[36] Y Park S H Choi and G C King ldquoSilicon germanium semi-conductive alloy andmethod of fabricating samerdquoUS Patent no7341883 2008
[37] Y Park S H Choi G C King J R Elliott Jr and D MStoakley ldquoGraded index silicon geranium on lattice matchedsilicon geranium semiconductor alloyrdquo US Patent No 7514726B2 2009
[38] Y Park S Hyouk Choi G C King and J R Elliott ldquoMethodof generating X-ray diffraction data for integral detection oftwin defects in super-hetero-epitaxial materialsrdquo US Patent no7558371 B2 2009
[39] Y Park S H Choi and G C King ldquoEpitaxial growth of cubiccrystalline semiconductor alloys on basal plane of trigonal orhexagonal crystalrdquo US Patent no 7906358 B2 2011
[40] T Maniwa ldquoSteering apparatusrdquo US Patent No 8826767 2012[41] Y Park S H Choi G C King and J R Elliott ldquoRhombohedral
cubic semiconductor materials on trigonal substrate with singlecrystal properties and devices based on such materialsrdquo USPatent no 8257491 B2 2012
[42] Y Park S H Choi G C King J R Elliott and A L Dimarcan-tonio ldquoX-ray diffraction wafermappingmethod for rhombohe-dral super-hetero-epitaxyrdquo US Patent No 7769135 B2 2010
Submit your manuscripts athttpwwwhindawicom
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
High Energy PhysicsAdvances in
The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
FluidsJournal of
Atomic and Molecular Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Advances in Condensed Matter Physics
OpticsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstronomyAdvances in
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Superconductivity
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Statistical MechanicsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
GravityJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstrophysicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Physics Research International
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Solid State PhysicsJournal of
Computational Methods in Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Soft MatterJournal of
Hindawi Publishing Corporationhttpwwwhindawicom
AerodynamicsJournal of
Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
PhotonicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Journal of
Biophysics
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
ThermodynamicsJournal of
Submit your manuscripts athttpwwwhindawicom
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
High Energy PhysicsAdvances in
The Scientific World JournalHindawi Publishing Corporation httpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
FluidsJournal of
Atomic and Molecular Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Advances in Condensed Matter Physics
OpticsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstronomyAdvances in
International Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Superconductivity
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Statistical MechanicsInternational Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
GravityJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
AstrophysicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Physics Research International
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Solid State PhysicsJournal of
Computational Methods in Physics
Journal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Soft MatterJournal of
Hindawi Publishing Corporationhttpwwwhindawicom
AerodynamicsJournal of
Volume 2014
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
PhotonicsJournal of
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
Journal of
Biophysics
Hindawi Publishing Corporationhttpwwwhindawicom Volume 2014
ThermodynamicsJournal of