recap: introduction to operating systemssbarker/teaching/courses/... · l1)cache l2)cache ram disk...

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Sean Barker Recap: Introduction to Operating Systems 1 User-level Applications Operating System Hardware virtual machine interface physical machine interface Sean Barker Today: OS and Computer Architecture 2 network card System bus

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Page 1: Recap: Introduction to Operating Systemssbarker/teaching/courses/... · L1)Cache L2)Cache RAM Disk 1"cycle'latency 2"cycle'latency 7"cycle'latency 100'cycle'latency 40,000,000'cycle'latency

Sean Barker

Recap: Introduction to Operating Systems

1

User-level Applications

Operating System

Hardware

virtual(machine(((interface

physical(machine(((interface

Sean Barker

Today: OS and Computer Architecture

2

networkcard

System bus

Page 2: Recap: Introduction to Operating Systemssbarker/teaching/courses/... · L1)Cache L2)Cache RAM Disk 1"cycle'latency 2"cycle'latency 7"cycle'latency 100'cycle'latency 40,000,000'cycle'latency

Sean Barker

Computer Architecture

3

Logic board

Sean Barker

Protection

4

Page 3: Recap: Introduction to Operating Systemssbarker/teaching/courses/... · L1)Cache L2)Cache RAM Disk 1"cycle'latency 2"cycle'latency 7"cycle'latency 100'cycle'latency 40,000,000'cycle'latency

Sean Barker

Assembly Instructions

5

Sean Barker

User and Kernel Mode

6

Page 4: Recap: Introduction to Operating Systemssbarker/teaching/courses/... · L1)Cache L2)Cache RAM Disk 1"cycle'latency 2"cycle'latency 7"cycle'latency 100'cycle'latency 40,000,000'cycle'latency

Sean Barker

System Calls

7

Sean Barker

Traps

8

0: 0x00080000

1: 0x00100000

2: 0x00100480

3: 0x00123010

Illegal address

Memory violation

Division by zero

System call

Trap Vector

...

Page 5: Recap: Introduction to Operating Systemssbarker/teaching/courses/... · L1)Cache L2)Cache RAM Disk 1"cycle'latency 2"cycle'latency 7"cycle'latency 100'cycle'latency 40,000,000'cycle'latency

Sean Barker

I/O Control & Interrupts

9

0: 0x2ff080000

1: 0x2ff100000

2: 0x2ff100480

3: 0x2ff123010

keyboard

mouse

timer

disk 1

Interrupt Vector

Sean Barker

Synchronous & Asynchronous I/O

10

Page 6: Recap: Introduction to Operating Systemssbarker/teaching/courses/... · L1)Cache L2)Cache RAM Disk 1"cycle'latency 2"cycle'latency 7"cycle'latency 100'cycle'latency 40,000,000'cycle'latency

Sean Barker

Hardware Timer

11

Sean Barker

Memory Protection

12

Base register value

Limit register value

Mem

ory

(byt

es 0

to N

)

Page 7: Recap: Introduction to Operating Systemssbarker/teaching/courses/... · L1)Cache L2)Cache RAM Disk 1"cycle'latency 2"cycle'latency 7"cycle'latency 100'cycle'latency 40,000,000'cycle'latency

Sean Barker

Caches in the Memory Hierarchy

13

registers

L1)Cache

L2)Cache

RAM

Disk

1"cycle'latency

2"cycle'latency

7"cycle'latency

100'cycle'latency

40,000,000'cycle'latency'

Network 200,000,000+'cycle'latency'

load

evict

fast

ersl

ower

Sean Barker

Summary of Architecture Support

14

OS Service Hardware Support

Protection Kernel/user mode, protected instructions, base/limit registers

Interrupts Interrupt vectors

System calls Trap instructions and trap vectors

I/O InterruptsScheduling, error recovery,

accounting Timer

Synchronization Atomic instructions

Virtual memory Translation look-aside buffers

Page 8: Recap: Introduction to Operating Systemssbarker/teaching/courses/... · L1)Cache L2)Cache RAM Disk 1"cycle'latency 2"cycle'latency 7"cycle'latency 100'cycle'latency 40,000,000'cycle'latency

Sean Barker

Summary

! Architecture matters for OS!

! OS provides interface to architecture, but has help from the architecture

! Sometimes necessary for the OS to work, other times just a performance enhancement

! OS is interrupt-driven!

15