real-time simulation of electric drives & systems with rt … · rt-lab presentation overview...
TRANSCRIPT
Opal-RT Technologieswww.opal-rt.com
Real-Time Simulationof Electric Drives & Systems
with RT-LABSimon Abourida
March 3, 2005
Opal-RT Technologies /sa 2
Real-Time Simulation of Electric Drives & Systems with RT-LAB
Presentation OverviewIntroduction
Power Electronics and DrivesReal-Time Simulation
Real-Time SimulationModesRequirements and challengesRT-LAB Simulator
Typical ExampleChallenges and ProblemsQuestions and Answers
Introduction
Power Electronics & Drives
Real-Time Simulation
RCP & HIL
Typical Example
Opal-RT Technologies /sa 3
Introduction - Electric Drives
Electric Drive:Plant
Electric Motor (and load)Power Electronics Converter
ControllerRegulator (control algorithm – current, speed and position loops)Firing Unit (pulse generator)
Actuators (gate drives)Sensors
Analog sensors (current, voltage, torque)Pulsed ‘logical’ sensors (position and speed encoders)
Controller Plant
Power
Electronics
ConverterActuators
Sensors
Opal-RT Technologies /sa 4
Controller
PWM Firing
Example: AC Drive with NPC Multi-Level Inverter
Opal-RT Technologies /sa 5
Why Real-Time Simulation?
Simulation is a must, to address the challenges of modern electrical power drives and systems.
But why real-time?To interact with the simulated system To connect the simulated system to physical components in the real worldSimulation can be blended with physical hardware in every stage of the development process
Opal-RT Technologies /sa 6
Real Plant
Rapid Control Prototyping
RT-LAB Simulator
Power
Electronics
Converter
+ -
Controller
Testing a Rapidly Prototyped ControllerWith a real plant
Opal-RT Technologies /sa 7
Controller
Hardware-in-the-Loop testing
RT-LAB Simulator
+- Motor
Plant Model
Testing Real Controllerwith Real-Time Plant Model
This is Hardware in-the-loop (HIL)
Opal-RT Technologies /sa 8
PMSM drive controller
Opal-RT Technologies /sa 9
Testing PMSM drive controller with a RT Simulator
Real-TimeDigital Simulator
Opal-RT Technologies /sa 10
RT-LAB simulator of the PMSM drive
10µs80µs
80µs10ns
SimPowerSystems & ARTEMIS
Xilinx Virtex II Pro FPGA board@ 100 MHz
RT-Events Time-Stamped Bridge
16-bit D/A with DMA transfer
Shared Memory Communication
Multi-processor, multi-rate
Opal-RT Technologies /sa 11
PMSM drive simulator results
0 0.05 0.1 0.15 0.2-25
-20
-15
-10
-5
0
5
10
15
20
25
Time [sec]
Motor Current [A]
0 0.05 0.1 0.15 0.20
5
10
15
20
25
Time [sec]
Motor Torque [Nm]
0 0.05 0.1 0.15 0.2-25
-20
-15
-10
-5
0
5
10
15
20
25
Time [sec]
Motor Current [A]
0 0.05 0.1 0.15 0.20
5
10
15
20
25
Time [sec]
Motor Torque [Nm]
0 0.05 0.1 0.15 0.2-25
-20
-15
-10
-5
0
5
10
15
20
25
Time [sec]
Motor Current [A]
0 0.05 0.1 0.15 0.20
5
10
15
20
25
Time [sec]Motor Torque [Nm]
Off-line simulation:• SimPowerSystems• Native Simulink• Time step size 10 µs
Off-line simulation:• SimPowerSystems• Native Simulink• Time step size 1 µs
Real-time simulation:• RT-Events
Time Stamped Bridge• Time step size 10 µs
Opal-RT Technologies /sa 12
PMSM drive simulator: Effect of Freq & dead time
(a) Dead time = 0.7 µs
(b) Dead time = 4.2 µs
(c) Dead time = 9.8 µs
B. Motor current whenchanging dead time
(a) PWM freq. = 9000 Hz
(b) PWM freq. = 4500 Hz
(c) PWM freq. = 2250 Hz
A. Motor current whenchanging PWM frequency
Opal-RT Technologies /sa 13
Typical EES Simulator configuration:
• Single Xeon (top PC)• Dual Xeon (bottom PC)
• Analog I/O interface• Time Stamped Digital I/O
PC-based
RT-LAB Electric RT Simulator
real-time digital simulator
Uses Off-the-Shelf Pentium processorsDual or Quad Xeon configuration used for electrical simulators
Simulink-based real-time simulatorUltra-fast re-configurable FPGA card for I/OsQNX or RT-Linux real-time OSSample time below 10 us
Typical EES Simulator configuration
Ethernet
Targets
Host
ExternalHardware under test
Opal-RT Technologies /sa 14
RT-LA
B Electric Sim
ulator
HardwareTargets: PC-ClusterI/O: FPGA-basedRTOS : QNX or RT-Linux
Real-Time ParallelProcessing
RT-LAB Simulator & Model Preparation
RT-LAB Software
Solvers, Models
Simulink
User Application User Model
RT-EventsFiring & TSB ARTEMIS
Electric Circuit
SPS (PSB)
PC PC PC
External Equipment I/O I/O I/O
Opal-RT Technologies /sa 15
RT-LAB Specialized RT Simulation Toolboxes
ARTEMISRT-EVENTS
Real-time simulation of electrical systems (general cases) –Used with SPS
Voltage source inverters for motor drives (PMSM, IM, SRM, etc)
DC-DC converters
Firing Pulse Modeling
Internal combustion engine simulation
Events based systems
Real-time simulation of voltage source converters
Power networks (HVDC, SVC, etc..)
Thyristor drives
Cycloconverters,
Diode & thyristorsrectifiers
Typical applications
Use
Opal-RT Technologies /sa 16
ARTEMIS Blockset
Real-time solvers & techniques for the SimPowerSystemblockset for the simulation of electric circuitsMore stable and more precise with larger time steps
Realistic time steps (30-60 µs) enabling the use of commercial PC-based systems
Designed for RT:Constant computation timeStrictly-non-iterative integration, no algebraic loopsCompatible with the code generator
Real-time interpolation for precise simulation of power electronics (GTO, IGBT, etc)Support for parallel processing:
Reduction of matrices’ size and number by splitting the equations of separated systems
Opal-RT Technologies /sa 17
RT Interpolation with RT-Events™ Library for Simulink
Blocks propagate in-step switching information in addition to standard logic signalsIn-step timing information permits accurate simulationIncludes logic, integrators, comparator blocks
Opal-RT Technologies /sa 18
Discrete-Step Simulation of Pulse Signal causes Jitter
Sampling Period
Real (ideal) Pulse
Sampled Pulse
Errors
• Discrete-step simulation of an ideal pulse causes a varying error on the transition timings Jitter
• Jitter error increases with the sampling period
• Sampling period of the Digital Simulator cannot be small to match the resolution required (sub-µs) to generate or capture a pulse
Opal-RT Technologies /sa 19
Observing Jitter on the Oscilloscope
Correct pulse
Sampled pulse presents jitter
Sampling Period
Opal-RT Technologies /sa 20
How to Reduce the Errors Caused by the Jitter
Errors can be reduced by decreasing time step to a very low value often below 1 us, but this makes the real-time simulation not practical or simply impossibleChallenges
How to increase precision without excessive simulation time?How to make real-time control prototyping with precise simulation of firing pulse generation, encoders, etc?
Jitter
Inaccuracy
Non-Characteristic Harmonic
Steady-State Error
Opal-RT Technologies /sa 21
Real-Time Interpolation and RT-Events
If the pulse is generated by comparing two signals, such as SPWM pulse signals, interpolation must be used RT-Events comparator
Real-Time Interpolation
Ts
Signal 2
Signal 1
Time-Stamped Pulse
Time-Stamp Discrete Comparator Pulse (State)
Ideal Pulse
RT-Events Comparator
Opal-RT Technologies /sa 22
Pulse Generation with FPGA and RT-Events programmed in Simulink
Example: SPWM generation with RT-EventsTo generate PWM according to the theoretical comparison of a reference and a carrier, a comparator is neededProblem: The Simulink native discrete comparator cannot be used because it will give errors caused by fixed-step simulation at a step that is much higher than the resolution required. Note that this resolution is expected to be in the one µs range and lower, but even with today's fastest DSP or processor, the digital simulation time step cannot be that low; the time step cannot go lower than 10 to 50 µs.
SolutionTo use RT-Events comparator, because RT-Events has interpolation and has two outputs: the STATE of the pulse (0-1) and a time-stamp (time of occurrence of the transition within the previous time-step); and these two are normally connected directly to Event Generator block from the FPGA I/O library.
Automatic mapping of the Simulink Block diagram to the Hardware (Pentium & FPGA)
Simulink Model
PCI bus
Pentium processors
Simulator Hardware(processor & FPGA)
FPGA Board
Opal-RT Technologies /sa 23
Relation between RT-EVENTS & I/O event capture
Fully numericalevent-compensatedsimulation
Hardware-in-the-Loopevent-compensatedsimulation
Ex: Counter frequency: 100 MHzSample time: 50 usMax count= 50us *100e6=5000
Opal-RT Technologies /sa 24
Conclusions
Power electronics and drives with PWM frequency up to 10 kHz can be simulated in real-time using COTS technologies
Pentium and AMD processors, QNX and RT-LINUX OSFPGA based I/O
Standard RT tools are not enough for accurate simulation of power electronicsSimulink, RTW code generator and specialized toolboxesare used as the core simulation technologies for control prototyping and simulation of power electronics:
RT-Events Time-Stamped BridgesARTEMIS add-on to SimPowerSystems blockset for Simulink
Opal-RT Technologies /sa 25
DC-DC Converter
Introduction
Parameters:Source: 400 VLoad: 1 Ohm, 5 mHCarrier: 1010 Hz
RCP & HIL Simulation of Power Electronics
Typical Example
Challenges and Problems
Q&A Controller
Plant
Opal-RT Technologies /sa 26
DC-DC Converter
Introduction
RCP & HIL Simulation of Power Electronics
Typical Example
Challenges and Problems
Q&A