q549---32pfl9604ser

141
Published by ER /EL 0965 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 18311 2009-May-08 © Copyright 2009 Koninklijke Philips Electronics N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips. Colour Television Chassis Q549.2E LA 18310_000_090317.eps 090317 Contents Page Contents Page 1. Revision List 2 2. Technical Specifications and, Connections 2 3. Precautions, Notes, and Abbreviation List 6 4. Mechanical Instructions 10 5. Service Modes, Error Codes, and Fault Finding 15 6. Alignments 36 7. Circuit Descriptions 42 8. IC Data Sheets 53 9. Block Diagrams Wiring Diagram 32" (Elite Core) 59 Wiring Diagram 37" (Elite Core) 60 Block Diagram Video 62 Block Diagram Audio 63 Block Diagram Control & Clock Signals 64 Block Diagram I2C 65 Supply Lines Overview 66 10. Circuit Diagrams and PWB Layouts Drawing PWB Interface Ambilight: Interface + Single DC-DC (AB1)67 70 Interface Ambilight: Dual DC-DC (AB2) 68 70 Interface Ambilight: Microcontrollerblock (AB3) 69 70 6 LED Low-Pow: Microcontroller Block Liteon (AL1)71 74 6 LED Low-Pow: Microcontroller Block Liteon (AL2)72 74 6 LED Low-Pow: LED Liteon (AL3) 73 74 8 LED Low-Pow: Microcontroller Block Liteon (AL1)75 79 8 LED Low-Pow: Microcontroller Block Liteon (AL2)76 79 8 LED Low-Pow: LED Liteon (AL3) 77 79 8 LED Low-Pow: LED Drive Liteon (AL4) 78 79 10 LED Low-Pow: Microcontroller Block Liteon (AL1)80 84 10 LED Low-Pow: Microcontroller Block Liteon (AL2)81 84 10 LED Low-Pow: LED Liteon (AL3) 82 84 10 LED Low-Pow: LED Drive Liteon (AL4) 83 84 SSB (B01A-B10) 85-133 137-138 SSB: SRP List Explanation 134 SSB: SRP List Part 1 135 SSB: SRP List Part 2 136 Light guide 139 140 Wi-Fi Antenna 141 141

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Page 1: Q549---32pfl9604ser

Published by ER/EL 0965 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 18311

2009-May-08

©Copyright 2009 Koninklijke Philips Electronics N.V.All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.

Colour Television Chassis

Q549.2ELA

18310_000_090317.eps090317

Contents Page Contents Page1. Revision List 22. Technical Specifications and, Connections 23. Precautions, Notes, and Abbreviation List 64. Mechanical Instructions 105. Service Modes, Error Codes, and Fault Finding 156. Alignments 367. Circuit Descriptions 428. IC Data Sheets 539. Block Diagrams

Wiring Diagram 32" (Elite Core) 59Wiring Diagram 37" (Elite Core) 60Block Diagram Video 62Block Diagram Audio 63Block Diagram Control & Clock Signals 64Block Diagram I2C 65Supply Lines Overview 66

10. Circuit Diagrams and PWB Layouts Drawing PWBInterface Ambilight: Interface + Single DC-DC(AB1)67 70Interface Ambilight: Dual DC-DC (AB2) 68 70Interface Ambilight: Microcontrollerblock (AB3) 69 706 LED Low-Pow: Microcontroller Block Liteon(AL1)71 746 LED Low-Pow: Microcontroller Block Liteon(AL2)72 746 LED Low-Pow: LED Liteon (AL3) 73 748 LED Low-Pow: Microcontroller Block Liteon(AL1)75 798 LED Low-Pow: Microcontroller Block Liteon(AL2)76 798 LED Low-Pow: LED Liteon (AL3) 77 798 LED Low-Pow: LED Drive Liteon (AL4) 78 7910 LED Low-Pow: Microcontroller Block Liteon(AL1)80 8410 LED Low-Pow: Microcontroller Block Liteon(AL2)81 8410 LED Low-Pow: LED Liteon (AL3) 82 8410 LED Low-Pow: LED Drive Liteon (AL4) 83 84SSB (B01A-B10) 85-133 137-138SSB: SRP List Explanation 134SSB: SRP List Part 1 135

SSB: SRP List Part 2 136Light guide 139 140Wi-Fi Antenna 141 141

Page 2: Q549---32pfl9604ser

Revision ListEN 2 Q549.2E LA1.

2009-May-08

1. Revision ListManual xxxx xxx xxxx.0• First release.

Manual xxxx xxx xxxx.1• All Chapters: the following sets to the manual: see Table

2-1 Described Model numbers.• Chapter 5: paragraph 5.8.10 PCI bus added.• Chapter 6: paragraph 6.6 Service SSB delivered without

main software loaded added.

2. Technical Specifications and, Connections

Index of this chapter:2.1 Technical Specifications2.2 Directions for Use2.3 Connections2.4 Chassis Overview

Notes:• Figures can deviate due to the different set executions.• Specifications are indicative (subject to change).

2.1 Technical Specifications

For on-line product support please use the links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers.

Table 2-1 Described Model numbers

2.2 Directions for Use

You can download this information from the following websites:http://www.philips.com/supporthttp://www.p4c.philips.com

CTN Styling Published in:

32PFL9604H/12 Elite Core 3122 785 18310

32PFL9604H/60 3122 785 18310

37PFL9604H/12 3122 785 18310

37PFL9604H/60 3122 785 18311

56PFL9954H/12 3122 785 18311

Page 3: Q549---32pfl9604ser

Technical Specifications and, Connections EN 3Q549.2E LA 2.

2009-May-08

2.3 Connections

Figure 2-1 Connection overview

18310_001_090317.eps090317

NETWORK AUDIO IN VGA

VGASERVICE UART

1234

Page 4: Q549---32pfl9604ser

Technical Specifications and, ConnectionsEN 4 Q549.2E LA2.

2009-May-08

Note: The following connector colour abbreviations are used (acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.

2.3.1 Side Connections

Head phone (Output)Bk - Head phone 32 - 600 ohm / 10 mW ��

Cinch: Video CVBS - In, Audio - InRd - Audio R 0.5 VRMS / 10 kohm ��

Wh - Audio L 0.5 VRMS / 10 kohm ��Ye - Video CVBS 1 VPP / 75 ohm ��

S-Video (Hosiden): Video Y/C - In1 - Ground Y Gnd �2 - Ground C Gnd �

3 - Video Y 1 VPP / 75 ohm �

4 - Video C 0.3 VPP / 75 ohm �

USB2.0

Figure 2-2 USB (type A)

1 - +5V �

2 - Data (-) ��

3 - Data (+) ��4 - Ground Gnd �

HDMI: Digital Video, Digital Audio - In (see HDMI 1, 2, 3 & 4 - Rear Connections)

Common Interface68p- See diagram B07A SSB: CI: PCMCIA

Connector ��

2.3.2 Rear Connections

Service Connector (UART)1 - Ground Gnd �2 - UART_TX Transmit �

3 - UART_RX Receive �

VGA: Video RGB - In

Figure 2-3 VGA Connector

1 - Video Red 0.7 VPP / 75 ohm �2 - Video Green 0.7 VPP / 75 ohm �

3 - Video Blue 0.7 VPP / 75 ohm �

4 - n.c. 5 - Ground Gnd �

6 - Ground Red Gnd �

7 - Ground Green Gnd �8 - Ground Blue Gnd �

9 - +5VDC +5 V �

10 - Ground Sync Gnd �11 - n.c. 12 - DDC_SDA DDC data �

13 - H-sync 0 - 5 V �14 - V-sync 0 - 5 V �

15 - DDC_SCL DDC clock �

Cinch: S/PDIF - OutBk - Coaxial 0.4 - 0.6VPP / 75 ohm ��

Cinch: Audio - OutRd - Audio - R 0.5 VRMS / 10 kohm ��

Wh - Audio - L 0.5 VRMS / 10 kohm ��

EXT3: Cinch: Video YPbPr - In, Audio - InGn - Video Y 1 VPP / 75 ohm ��

Bu - Video Pb 0.7 VPP / 75 ohm ��

Rd - Video Pr 0.7 VPP / 75 ohm ��Rd - Audio - R 0.5 VRMS / 10 kohm ��

Wh - Audio - L 0.5 VRMS / 10 kohm ��

EXT1 & 2: Video RGB - In, CVBS - In/Out, Audio - In/Out

Figure 2-4 SCART connector

1 - Audio R 0.5 VRMS / 1 kohm �

2 - Audio R 0.5 VRMS / 10 kohm �

3 - Audio L 0.5 VRMS / 1 kohm �4 - Ground Audio Gnd �

5 - Ground Blue Gnd �

6 - Audio L 0.5 VRMS / 10 kohm �

7 - Video Blue 0.7 VPP / 75 ohm ��8 - Function Select 0 - 2 V: INT

4.5 - 7 V: EXT 16:99.5 - 12 V: EXT 4:3 �

9 - Ground Green Gnd �

10 - n.c. 11 - Video Green 0.7 VPP / 75 ohm �12 - n.c. 13 - Ground Red Gnd �

14 - Ground P50 Gnd �15 - Video Red 0.7 VPP / 75 ohm �

16 - Status/FBL 0 - 0.4 V: INT1 - 3 V: EXT / 75 ohm �

17 - Ground Video Gnd �

18 - Ground FBL Gnd �

19 - Video CVBS/Y 1 VPP / 75 ohm �20 - Video CVBS 1 VPP / 75 ohm �

21 - Shield Gnd �

Aerial - In- - IEC-type (EU) Coax, 75 ohm �

RJ45: Ethernet (if present)

Figure 2-5 Ethernet connector

1 - TD+ Transmit signal �2 - TD- Transmit signal �

3 - RD+ Receive signal �

4 - CT Centre Tap: DC level fixation5 - CT Centre Tap: DC level fixation 6 - RD- Receive signal �

7 - GND Gnd �8 - GND Gnd �

1 2 3 4

10000_022_090121.eps090121

1

610

11

5

15

10000_002_090121.eps090127

21

20

1

2

10000_001_090121.eps090121

11 2 3 4 5 6 7 8

E_06532_025.eps210905

Page 5: Q549---32pfl9604ser

Technical Specifications and, Connections EN 5Q549.2E LA 2.

2009-May-08

Cinch: Audio - In (VGA/DVI)Rd - Audio R 0.5 VRMS / 10 kohm ��

Wh - Audio L 0.5 VRMS / 10 kohm ��

HDMI 1, 2, 3 & 4: Digital Video, Digital Audio - In

Figure 2-6 HDMI (type A) connector

1 - D2+ Data channel �

2 - Shield Gnd �3 - D2- Data channel �

4 - D1+ Data channel �

5 - Shield Gnd �

6 - D1- Data channel �

7 - D0+ Data channel �8 - Shield Gnd �

9 - D0- Data channel �

10 - CLK+ Data channel �11 - Shield Gnd �

12 - CLK- Data channel �

13 - Easylink/CEC Control channel ��14 - n.c. 15 - DDC_SCL DDC clock �

16 - DDC_SDA DDC data ��17 - Ground Gnd �

18 - +5V �

19 - HPD Hot Plug Detect �20 - Ground Gnd �

2.4 Chassis Overview

Refer to chapter Block Diagrams for PWB/CBA locations.

19 1

18 2

E_06532_017.eps250505

Page 6: Q549---32pfl9604ser

Precautions, Notes, and Abbreviation ListEN 6 Q549.2E LA3.

2009-May-08

3. Precautions, Notes, and Abbreviation List

Index of this chapter:3.1 Safety Instructions3.2 Warnings3.3 Notes3.4 Abbreviation List

3.1 Safety Instructions

Safety regulations require the following during a repair:• Connect the set to the Mains/AC Power via an isolation

transformer (> 800 VA).• Replace safety components, indicated by the symbol ,

only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Of de set ontploft!

Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points: • Route the wire trees correctly and fix them with the

mounted cable clamps.• Check the insulation of the Mains/AC Power lead for

external damage. • Check the strain relief of the Mains/AC Power cord for

proper function.• Check the electrical DC resistance between the Mains/AC

Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply): 1. Unplug the Mains/AC Power cord and connect a wire

between the two pins of the Mains/AC Power plug. 2. Set the Mains/AC Power switch to the “on” position

(keep the Mains/AC Power cord unplugged!). 3. Measure the resistance value between the pins of the

Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 MΩ and 12 MΩ.

4. Switch “off” the set, and remove the wire between the two pins of the Mains/AC Power plug.

• Check the cabinet for defects, to prevent touching of any inner parts by the customer.

3.2 Warnings

• All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD ). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential.

• Be careful during measurements in the high voltage section.

• Never replace modules or other components while the unit is switched “on”.

• When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.

3.3 Notes

3.3.1 General

• Measure the voltages and waveforms with regard to the chassis (= tuner) ground (�), or hot ground (�), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and

picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).

• Where necessary, measure the waveforms and voltages with (�) and without (�) aerial signal. Measure the voltages in the power supply section both in normal operation ( ) and in stand-by (�). These values are indicated by means of the appropriate symbols.

3.3.2 Schematic Notes

• All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kΩ).

• Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).

• All capacitor values are given in micro-farads (μ = × 10-6), nano-farads (n = × 10-9), or pico-farads (p = × 10-12).

• Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).

• An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values.

• The correct component values are listed on the Philips Spare Parts Web Portal.

3.3.3 Spare Parts

For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4 BGA (Ball Grid Array) ICs

IntroductionFor more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com. Select “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.

BGA Temperature ProfilesFor BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.

3.3.5 Lead-free Soldering

Due to lead-free technology some rules have to be respected by the workshop during a repair:• Use only lead-free soldering tin. If lead-free solder paste is

required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.

• Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able:– To reach a solder-tip temperature of at least 400°C.– To stabilize the adjusted temperature at the solder-tip.– To exchange solder-tips for different applications.

• Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat.

• Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

Page 7: Q549---32pfl9604ser

Precautions, Notes, and Abbreviation List EN 7Q549.2E LA 3.

2009-May-08

3.3.6 Alternative BOM identification

It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.

The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number.By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with.If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts!For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.

Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.

Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level.If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

3.3.8 Practical Service Precautions

• It makes sense to avoid exposure to electrical shock. While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.

• Always respect voltages. While some may not be dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

3.4 Abbreviation List

0/6/12 SCART switch control signal on A/V board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format

AARA Automatic Aspect Ratio Adaptation: algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio

ACI Automatic Channel Installation: algorithm that installs TV channels directly from a cable network by means of a predefined TXT page

ADC Analogue to Digital ConverterAFC Automatic Frequency Control: control

signal used to tune to the correct frequency

AGC Automatic Gain Control: algorithm that controls the video input of the feature box

AM Amplitude ModulationAP Asia PacificAR Aspect Ratio: 4 by 3 or 16 by 9ASF Auto Screen Fit: algorithm that adapts

aspect ratio to remove horizontal black bars without discarding video information

ATSC Advanced Television Systems Committee, the digital TV standard in the USA

ATV See Auto TVAuto TV A hardware and software control

system that measures picture content, and adapts image parameters in a dynamic way

AV External Audio VideoAVC Audio Video ControllerAVIP Audio Video Input ProcessorB/G Monochrome TV system. Sound

carrier distance is 5.5 MHzBLR Board-Level RepairBTSC Broadcast Television Standard

Committee. Multiplex FM stereo sound system, originating from the USA and used e.g. in LATAM and AP-NTSC countries

B-TXT Blue TeleteXTC Centre channel (audio)CEC Consumer Electronics Control bus:

remote control bus on HDMI connections

CL Constant Level: audio output to connect with an external amplifier

CLR Component Level RepairComPair Computer aided rePairCP Connected Planet / Copy ProtectionCSM Customer Service ModeCTI Color Transient Improvement:

manipulates steepness of chroma transients

CVBS Composite Video Blanking and Synchronization

DAC Digital to Analogue ConverterDBE Dynamic Bass Enhancement: extra

low frequency amplificationDDC See “E-DDC”D/K Monochrome TV system. Sound

carrier distance is 6.5 MHzDFI Dynamic Frame InsertionDFU Directions For Use: owner's manualDMR Digital Media Reader: card readerDMSD Digital Multi Standard DecodingDNM Digital Natural Motion

10000_024_090121.eps090121

MODEL :

PROD.NO:

~

S

32PF9968/10 MADE IN BELGIUM220-240V 50/60Hz

128WAG 1A0617 000001 VHF+S+H+UHF

BJ3.0E LA

Page 8: Q549---32pfl9604ser

Precautions, Notes, and Abbreviation ListEN 8 Q549.2E LA3.

2009-May-08

DNR Digital Noise Reduction: noise reduction feature of the set

DRAM Dynamic RAMDRM Digital Rights ManagementDSP Digital Signal ProcessingDST Dealer Service Tool: special remote

control designed for service technicians

DTCP Digital Transmission Content Protection; A protocol for protecting digital audio/video content that is traversing a high speed serial bus, such as IEEE-1394

DVB-C Digital Video Broadcast - CableDVB-T Digital Video Broadcast - TerrestrialDVD Digital Versatile DiscDVI(-d) Digital Visual Interface (d= digital only)E-DDC Enhanced Display Data Channel

(VESA standard for communication channel and display). Using E-DDC, the video source can read the EDID information form the display.

EDID Extended Display Identification Data (VESA standard)

EEPROM Electrically Erasable and Programmable Read Only Memory

EMI Electro Magnetic InterferenceEPLD Erasable Programmable Logic DeviceEU EuropeEXT EXTernal (source), entering the set by

SCART or by cinches (jacks)FDS Full Dual Screen (same as FDW)FDW Full Dual Window (same as FDS)FLASH FLASH memoryFM Field Memory or Frequency

ModulationFPGA Field-Programmable Gate ArrayFTV Flat TeleVisionGb/s Giga bits per secondG-TXT Green TeleteXTH H_sync to the module HD High DefinitionHDD Hard Disk DriveHDCP High-bandwidth Digital Content

Protection: A “key” encoded into the HDMI/DVI signal that prevents video data piracy. If a source is HDCP coded and connected via HDMI/DVI without the proper HDCP decoding, the picture is put into a “snow vision” mode or changed to a low resolution. For normal content distribution the source and the display device must be enabled for HDCP “software key” decoding.

HDMI High Definition Multimedia InterfaceHP HeadPhoneI Monochrome TV system. Sound

carrier distance is 6.0 MHzI2C Inter IC busI2D Inter IC Data busI2S Inter IC Sound busIF Intermediate FrequencyIR Infra RedIRQ Interrupt RequestITU-656 The ITU Radio communication Sector

(ITU-R) is a standards body subcommittee of the International Telecommunication Union relating to radio communication. ITU-656 (a.k.a. SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used. The SDI signal is self-synchronizing,

uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz.

ITV Institutional TeleVision; TV sets for hotels, hospitals etc.

LS Last Status; The settings last chosen by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's preferences

LATAM Latin AmericaLCD Liquid Crystal DisplayLED Light Emitting DiodeL/L' Monochrome TV system. Sound

carrier distance is 6.5 MHz. L' is Band I, L is all bands except for Band I

LPL LG.Philips LCD (supplier)LS LoudspeakerLVDS Low Voltage Differential SignallingMbps Mega bits per secondM/N Monochrome TV system. Sound

carrier distance is 4.5 MHzMIPS Microprocessor without Interlocked

Pipeline-Stages; A RISC-based microprocessor

MOP Matrix Output ProcessorMOSFET Metal Oxide Silicon Field Effect

Transistor, switching deviceMPEG Motion Pictures Experts GroupMPIF Multi Platform InterFaceMUTE MUTE LineNC Not ConnectedNICAM Near Instantaneous Compounded

Audio Multiplexing. This is a digital sound system, mainly used in Europe.

NTC Negative Temperature Coefficient, non-linear resistor

NTSC National Television Standard Committee. Color system mainly used in North America and Japan. Color carrier NTSC M/N= 3.579545 MHz, NTSC 4.43= 4.433619 MHz (this is a VCR norm, it is not transmitted off-air)

NVM Non-Volatile Memory: IC containing TV related data such as alignments

O/C Open CircuitOSD On Screen DisplayOTC On screen display Teletext and

Control; also called Artistic (SAA5800)P50 Project 50: communication protocol

between TV and peripheralsPAL Phase Alternating Line. Color system

mainly used in West Europe (color carrier= 4.433619 MHz) and South America (color carrier PAL M= 3.575612 MHz and PAL N= 3.582056 MHz)

PCB Printed Circuit Board (same as “PWB”)PCM Pulse Code ModulationPDP Plasma Display PanelPFC Power Factor Corrector (or Pre-

conditioner)PIP Picture In PicturePLL Phase Locked Loop. Used for e.g.

FST tuning systems. The customer can give directly the desired frequency

POD Point Of Deployment: a removable CAM module, implementing the CA system for a host (e.g. a TV-set)

POR Power On Reset, signal to reset the uPPTC Positive Temperature Coefficient,

non-linear resistorPWB Printed Wiring Board (same as “PCB”)

Page 9: Q549---32pfl9604ser

Precautions, Notes, and Abbreviation List EN 9Q549.2E LA 3.

2009-May-08

PWM Pulse Width ModulationQRC Quasi Resonant ConverterQTNR Quality Temporal Noise ReductionQVCP Quality Video Composition ProcessorRAM Random Access MemoryRGB Red, Green, and Blue. The primary

color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are reproduced.

RC Remote ControlRC5 / RC6 Signal protocol from the remote

control receiver RESET RESET signalROM Read Only MemoryRSDS Reduced Swing Differential Signalling

data interfaceR-TXT Red TeleteXTSAM Service Alignment ModeS/C Short CircuitSCART Syndicat des Constructeurs

d'Appareils Radiorécepteurs et Téléviseurs

SCL Serial Clock I2CSCL-F CLock Signal on Fast I2C busSD Standard DefinitionSDA Serial Data I2CSDA-F DAta Signal on Fast I2C busSDI Serial Digital Interface, see “ITU-656”SDRAM Synchronous DRAMSECAM SEequence Couleur Avec Mémoire.

Color system mainly used in France and East Europe. Color carriers= 4.406250 MHz and 4.250000 MHz

SIF Sound Intermediate FrequencySMPS Switched Mode Power SupplySoC System on ChipSOG Sync On GreenSOPS Self Oscillating Power SupplySPI Serial Peripheral Interface bus; a 4-

wire synchronous serial data link standard

S/PDIF Sony Philips Digital InterFaceSRAM Static RAMSRP Service Reference ProtocolSSB Small Signal BoardSTBY STand-BYSVGA 800 × 600 (4:3)SVHS Super Video Home SystemSW SoftwareSWAN Spatial temporal Weighted Averaging

Noise reductionSXGA 1280 × 1024TFT Thin Film TransistorTHD Total Harmonic DistortionTMDS Transmission Minimized Differential

SignallingTXT TeleteXTTXT-DW Dual Window with TeleteXTUI User InterfaceuP MicroprocessorUXGA 1600 × 1200 (4:3)V V-sync to the module VESA Video Electronics Standards

AssociationVGA 640 × 480 (4:3)VL Variable Level out: processed audio

output toward external amplifierVSB Vestigial Side Band; modulation

methodWYSIWYR What You See Is What You Record:

record selection that follows main picture and sound

WXGA 1280 × 768 (15:9)XTAL Quartz crystalXGA 1024 × 768 (4:3)

Y Luminance signalY/C Luminance (Y) and Chrominance (C)

signalYPbPr Component video. Luminance and

scaled color difference signals (B-Y and R-Y)

YUV Component video

Page 10: Q549---32pfl9604ser

Mechanical InstructionsEN 10 Q549.2E LA4.

2009-May-08

4. Mechanical Instructions

Index of this chapter:4.1 Cable Dressing and Taping4.2 Service Positions4.3 Assy/Panel Removal4.4 Set Re-assembly

Notes: • Figures below can deviate slightly from the actual situation,

due to the different set executions.

4.1 Cable Dressing and Taping

Figure 4-1 Cable dressing 32”

18310_210_090318.eps090318

Page 11: Q549---32pfl9604ser

Mechanical Instructions EN 11Q549.2E LA 4.

2009-May-08

Figure 4-2 Cable dressing 37"

Figure 4-3 Cable dressing 56" (21:9)

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4.2 Service Positions

For easy servicing of this set, there are a few possibilities created:• The buffers from the packaging.• Foam bars (created for Service).

4.2.1 Foam Bars

Figure 4-4 Foam bars

The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See Figure 4-4 for details. Sets with a display of 42" and larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display.Caution: Failure to follow these guidelines can seriously damage the display!By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, you can monitor the screen.

4.3 Assy/Panel Removal

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before you remove the rear cover.Note: it is not necessary to remove the stand while removing the rear cover.

Removing the Piezo Touch Control Panel PWB requires special attention. Refer to Piezo Touch Control Panel for details.

1. Remove all screws of the rear cover.2. Lift the rear cover from the TV. Make sure that wires and

flat coils are not damaged while lifting the rear cover from the set.

4.3.2 Speakers

Each speaker unit is mounted with two screws. A sticker on the the unit indicates if it is the right (“R”) or left (“L”) box, seen from the front side of the set.When defective, replace the whole unit.

4.3.3 Ambi Light

Each Ambi Light unit is mounted on a subframe. Refer to Figure 4-5 for details.

Figure 4-5 Ambi Light unit

1. Remove the Ambi Light cover [1].2. Unplug the connector(s).3. The PWB can now be taken from the subframe.When defective, replace the whole unit.Note: the screws that secure the AmbiLight units are longer than the other screws.

4.3.4 Main Supply Panel

1. Unplug all connectors.2. Remove the fixation screws.3. Take the board out.When defective, replace the whole unit.

4.3.5 IR & LED Board

Refer to Figure 4-6 for details.

Figure 4-6 IR & LED Board

E_06532_018.eps171106

1

Required for sets42"

1

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1

18310_213_090318.eps090319

2

1

2

2

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1. Remove the Main Supply Panel as earlier described.2. Remove the stand [1] and its subframe [2].3. Now you gain access the IR & LED board.When defective, replace the whole unit.

4.3.6 Piezo Touch Control Panel

The flexfoil between Piezo Flexfoil Assy (mounted on the plastic rim of the set), and the PWB as described below, is extremely vulnerable. Do not pull hard at the PWB or flexfoil.Once the flexfoil has been damaged, the entire plastic rim of the set (with the touch-control pads) has to be swapped!

The Piezo Touch Control Panel PWB contains ESD sensitive components, implying that necessary industrial ESD precautions must be taken during removing or remounting.Refer to Figure 4-7, Figure 4-8 and Figure 4-9 for details.

Figure 4-7 Piezo Touch Control Panel -1-

1. Gently pull the bottom side of the PWB out of the cabinet until you can unplug the connector [1].

Figure 4-8 Piezo Touch Control Panel -2-

1. Now gently pull the top side of the PWB out of the cabinet without damaging the flexfoil until you can unplug the connector [2].

Figure 4-9 Piezo Touch Control Panel -3-

1. To unplug the flexfoil connector, first the outer part of the connector has to be moved upwards [3], before this part can be turned sidewards [4] as shown in the picture. Now the flexfoil can be removed from the connector and the PWB can be taken out of the set.

When defective, replace the whole unit.

4.3.7 Small Signal Board (SSB)

Caution: It is mandatory to remount screws at their original position during re-assembly. Failure to do so may result in damaging the SSB.1. Remove the Wi-Fi module that is mounted on the SSB.2. Unplug all connectors.3. Remove the screws that secure the board.4. The SSB can now be taken out of the set.

4.3.8 LCD Panel

Refer to Figure 4-10 and Figure 4-11 for details.1. Remove the Piezo Touch Control Panel PWB as earlier

described.2. Remove the AL covers as earlier described.3. Remove both Main Supply Panel and SSB as earlier

described.4. Remove the subframes of Main Power Supply and SSB [1].5. Remove both AL subframes (with the AL unit still mounted

on it) by unplugging the connector [2] and removing the screws [3].

6. Remove all remaining adhesive tapes and remove all cables from their clamps.

7. Carefully remove the conducting tape [4], it must be re-used during re-assembly!

8. Remove the remaining screws (indicated with an arrow) that hold the plastic rim and remove the rim.

9. Now the LCD Panel can be lifted from the front cabinet. The panel has to be slided downwards once it has been lifted, because the brackets on the top cannot be removed from the cabinet. You will see a conducting foam between metal front and panel, near the location of the Piezo Touch Control Panel.

When mounting a new LCD Panel:1. Check if this conducting foam between panel and metal

front is in place !2. Re-attach the conducting tape between LCD Panel and

metal rim [4] !

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1

18310_216_090318.eps090319

2

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Figure 4-10 LCD Panel -1-

Figure 4-11 LCD Panel -2-

4.3.9 Wi-Fi antenna

Follow the instructions for LCD Panel until “remove plastic rim”. After removal of this rim, you gain access to the Wi-Fi antennas.

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse order.

Notes:• While re-assembling, make sure that all cables are placed

and connected in their original position. • Pay special attention not to damage the EMC foams in the

set. Ensure that EMC foams are mounted correctly.

18310_217_090318.eps090320

141

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3

2

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5. Service Modes, Error Codes, and Fault Finding

Index of this chapter:5.1 Test Points5.2 Service Modes5.3 Stepwise Start-up5.4 Service Tools5.5 Error Codes5.6 The Blinking LED Procedure5.7 Protections5.8 Fault Finding and Repair Tips5.9 Software Upgrading

5.1 Test Points

As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective. Perform measurements under the following conditions:• Service Default Mode.• Video: Colour bar signal.• Audio: 3 kHz left, 1 kHz right.

5.2 Service Modes

Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer. This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis. (see also section “5.4.1 ComPair”).

Note: For the new model range, a new remote control (RC) is used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old “MENU” button is now called “HOME” (or is indicated by a “house” icon).

5.2.1 Service Default Mode (SDM)

Purpose• To create a pre-defined setting, to get the same

measurement results as given in this manual.• To override SW protections detected by stand-by

processor and make the TV start up to the step just before protection (a sort of automatic stepwise start-up). See section “5.3 Stepwise Start-up”.

• To start the blinking LED procedure where only LAYER 2 errors are displayed. (see also section “5.5 Error Codes”).

Specifications

Table 5-1 SDM default settings

• All picture settings at 50% (brightness, colour, contrast).• All sound settings at 50%, except volume at 25%.

• All service-unfriendly modes (if present) are disabled, like: – (Sleep) timer.– Child/parental lock.– Picture mute (blue mute or black mute).– Automatic volume levelling (AVL).– Skip/blank of non-favourite pre-sets.

How to Activate SDM

For this chassis there are two kinds of SDM: an analog SDM and a digital SDM. Tuning will happen according Table 5-1.• Analog SDM: use the standard RC-transmitter and key in

the code “062596”, directly followed by the “MENU” (or HOME) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU”(or HOME) button again.

• Digital SDM: use the standard RC-transmitter and key in the code “062593”, directly followed by the “MENU” (or HOME) button.Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or HOME) button again.

• Analog SDM can also be activated by grounding for a moment the solder pad on the SSB, with the indication “SDM” (see Service mode pad).

Figure 5-1 Service mode pad

After activating this mode, “SDM” will appear in the upper right corner of the screen (when a picture is available).

How to NavigateWhen the “MENU” (or HOME) button is pressed on the RC transmitter, the TV set will toggle between the SDM and the normal user menu.

How to Exit SDMUse one of the following methods:• Switch the set to STAND-BY via the RC-transmitter. • Via a standard customer RC-transmitter: key in “00”-

sequence.

5.2.2 Service Alignment Mode (SAM)

Purpose• To perform (software) alignments.• To change option settings.• To easily identify the used software version.

Region Freq. (MHz)Default system

Europe, AP(PAL/Multi) 475.25 PAL B/G

Europe, AP DVB-T 546.00 PID Video: 0B 06 PID PCR: 0B 06 PID Audio: 0B 07

DVB-T

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• To view operation hours.• To display (or clear) the error code buffer.

How to Activate SAMVia a standard RC transmitter: Key in the code “062596” directly followed by the “INFO” button. After activating SAM with this method a service warning will appear on the screen, continue by pressing the “OK” button on the RC.

Contents of SAM (see also Table 6-4)• Hardware Info.

– A. SW Version. Displays the software version of the main software (example: Q5492-1.2.3.4 = AAAAB_X.Y.W.Z). • AAAA= the chassis name.• B= the SW branch version. This is a sequential

number (this is no longer the region indication, as the software is now multi-region).

• X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always compatible with a lower number).

– B. STBY PROC Version. Displays the software version of the stand-by processor.

– C. Production Code. Displays the production code of the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this.

• Operation Hours. Displays the accumulated total of operation hours (not the stand-by hours). Every time the TV is switched “on/off”, 0.5 hours is added to this number.

• Errors (followed by maximum 10 errors). The most recent error is displayed at the upper left (for an error explanation see section “5.5 Error Codes”).

• Reset Error Buffer. When “cursor right” (or the “OK button) is pressed and then the “OK” button is pressed, the error buffer is reset.

• Alignments. This will activate the “ALIGNMENTS” sub-menu. See Chapter 6. Alignments.

• Dealer Options. Extra features for the dealers.• Options. Extra features for Service. For more info

regarding option codes, 6. Alignments.Note that if the option code numbers are changed, these have to be confirmed with pressing the “OK” button before the options are stored. Otherwise changes will be lost.

• Initialize NVM. The moment the processor recognizes a corrupted NVM, the “initialize NVM” line will be highlighted. Now, two things can be done (dependent of the service instructions at that moment):– Save the content of the NVM via ComPair for

development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this).

– Initialize the NVM.

Note: When the NVM is corrupted, or replaced, there is a high possibility that no picture appears because the display code is not correct. So, before initializing the NVM via the SAM, a picture is necessary and therefore the correct display option has to be entered. Refer to Chapter 6. Alignments for details. To adapt this option, it’s advised to use ComPair (the correct HEX values for the options can be found in Chapter 6. Alignments) or a method via a standard RC (described below).

Changing the display option via a standard RC: Key in the code “062598” directly followed by the “MENU” (or HOME) button and “XXX” (where XXX is the 3 digit decimal display code as mentioned in Table 6-3). Make sure to key in all three digits, also the leading zero’s. If the above action is successful, the front LED will go out as an indication that the RC sequence was correct. After the display option is changed in the NVM, the

TV will go to the Stand-by mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.

Figure 5-2 Location of Display Option Code sticker

• Store - go right. All options and alignments are stored when pressing “cursor right” (or the “OK” button) and then the “OK”-button.

• SW Maintenance.– SW Events. Not useful for Service purposes. In case

of specific software problems, the development department can ask for this info.

– HW Events. Not useful for Service purposes. In case of specific software problems, the development department can ask for this info.

• Operation hours display. Displays the accumulated total of display operation hours. So, this one keeps up the lifetime of the display itself, mainly to compensate the degeneration behaviour.

• Test settings. For development purposes only.• Development file versions. Not useful for Service

purposes, this information is only used by the development department.

• Upload to USB. To upload several settings from the TV to an USB stick, which is connected to the SSB. The items are “Channel list”, “Personal settings”, “Option codes”, “Display-related alignments” and “History list”. First a directory “repair\” has to be created in the root of the USB stick. To upload the settings select each item separately, press “cursor right” (or the “OK” button), confirm with “OK” and wait until “Done” appears. In case the download to the USB stick was not successful “Failure” will appear. In this case, check if the USB stick is connected properly and if the directory “repair” is present in the root of the USB stick. Now the settings are stored onto the USB stick and can be used to download onto another TV or other SSB. Uploading is of course only possible if the software is running and if a picture is available. This method is created to be able to save the customer’s TV settings and to store them into another SSB.

• Download to USB. To download several settings from the USB stick to the TV, same way of working needs to be followed as with uploading. To make sure that the download of the channel list from USB to the TV is executed properly, it is necessary to restart the TV and tune to a valid preset if necessary.Note: The “History list item” can not be downloaded from USB to the TV. This is a “read-only” item. In case of specific problems, the development department can ask for this info.

How to Navigate• In SAM, the menu items can be selected with the

“CURSOR UP/DOWN” key on the RC-transmitter. The selected item will be highlighted. When not all menu items fit on the screen, move the “CURSOR UP/DOWN” key to display the next/previous menu items.

• With the “CURSOR LEFT/RIGHT” keys, it is possible to:– (De) activate the selected menu item.– (De) activate the selected sub menu.

PHILIPSMODEL:32PF9968/10

PROD.SERIAL NO:

AG 1A0620 000001

040

39mm

27m

m

(CTN Sticker)

Display OptionCode

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• With the “OK” key, it is possible to activate the selected action.

How to Exit SAMUse one of the following methods:• Switch the TV set to STAND-BY via the RC-transmitter.• Via a standard RC-transmitter, key in “00” sequence, or

select the “BACK” key.

5.2.3 Customer Service Mode (CSM)

PurposeWhen a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer.The CSM is a read only mode; therefore, modifications in this mode are not possible.When in this chassis CSM is activated, a testpattern will be displayed during 5 seconds (1 second Blue, 1 second Green and 1 second Red, then again 1 second Blue and 1 second Green). This test pattern is generated by the PNX5100. So if this test pattern is shown, it could be determined that the back end video chain (PNX5100, LVDS, and display) of the SSB is working. When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. This info can be handy if no information is displayed.

Also when CSM is activated, the LAYER 1 error is displayed via blinking LED. Only the latest error is displayed. (see also section 5.5 Error Codes).

How to Activate CSMKey in the code “123654” via the standard RC transmitter. Note: Activation of the CSM is only possible if there is no (user) menu on the screen!

How to NavigateBy means of the “CURSOR-DOWN/UP” knob on the RC-transmitter, can be navigated through the menus.

Contents of CSMThe contents are reduced to 3 pages: General, Software versions and Quality items. The group names itself are not shown anywhere in the CSM menu.

General• Set Type. This information is very helpful for a helpdesk/

workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialized after corruption, this set type has to be re-written to NVM. ComPair will foresee in a possibility to do this.

• Production Code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee a in possibility to do this.

• Installed date. Indicates the date of the first installation of the TV. This date is acquired via time extraction.

• Options 1. Gives the option codes of option group 1 as set in SAM (Service Alignment Mode).

• Options 2. Gives the option codes of option group 2 as set in SAM (Service Alignment Mode).

• 12NC SSB. Gives an identification of the SSB as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to

NVM. ComPair will foresee in a possibility to do this. This identification number is the 12nc number of the SSB.

• 12NC display. Shows the 12NC of the display.• 12NC supply. Shows the 12NC of the supply.• 12NC “fan board”. Shows the 12NC of the “fan board”-

module (for sets with LED backlight)• 12NC “LED Dimming Panel”. Shows the 12NC of the

LED dimming Panel (for sets with LED backlight).

Software versions• Current main SW. Displays the built-in main software

version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet.Example: Q5492_1.2.3.4

• Standby SW. Displays the built-in stand-by processor software version. Upgrading this software will be possible via ComPair or via USB (see section 5.9 Software Upgrading).Example: STDBY_88.68.1.2.

• MOP ambient light SW. Displays the MOP ambient light EPLD SW.

• LED Dimming SW. Displays the LED Dimming EPLD SW-version (for sets with LED backlight).

• Local contrast SW. Displays the MOP local contrast SW-version.

Quality items• Signal quality. Poor / average /good• Child lock. Not active / active. This is a combined item for

locks. If any lock (Preset lock, child lock, lock after or parental lock) is active, the item shall show “active”.

• HDMI HDCP key. Indicates if the HDMI keys (or HDCP keys) are valid or not. In case these keys are not valid and the customer wants to make use of the HDMI functionality, the SSB has to be replaced.

• Ethernet MAC address. Displays the MAC address present in the SSB.

• Wireless MAC address. Displays the wireless MAC address to support the Wi-Fi functionality.

• BDS key. Indicates if the “BDS level 1” key is valid or not.• CI slot present. If the common interface module is

detected the result will be “YES” or “NO”.• HDMI input format. The detected input format of the

HDMI.• HDMI audio input stream. The HDMI audio input stream

is displayed: present / not present.• HDMI video input stream. The HDMI video input stream

is displayed: present / not present.

How to Exit CSMPress “MENU” (or HOME) / “Back” key on the RC-transmitter.

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5.3 Stepwise Start-up

When the TV is in a protection state due to an error detected by stand-by software (error blinking is displayed) and SDM is activated via shortcutting the pins on the SSB, the TV starts up until it reaches the situation just before protection. So, this is a kind of automatic stepwise start-up. In combination with the start-up diagrams below, you can see which supplies are present at a certain moment. Important to know is, that if e.g. the 3V3 detection fails and thus error layer 2 = 18 is blinking while the TV is restarted via SDM, the Stand-by Processor will enable the 3V3, but the TV set will not go to protection now. The TV will stay in this situation until it is reset (Mains/AC Power supply interrupted). Caution: in case the start-up in this

mode with a faulty FET 7U08 is done, you can destroy all IC’s supplied by the +3V3, due to overvoltage (12V on 3V3-line). It is recommended to measure first the FET 7U08 or others FET’s on shortcircuit before activating SDM via the service pads.

The abbreviations “SP” and “MP” in the figures stand for:• SP: protection or error detected by the Stand-by

Processor.• MP: protection or error detected by the MIPS Main

Processor.

Figure 5-3 Transition diagram

ActiveSemiSt by

St by

Mains on

Mainsoff

GoToProtection

- WakeUp requested- Acquisition needed

- No data Acquisitionrequired - tact SW pushed- last status is hibernate after mains ON

- St by requested- tact SW pushed

WakeUprequested

Protection

WakeUp requested

(SDM)

GoToProtectionHibernate

- Tact switch Pushed- last status is hibernate after mains ON

Tact switchpushed

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Figure 5-4 “Off” to “Semi Stand-by” flowchart (part 1)

No

EJTAG probe connected ?

No

Yes

Release AVC system resetFeed warm boot script

To I_17660_125b.eps To I_17660_125b.eps

Cold boot?

Yes

No

Set I²C slave address of Standby µP to (A0h)

An EJTAG probe (e.g. WindPower ICE probe) can be connected for Linux Kernel debugging purposes.

This will allow access to NVM and NAND FLASH and can not be done earlier because the FLASH needs to be in Write Protect as long as the supplies are not available.

Detect EJTAG debug probe(pulling pin of the probe interface to ground by inserting EJTAG probe)

Release AVC system resetFeed cold boot script

Release AVC system resetFeed initializing boot scriptdisable alive mechanism

Initialise I/O pins of the st-by µP:- Switch reset-AVC LOW (reset state)- Switch WP-NandFlash LOW (protected)- Switch reset-system LOW (reset state)- Switch reset-5100 LOW (reset state)- Switch reset-Ethernet LOW (reset state)- Switch reset-ST7100 LOW (reset state)- keep reset-NVM high, Audio-reset and Audio-Mute-Up HIGH

Off

Standby Supply starts running.All standby supply voltages become available .

st-by µP resets

Stand by or Protection

Mains is applied

- Switch Audio-Reset high.It is low in the standby mode if the standby

mode lasted longer than 10s.start keyboard scanning, RC detection. Wake up reasons are

off.

If the protection state was left by short circuiting the SDM pins, detection of a protection condition during

startup will stall the startup. Protection conditions in a playing set will be ignored. The protection mode will

not be entered.

Switch LOW the RESET-NVM line to allow access to NVM. (Add a 2ms delay before trying to address the NVM to allow correct NVM initialization , this is not issue in this setup , the delay is automatically

covered by the architectural setup)

Release Reset-PNX5100. PNX5100 will start booting.

Wait 10ms (minimum) to allow the bootscript of the PNX5100 to configure the PCI arbiter

Before PNX8541 boots, the PNX5100 should have set its PCI arbiter (bootscript command). To allow this, approx. 1ms is needed. This 1ms is extended to 10ms to also give some relaxation to the supplies .

Switch HIGH the WP-NandFlash to allow access to NAND Flash

+12V, +/-12Vs, AL and Bolt-on poweris switched on, followed by the +1V2 DCDC converter

Enable the supply fault detection algorithm

No

Yes

Detect-1 I/O line High?

Switch ON Platform and display supply by switching LOW the Standby line.

This enables the +3V3 and +5V converter. As a result, also +5V-tuner, +2V5, +1V8-PNX8541 and +1V8-PNX5100 become available.

yes

Enable the DCDC converter for +3V3 and +5V. (ENABLE-3V3)

Voltage output error: Layer1: 2Layer2: 18

Important remark; the appearance of the +12V will start the +1V2 DCDC converter automatically

No

Yes

Supply-fault I/O High?

The supply-fault line is a combination of the DCDC converters and the audio protection line.

1V2 DCDC or class D error:Layer1: 2Layer2: 19

Enter protection

NoDetect2 high received within 1 second?

Power-OK error: Layer1: 3Layer2: 16

Enter protectionYes

NoSupply-fault I/O High?

3V3 / 5V DCDC or class D error:Layer1: 2Layer2: 11

Enter protection

Wait 50ms

Enter protection

Delay of 50ms needed because of the latency of the detect-1 circuit. This delay is also needed for the PNX5100. The reset of the PNX5100 should only be released 10ms after powering the IC.

Detect2 should be polled on the standard 40ms interval and startup should be continued when detect2 becomes high.

Yes

NoDetect-2 I/O line High?

Disable 3V3, switch standby line high and wait 4 seconds

Added to make the system more robust to power dips during startup. At this point the regular supply fault detection algorithm which normally detects power dips is not up and running yet.

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Figure 5-5 “Off” to “Semi Stand-by” flowchart (part 2)

Yes

MIPS reads the wake up reasonfrom standby µP.

Semi-Standby

initialize tuner , Master IF and channel decoder

Initialize video processing IC 's

Initialize source selection

initialize AutoTV

3-th try?

No

Blink Code as error code

Bootscript readyin 1250 ms?

Yes

No

Enable Alive check mechanism

Wait until AVC starts to communicate

SW initialization succeededwithin 20s?

No

Switch Standby I/O line high.

RPC start (comm. protocol)

Set I²C slave address of Standby µP to (60h)

Yes

Disable all supply related protections and switch off the +3V3 +5V DC/DC converter.

switch off the remaining DC/DC converters

Wait 5ms

Switch AVC PNX8541in reset (active low)

Wait 10ms

Switch the NVM reset line HIGH.

Flash to Ram image transfer succeeded

within 30s?No

Yes

Code =Layer1: 2Layer2: 53

Code = Layer1: 2Layer2: 15

Initialize Ambilight with Lights off .

Timing need to be updated if more mature info is available.

Timing needs to be updated if more mature info is available.

Timing needs to be updated if more mature info is available .

Downloaded successfully?

Download firmware into the channel decoder

Third try? No

No

Yes

Log channel decoder error:Layer1: 2Layer2: 37

Yes

Initialize audio

Enter protection

Release reset MPEG4 module:BOLT-ON-IO: High

MPEG4 module will start booting autonomously.

Wait 3000 ms

Start alive IIC polling mechanism

POR polling positive ?

yes

No Log SW event: STi7100PorFailure

Wait 200 ms

POR polling positive ?yes

No

bootSTi7100PorFailure:Log HW error

Layer1: 2Layer2: 38

and generate cold boot

Alive polling

Log SW event STi7100AliveFailedError

and generate fast cold reboot eventually followed by a cold

reboot.

NOK

Reset-system is switched HIGH by the AVC at the end of the bootscript

AVC releases Reset-Ethernet when the end of the AVC boot-script is detectedThis cannot be done through the bootscript,

the I/O is on the standby µP

Reset-system is connected to USB

From I_17660_125a.eps From I_17660_125a.eps

-reset, 4to1HDMI Mux and channel decoder.

Reset-Audio and Audio-Mute-Up are switched by MIPS code later on in the

startup process

Reset-system is switched HIGH by the AVC at the end of the bootscript

AVC releases Reset-Ethernet when the end of the AVC boot-script is detected

Reset-Audio and Audio-Mute-Up are switched by MIPS code later on in the

startup process

Switch on the display in case of a LED backlight display by sending the TurnOnDisplay(1) (I²C)

command to the PNX5100

In case of a LED backlight display , a LED DIM panel is present which is fed by the Vdisplay. To power the LED DIM Panel, the Vdisplay switch driven by the PNX5100 must be closed. The display startup sequence is taken care of by the LED DIM panel.

I_17660_125b.eps140308

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Figure 5-6 “Semi Stand-by” to “Active” flowchart

Active

Semi Standby

action holder: AVC

autonomous action

action holder: St-by

Initialize audio and video processing IC's and functions according needed use case.

Assert RGB video blanking and audio mute

Wait until previous on-state is left more than 2 seconds ago. (to prevent LCD display problems)

The assumption here is that a fast toggle (<2s) can only happen during ON-> SEMI ->ON. In these states, the AVC is still active and can

provide the 2s delay. If the transition ON-> SEMI->STBY->SEMI -> ON can be made in less than 2s,

the semi -> stby transition has to be delayed until the requirement is met.

Switch Audio-Reset low and wait 5ms

Constraints taken into account:- Display may only be started when valid LVDS output clock can be delivered by the AVC .- Between 5 and 50 ms after power is supplied, display should receive valid lvds clock .- minimum wait time to switch on the lamp after power up is 200ms.

unblank the video.

Wait until valid and stable audio and video , corresponding to the requested output is delivered by the AVC.

The higher level requirement is that audio and video should be demuted without transient

effects and that the audio should be demuted maximum 1s before or at the same time as the

unblanking of the video.

Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)

CPipe already generates a valid output clock in the semi -standby state: display

startup can start immediately when leaving the semi-standby state.

wait 250ms (min. = 200ms)

Switch on LCD backlight(Lamp-ON)

Switch on the display by sending the TurnOnDisplay(1) (I²C) command to the PNX5100

The timings to be used in combination with the PanelON

command for this specific display

Switch on the Ambilight functionality according the last status settings.

The higher level requirement is that the ambilight functionality may not be switched on before the backlight is turned on in case the

set contains a CE IPB inverter supply.

I_17660_126.eps140308

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Figure 5-7 “Semi Stand-by” to “Active” flowchart LCD with preheat

Active

Semi Standby

action holder: AVC

autonomous action

action holder: St-by

Initialize audio and video processing IC's and functions according needed use case.

Assert RGB video blanking and audio mute

Wait until previous on-state is left more than 2 seconds ago. (to prevent LCD display problems)

The assumption here is that a fast toggle (<2s) can only happen during ON->SEMI ->ON. In

these states, the AVC is still active and can provide the 2s delay. If the transition ON -> SEMI-

->STBY -> SEMI -> ON can be made in less than 2s, the semi -> stby transition has to be delayed

until the requirement is met.

Switch Audio-Reset low and wait 5ms

Constraints taken into account:- Display may only be started when valid LVDS output clock can be delivered by the AVC .- Between 5 and 50 ms after power is supplied, display should receive valid lvds clock .- minimum wait time to switch on the lamp after power up is 200ms.- To have a reliable operation of the backlight, the backlight should be driven with a PWM duty cycle of 100% during the first second. Only after this first one or two seconds, the PWM may be set to the required output level (Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts, the picture should only be unblanked after these first seconds.

Restore dimming backlight feature, PWM and BOOST output and unblank the video.

Wait until valid and stable audio and video , corresponding to the requested output is delivered by the AVC

AND[the backlight PWM has been on for 1s (internal inverter LPL displays

OR the backlight PWM has been on for 2s (external inverter LPL displays)] .

The higher level requirement is that audio and video should be demuted without transient

effects and that the audio should be demuted maximum 1s before or at the same time as the

unblanking of the video.

Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)

CPipe already generates a valid output clock in the semi -standby state: display

startup can start immediately when leaving the semi-standby state.

wait 250ms (min. = 200ms)

Switch on LCD backlight(Lamp-ON)

Switch off the dimming backlight feature, set the BOOST control to nominal and make sure

PWM output is set to 100%

Switch on the display by sending the TurnOnDisplay(1) (I²C) command to the PNX5100

Switch on the Ambilight functionality according the last status settings.

The higher level requirement is that the ambilight functionality may not be switched on before the backlight is turned on in case the

set contains a CE IPB inverter supply.

I_17660_127.eps140308

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Figure 5-8 “Semi Stand-by” to “Active” flowchart (LED backlight)

Active

Semi Standby

action holder: AVC

autonomous action

action holder : St-by

Initialize audio and video processing IC's and functions according needed use case.

Assert RGB video blanking and audio mute

Wait until previous on-state is left more than 2 seconds ago. (to prevent LCD display problems)

The assumption here is that a fast toggle (<2s) can only happen during ON -> SEMI -> ON. In

these states, the AVC is still active and can provide the 2s delay. If the transition ON -> SEMI-

>STBY->SEMI->ON can be made in less than 2s, the semi -> stby transition has to be delayed

until the requirement is met.

Switch Audio-Reset low and wait 5ms

Constraints taken into account:- Display may only be started when valid LVDS output clock can be delivered by the AVC .- Between 5 and 50 ms after power is supplied, display should receive valid lvds clock .- minimum wait time to switch on the lamp after power up is 200ms.

unblank the video.

Wait until valid and stable audio and video , corresponding to the requested output is delivered by the AVC.

The higher level requirement is that audio and video should be demuted without transient

effects and that the audio should be demuted maximum 1s before or at the same time as the

unblanking of the video.

Release audio mute and wait 100ms before any other audio handling is done (e.g. volume change)

CPipe already generates a valid output clock in the semi -standby state: display

startup can start immediately when leaving the semi-standby state.

wait 250ms (min. = 200ms)TBC in def. spec

Switch on LCD backlight(Lamp-ON)

Switch on the display by sending the OUTPUT-ENABLE (I²C) command to the LED DIM panel

Switch on the Ambilight functionality according the last status settings.

The higher level requirement is that the ambilight functionality may not be switched on before the backlight is turned on in case the

set contains a CE IPB inverter supply.

I_17660_128.eps140308

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Figure 5-9 “Active” to “Semi Stand-by” flowchart (LCD non DFI)

Semi Standby

Active action holder: AVC

autonomous action

action holder: St-by

Wait 250ms (min. = 200ms)

Mute all sound outputs via softmute

Mute all video outputs

switch off LCD backlight

Force ext audio outputs to ground (I/O: audio reset)

And wait 5ms

Switch off the display by sending the TurnOnDisplay(0) (I²C) command to the PNX5100

switch off Ambilight

Set main amplifier mute (I/O: audio-mute)

Wait 100ms

Wait until Ambilight has faded out (fixed wait time of x s)

The higher level requirement is that the backlight may not be switched off before the

ambilight functionality is turned off in case the set contains a CE IPB inverter supply.

I_17660_129.eps140308

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Figure 5-10 “Semi Stand-by” to “Stand-by” flowchart

transfer Wake up reasons to the Stand by µP.

Stand by

Semi Stand byaction holder: MIPS

autonomous action

action holder: St-by

Disable all supply related protections and switch off the DC/DC converters (ENABLE-3V3)

Switch OFF all supplies by switching HIGH the Standby I/O line

Switch AVC system in reset stateSwitch reset-PNX5100 LOWSwitch reset-ST7100 LOW

Switch Reset-Ethernet LOW

Important remark:release reset audio 10 sec after entering standby to save power

Wait 5ms

Wait 10ms

Switch the NVM reset line HIGHSwitch het WP-Nandflash LOW

Delay transition until ramping down of ambient light is finished. *)

If ambientlight functionality was used in semi -standby (lampadaire mode), switch off ambient light

*) If this is not performed and the set is switched to standby when the switch off of the ambilights is still ongoing , the lights will switch off abruptly when the supply is cut.

Switch Memories to self-refresh (this creates a more stable condition when switching off the power).

I_17660_130.eps140308

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Figure 5-11 “To Protection State” flowchart

Protection

action holder: MIPS

autonomous action

action holder: St-by

Redefine wake up reasons for protection state and transfer to stand-by µP.

Log the appropriate error andset stand-by flag in NVM

MP

Ask stand-by µP to enter protection state

Flash the Protection-LED in order to indicate protection state* (*): This can be the standby LED or the ON LED

depending on the availability in the set

SP

Switch off LCD lamp supply

Wait 250ms (min. = 200ms)

Switch off LVDS signal

Switch off 12V LCD supply within a time frame of min. 0.5ms to max. 50ms after LVDS switch off.

If needed to speed up this transition, this block could be omitted . This is depending on the outcome of the

safety investigations .

Disable all supply related protections and switch off the +1V8 and the +3V3 DC/DC converter.

Switch OFF all supplies by switching HIGH theStandby I/O line.

Switch AVC in reset state

Wait 5ms

Wait 10ms

Switch the NVM reset line HIGH.

I_17660_131.eps140308

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5.4 Service Tools

5.4.1 ComPair

IntroductionComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following:1. ComPair helps to quickly get an understanding on how to

repair the chassis in a short and effective way.2. ComPair allows very detailed diagnostics and is therefore

capable of accurately indicating problem areas. No knowledge on I2C or UART commands is necessary, because ComPair takes care of this.

3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available.

4. ComPair features TV software up possibilities.

SpecificationsComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s).The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.

How to ConnectThis is described in the chassis fault finding database in ComPair.

Figure 5-12 ComPair II interface connection

Caution: It is compulsory to connect the TV to the PC as shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown!

How to OrderComPair II order codes:• ComPair II interface: 3122 785 91020.• Software is available via the Philips Service web portal.• ComPair UART interface cable for Q54x.x.

(using 3.5 mm Mini Jack connector): 3138 188 75051. Note: While encounting problems, contact the local support desk.

5.4.2 Memory and Audio Test

With this tool you can test the memory of the PNX8543, as well if the PNX5100 is enabled and audio-testing.

What is needed?– An USB-stick– “TESTSCRIPT Q549”. Downloadable from the Philips

Service website from the section “Software for Service only”

– A ComPair/service cable (3138 188 75051).

ProcedureCreate a directory “JETTFILES” under the root of the USB-stick– Place “MemTestTV543.bin” and “autojett.bin” (available in

“TESTSCRIPT Q549”) under the directory “JETTFILES”– Install the computer program “BOARDTESTLOGGER”

(available in “TESTSCRIPT Q549”) on the PC– Connect a “ComPair/service”-cable from the service-

connector in the set, into the “multi function” jack at the front of the ComPair II box : Required settings in ComPair :- start up the ComPair application.- Select the correct database (open file “Q549.2E LA”, this will set the ComPair interface in the appropriate mode).- Close ComPair

– Start up the program “BOARDTESTLOGGER” and select “COMx”

– Put the USB stick into the TV and start up the TV while pressing the “i+”-button on a Philips DVD RC6 remote control (it’s also possible to use a TV remote in “DVD”-mode)

– On the PC the memory test is shown now. This is also visible on the TV screen.

– In “BOARDTESTLOGGER” an option “Send extra UART command” can be found where you can select “AUD1”. This command generates hear test tones of 200, 400, 1000, 2000, 3000, 5000, 8000 and 12500Hz.

5.5 Error Codes

5.5.1 Introduction

The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained).To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them. New in this chassis is the way errors can be displayed: • There is a simple blinking LED procedure for board level

repair (home repair) so called LAYER 1 errors next to the existing errors which are LAYER 2 errors (see Table 5-2).– LAYER 1 errors are one digit errors.– LAYER 2 errors are 2 digit errors.

• In protection mode.– From consumer mode: LAYER 1.– From SDM mode: LAYER 2.

• Fatal errors, if I2C bus is blocked and the set reboots, CSM and SAM are not selectable.– From consumer mode: LAYER 1.– From SDM mode: LAYER 2.

Important remark:

E_06532_036.eps150208

TOUART SERVICECONNECTOR

TOUART SERVICECONNECTOR

TOI2C SERVICECONNECTOR

TO TV

PC

HDMII2C only

Optional power5V DC

ComPair II Developed by Philips Brugge

RC outRC in

OptionalSwitch

Power ModeLink/Activity I2C

ComPair IIMulti

function

RS232 /UART

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For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths (SDM) at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.

• In CSM mode– When entering CSM: error LAYER 1 will be displayed

by blinking LED. Only the latest error is shown.• In SDM mode

– When SDM is entered via Remote Control code or the hardware pins, LAYER 2 is displayed via blinking LED.

• In the ON state– In “Display error mode”, set with the RC commands

“mute_06250X _OK” LAYER 2 errors are displayed via blinking LED.

• Error display on screen.– In CSM no error codes are displayed on screen.– In SAM the complete error list is shown.

Basically there are three kinds of errors:• Errors detected by the Stand-by software which lead to

protection. These errors will always lead to protection and an automatic start of the blinking LED LAYER 1 error.(see section “5.6 The Blinking LED Procedure”).

• Errors detected by the Stand-by software which not lead to protection. In this case the front LED should blink the involved error. See also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra Info”. Note that it can take up several minutes before the TV starts blinking the error (e.g. LAYER 1 error = 2, LAYER 2 error = 15 or 53).

• Errors detected by main software (MIPS). In this case the error will be logged into the error buffer and can be read out via ComPair, via blinking LED method LAYER 1-2 error, or in case picture is visible, via SAM.

5.5.2 How to Read the Error Buffer

Use one of the following methods:• On screen via the SAM (only when a picture is visible).

E.g.:– 00 00 00 00 00: No errors detected– 23 00 00 00 00: Error code 23 is the last and only

detected error.– 37 23 00 00 00: Error code 23 was first detected and

error code 37 is the last detected error.– Note that no protection errors can be logged in the

error buffer.• Via the blinking LED procedure. See section 5.5.3 How to

Clear the Error Buffer.• Via ComPair.

5.5.3 How to Clear the Error Buffer

Use one of the following methods:• By activation of the “RESET ERROR BUFFER” command

in the SAM menu.• With a normal RC, key in sequence “MUTE” followed by

“062599” and “OK”.• If the content of the error buffer has not changed for 50+

hours, it resets automatically.

5.5.4 Error Buffer

In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the content, as this history can give significant information). This to ensure that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g. a fault in the protection detection circuitry can also lead to a protection). There are several mechanisms of error detection:• Via error bits in the status registers of ICs.

• Via polling on I/O pins going to the stand-by processor.• Via sensing of analog values on the stand-by processor or

the PNX8543.• Via a “not acknowledge” of an I2C communication.

Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.

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Table 5-2 Error code overview

Extra Info• Rebooting. When a TV is constantly rebooting due to

internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section “5.8 Fault Finding and Repair Tips, 5.8.6 Logging). It’s shown that the loggings which are generated by the main software keep continuing. In this case diagnose has to be done via ComPair.

• Error 13 (I2C bus 3 blocked). At the time of release of this manual, this error was not working as expected. Current situation: when this error occurs, the TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair.

• Error 15 (PNX8543,PNX5100 doesn’t boot). Indicates that the main processor/PNX5100 was not able to read his bootscript. This error will point to a hardware problem around the PNX8543 (supplies not OK, PNX 8543 completely dead, I2C link between PNX and Stand-by Processor broken, etc...). When error 15 occurs it is also possible that I2C1 bus is blocked (NVM). I2C1 can be indicated in the schematics as follows: SCL-UP-MIPS, SDA-UP-MIPS, SCL-1, SDA-1, SCL-2 or SDA-2.Other root causes for this error can be due to hardware problems from the NVM PNX5100, DDR’s and the bootscript reading from the PNX5100.

• Error 16 (12V). This voltage is made in the power supplyand results in protection (LAYER 1 error = 3) in case of absence. When SDM is activated we see blinking LED LAYER 2 error = 16.

• Error 17 (Invertor or Display Supply). Here the status of the “Power OK” is checked by software, no protection will occur during failure of the invertor or display supply (no picture), only error logging. LED blinking of LAYER 1 error = 3 in CSM, in SDM this gives LAYER 2 error = 17.

• Error 18 (1V2-3V3-5V too low). All these supplies are generated by the DC/DC supply on the SSB. If one of these supplies is too low, protection occurs and blinking LED LAYER 1 error = 2 will be displayed automatically. In SDM this gives LAYER 2 error = 18.

• Error 21 (PNX 5100). When there is no I2C communication towards the PNX5100, the TV set will start rebooting and display LAYER 1 error = 2. Disconnect the mains cord now and start up the TV set with the solder path (SDM) short to ground during start-up to activate the LAYER 2 error blinking. Error “21” will be logged and displayed via the blinking LED procedure after a few moments from start-up. Remark : the rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section “5.8 Fault Finding and Repair Tips, 5.8.6 Logging”). It is shown that the loggings which are generated by the main software keep continuing. Check in the logging for keywords like e.g. “Device error 21”.

• Error 23 (HDMI). When there is no I2C communication towards the HDMI mux after start-up, LAYER 2 error = 23 will be logged and displayed via the blinking LED procedure if SDM is switched on. It should be noted that in case a new spare EDID MUX device is used for repair, the initial default address must be changed from “C0” to “CE”, to be done via ComPair.

• Error 24 (I2C switch). When there is no I2C communication towards the I2C switch, LAYER 2 error = 24 will be logged and displayed via the blinking LED procedure when SDM is switched on. Remark : this only works for TV sets with an I2C controlled screen included.

• Error 25 (Boot-NVM PNX5100). Same behaviour as described in “Error 21 (PNX5100)”.

• Error 27 (Micronas IF). When there is no I2C communication towards the multi standard demodulator, LAYER 2 error = 27 will be logged and displayed via the blinking LED procedure if SDM is switched on.

• Error 28 (ARM ambilight). When there is no I2C communication towards the ARM processor, LAYER 2 error = 28 will be logged and displayed via the blinking LED procedure if SDM is switched on.

• Error 29 (FPGA local contrast). When there is no I2C communication towards this FPGA, LAYER 2 error = 29 will be logged and displayed via the blinking LED procedure if SDM is activated.

• Error 34 (Tuner). When there is no I2C communication towards the tuner after start-up, LAYER 2 error = 34 will be

Description Layer 1 Layer 2Monitoredby

Error/Prot

Error Buffer/Blinking LED Device Defective Board

I2C3 2 13 MIPS E BL / EB SSB SSB

I2C2 2 14 MIPS E BL / EB SSB/Display SSB/display

PNX doesn’t boot (HW cause) PNX 5100 doesn’t boot

2 15 Stby µP P BL PNX8543/PNX51XX I2C blocked

SSB

12V 3 16 Stby µP P BL / Supply

Inverter or display supply 3 17 MIPS E EB /

1V2, 3V3, 5V to low 2 18 Stby µP P BL / SSB

Temp protection 3 12 MIPS E EB / Display

PNX 5100 2 21 MIPS E EB PNX5100 SSB

HDMI mux 2 23 MIPS E EB TDA9996 SSB

I2C switch 2 24 MIPS E EB PCA9540 SSB

Boot-NVM PNX5100 2 25 MIPS E EB STM24C08 SSB

Multi Standard demodulator (Micronas IF)

2 27 MIPS E EB DRX3616K DRX3626K

SSB

ARM (ambilight) 8 28 MIPS E EB NXP LPC2103 AL module or DC/DC

FPGA (Local contrast) 2 29 MIPS E EB Altera SSB

Tuner 2 34 MIPS E EB UV1783S/HD1816 SSB

Fan I2C expander 7 41 MIPS E EB PCA9533 FAN module

T° sensor 7 42 MIPS E EB LM 75 T° sensor

FAN 1 7 43 MIPS E EB FAN

FAN 2 7 44 MIPS E EB FAN

Main NVM 2 / MIPS E X STM24C128 SSB

PNX doesn’t boot (SW cause) 2 53 Stby µP E BL PNX8543 SSB

Display (only 56PFL9954H) 5 64 MIPS E BL / EB Altera Display

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logged and displayed via the blinking LED procedure when SDM is switched on.

• Error 42 (Temp sensor). Only applicable for TV sets with an I2C controlled screen.

• Main NVM. When there is no I2C communication towards the main NVM, LAYER 1 error = 2 will be displayed via the blinking LED procedure. In SDM, LAYER 2 error will be blinked as “15”. Errors here can not be logged due to inaccessibility of the NVM device.

• Error 53. This error will indicate that the PNX8543 has read his bootscript (when this would have failed, error 15 would blink) but initialization was never completed because of hardware problems (NAND flash, ...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take a few minutes before the TV starts blinking LAYER 1 error = 2 or in SDM, LAYER 2 error = 53.

• Error 64. Only applicable for TV sets with an I2C controlled screen .

5.6 The Blinking LED Procedure

5.6.1 Introduction

The blinking LED procedure can be split up into two situations:• Blinking LED procedure LAYER 1 error. In this case the

error is automatically blinked when the TV is put in CSM. This will be only one digit error, namely the one that is referring to the defective board (see table “5-2 Error code overview”) which causes the failure of the TV. This approach will especially be used for home repair and call centres. The aim here is to have service diagnosis from a distance.

• Blinking LED procedure LAYER 2 error. Via this procedure, the contents of the error buffer can be made visible via the front LED. In this case the error contains 2 digits (see table “5-2 Error code overview”) and will be displayed when SDM (hardware pins) is activated. This is especially useful for fault finding and gives more details regarding the failure of the defective board.

Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.

When one of the blinking LED procedures is activated, the front LED will show (blink) the contents of the error buffer. Error codes greater then 10 are shown as follows:1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit2. A pause of 1.5 s3. “n” short blinks (where “n”= 1 to 9)4. A pause of approximately 3 s,5. When all the error codes are displayed, the sequence

finishes with a LED blink of 3 s6. The sequence starts again. Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show: 1. One long blink of 750 ms (which is an indication of the

decimal digit) followed by a pause of 1.5 s2. Two short blinks of 250 ms followed by a pause of 3 s3. Eight short blinks followed by a pause of 3 s4. Six short blinks followed by a pause of 3 s5. One long blink of 3 s to finish the sequence6. The sequence starts again.

5.6.2 How to Activate

Use one of the following methods:

• Activate the CSM. The blinking front LED will show only the latest layer 1 error, this works in “normal operation” mode or automatically when the error/protection is monitored by the standby processor.In case no picture is shown and there is no LED blinking, read the logging to detect whether “error devices” are mentioned. (see section “5.8 Fault Finding and Repair Tips, 5.8.6 Logging”).

• Activate the SDM. The blinking front LED will show the entire content of the LAYER 2 error buffer, this works in “normal operation” mode or when SDM (via hardware pins) is activated when the tv set is in protection.Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.

• Transmit the commands “MUTE” - “062500” - “OK” with a normal RC. The complete error buffer is shown. Take notice that it takes some seconds before the blinking LED starts.

• Transmit the commands “MUTE” - “06250x” - “OK” with a normal RC (where “x” is a number between 1 and 5). When x = 1 the last detected error is shown, x = 2 the second last error, etc.... Take notice that it takes some seconds before the blinking LED starts.

5.7 Protections

5.7.1 Software Protections

Most of the protections and errors use either the stand-by microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections.There are several types of software related protections, solving a variety of fault conditions:• Protections related to supplies: check of the 12V, +5V,

+3V3 and 1V2.• Protections related to breakdown of the safety check

mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more.

Remark on the Supply ErrorsThe detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection.

Protections during Start-upDuring TV start-up, some voltages and IC observers are actively monitored to be able to optimise the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start-up, they are described in the start-up flow in detail (see section “5.3 Stepwise Start-up”).

5.7.2 Hardware Protections

The only real hardware protection in this chassis appears in case of an audio problem e.g. DC voltage on the speakers. This protection will only affect the Class D (7D10) and puts the amplifier in a continuous burst mode (cyclus approximately 2 seconds).

Repair Tip• There will be still picture available but no sound. While the

Class D amplifier tries to start-up again, the cone of the

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loudspeakers will move slowly in one or the other direction until the initial failure shuts the amplifier down, this cyclus starts over and over again.

5.7.3 Important remark regarding the blinking LED indication

As for the blinking LED indication, the blinking led of LAYER 1 error displaying can be switched off by pushing the power button on the keyboard.This condition is not valid after the set was unpowered (via mains interruption). The blinking LED starts again and can only be switched off by unplugging the mains connection.This can be explained by the fact that the MIPS can not load the keyboard functionality from software during the start-up and doesn’t recognizes the keyboard commands at this time.

5.8 Fault Finding and Repair Tips

Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra Info”.

5.8.1 Ambilight

Due to degeneration process of the AmbiLights, there can be a difference in the colour and/or light output of the spare ambilight module in comparison with the originals ones contained in the TV set. Via ComPair the light output can be adjusted.

5.8.2 Audio Amplifier

The Class D-IC 7D10 has a powerpad for cooling. When the IC is replaced it must be ensured that the powerpad is very well pushed to the PWB while the solder is still liquid. This is needed to insure that the cooling is guaranteed, otherwise the Class D-IC could break down in short time.

5.8.3 CSM

When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. If this mechanism works it can be concluded that a large part of the operating system is already working (MIPS, USB...)

5.8.4 DC/DC Converter

Description The onboard supply consists of 5 DC/DC converters and 4 linear stabilizers. All DC/DC converters have +12V input voltage and deliver :

• +1V2-PNX85XX supply voltage (1.24V nominal), stabilized close to PNX8543 chip.

• +1V2-PNX5120 supply voltage (1.26V nominal), stabilized close to PNX5120 chip.

• +3V3 (3.34V nominal, overall 3.3 V for onboard IC’s).• +5V (5.15V nominal) for USB and Conditional Access

Interface and +5V5-TUN for +5V-TUN tuner stabilizer.• +33VTUN (34V nominal) for analog-only tuners. The linear stabilizers are providing:

• +1V2-STANDBY (out of +3V3-STANDBY), 1.24V nominal.• +1V8-PNX85XX and +1V8PNX5100 (connected via

CFH1), 1.84V nominal.• +2V5 (WOW FPGA diversity only), 2.5V nominal.• +5V-TUN (out of +5V5-TUN), 5V nominal. +3V3-STANDY and +1V2-STANDBY are permanent voltages. Supply voltages +1V2-PNX85XX and +1V2-PNX5100 are

started immediately when +12V incoming voltage is available (+12V is enabled by STANDBY signal, active low). Supply voltages +3V3, 2V5, +1V8-PNX5100, +1V8-PNX85XX, +5V and +5V-TUN are switched-on directly by signal ENABLE-3V3 (active low), provided that +12V (detected via 7U40 &7U41) is available. +12V is considered OK (=> DETECT -12V signal becomes high and 12V/3V3 and 12V/5V DC-DC converter can be started up) if it rises above 10V5 (typical) and doesn’t drop below 10V (typical).

DebuggingThe best way to find a failure in the DC/DC converters is to check their start-up sequence at power-on via the mains cord, presuming that the standby microprocessor and the external supply are operational. Take STANDBY signal high-to-low transition as time reference.When +12V becomes available (maximum 1 second after STANDBY signal goes low) then +1V2-PNX85XX and +1V2-PNX5100 are started immediately. Then, after ENABLE-3V3 goes low, all the other supply voltages should rise within 2ms.

Tips• When an output supply voltage is short-circuited to GND

the corresponding DC-DC converter is not making any audible noise, the converter switches-off immediately and will attempt a re-start only after +12V drops and rises again.

• Check the integrity (at least no short-circuit between drain and source) of power MOS-FETs, especially the high-side ones: 7U05, 7U08, 7U0D-1 and 7U0H-1 before starting the platform in SDM mode, otherwise it can be easily damaged.

• Switching frequency of DC-DC converters should be around 290KHz for 12V to 1V2 DC-DC converters and around 370KHz for 12V to 3V3 and 12V to 5V DC-DC converters.

5.8.5 Exit “Factory Mode”

When an “F” is displayed in the screen’s right corner, this means the set is in “Factory” mode, and it normallyhappens after a new SSB is mounted. To exit this mode, push the “VOLUME minus” button on the TV’s local keyboard for 10 seconds (this disables the continuous mode).Then push the “SOURCE” button for 10 seconds until the “F” disappears from the screen.

5.8.6 Logging

When something is wrong with the TV set (f.i.the set is rebooting) you can check for more information via the logging in Hyperterminal. The Hyperterminal is available in every Windows application via Programs, Accessories, Communications, Hyperterminal. Connect a “ComPair UART”-cable (3138 188 75051) from the service connector in the TV to the “multi function” jack at the front of ComPair II box.Required settings in ComPair before starting to log :- Start up the ComPair application.- Select the correct database (open file “Q549.2E LA”, this will set the ComPair interface in the appropriate mode).- Close ComPairAfter start-up of the Hyperterminal, fill in a name (f.i. “logging”) in the “Connection Description” box, then apply the following settings: 1. COMx2. Bits per second = 1152003. Data bits = 84. Parity = none5. Stop bits = 16. Flow control = noneDuring the start-up of the TV set, the logging will be displayed. This is also the case during rebooting of the TV set (the same logging appears time after time). Also available in the logging is the “Display Option Code” (useful when there is no picture),

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look for item “DisplayRawNumber” in the beginning of the logging. Tip: when there is no picture available during rebooting you are able to check for “error devices” in the logging (LAYER 2 error) which can be very helpful to determine the failure cause of the reboot. For protection state, there is no logging.

5.8.7 Loudspeakers

Make sure that the volume is set to minimum during disconnecting the speakers in the ON-state of the TV. The audio amplifier can be damaged by disconnecting the speakers during ON-state of the set!

5.8.8 IPB

In case of no picture when CSM-test pattern from PNX5100 is activated and backlight doesn’t light up, it’s recommended first to check the inverter on the IPB + wiring (LAYER 2 error = 17 is displayed in SDM).

5.8.9 Tuner

Attention: In case the tuner is replaced, always check the tuner options!

5.8.10 PCI bus

The splash screen image is not distributed via the regular YUV signal path from the PNX8543 to the PNX51XX, but loaded one time via the PCI bus.Once the splash screen image is loaded into the PNX51XX, it will be continuously generated by the PNX51XX until the first incoming video disables the splash screen.So when teletext and/or general UI is available, but no splash screen (option “ON”) is visible during start-up, check the PCI bus as possible root cause.

5.8.11 Display option code

Attention: In case the SSB is replaced, always check the display option code in SAM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions.

5.8.12 Upgrade HDMI EDID NVM

The EDID MUX device (including all HDMI NVM except the 4th) is upgradeable via USB, see ComPair for further instructions. It should be noted that in case a new spare EDID MUX device is used for repair, the initial default address must be changed from “C0” to “CE”, to be done via ComPair.

5.8.13 Upgrade VGA/4th HDMI EDID NVM

The EDID for VGA connector or the 4th HDMI can only be upgraded via external I2C. To upgrade the EDID for the VGA connector or 4th HDMI, pin 7 of the EDID NVM has to be short circuited to ground. Therefore a test point is foreseen (see Figure 5-13). For the VGA EDID NVM it’s most suitable to connect pin 7 to ground on the NVM device itself. See ComPair for further instructions.

Figure 5-13 4th HDMI EDID NVM pin

5.8.14 Wi-Fi module

To prevent damage on the coax wires, especially the female core of the coax wires (can be bend over during dis- and reconnecting), this should be carried out by use of pliers.

18310_220_090318.eps090319

EDID4

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5.8.15 SSB Replacement

Follow the instructions in the flowchart in case a SSB has to be exchanged. See figure “SSB replacement flowchart”.

Figure 5-14 SSB replacement flowchart

START

Create “repair” directory on USB stick andconnect USB stick to TV-set

Go to SAM mode (062596 i+) andsave the TV settings via “Upload to USB”.

Set is stilloperating?

- Replace SSB board by a Service SSB.- Make the SSB fit mechanically to the set.

Go to SAM mode, and reload settingsvia “Download from USB”.

Saved settingson USB stick?

Program “Display Option” code via 062598MENU/HOME, followed by 3 digits code (thiscode can be found on a sticker inside the set).

Check and perform alignments in SAMaccording to the Service Manual.

E.g. option codes, colour temperature...

Connect PC via ComPair interface to Serviceconnector.

END

Yes

After entering “Display Option” code, set isgoing to Standby (= validation of code).

Restart the set.

In case of settings reloaded from USB, the set type,serial number, Display 12NC, are automatically storedwhen entering display options.

No

- Check if correct “Display Option” code isprogrammed.- Verify “Option Codes” according sticker inside the set.- Default settings for White drive ...see Service Manual

No

Set is starting up & display is OK.

If not already done;Check latest software on Service website.

Update Main and Standby software via USB.

Q52xE SSB Board swap – v5.1VDS/JA Updated 18-03-2009(changes are indicated in red)

Instruction note: SSB replacement Q528.x, Q522.x, Q529.x, Q54x.x

Set is starting up but no display.

Final check of all menus in CSM.Special attention for HDMI Keys.

Program “set type number”, “serial number”,and “display 12NC”.

Update main software in this step, by using“autorun.upg” file.

Start TV in Jett mode (DVD i+/OSD)Open ComPair browser Q52x.

Noisy picture with bands/lines is visible and thered LED is continuous “on”

(sometimes also the letter “F” is visible).

Press 5 s. the “Volume minus” button on the localcntrl until the red LED switches “off”, and then

press 5 s. the MENU (*) button of the local cntrl.(* in some chassis this button is named SOURCE)

The picture noise is replaced by blue mute!

Unplug the mainscord to verify the correctdisabling of the factory-mode.

Program “Display Option” code via 062598 MENU/HOME, followed by 3 digits code (this code can be

found on a sticker inside the set).

After entering “Display Option” code, set is goingto Standby (= validation of code).

Restart the set.

Set is starting up in “Factory” mode.

Start-up set.Set behaviour?

Set is going into protection after replacing the SSB

(blinking LED, error 2).

Take care that speakers are connected!In some sets, the speakers are in the rearcover, and when the set is switched “on”without speakers, it is possible that the Audioprotection is triggered.

Advise: remount rear cover before switching“on” (see also SCC_71772).

Q54x.x

H_16771_007.eps090318

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5.9 Software Upgrading

5.9.1 Introduction

The set software and security keys are stored in a NAND-Flash, which is connected to the PNX8543 via the PCI bus.

It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the DFU.

Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys! (copy protection keys, MAC address, ...).Perform the following actions after SSB replacement:1. Set the correct option codes (see sticker inside the TV).2. Update the TV software => see the eUM (electronic User

Manual) for instructions.3. Perform the alignments as described in chapter 6 (section

6.5 Reset of Repaired SSB).4. Check in CSM if the HDMI key, MAC address.. are valid.For the correct order number of a new SSB, always refer to the Spare Parts list!

5.9.2 Main Software Upgrade

• The “UpgradeAll.upg” file is only used in the factory.• The “FlashUtils.upg” file is only used by service centra

which are allowed to do component level repair on the SSB.

Automatic Software UpgradeIn “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “AUTORUN.UPG” (FUS part of the one-zip file: e.g. 3104 337 05661 _FUS _Q5492_ 1.26.15.0_commercial.zip). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see eUM). The “autorun.upg” file must be placed in the root of the USB stick.How to upgrade:1. Copy “AUTORUN.UPG” to the root of the USB stick.2. Insert USB stick in the set while the set is in ON MODE.

The set will restart and the upgrading will start automatically. As soon as the programming is finished, a message is shown to remove the USB stick and restart the set.

Manual Software UpgradeIn case that the software upgrade application does not start automatically, it can also be started manually.How to start the software upgrade application manually:1. Disconnect the TV from the Mains/AC Power.2. Press the “OK” button on a Philips TV remote control or a

Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “OK” button pressed while reconnecting the TV to the Mains/AC Power.

3. The software upgrade application will start.

Attention!In case the download application has been started manually, the “autorun.upg” will maybe not be recognized.What to do in this case:1. Create a directory “UPGRADES” on the USB stick.2. Rename the “autorun.upg” to something else, e.g. to

“software.upg”. Do not use long or complicated names, keep it simple. Make sure that “AUTORUN.UPG” is no longer present in the root of the USB stick.

3. Copy the renamed “upg” file into this directory.4. Insert USB stick into the TV.

5. The renamed “upg” file will be visible and selectable in the upgrade application.

Back-up Software Upgrade ApplicationIf the default software upgrade application does not start (could be due to a corrupted boot 2 sector) via the above described method, try activating the “back-up software upgrade application”.How to start the “back-up software upgrade application” manually:1. Disconnect the TV from the Mains/AC Power.2. Press the “INFO”-button on a Philips remote control or

“CURSOR DOWN” button on a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “INFO”-button (or “cursor down” button) pressed while reconnecting the TV to the Mains/AC Power.

3. The software upgrade application will start.

5.9.3 Stand-by Software Upgrade via USB

In this chassis it is possible to upgrade the Stand-by software via a USB stick. The method is similar to upgrading the main software via USB.Use the following steps:1. Create a directory “UPGRADES” on the USB stick.2. Copy the Stand-by software (part of the one-zip file, e.g.

StandbySW_CFT72_88.0.0.0.upg) into this directory.3. Insert the USB stick into the TV.4. Start the download application manually (see section “

Manual Software Upgrade”.5. Select the appropriate file and press the “OK” button to

upgrade.

5.9.4 Content and Usage of the One-Zip Software File

Below the content of the One-Zip file is explained, and instructions on how and when to use it.

• BootProm_PNX5120_Q5492_x.x.x.x.zip. A programmed device can be ordered via the regional Service organization.

• Ceisp2padll_P2PAD_x.x.x.x.zip. Not to be used by Service technicians. For ComPair development only.

• DDC_Q5492_x.x.x.x.zip. Contains the content of the VGA NVM. See ComPair for further instruction.

• EDID_Q5492_x.x.x.x.zip. Contains the EDID content of the different EDID NVM’s. See ComPair for further instructions.

• EJTAGDownload_Q5492_x.x.x.x.zip. Only used by service centra which are allowed to do component level repair.

• FUS_Q5492_x.x.x.x_commercial.zip. Contains the “autorun.upg” which is needed to upgrade the TV main software and the software download application.

• Factory_Q5492_x.x.x.x_commercial.zip. Only for production purposes, not to be used by Service technicians.

• FlashUtils_Q5492_x.x.x.x_commercial.zip. Not to be used by Service technicians.

• MOP_RAC3_x.x.x.x.zip. Contains the MOP local contrast software and is upgradeable via USB (UPG). This SW is not part of the FUS autorun.upg!

• OAD_Q5492_x.x.x.x.zip. Not to be used by Service Technicians.

• OpenSourceFile_Q5492_x.x.x.x.zip. Not to be used by Service technicians.

• PQPrivate_Q5492_x.x.x.x.zip. Not to be used by Service technicians.

• StandbySW_CFTxx_x.x.x.x_commercial.zip. Contains the Stand-by software in “upg” and “hex” format.– The “StandbySW_xxxxx_prod.upg” file can be used to

upgrade the Stand-by software via USB.– The “StandbySW_xxxxx.hex” file can be used to

upgrade the Stand-by software via ComPair.

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– The files “StandbySW_xxxxx_exhex.hex” and “StandbySW_xxxxx_dev.upg” may not be used by Service technicians (only for development purposes).

• UpgradeAll_Q5492_x.x.x.x_commercial.zip. Only for production purposes, not to be used by Service technicians.Caution: Never try to use this file, because it will overwrite the HDCP keys ! ! !

• UpgradeExe_Q5492X_x.x.x.x.zip. Not to be used by Service Technicians.

• Ambilight_Q5492_x.x.x.x.zip. Not to be used by Service technicians.

• Cabinet_Q5492_x.x.x.x.zip. Not to be used by Service technicians.

• Display_Q5492_x.x.x.x.zip. Not to be used by Service technicians.

• LightGuide_TV522_x.x.x.x_.zip. Not to be used by Service Technicians.

• ProcessNVM_Q5492_x.x.x.x.zip. Default NVM content. Must be programmed via ComPair or can be loaded via USB, be aware that all alignments stored in NVM are overwritten here.

5.9.5 Content of the MOP Ambilight ARM SW File

• MOP_AMBILIGHT_V1-2_UPG_jettsigned.zip. Contains the MOP ambientlight software (ARM processor on the DC-DC AL interface board) and is upgradeable via USB (UPG). This SW is not part of the FUS autorun.upg! and is not available in the One-Zip software file but provided separately via the commercial Philips website (software for servicers only). Instructions for upgrading are included in the zip file.

5.9.6 UART logging 2K9 (see section “5.8 Fault Finding and Repair Tips, 5.8.6 Logging)

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6. Alignments

Index of this chapter:6.1 General Alignment Conditions6.2 Hardware Alignments6.3 Software Alignments6.4 Option Settings6.5 Reset of Repaired SSB6.7 Total Overview SAM modes

6.1 General Alignment Conditions

Perform all electrical adjustments under the following conditions:• Power supply voltage (depends on region):

– AP-NTSC: 120 VAC or 230 VAC / 50 Hz (± 10%).– AP-PAL-multi: 120 - 230 VAC / 50 Hz (± 10%).– EU: 230 VAC / 50 Hz (± 10%).– LATAM-NTSC: 120 - 230 VAC / 50 Hz (± 10%).– US: 120 VAC / 60 Hz (± 10%).

• Connect the set to the mains via an isolation transformer with low internal resistance.

• Allow the set to warm up for approximately 15 minutes.• Measure voltages and waveforms in relation to correct

ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground.

• Test probe: Ri > 10 MΩ, Ci < 20 pF.• Use an isolated trimmer/screwdriver to perform

alignments.

6.1.1 Alignment Sequence

• First, set the correct options:– In SAM, select “Options”, and then “Option numbers”.– Fill in the option settings for “Group 1” and “Group 2”

according to the set sticker (see also paragraph 6.4 Option Settings).

– Press OK on the remote control before the cursor is moved to the left.

– In submenu “Option numbers” select “Store” and press OK on the RC.

• OR:– In main menu, select “Store” again and press OK on

the RC.– Switch the set to Stand-by.

• Warming up (>15 minutes).

6.2 Hardware Alignments

Not applicable.

6.3 Software Alignments

Put the set in SAM mode (see Chapter 5. Service Modes, Error Codes, and Fault Finding). The SAM menu will now appear on the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below.The following items can be aligned:• Tuner AGC.• White point. To store the data:• Press OK on the RC before the cursor is moved to the

left.• In main menu select “Store” and press OK on the RC.• Press MENU on the RC to switch back to the main menu.• Switch the set to stand-by mode. For the next alignments, supply the following test signals via a video generator to the RF input:

• EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz

• US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

• LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

6.3.1 Tuner AGC (RF AGC Take Over Point Adjustment)

Purpose: To keep the tuner output signal constant as the input signal amplitude varies.No alignment is necessary, for the AGC alignment you can use the default value : “80”. Store settings and exit SAM.

6.3.2 White Point

• Set “Active control” to “Off”.• Choose “TV menu”, “TV Settings” and then “Picture” and

set picture settings as follows:

• Go to the SAM and select “Alignments”-> “White point”.

White point alignment LCD screens:• Use a 100% white screen as input signal and set the

following values:– “Colour temperature”: “Normal”.– All “White point” values to: “127”.– “Red BL offset” values to “8”.– “Green BL offset” values to “8”.

In case you have a colour analyser:• Measure with a calibrated contactless colour analyser in

the centre of the screen. Consequently, the measurement needs to be done in a dark environment.

• Adjust the correct x,y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x,y coordinates (see Table 6-1 White D alignment values). Tolerance: dx: ± 0.004, dy: ± 0.004.

• Repeat this step for the other colour temperatures that need to be aligned.

• When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-1 White D alignment values

If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production.• Select a COLOUR TEMPERATURE (e.g. COOL,

NORMAL, or WARM).

Picture Setting

Dynamic backlight Off

Dynamic Contrast Off

Colour Enhancement Off

Picture Format Unscaled

Light Sensor Off

Brightness 50

Colour 0

Contrast 100

Value Cool (11000K ) Normal (9000K) Warm (6500K)

x 0.270 0.279 0.309

y 0.279 0.287 0.328

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• Set the RED, GREEN and BLUE default values according to the values in Table 6-2.

• When finished press OK on the RC, then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-2 White tone default setting

6.4 Option Settings

6.4.1 Introduction

The microprocessor communicates with a large number of I2C ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence / absence of these PNX5100 ICs (back-end advanced video picture improvement IC which offers motion estimation and compensation features (commercially called HDNM) plus integrated Ambilight control) is made known by the option codes. Notes:• After changing the option(s), save them by pressing the OK

button on the RC before the cursor is moved to the left, select STORE in the SAM root menu and press OK on the RC.

• The new option setting is only active after the TV is switched “off” / “stand-by” and “on” again with the mains switch (the NVM is then read again).

6.4.2 Dealer Options

For dealer options, in SAM select “Dealer options”.See Table 6-4 SAM mode overview.

6.4.3 (Service) Options

Select the sub menu's to set the initialisation codes (options) of the model number via text menus.See Table 6-4 SAM mode overview.

6.4.4 Opt. No. (Option numbers)

Select this sub menu to set all options at once (expressed in two long strings of numbers).An option number (or “option byte”) represents a number of different options. When you change these numbers directly,you can set all options very quickly. All options are controlled via eight option numbers.When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on a sticker inside the TV set and in Table 6-3 Option and display code overview.Example: The options sticker gives the following option numbers:• 08192 00133 01387 45160• 12232 04256 00164 00000

The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicate software options 5 to 8.Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set).When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number.See Table 6-3 Option and display code overview for the options.

DiversityNot all sets with the same Commercial Type Number (CTN) necessarily have the same option code!Use of Alternative BOM => an alternative BOM number usually indicates the use of an alternative display or power supply. This results in another display code thus in another Option code. For the power supply there is no difference. Refer to Chapter 2. Technical Specifications and, Connections.

6.4.5 Option Code Overview

Table 6-3 Option and display code overview

Important: after having edited the option numbers as described above, you must press OK on the remote control before the cursor is moved to the left!

6.5 Reset of Repaired SSB

A very important issue towards a repaired SSB from a service repair shop implies the reset of the NVM on the SSB.A repaired SSB in service should get the service Set type “00PF0000000000” and Production code “00000000000000”.Also the virgin bit is to be set. To set all this, you can use the ComPair tool.In case of a display replacement, reset the “Operation hours display” to “0”, or to the operation hours of the replacement display.

New here in this chassis is the “Net TV” functionality. Therefore the CTN (“set type” item in CSM1) must be filled into the spare SSB to ensure access to the Net TV portals.The loading of the CTN can be done via ComPair (Model number programming). The reset item (Clear NET TV memory) can be selected via MENU (or HOME) => Setup => Installation => Clear NET TV memory (customer preferences stored at provider side will be reset now).

White Tone 32" 37" Black level offset

Colour Temp R G B R G B R G

Normal 127 95 97 127 121 106 8 8

Cool 127 100 112 124 127 119 8 8

Warm 127 89 52 127 111 64 8 8

White Tone 56" Black level offset

Colour Temp R G B R G

Normal 127 117 111 8 8

Cool 124 124 125 8 8

Warm 127 95 65 8 8

CTN Options Group 1 Options Group 2 Disp.code

32PFL9604H/12 08211 35971 18431 45288 30645 47282 00184 00000 181

32PFL9604H/60 08211 35971 18431 45288 30645 47282 00184 00000 181

37PFL9604H/12 08227 35972 18431 45288 30625 47282 00176 00000 161

37PFL9604H/60 08227 35972 18431 45288 30625 47282 00176 00000 161

56PFL9954H/12 08275 33925 18431 45288 30644 47282 00161 00000 180

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AlignmentsEN 38 Q549.2E LA6.

2009-May-08

6.5.1 SSB identification

Whenever ordering a new SSB, it should be noted that the correct ordering number (12nc) of a SSB is located on a sticker on the SSB. The format is <12nc SSB><serial number>. The ordering number of a “Service” SSB is the same as the ordering number of an initial “factory” SSB.

Figure 6-1 SSB identification

6.6 Service SSB delivered without main software loaded

Due to a changed manufacturing process, new Service SSB’s can be delivered to the warehouse without main TV software loaded. Below you find the steps to follow when such an SSB is received.

6.6.1 When a picture is available

1. Mount the Service SSB into the TV set. After start-up, normally the download application will appear on the screen.

2. Download the latest main software (FUS) from the www.p4c.philips.com website.

3. Create a folder "upgrades" in the root of a USB stick (size > 50 MB) and save the "autorun.upg" file in this "upgrades" folder. Note: it is possible to rename this file, e.g. "Q549_SW_version.upg", this in case there are more than one "autorun.upg" files on your USB stick

4. Plug the prepared USB stick into the TV set, and select the "autorun" file in the displayed browser on the screen

5. Now the main TV software will be loaded automatically, supported by a progress bar

6. Set the correct "display code" via "062598-HOME-xxx", where "xxx" is the 3-digit display panel code (see sticker on the side/bottom of the cabinet).

6.6.2 When no picture is available

Due to a possible wrong display option code in the received Service SSB (NVM), no picture can be available at start-up and thus no download application will be visible. Here you can proceed and finalize step by step to load the main TV software via the UART logging on the PC (for visual feedback). 1. Start-up the TV set, equipped with the Service SSB, and

enable the UART logging on the PC (see for settings 5.8 Fault Finding and Repair Tips 5.8.6 Logging)

2. The TV set will start-up automatically in the download application if main TV software is not loaded

3. Plug the prepared USB stick into the TV set, press cursor "Right" to enter the list, and navigate to the "autorun" file in the UART logging printout via the cursor keys on the remote control. When the correct file is selected, press "OK"

4. Press cursor "Down" and "OK" to start the flashing of the main TV software. Printouts like: "L: 1-100% , V: 1-100% and P: 1-100%" should be visible now in the UART logging

5. Wait until the message "Operation successful!” is displayed and remove all inserted media. Restart the TV set

6. Set the correct "display code" via "062598-HOME-xxx", where "xxx" is the 3-digit display panel code (see sticker on the side/bottom of the cabinet).

6.6.3 Use of repaired SSBs instead of new

Repaired SSBs on stock will obviously already contain main TV software. This implies that only a main software upgrade is required if you use a “repaired” SSB for board swap instead of a “new” SSB.

6.7 Total Overview SAM modes

Table 6-4 SAM mode overview

18310_221_090318.eps090319

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Hardware Info A. SW VERSION e.g. “Q5492_1.26.15.0” Display TV & Standby SW version and CTN serialnumber. B. Standby processor version e.g. “STDBY_88.68.0.0”

C. Production code e.g. “See type plate”

Operation hours Displays the accumulated total of operation hours.TVswitched “on/off” & every 0.5 hours is increase one

Error Displayed the most recent errors.

Reset error buffer Clears all content in the error buffer.

Alignment Tuner AGC RF-AGC Take over point adjustment (AGC defaultvalue is 80)

Whitepoint Colour temperature Normal 3 different modes of colour temperature can be se-lectedWarn

Cool

White point red LCD White Point Alignment. For values, see Table 6-1 White D alignment values.White point green

White point blue

Red black level offset

Green black level offset

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Alignments EN 39Q549.2E LA 6.

2009-May-08

Dealer options Picture mute Off/On Select Picture mute On/Off. Picture is muted / notmuted in case no input signal is detected at inputconnectors.

Virgin mode Off/On Select Virgin mode On/Off. TV starts up / does not start up (once) with a language selection menu after the mains switch is turned “on” for the first time (virgin mode)

E-sticker Off/On Select E-sticker On/Off (USP’s on-screen)

Auto store mode None

PDC/VPS

TXT page

PDC/VPS/TXT

Options Digital broadcast DVB Off/On Select DVB On/Off

DVB - T installation Off/On or Country dependent Select DVB T installation On/Off or by country

DVB - T light Off/On Select DVB T light On/Off

DVB - C Off/On Select DVB C On/Off

DVB - C installation Off/On or Country dependent Select DVB C installation On/Off or by country

Over the air download Off/On or Country dependent Select Over the air download On/Off or by country

8 days EPG Off/On Select 8 day EPG On/Off

Digital features USB Off/On Select USB On/Off

Ethernet Off/On Select Ethernet On/Off

Wi-Fi Off/On Select Wi-Fi On/Off

DLNA Off/On Select DLNA On/Off

Online service Off Online service is Off

PTP (Picture Transfer Protocol) Off/On Select PTP On/Off

Update assistant Off/On Select Update assistant On/Off

Internet software update Off Internet software update is Off

Display Screen 180 / LCD Sharp Z3LA13 56" Displayed the panel code & type model.

LightGuide Off/On Select LightGuide On/Off

Display fans Not present/Present Select Display fans Present/Not present.

Temperature sensor Sensor present in display (only for21:9)

N.A.

Temperature LUT 0 N.A

E-box & monitor Off/On Select E-box & monitor On/Off

Video reproduction Picture processing None/PNX5100 Select Picture processing None/PNX5100 (Q549.xEchassis).

MOP local contrast Off/On Select MOP local contrast On/Off

Light sensor Off/On Select Light sensor On/Off

Light sensor type 0/1/2/3 Select Light sensor type form 0 to 3 (for differencestyling).

Pixel Plus type Pixel Plus HD Select type of picture improvement.

Perfect Pixel HD

Pixel Precise HD

Ambilight None, Select type of Ambilight modules use.

2 sided 2/2 For 8400 series only

2 sided 4/4

3 sided 2/3/2

3 sided 4/3/4

3 sided 4/5/4

4 sided 4/3/4/3

Ambilight technology LED/Future use Ambilight technology LED is in use.

MOP ambilight Off/On Select MOP ambilight On/Off

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

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2009-May-08

Audio reproduction Acoustic system Cabinet design used for setting dynamic audio pa-rameters.

Source selection EXT1/AV1 type SCART CVBS RGB LR Select input source when connected with externalequipment.

CVBS Y/C YPbPr LR

CVBS Y/C YPbPr HV LR

(CVBS) YPbPr LR

EXT2/AV2 type SCART CVBS RGB LR Select input source when connected with externalequipment.

CVBS Y/C LR

(CVBS) YPbPr LR

CVBS Y/C LR

EXT3/AV3 type None Select input source when connected with externalequipment.

CVBS

CVBS LR

YPbPr

YPbPr LR

YPbPr HV LR

VGA Off/On Select VGA On/Off

SIDE I/O Off/On Select SIDE I/O On/Off

HDMI 1 Off/On Select HDMI 1 On/Off

HDMI 2 Off/On Select HDMI 2 On/Off

HDMI 3 Off/On Select HDMI 3 On/Off

HDMI 4 Off/On Select HDMI 4 On/Off

HDMI side Off/On Select HDMI side On/Off

HDMI CEC Off/On Select HDMI CEC On/Off

HDMI CEC RC passthrough Off/On Select HDMI CEC RC passthrough On/Off

HDMI CEC Pixel Plus link Off/On Select Pixel Plus link On/Off

Miscellaneous Region Europe/AP-PAL-MULTI/Australia Select Region/country.

Tuner type HD1816-MK1/TD1716-MK4/TD1716-MK3/HD1816-MK2

Select type of Tuner used.

System RC support Off/On Select System RC support On/Off.

Embedded user manual Off/On Select Embedded user manual On/Off.

Start-up screen Off/On Select Start-up screen On/Off.

Wallpaper Off/On Select Wallpaper On/Off.

Hotel mode Off Hotel mode is Off.

Option number Group 1 e.g. “08192.02181.01387.45160” The first line (group 1) indicates hardware options 1to 4.

Group 2 e.g. “10185.12448.00164.00000” The second line (group 2) indicates software options5 to 8.

Store Store after changing.

Initialise NVM N.A

Store Select Store in the SAM root menu after making any changes.

Software maintenance Software events Display Display information is for development purposes.

Clear

Test reboot

Hardware events Display Display information is for development purposes.

Clear

Operation hours display 0003 In case the display must be swapped for repair, youcan reset the ""Display operation hours"" to ""0"". So,this one does keeps up the lifetime of the display it-self (mainly to compensate the degeneration behav-iour).

Test setting Digital info QAM modulation: 64-QAM Display information is for development purposes.

Symbol rate: 23:29

Original network ID: 12817

Network ID:12817

Transportstream ID: 2

Service ID: 3

Hierarchical modulation: 0

Selected video PID: 35

Selected main audio PID: 99

Selected 2nd audio PID: -1

Install start frequency 000 Install start frequency from "0" MHz

Install end frequency 999 Install end frequency as 999 MHz

Default install frequency

Installation Digital only Select Digital only or Digital + Analogue before instal-lation.Digital + Analogue

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

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Alignments EN 41Q549.2E LA 6.

2009-May-08

Development file ver-sions

Development 1 file version Display parameters DISPT 3.26.8.7 Display information is for development purposes.

Acoustics parameters ACSTS 3.6.6.5

PQ - PRFPP 1.26.10.4

Ambilight parameters PRFAM 2.6.1.3

Development 2 file version 12NC one zip software Display information is for development purposes.

Initial main software

NVM version Q5492_0.4.0.0

Flash units SW Q5492_0.26.15.0

Upload to USB Channel list To upload several settings from the TV to an USBstickPersonal settings

Option codes

Display-related alignment

History list

Download from USB Channel list To download several settings from the USB stick tothe TV. Personal settings

Option codes

Display-related alignment

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

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Circuit DescriptionsEN 42 Q549.2E LA7.

2009-May-08

7. Circuit Descriptions

Index of this chapter:7.1 Introduction7.2 Power Architecture7.3 Front-End7.4 HDMI7.5 Video and Audio Processing - PNX85437.6 Common Interface CI+7.7 Net TV7.8 Ambi Light

Notes: • Only new circuits (circuits that are not published recently)

are described. • Figures can deviate slightly from the actual situation, due

to different set executions.• For a good understanding of the following circuit

descriptions, please use the wiring, block (see chapter 9. Block Diagrams) and circuit diagrams (see chapter 10. Circuit Diagrams and PWB Layouts).Where necessary, you will find a separate drawing for clarification.

7.1 Introduction

The Q549.2E LA chassis (platform name TV543/92) is the successor of the Q529.1E LA chassis (platform TV522/92).

Main difference with the previous platform is the introduction of “Net TV” and “CI+”.

7.1.1 Implementation

Key components of this chassis are:• PNX8543 Digital Colour Decoder• EP3C25F324C7N FPGA (“Local Contrast”)• HD1816AF Hybrid Tuner• DRX3926K Demodulator• TDA9996 HDMI Switch• TPA3123D2PWP Class D Power Amplifier• DP83816AVNG PCI ethernet media access controller and

physical layer (MacPhyter-II).

7.1.2 TV543 Architecture Overview

• For details about the chassis block diagrams refer to chapter 9. Block Diagrams. An overview of the TV543 architecture can be found in Figure 7-1.

Figure 7-1 Architecture of TV543/92 Elite Core platform

18310_200_090317.eps090317

MatrixFHD@120pFHD@100p

MatrixFHD@120pFHD@100p

PNX5120Halo ReducedHD-NMFHD 120Hz

Ambient Light

32

DDR-II

Hybrid TunerSaw

NXPPNX8543

H264USB 2 0

32

DDR-II CY3

LocalContrast

16

DDR

MICRONASDRX39xyK

Spartan XC3S250ELed Dimming

FLASH

8

Ambient LightLed Dimming

PCI

2 channelAudio Amp.

Ethernet

USB 2.0

hdmi hdmi hdmi

CA

TDA9996MUX hd

mi

MiniPCI (Wifi)

hdmi

SPI

LVDS

Pixelated Ambi

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Circuit Descriptions EN 43Q549.2E LA 7.

2009-May-08

7.1.3 SSB Cell Layout

Figure 7-2 SSB layout cells (top view)

18310_201_090317.eps090317

RL

HDMI

HDMI

HDMI

CA

1P00

HDMI1.3

USB2.0

Y/C

Left

Right

CVBS

Head

Scart / Y

PbP

r

SPO

R

serv VGA

DD

R2

DD

R2

Tuner

DC

/DC

1M99

1M71 1F02 1M59

1M20

1M01

1R12

1M36

TD

A98

XX

Class-D

1R08

1R07

1HP

0

1CJ0

Xilinx

Pr

Pb

L

Lo

Y

Ro

Scart / Y

PbP

r

TD

A1

0048

TD

A10

023

1 7 3 5 H D M I

1M95

1H01

DDR2

DDR2

PNX8542/3

Vid

eo

InV

ideo

O

ut

DV

in

TS

in

HD

MI B

HD

MI A

PCICA

DDR

LVD

S 2

LVD

S 1

US

B

Aud

io I

n

Aud

io

Out E

JTAG

ST

BY

GPIO

DDR

Ethernet

FLASH

HDMIMUX

1E51

1E501G50

1G51

Wifi

L/R

1HE

0CY3C40

HDMI

RJ45

5100

40x4

01.

27

DDR2GPIO

lvds

-rx

ambi

pci/xio

PCI/XIO

uart

I²C

vdi

lvds

-tx

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Circuit DescriptionsEN 44 Q549.2E LA7.

2009-May-08

7.2 Power Architecture

Refer to figure Figure 7-3 for the power architecture of this platform.

Figure 7-3 Power Architecture TV543/92 platform

7.2.1 Power Supply Unit

All power supplies are a black box for Service. When defective, a new board must be ordered and the defective one must be returned, unless the main fuse of the board is broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market.Consult the Service website for the order codes of the boards.

In the TV543 Elite Core platform, for sets up to and including 47", the Integrated Power Board (IPB) - incl. inverter is used. For sets of 52 " and 56", a conventional PSU (with additional inverters) is used.

In this manual, no detailed information is available because of design protection issues.

The output voltages to the chassis are:• +3V3-STANDBY (standby-mode only)• +12V (on-mode)• +Vsnd (+24V) (audio power) (on-mode)• +24V (bolt-on power) (on-mode)• IPB: High voltage to the LCD panel (for sets up to and

including 47").

7.2.2 Diversity

Below find an overview of the different PSUs that are used:

Table 7-1 Supply diversity

18310_202_090317.eps090317

Fu

se

Fuse

Fuse

PSU

Display

Am b ilight

V display

LCDPower-on

24V

S tandby

V backlight 24 V**

Audio proc + C lass D

24 Vs(+/-12 Vs opt)

+12VDua l

DC/DC+3V3

+1V2

+1V2

P la tform P ow er

Dua lDC/DC

2.5V 1% voltage ref

+2V5 +2V5

+1V8 +1V8+3V3F

+5V

+5Vtuner +5V-Tun

PNX5100

+1V2-PNX85XX

+5V

+3V3

+1V8-PNX5100

+1V8-PNX85XX

+2V5 (loc.Contr.FPGA)

+1V2-PN X5100

+5V-TU N

SSB

Bolt-on

V inverter 4kV*

Inverter*

Lamp On *BL D IM*

Lamp OnBL D IM Inverter**

S tby P

Enable-3V3

12V U ndervoltage

detectSw itches off +3V3 and

+5V

*: present in inverterless displays**: present in displays w ith interna l inverter

D etect 2(12V sense)

AN D

D etect1

+1V2 +1V2-STAN D BY

+3V3 s tby

24V** Power-OK

12VD isp

3V3stby

Boost control (Opt)

+3V3 (SSB)

+1V8

Boos t conv. (opt)

+33V-TUN(analog)+33V

Supplier PSU Model Input Voltage Range

LGIT PLHL-T826A 32" High Mains (198- 265 Vac)

Delta DPS-298CP A 37" High Mains (198- 265 Vac)

Delta DPS-411AP-3 A 56" High Mains (198- 265 Vac)

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Circuit Descriptions EN 45Q549.2E LA 7.

2009-May-08

7.3 Front-End

The Front-End consist of the following key components:

• Tuner HD1816AF• SAW filter 36M125• IF demodulator DRX3926K• AGC amplifier UPC3221GV.

Below find a block diagram of the front-end application.

Figure 7-4 Front-End block diagram

The DRX3926K is a multi-standard demodulator supporting DVB-C, DVB-T and analogue standards. The demodulated digital stream is fed into the parallel transport stream data ports of the PNX8543. The demodulated analogue signal in the form of CVBS is connected to the analogue video CVBS/Y input channel, while the SIF is connected via the SSIF2 positive input port.

7.4 HDMI

In this platform, the TDA9996 HDMI multiplexer is implemented. Only for one HDMI input, a separate EEPROM is implemented to store the EDID values. For the other HDMI inputs, the EDID contents are no longer stored in a separate EEPROM, but directly in the multiplexer. Each input has its own physical subaddress: the first 253 bytes are common, where the last 3 bytes define the specific input. The EDID contents are, at +5V power-up, downloaded to RAM. The following figures show the HDMI input configuration and EDID control.

Figure 7-5 HDMI input configuration

Figure 7-6 EDID control (embedded EDID)

The delta’s with respect to the use of the TDA9996 as HDMI multiplexer compared with earlier chassis/platforms are:• +5V detection mechanism• Stable clock detection mechanism• Integrated EDID• RT control• HPD control• TMDS output control• CEC control• New hotplug control for PNX8543 for 5th HDMI input• New EDID structure: EDID stored in TDA9996, therefore

there are no EDID pins on the SSB. Only in the event of a 5th HDMI input, an additional EEPROM is foreseen, as was implemented in previous platforms.

After replacement of the TDA9996 HDMI mux, the default I2C address should be reprogrammed from C0 to CE, and the HDMI EDIDs should be reprogrammed as well. Both actions should be executed via ComPair.

7.5 Video and Audio Processing - PNX8543

The PNX8543 is the main audio and video processor (or System-on-Chip) for this platform. It is a member of the PNX85xx SoC family (described in earlier chassis) with the addition of the MPEG4 functionality; the separate STi710x MPEG4 decoder is no longer implemented in this platform.

Some more delta’s compared to the previous PNX85xx are:• 2 HDMI inputs (A & B)• HDMI deep colour RGB/YCbCr 4:4:1 10/12 bit detection.

The PNX8543 handles the digital and analogue audio- and video decoding and processing. The processor is a MIPS32 general purpose CPU and a 8051-based TV controller for power management and user event handling.

• For a functional diagram of the PNX8543, refer to Figure 7-7.

18440_211_090227.eps090227

I2C-TUNERIF-AGC

NXP HybridTuner

SAWFilter

IF Amplifier DRX3926K PNX8543

I2C-SSB

CVBS

2nd SIF

TS

TDA9996

1P06

1P04

1P03

1P02

1P05

H D M IA-R X

AR X

BR X

C R X

D R XH D M IB-R X

PNX8543

D

C

A

B

Out

1M 96

A B

H D M I 2

H D M I Side (optional)

H D M I 3(optional ) H D M I 1

H D M I 4 (optional )

E d id

18440_213_090227.eps090227

18440_214_090227.eps090227

TDA9996CPUIIC

Platform w ith em bedded EDID

4 × HDM I inpu ts

253 common B ytes+ 1B subaddres o f

S ou rce P hysica l A ddress+3B for inpu t A+3B for inpu t B+3B for inpu t C+3B for inpu t D

E D ID : 253B

3B 3B 3B 3B

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Circuit DescriptionsEN 46 Q549.2E LA7.

2009-May-08

Figure 7-7 PNX8543 functional diagram

7.5.1 Video Subsystem

Refer to Figure 7-8 for the main video interfaces for the PNX8543 and the video signal flow between blocks and memory.

18440_202_090226.eps090226

TS out/in for

TS in from

CVBS, Y/C,

LVDS for

analog CVBS

analog audio

I2SDual SPDIF

Low-IF

SSIF, LR

Dual HDMI

SPDIF

CI/CAMPEG

PRIMARYLVDS

VIDEOSECONDARY

MEMORY

VIDEO3D COMB

DIGITAL IF

AUDIO DEMOD

AUDIO IN

HDMI

SCALER,

AUDIO DSP

AUDIO DACS

AUDIO OUT

300 MHz

300 MHz

I2C PWM GPIO IR ADC UART I2C GPIO Flash

SYSTEM

USB 2.0 CA

PNX8543x

DV INPUTDV-ITU-656

AV-PIP

SPI

MPEG/H.264

I2S

RECEIVER

(8051)CONTROLLER

AND DECODE

DECODER

channel decoder

PCMCIA

RGB

PROCESSORSYSTEM

CONTROLLER

DECODERVIDEO

CPUMIPS32 4KEc

01 x22 x

AV-DSP

REDUCTIONAND NOISE

DE-INTERLACE

OUTPUTVIDEO

SUB-PICTURE

ENCODER

OUTPUTVIDEO

channel)(single or dualflat panel display

DRAWINGENGINE

DMA BLOCK

PCI 2.2

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Circuit Descriptions EN 47Q549.2E LA 7.

2009-May-08

Figure 7-8 PNX8543 video flow diagram

The Video Subsystem consist of the following blocks:• Analogue Front-End (AFE) block• Video and PC Capture (VPC/PC) pipe• HDMI Receiver interface• Memory-Based Video Processor MBVP)• Video Composition Pipe (CPIPE)• Memory Based Video Processor (MBVP) VO-1• Memory Based Video Processor (MBVP) VO-2• Video Composition Pipe (CPIPE)• Dual Flat Panel Display-LVDS (FPD-LVDS)• Digital Encoder (DENC)• Digital Video VIP• 2D graphics block.

7.5.2 Audio Subsystem

Refer to Figure 7-9 for the main audio interfaces for the PNX8543 and the audio signal flow between blocks and memory.

18440_203_090226.eps090226

VMSP

HDMI_UIP

PC_RX

AFE(ADC)

DAC

LVDS_BUFLVDS_TX

CPIPE_L2QTV

CPIPE_L2VO

MCU-DDR

DM

A B

US

DDR2-SDRAM

PNX8543x

VCP_UIP

DENCDAC

VCP_WIFD

HDMI_RX

MBVP_L2VO2

MBVP_L2QTV

MBVP_L2VO1

A

A

GFX2

PIP

CVBS1/Ymonitor

main

CVBS2/Cmonitor

HDMI

VCP/PC

LOW IF

CVBS

RGB

Dual HDMI

FPD-LVDS1LCD panel

MUX

VCP_RX

2D_DE

VIP(ITU-656)

PC_UIP

GFX1

FPD-LVDS2LCD panel

CVBS/Y

C

CAI

TS

TSDOTSDICMD

PCMCIA

TSI

MSVD

DV (includingITU-656)

YPbPr

VGA

Page 48: Q549---32pfl9604ser

Circuit DescriptionsEN 48 Q549.2E LA7.

2009-May-08

Figure 7-9 PNX8543 audio flow diagram

The Audio Subsystem consist of the following blocks:• Analogue Audio Front End (AAFE) used to capture

Baseband Audio Inputs and to sample Secondary Sound IF (SSIF) directly or via Low-IF input

• HDMI Receiver interface block• SPDIF input block• Audio Input (AI) block• Audio Output (AO) block• Demodulation & Decoding (ASDEC) DSP for decoding all

analogue terrestrial TV sound standards• Audio Post-Processing (APP) block• Digital Audio decoder.

7.5.3 Connectivity and Compute Subsystem

Refer to Figure 7-10 for the connectivity and compute subsystem.

18440_204_090226.eps090226

VMSP

ADC

MCU

DDR2-SDRAM

PNX8543x

HDMI_RX

CAI

SPDIF-IN

I2S

SPDIF

DigIFASDEC

(DEMODULATIONAND DECODING)

TM2270(MPEG, AC-3, MP3

DECODER)

SPDIF-OUT

AOAI

APP - AUDIO DSP(POST PROCESSING)

2DAC

2DAC

2DAC

2DAC

DM

A B

US

I2S-OUT-SD3I2S-OUT-SD4

I2S-OUT-WSI2S-OUT-SCKI2S-OUT-OSC

Main L, R

HP L, R

SCART2 L, R

SCART1 L, R

HDMI

SPDIF-IN1

IFSSIF

L, R

TS-IN

SPDIF-OutSPDIF-IN2

I2S-OUT-SD1I2S-OUT-SD2

I2S-IN-SD3I2S-IN-SD4

I2S-IN-WSI2S-IN-SCKI2S-IN-OSC

I2S-IN-SD1I2S-IN-SD2

SPDIF

ADC

4

4 × I2S

4

4 × I2S

XB3

XB4

fromXB4

fast SPDIF

XB1

XB2

4 × I2S

Page 49: Q549---32pfl9604ser

Circuit Descriptions EN 49Q549.2E LA 7.

2009-May-08

Figure 7-10 PNX8543 connectivity and compute subsystem

The Connectivity Subsystem consists of:• PCI/XIO interface• USB2.0 interface• Three 2-wire UARTs• Four Master/Slave I2C interfaces• Common Interface/Conditional Access Interface.

The Computing Subsystem consists of:• 32-bit MIPS RISC core• Enhanced JTAG (EJTAG) block inside the MIPS• JTAG_MMIO blocks• TV controller• Audio/Video DSP (AV_DSP)• Memory Control Unit (MCU).

7.5.4 Service Notice - FLASH RAM / PNX8543 exchange

The FLASH RAM (item 7P10) and/or PNX8543 (item 7H00) can only be exchanged by an authorised central workshop with dedicated programming tools. Due to the presence of (CI+)

keys in the components, unauthorised exchange of these components will always result in a defective board.

18440_205_090226.eps090226

JTAG_MMIO

UART2

UART1

IIC2_DMA

IIC3_DMA

MIPS4KEc

SYSTEMCONTROLLER

80C51

PCI_XIO

CAI

MCU_DDR

DM

A B

US

DC

S-N

ET

WO

RK

DDR2-SDRAM

I2C-2

I2C-3

EJTAG

PNX8543x

UART-1

UART-2

I2C-MC

UART-3

PWMs

GPIOs

CI/CA

PCI/XIO

EJTAG

USB2.0USB

AVDSP

IIC4_DMAI2C-1

Page 50: Q549---32pfl9604ser

Circuit DescriptionsEN 50 Q549.2E LA7.

2009-May-08

7.6 Common Interface CI+

Together with this platform, an extention to the Common Interface (CI) Conditional Access system is added, called CI+.

CI+ or Common Interface Plus is a specification that extends the Common Interface (DVB-CI) as described in the digital broadcasting standard DVB.

The weakness of the conventional CI module as Conditional Access system was the absence of a Copy Protection mechanism, as decrypted content could be sent over the PCMCIA interface unscrambled. With the CI+ extension, a form of copy protection is established between the Conditional

Access Module (CAM) and the Integrated Digital Television (IDTV). The security mechanisms in CI+ are derived/copied from POD (with the exception of Out Of Band (OOB) used in US CA systems). For more information about conventional CA systems using a CI module, refer to the BJ3.0E L/PA or BL2.xU Service Manual.

The CI+ standard is downwards compatible with the existing CI standard.

The following figure shows the implementation of the CI+ Conditional Access system in the TV543 platform.

Figure 7-11 CI+ Conditional Access implementation

7.7 Net TV

In this chassis, a feature that enables access to dedicated internet pages from a limited group of information suppliers,

called “Net TV”, is introduced. A separate Wi-Fi module enables wireless communication with a local network.

7.8 Ambi Light

The Ambi Light architecture in this platform has been entirely renewed. The characteristics are:• Additional DC/DC board generating 12/16/24 V (optional)• ARM processor (on DC/DC panel or AL board)• Low-power LEDs• SPI interface from ARM to LED drivers• I2C upgradeable via USB• Each AL module has a temperature sensor.

The use of the DC/DC board is optional. In case no DC/DC board is implemented, the ARM processor is located on one of the AL boards.

Refer to Figure 7-12 for the Ambi Light architecture.

C A M

P N X 8543

TS -IN P U T

Transport S tream s

C A-C ontro l

CA-

MD

I

CA-

MD

O

CA-

CTR

L

PCI/X

IO

P roprietary C A scram bling

C I + S tandard ised C C S scram bling

D E S /AE Sdescram bler

MH

EG M

MI

appl

icat

ion

M atrixM atrixtuner channe ldecoder

DES

/AES

scra

mbl

er

CA

clie

nt

M H E G C I+

decoderdem ux

(S C )

C om m andin te rface

Transport s treamin te rface

18440_221_090227.eps090227

Page 51: Q549---32pfl9604ser

Circuit Descriptions EN 51Q549.2E LA 7.

2009-May-08

Figure 7-12 Interface between Ambi Light and SSB

7.8.1 ARM controller

Refer to Figure 7-13 below for signal interfacing to and from the ARM controller. The ARM controller is located on the DC/DC board (item no. 7302) or AL panel (item no. 7102).

Figure 7-13 ARM controller interface

Data transfer between ARM processor and LED drivers is executed by a Serial Peripheral Interface (SPI) bus interface.

The SPI bus is a synchronous serial data link standard that operates in full duplex mode.

For debugging purposes, the working principle is given below:• At startup the controller will read-out matrix data from the

EEPROM devices (via SPI DATA RETURN)• Before operation, the driver current is set via SPI, with

driver in DC mode• During normal operation the controller receives RGB-,

configuration-, operation mode- and topology data via I2C• The controller converts the I2C RGB data via the matrixes

to SPI LED data• Via data return the controller receives error data (if

applicable).Also PWM clock and BLANK signals are generated by the controller. The controller can be reprogrammed via I2C (via USB). The controller can receive matrix values via I2C, which will be stored in the EEPROM of each AL module via the SPI bus. The temperature sensor in each AL module controls the TEMP line; in case of a too high temperature the controller will reduce the overall brightness.

7.8.2 LED driver communication (via SPI bus)

Refer to Figure 7-14 below for signal interfacing between the ARM controller and the LED drivers on the AL boards, and the LED drivers and the EEPROMs on the AL boards.

18310_203_090317.eps090317

18310_204_090318.eps090318

ARM

SD A

SC L

SEL1

SEL2

SPI C LOC K

SPI LATC H

SPI D ATA OU T

SPI D ATA R ETU R N

PW M C LOC K

BLAN K

PR OG

SPI LATC H 2 (only on dc/dc for aurea)

C S EEPR OM

TEM P

Sc l1

Sda1

tbd

tbd

Sc k

P0.7

M OS I

M ISO

P0.8

Tx D

R x DR x d0

Tx d0

M AT0.0

M AT1.0

tbd

tbd

P0.10

18310_205_090318.eps090318

Am b i l igh t m odu le 1 Am b i l igh t m odu le 2 Am b i l igh t m odu le N

ARM

LEDDRIVER

1

LEDDRIVER

2

LEDDRIVER

N

SP

I da

ta in

S o ut S in S o ut S o utS in

SPI c lo ck (SCLK)SPI la tch (XLAT)PRO G (VPRG )BLANKPW M CLO CK ( G SCLK)

ou

t16

ou

t16

ou

t16

SPI d a ta return

Page 52: Q549---32pfl9604ser

Circuit DescriptionsEN 52 Q549.2E LA7.

2009-May-08

Figure 7-14 SPI communication between ARM controller and LED drivers

The ARM controller communicates with the LED drivers (on each AL module) via an SPI bus. For debugging purposes, the working principle is given below:• Data from the ARM controller is linked through the drivers,

which are connected in cascade• SPI CLK, SPI LATCH, PROG, BLANK and PWM CLOCK

are going directly from the controller to each driver• SPI DATA RETURN is linked from the last driver to the

controller: controller decides which driver returns data.

7.8.3 Temperature Control

Refer to Figure 7-15 for signal interfacing between the ARM controller and the temperature sensor on the AL boards.

Figure 7-15 Communication between ARM controller and temperature sensor

Each AL board is equipped with a temperature sensor. If one of the sensors detects a temperature over the threshold, the TEMP line is pulled LOW which results in brightness reduction.

18310_206_090318.eps090318

Am b ilight m odu le 1 Am b ilight m odu le 2

ARM

TEMPSENSOR

Vcc

Pull-up Pull-up Pull-upTEMP

SENSOR

VccAm b ilight m odu le N

TEMPSENSOR

Vcc

Page 53: Q549---32pfl9604ser

IC Data Sheets EN 53Q549.2E LA 8.

2009-May-08

8. IC Data Sheets

This chapter shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the

electrical diagrams (with the exception of “memory” and “logic” ICs).

8.1 Diagram SSB: DC/DC B01A, TPS53124PW (IC 7U03)

Figure 8-1 Internal block diagram and pin configuration

Pin Configuration

Block Diagram

18250_300_090319.eps090319

VBST1

NC

EN1

VO1

VFB1

NC

GND

TEST1

NC

VFB2

VO2

EN2

NC

VBST2

DRVH1

LL1

DRVL1

PGND1

TRIP1

VIN

VREG5

V5FILT

TEST2

TRIP2

PGND2

DRVL2

LL2

DRVH2

28

27

26

25

24

23

22

21

20

19

18

17

16

1

2

3

4

5

6

7

8

9

10

11

12

13

14

TP

S5

31

24

15

Page 54: Q549---32pfl9604ser

IC Data SheetsEN 54 Q549.2E LA8.

2009-May-08

8.2 Diagram SSB: Front End B02B, DRX3926K (IC 7T50)

Figure 8-2 Pin configuration

Block Diagram

Pin Configuration

18440_300_090303.eps090303

DVB-T/QAM/ATVDemodulator

Stereo Decoder

System Controller

SAW

MainTuner

PresawSense

DVB-T/QAMFEC

DAC

DAC

MPEG-2TS

CVBS

SIF

I2S Audio

I2C

GPIO

IF AGC

RF AGC

Integrated Tuner

I2C

ADCIF AMP

49XI

50XO

51VSSAH_OSC

52VDDAH_OSC

53VDDH

54VSSH

55VSSL

56VDDL

57TDO

58TMS

59TCK

60TDI

61I2C_SDA2

62I2C_SCL2

63I2S_CL

64I2S_DA

RSTN32

SAW_SW31

GPIO230

VSYNC29

VSSL28

VDDL27

VDDH26

VSSH25

I2C_SDA124

I2C_SCL123

MD722

MD621

MD520

MD419

VDDH18

VSSH17

PDP

VDDAL_AFE2

VSSAL_AFE2

SIF

CVBS

VDDAH_CVBS

VSSAH_CVBS

PDN

INP

INN

VSSAH_AFE1

VDDAH_AFE1

VDDAL_AFE1

VSSAL_AFE1

IF_AGC

RF_AGC

VDDL

VSSL

GPIO1

MSTRT

MERR

VSSH

VDDH

I2S_WS

MCLK

MVAL

MD0

MD1

MD2

MD3

VSSL

VDDL

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33

DRXK

Page 55: Q549---32pfl9604ser

IC Data Sheets EN 55Q549.2E LA 8.

2009-May-08

8.3 Diagram SSB: PNX8543 - Stand-by Controller B04A, PNX8543 (IC7H00)

Figure 8-3 Internal block diagram and pin configuration

Block Diagram

Pin Configuration

18440_301_090303.eps090303

TS out/in for

TS in from

CVBS, Y/C,

LVDS for

analog CVBS

analog audio

I2SDual SPDIF

Low-IF

SSIF, LR

Dual HDMI

SPDIF

CI/CAMPEG

PRIMARYLVDS

VIDEOSECONDARY

MEMORY

VIDEO3D COMB

DIGITAL IF

AUDIO DEMOD

AUDIO IN

HDMI

SCALER,

AUDIO DSP

AUDIO DACS

AUDIO OUT

300 MHz

300 MHz

I2C PWM GPIO IR ADC UART I2C GPIO Flash

SYSTEM

USB 2.0 CA

PNX8543x

DV INPUTDV-ITU-656

AV-PIP

SPI

MPEG/H.264

I2S

RECEIVER

(8051)CONTROLLER

AND DECODE

DECODER

channel decoder

PCMCIA

RGB

PROCESSORSYSTEM

CONTROLLER

DECODERVIDEO

CPUMIPS32 4KEc

01 x22 x

AV-DSP

REDUCTIONAND NOISE

DE-INTERLACE

OUTPUTVIDEO

SUB-PICTURE

ENCODER

OUTPUTVIDEO

channel)(single or dualflat panel display

DRAWINGENGINE

DMA BLOCK

PCI 2.2

PNX8543xEH

Transparent top view

1 9 17 253 11 19 277 15 235 13 21 2942612 10 18 264 12 22 308 20 286 14

T

AD

H

AK

P

AB

F

AH

M

Y

D

AF

K

V

BA

J

R

AC

G

AJ

N

AA

E

AG

L

W

C

AE

U

ball A1index area

3132

3334

ALAM

ANAP

Page 56: Q549---32pfl9604ser

IC Data SheetsEN 56 Q549.2E LA8.

2009-May-08

8.4 Diagram SSB: Ethernet B05A, PNX5120 (IC7C00)

Figure 8-4 Internal block diagram and pin configuration

18560_300_090403.eps090403

Pin Configuration

Block Diagram

PNX51xx

Transparent top view

2 4 6 8 10 1213

1415 17

1619

18 2021 23

22 2425

261 3 5 7 9 11

ball A1index area

AB

AD

AA

AC

YW

VU

R

N

T

P

ML

KJ

H

F

D

G

E

CB

A

AFAE

LVDS RX 1

UIP L3K7

TM327x 1

CONTROLLER

PCI/XIO

I2C-DMA

UART

CPIPE L3K7

LVDS TX 2

UART

PNX51xx

I2C

I2C

TM327x 2

TM327x 3

LVDS TX 3

LVDS TX 1

LVDS TX 4

GFX

16 X GPIO

GIC 3

EJTAG

CLOCK CAB

Video

LVDS RX 2

AUDIO IN

AUDIO OUT

GIC 1

GIC 2

MEMORY

Video

Page 57: Q549---32pfl9604ser

IC Data Sheets EN 57Q549.2E LA 8.

2009-May-08

8.5 Diagram SSB: Ethernet B07G, DP83816 (IC7N04)

Figure 8-5 Internal block diagram and pin configuration

Block Diagram Pin Configuration

F_15710_167.eps 230905

MAC/BIU

Interface

SRAM

25 MHz Clk

MII RX MII TX MII Mgt

BIOS ROM Cntl BIOS ROM Data

E

E

/ M

O

R

B

PCI AD

PCI CNTL

PCI CLK

3V DSP Physical Layer

Logic

RX-2 KB

SRAM TX-2 KB

TPRDP/M

EEPROM/LEDs

X

T I I M

X

R

I I M

t g M

I I

M

n i a t a d t s e T

t u o a t a d t s e T

X

T I I M

X

R

I I M

t g M

I I

M

TPTDP/M

DP83816

r d d A

x T

a t a d r w

x T

r d d A

x

R

a t a d r w

x

R

a t a d d r x R

a t a d d r x T

RAM BIST Logic

SRAM RXFilter

.5 KB

121 122 123 124 125 126 127 128 129 130 131 132

9 9 8 9 7 9 6 9 5 9 4 9 3 9 2 9 1 9 0 9 9 8 8 8 7 8 6 8 5 8 4 8 3 8 2 8 1 8 0 8 9 7 8 7 7 7 6 7 5 7 4 7 3 7

66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41

1 2 3 4 5 6 7 8 9 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 1 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 0 3 1 3 2 3 3 3 9 2

Identification Pin1

37 38 39 40

120 119 118 117 116 115 114 113 112

110 109

111

N

L E

S

V

E

D

N

Y

D

R

T N

Y

D

R

I

N

E

M

A

R

F

2 N

E

B

C

6 1

D

A

7 1 D

A

8 1

D

A

N

P

O

T S

N

R

R

E

P

N

R

R

E

S

R

A

P

1 N

E

B

C

5 1

D

A

4 1 D

A

3 1 D

A

2 1

D

A

1 1 D

A

0 1 D

A

AD9

S

S

V

AD8

9 1 D

A

0 2

D

A

1 2 D

A

2 2 D

A

3 2

D

A

L E

S

D

I

S

S

V D

D

V

I

C

P

C

N D

D

V

I

C

P

C

N

S

S

V D

D

V

I

C

P

3 N

E

B

C

4 2

D

A

5 2 D

A

AD26

CBEN0

VSS AUXVDD

RESERVED VREF

PCIVDD AD29

AD31 VSS

REQN GNTN RSTN INTAN

AD28

PCICLK

AD30

PMEN/CLKRUNN

VSS

VSS

TPTDP TPTDM

REGEN IAUXVDD

VSS

TPRDP TPRDM

VSS

AD27

AD7 AD6

AD5 VSS

MA1/LED10N MA2/LED100N

I D

E

E

/ 3

A

M

K

L C

E

E

/ 4

A

M

5 A

M

MWRN

MD4/EEDO

MD3

EESEL

AD0 AD1 AD2 AD3

AD4

MD0

MCSN

MD1/CFGDISN MD2

MD5 MD6 MD7 MA0/LEDACTN

PCIVDD

S

S

V 1

C

NC NC

AUXVDD VSS

O

I D

M

C

D

M

K

L

C

X

R

6 A

M

/ 0

D

X

R

7 A

M

/ 1

D

X

R

8 A

M

/ 2

D

X

R

9 A

M

/ 3

D

X

R

E

O

X

R

0 1 A

M

/

R

E

X

R

1 1 A

M

/

V

D

X

R

5 1 A

M

/ 3

D

X

T

6 1 A

M

/ L

O

C

S

R

C

N

E

X

T K

L

C

X

T

4 1 A

M

/ 2

D

X

T 3 1

A

M

/ 1 D

X

T

2 1 A

M

/ 0

D

X

T

S

S

V

D

D

V

X

U

A

S

S

V

D

D

V

X

U

A 2

X 1

X

DP83816 NC

S

S

V

D

D

V

X

U

A

NC

3VAUX

6 3 5 3 4 3

67 68 69 70 71 72

0 0 1 1 0 1 2 0 1 3 0 1 4 0 1 5 0 1 6 0 1 7 0 1 8 0 1

144 143 142 141 140 139 138 137 136 135 134 133

VSS IAUXVDD

PWRGOOD

MRDN

AUXVDD

C

N S

S

V

S

S

V

D

D

V

X

U

A

NC

RESERVED

C

N

NC

RESERVED VSS

Page 58: Q549---32pfl9604ser

IC Data SheetsEN 58 Q549.2E LA8.

2009-May-08

8.6 Diagram SSB: Audio B10A, TPA3123D (IC 7D10)

Figure 8-6 Internal block diagram and pin configuration

Block Diagram

Pin Configuration

18440_302_090303.eps090303

1 F

SD

PVCCL

PVCCR

VCLAMP

GAIN1

BYPASS

1 F

1 F

0.22 F

AGND

} Control

ShutdownControl

LIN

RIN

BSR

BSL

PGNDR

PGNDL

0.22 F

22 H

22 H

0.68 F

470 F

0.68 F

1 F

470 F

GAIN0

AVCC

MUTE

ROUT

LOUT

123456789101112

242322212019181716151413

PVCCLSD

PVCCLMUTE

LINRIN

BYPASSAGNDAGND

PVCCRVCLAMP

PVCCR

PGNDLPGNDLLOUTBSLAVCCAVCCGAIN0GAIN1BSRROUTPGNDRPGNDR

TERMINALI/O/P DESCRIPTION24-PINNAME (PWP)

Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance toSD 2 I AVCCRIN 6 I Audio input for right channelLIN 5 I Audio input for left channelGAIN0 18 I Gain select least-significant bit. TTL logic levels with compliance to AVCCGAIN1 17 I Gain select most-significant bit. TTL logic levels with compliance to AVCC

Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low =MUTE 4 I outputs enabled). TTL logic levels with compliance to AVCCBSL 21 I/O Bootstrap I/O for left channelPVCCL 1, 3 P Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCCLOUT 22 O Class-D 1/2-H-bridge positive output for left channelPGNDL 23, 24 P Power ground for left-channel H-bridgeVCLAMP 11 P Internally generated voltage supply for bootstrap capacitorsBSR 16 I/O Bootstrap I/O for right channelROUT 15 O Class-D 1/2-H-bridge negative output for right channelPGNDR 13, 14 P Power ground for right-channel H-bridge.PVCCR 10, 12 P Power supply for right-channel H-bridge, not connected to PVCCL or AVCCAGND 9 P Analog ground for digital/analog cells in coreAGND 8 P Analog ground for analog cells in core

Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time viaBYPASS 7 O external capacitor sizing.AVCC 19, 20 P High-voltage analog power supply. Not internally connected to PVCCR or PVCCL

Connect to ground. Thermal pad should be soldered down on all applications to properlyThermal pad Die pad P secure device to printed wiring board.

Page 59: Q549---32pfl9604ser

Block Diagrams EN 59Q549.2E LA 9.

2009-May-08

9. Block Diagrams

Wiring Diagram 32" (Elite Core)

18310_400_090305.eps090421

CN

11.

N2.

L

1M20 (B01B)8. +5V7. KEYBOARD6. LED15. +3V3-STANDBY4. LED23. RC2. GND1. LIGHT-SENSOR

8408

WIRING DIAGRAM 32" (ELITE CORE)

1M59

(B06

A)

1. S

CL-

AM

BI-

3V3

2. G

ND

3. S

DA

-AM

BI-

3V3

4. G

ND

5. G

ND

6. +

3V3

7. G

ND

SSB(1011)B

INLET

MAIN POWER SUPPLYIPB 32 PLHL-T826A (1050)

IR LED PANEL (1112)

LCD DISPLAY (1004)

1M013P

1M208P

LEFT SPEAKER(5213)

RIGHT SPEAKER(5214)

CN411. NC10. GND_SND9. +VSND8. +12V7. +12V6. +12V5. GND14. GND13. GND12. STANDBY1. 3V3_ST

1M83 (AL1)1. SCL2. SPI-DATA-IN3. SDA4. CONTROL-15. CONTROL-26. +3V37. BLANK8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND

CN512. NC11. NC10. NC9. INV_OK8. A/P_DIM7. BOOST6. DIM5. BL_ON_OFF4. GND13. GND12. +12V1. +12V

1316

1. H

V1

2. N

.C.

3. H

V1

1319

1. H

V2

2. N

.C.

3. H

V2

TOBACKLIGHT

TOBACKLIGHT

1M99 (B01B)12. GND11. SDA-SET10. SCL-SET9. POWER-OK8. BACKLIGHT-PWM...7. BACKLIGHT-BOOST6. BACKLIGHT-OUT5. LAMP-ON-OUT4. GND3. GND2. +12VD1. +12VD 17

35 (B

10A

)4.

RIG

HT-

SP

EA

KE

R3.

GN

D-A

UD

IO2.

GN

D-A

UD

IO1.

LE

FT-

SP

EA

KE

R

1G50 (B05C)41. N.C40. TXDAT-39.TXDAT.........3. TX2E+2. SCL-DISP1. SDA-DISP

1G51 (B05C)51. N.C.50. SDA-DISP49. SCL-DISP.........3. +VDISP12. +VDISP11. +VDISP1

1M95 (B01B)11. N.C10. GND9. +AUDIO-POWER8. +12V7. +12V6. +12V5. GND4. GND3. GND2. STANDBY1. +3V3-STANDBY

CN

76.

GN

D5.

+24

V4.

GN

D3.

+24

V2.

GN

D1.

+24

V

- + - +

KE

YB

OA

RD

CO

NT

RO

L(1

127)

WIFI ANTENNA(1044)

WIFI ANTENNA(1043)

WIFIMODULEON 1A01

(1042)

1M85 (AL4)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BU6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH3. SPI-DATA-RETURN2. SPI-DATA-OUT1. SPI-CLOCK-BUF

1M83 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. GND6. +3V35. CONTROL-24. CONTROL-13. SDA2. GND1. SCL

8395

8399

8120

8735

8316 8319

8684

8159

81598151

8735

8101

Board Level Repair

Component Level RepairOnly For Authorized Workshop

1M01

3P

1A01

124P

AM

BI-

LIG

HT

MO

DU

LE

5/5

(1076)

AL

AM

BI-

LIG

HT

MO

DU

LE

5/5

(1074)

AL

8150

Page 60: Q549---32pfl9604ser

EN 60Q549.2E LA 9.Block Diagrams

2009-May-08

Wiring Diagram 37" (Elite Core)

1M84 (AL1)1. SPI-CLOCK-BUF2. SPI-DATA-OUT3. SPI-DATA-RETURN4. SPI-LATCH5. PWM-CLOCK-BUF6. +3V37. BLANK-BU8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND

1M83 (AL1)1. SCL2. GND3. SDA4. CONTROL-15. CONTROL-26. +3V37. GND8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND

CN

11.

N2.

L

1M20 (B01B)8. +5V7. KEYBOARD6. LED15. +3V3-STANDBY4. LED23. RC2. GND1. LIGHT-SENSOR

8408

WIRING DIAGRAM 37" (ELITE CORE)

1M59

(B06

A)

1. S

CL-

AM

BI-

3V3

2. G

ND

3. S

DA

-AM

BI-

3V3

4. G

ND

5. G

ND

6. +

3V3

7. G

ND

SSB(1150)B

INLET

MAIN POWER SUPPLYIPB DPS-298CPA B(1050)

IR LED PANEL (1112)

LCD DISPLAY (1004)

1M013P

1M208P

FUSE

LEFT SPEAKER(5213)

RIGHT SPEAKER(5214)

TWEETERTWEETER

CN411. NC10. GND_SND9. +VSND8. +12V7. +12V6. +12V5. GND14. GND13. GND12. STANDBY1. 3V3_ST

1M83 (AL1)1. SCL2. GND3. SDA4. CONTROL-15. CONTROL-26. +3V37. GND8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND

CN512. NC11. NC10. NC9. INV_OK8. A/P_DIM7. BOOST6. DIM5. BL_ON_OFF4. GND13. GND12. +12V1. +12V

1316

1. H

V1

2. N

.C.

3. H

V1

1319

1. H

V2

2. N

.C.

3. H

V2

TOBACKLIGHT

TOBACKLIGHT

1M99 (B01B)12. GND11. SDA-SET10. SCL-SET9. POWER-OK8. BACKLIGHT-PWM...7. BACKLIGHT-BOOST6. BACKLIGHT-OUT5. LAMP-ON-OUT4. GND3. GND2. +12VD1. +12VD 17

35 (B

10A

)4.

RIG

HT-

SP

EA

KE

R3.

GN

D-A

UD

IO2.

GN

D-A

UD

IO1.

LE

FT-

SP

EA

KE

R

1G50 (B05C)41. N.C40. TXDAT-39.TXDAT.........3. TX2E+2. SCL-DISP1. SDA-DISP

1G51 (B05C)51. N.C.50. SDA-DISP49. SCL-DISP.........3. +VDISP12. +VDISP11. +VDISP1

1M95 (B01B)11. N.C10. GND9. +AUDIO-POWER8. +12V7. +12V6. +12V5. GND4. GND3. GND2. STANDBY1. +3V3-STANDBY

CN

76.

GN

D5.

+24

V4.

GN

D3.

+24

V2.

GN

D1.

+24

V

- + - +- + - +

WIFI ANTENNA(1044)

WIFI ANTENNA(1043)

WIFIMODULEON 1A01

(1042)

1M84 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BU6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH3. SPI-DATA-RETURN2. SPI-DATA-OUT1. SPI-CLOCK-BUF

1M84 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BU6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH3. SPI-DATA-RETURN2. SPI-DATA-OUT1. SPI-CLOCK-BUF

1M83 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. GND6. +3V35. CONTROL-24. CONTROL-13. SDA2. GND1. SCL

1M83 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. GND6. +3V35. CONTROL-24. CONTROL-13. SDA2. GND1. SCL

1M84 (AL1)1. SPI-CLOCK-BUF2. SPI-DATA-OUT3. SPI-DATA-RETURN4. SPI-LATCH5. PWM-CLOCK-BUF6. +3V37. BLANK-BU8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND

8395

8399

8735

8316

8319

8684

8802

8150

8151

8735

8120

Board Level Repair

Component Level RepairOnly For Authorized Workshop

KE

YB

OA

RD

CO

NT

RO

L(1

114)

1M01

3P

1A01

124P

1M90

(AB

1)6.

GN

D5.

+24

V4.

GN

D3.

+24

V2.

GN

D1.

+24

V

1M59

(AB

1)7.

GN

D

6. +

3V3

5. C

ON

TR

OL2

4. C

ON

TR

OL1

3. S

DA

2. G

ND

1. S

CL

DC-DC INTERFACE(1028)

AB

8159

8590

1M84 (AB1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BUF6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH1CONN3. SPI-DATA-RETURN2. SPI-CLOCK-BUF1. SPI-LATCH2CONN

8584

8584

8101

8585

8802

18310_401_090305.eps090420

AM

BI-

LIG

HT

MO

DU

LE

3/3

(1

07

4)

AL

AM

BI-

LIG

HT

MO

DU

LE

3/3

(1

073

)A

L

AM

BI-

LIG

HT

MO

DU

LE

3/3

(1

07

5)

AL

AM

BI-

LIG

HT

MO

DU

LE

3/3

(1076)

AL

Page 61: Q549---32pfl9604ser

Block Diagrams EN 61Q549.2E LA 9.

2009-May-08

Wiring Diagram 56" (Elite Core)

1M85 (AL4)1. SPI-CLOCK-BUF2. SPI-DATA-OUT3. SPI-DATA-RETURN4. SPI-LATCH5. PWM-CLOCK-BUF6. +3V37. BLANK-BU8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND

1M83 (AL1)1. SCL2. GND3. SDA4. CONTROL-15. CONTROL-26. +3V37. GND8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND

CN

11.

N2.

L

1M20 (B01B)8. +5V7. KEYBOARD6. LED15. +3V3-STANDBY4. LED23. RC2. GND1. LIGHT-SENSOR

WIRING DIAGRAM 56" (ELITE CORE)

1M59

(B06

A)

1. S

CL-

AM

BI-

3V3

2. G

ND

3. S

DA

-AM

BI-

3V3

4. G

ND

5. G

ND

6. +

3V3

7. G

ND

SSB(1011)B

INLET

MAIN POWER SUPPLYPSU DPS-411AP3A B (1050)

IR LED PANEL (1047)

LCD DISPLAY (1004)

1M203P

1M094P

1M018P

FUSE

LEFT SPEAKER(5213)

RIGHT SPEAKER(5214)

TWEETER(5215)

CN411. NC10. GND_SND9. +VSND8. +12V7. +12V6. +12V5. GND14. GND13. GND12. STANDBY1. 3V3_ST

1M83 (AL1)1. SCL2. GND3. SDA4. CONTROL-15. CONTROL-26. +3V37. GND8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND

CN512. GND111. I2C_DATA10. I2C_CLK9. INV_OK8. A/P_DIM7. BOOST6. DIM5. BL_ON_OFF4. GND13. GND12. +12V1. +12V

TOBACKLIGHT

TOBACKLIGHT

1M99 (B01B)12. GND11. SDA-SET10. SCL-SET9. POWER-OK8. BACKLIGHT-PWM...7. BACKLIGHT-BOOST6. BACKLIGHT-OUT5. LAMP-ON-OUT4. GND3. GND2. +12VD1. +12VD 17

35 (B

10A

)4.

RIG

HT-

SP

EA

KE

R3.

GN

D-A

UD

IO2.

GN

D-A

UD

IO1.

LE

FT-

SP

EA

KE

R

1G50 (B05C)41. N.C40. TXDAT-39.TXDAT.........3. TX2E+2. SCL-DISP1. SDA-DISP

1G51 (B05C)51. N.C.50. SDA-DISP49. SCL-DISP.........3. +VDISP12. +VDISP11. +VDISP1

1M95 (B01B)11. N.C10. GND9. +AUDIO-POWER8. +12V7. +12V6. +12V5. GND4. GND3. GND2. STANDBY1. +3V3-STANDBY

CN

76.

GN

D1

5. +

24V

4. G

ND

13.

+24

V2.

GN

D1

1. +

24V

CN95. GND14. GND13. N.C.2. +12V1. +12V

- + - +- + - +

WIFI ANTENNA (1043)WIFI ANTENNA (1044)

WIFIMODULEON 1A01

(1042)

1M85 (AL4)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BU6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH3. SPI-DATA-RETURN2. SPI-DATA-OUT1. SPI-CLOCK-BUF

1M84 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BU6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH3. SPI-DATA-RETURN2. SPI-DATA-OUT1. SPI-CLOCK-BUF

1M83 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. GND6. +3V35. CONTROL-24. CONTROL-13. SDA2. GND1. SCL

1M83 (AL1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. GND6. +3V35. CONTROL-24. CONTROL-13. SDA2. GND1. SCL

1M84 (AL1)1. SPI-CLOCK-BUF2. SPI-DATA-OUT3. SPI-DATA-RETURN4. SPI-LATCH5. PWM-CLOCK-BUF6. +3V37. BLANK-BU8. EEPROM-CS9. TEMP-SENSOR10. PROG11. VLED112. GND13. VLED214. GND

8395

8399

8735

8319

8802

8150

8151

8735

8120

Board Level Repair

Component Level RepairOnly For Authorized Workshop

KE

YB

OA

RD

CO

NT

RO

L(1

127)

1M01

3P

1A01

124P

1M90

(AB

1)6.

GN

D5.

+24

V4.

GN

D3.

+24

V2.

GN

D1.

+24

V

1M59

(AB

1)7.

GN

D

6. +

3V3

5. C

ON

TR

OL2

4. C

ON

TR

OL1

3. S

DA

2. G

ND

1. S

CL

DC-DC INTERFACE(1028)

AB

8159

8690

1M84 (AB1)14. GND13. VLED212. GND11. VLED110. PROG9. TEMP-SENSOR8. EEPROM-CS7. BLANK-BUF6. +3V35. PWM-CLOCK-BUF4. SPI-LATCH1CONN3. SPI-DATA-RETURN2. SPI-CLOCK-BUF1. SPI-LATCH2CONN

8584

8683

8101

8585

8801

18310_407_090420.eps090508

AM

BI-

LIG

HT

MO

DU

LE

4/4

(10

75

)A

LA

MB

I-L

IGH

T M

OD

UL

E3/3

(1

08

2)

AL

AM

BI-

LIG

HT

MO

DU

LE

4/4

(1

07

0)

AL

AM

BI-

LIG

HT

MO

DU

LE

3/3

(1

07

1)

AL

1M85

(AL4

)14

. GN

D13

. VLE

D2

12. G

ND

11. V

LED

110

. PR

OG

9. T

EM

P-S

EN

SO

R8.

EE

PR

OM

-CS

7. B

LAN

K-B

U6.

+3V

35.

PW

M-C

LOC

K-B

UF

4. S

PI-

LAT

CH

3. S

PI-

DAT

A-R

ET

UR

N2.

SP

I-D

ATA

-OU

T1.

SP

I-C

LOC

K-B

UF

1M83

(AL1

)14

. GN

D13

. VLE

D2

12. G

ND

11. V

LED

110

. PR

OG

9. T

EM

P-S

EN

SO

R8.

EE

PR

OM

-CS

7. G

ND

6. +

3V3

5. C

ON

TR

OL-

24.

CO

NT

RO

L-1

3. S

DA

2. G

ND

1. S

CL

AMBI-LIGHT MOD.4/4 (1073)AL

1M84

(AL1

)14

. GN

D13

. VLE

D2

12. G

ND

11. V

LED

110

. PR

OG

9. T

EM

P-S

EN

SO

R8.

EE

PR

OM

-CS

7. B

LAN

K-B

U6.

+3V

35.

PW

M-C

LOC

K-B

UF

4. S

PI-

LAT

CH

3. S

PI-

DAT

A-R

ET

UR

N2.

SP

I-D

ATA

-OU

T1.

SP

I-C

LOC

K-B

UF

1M83

(AL1

)14

. GN

D13

. VLE

D2

12. G

ND

11. V

LED

110

. PR

OG

9. T

EM

P-S

EN

SO

R8.

EE

PR

OM

-CS

7. G

ND

6. +

3V3

5. C

ON

TR

OL-

24.

CO

NT

RO

L-1

3. S

DA

2. G

ND

1. S

CL

AMBI-LIGHT MOD.3/3 (1080)AL

1M84

(AL1

)14

. GN

D13

. VLE

D2

12. G

ND

11. V

LED

110

. PR

OG

9. T

EM

P-S

EN

SO

R8.

EE

PR

OM

-CS

7. B

LAN

K-B

U6.

+3V

35.

PW

M-C

LOC

K-B

UF

4. S

PI-

LAT

CH

3. S

PI-

DAT

A-R

ET

UR

N2.

SP

I-D

ATA

-OU

T1.

SP

I-C

LOC

K-B

UF

1M83

(AL1

)14

. GN

D13

. VLE

D2

12. G

ND

11. V

LED

110

. PR

OG

9. T

EM

P-S

EN

SO

R8.

EE

PR

OM

-CS

7. G

ND

6. +

3V3

5. C

ON

TR

OL-

24.

CO

NT

RO

L-1

3. S

DA

2. G

ND

1. S

CL

AMBI-LIGHT MOD.3/3 (1076)AL

TWEETER(5216)

1M84

(AL1

)14

. GN

D13

. VLE

D2

12. G

ND

11. V

LED

110

. PR

OG

9. T

EM

P-S

EN

SO

R8.

EE

PR

OM

-CS

7. B

LAN

K-B

U6.

+3V

35.

PW

M-C

LOC

K-B

UF

4. S

PI-

LAT

CH

3. S

PI-

DAT

A-R

ET

UR

N2.

SP

I-D

ATA

-OU

T1.

SP

I-C

LOC

K-B

UF

1M83

(AL1

)14

. GN

D13

. VLE

D2

12. G

ND

11. V

LED

110

. PR

OG

9. T

EM

P-S

EN

SO

R8.

EE

PR

OM

-CS

7. G

ND

6. +

3V3

5. C

ON

TR

OL-

24.

CO

NT

RO

L-1

3. S

DA

2. G

ND

1. S

CL

AMBI-LIGHT MOD.3/3 (1074)AL

1M85

(AL4

)14

. GN

D13

. VLE

D2

12. G

ND

11. V

LED

110

. PR

OG

9. T

EM

P-S

EN

SO

R8.

EE

PR

OM

-CS

7. B

LAN

K-B

U6.

+3V

35.

PW

M-C

LOC

K-B

UF

4. S

PI-

LAT

CH

3. S

PI-

DAT

A-R

ET

UR

N2.

SP

I-D

ATA

-OU

T1.

SP

I-C

LOC

K-B

UF

1M83

(AL1

)14

. GN

D13

. VLE

D2

12. G

ND

11. V

LED

110

. PR

OG

9. T

EM

P-S

EN

SO

R8.

EE

PR

OM

-CS

7. G

ND

6. +

3V3

5. C

ON

TR

OL-

24.

CO

NT

RO

L-1

3. S

DA

2. G

ND

1. S

CL

AMBI-LIGHT MOD.4/4 (1072)AL

85868583 8587 8588 8589 8590

8408

CN2 / 131914. PDIM_Select13. PWM12. On/Off11. Vbri10. GND39. GND38. GND37. GND36. GND35. 24Vinv4. 24Vinv3. 24Vinv2. 24Vinv1. 24Vinv

CN3 / 131612. N.C.11. N.C.10. GND39. GND38. GND37. GND36. GND35. 24Vinv4. 24Vinv3. 24Vinv2. 24Vinv1. 24Vinv

8316

CN241P

CN151P

CN35P

8303

1P094P

LIGHT STRIP(1046)L

8109

Page 62: Q549---32pfl9604ser

EN 62Q549.2E LA 9.Block Diagrams

2009-May-08

Block Diagram Video

B02A FRONT-END

B02B DEMODULATOR

B07A CI: PCMCIA CONNECTOR B04 PNX8543: B06G FPGA WOW - IO BANKS B05B PNX5100: VIDEO-IN B05E PNX5100: LVDS

B06D FPGA LOCAL CONTRAST - LVDS IN/OUT

B08A ANALOGUE EXTERNALS A

B07E HDMI SWITCH

B08B ANALOGUE EXTERNALS B

B08B ANALOGUE EXTERNALS B

B08D ANALOGUE EXTERNALS D

B08C ANALOGUE EXTERNALS C

B07E HDMI SWITCH

B05A PNX5100: SDRAM

B04G PNX8543: SDRAM

B07F PNX8543: FLASH

B07C USB CONNECTOR

B06F FPGA WOW - DDR

VIDEO

DDR2SDRAM

7HG0EDE1116AEBG

DDR2SDRAM

7HG1EDE1116AEBG

TUN-P11

IF-AGC

RF-AGC

TUN-P10

9T23

9T18

9T11

9T21

5

4

1T25

SAW 36M125

2T15

2T19

2T20

3T98

3T53

3T55

3000

3T50

5T12

1T11HD1816AF/BHXP

IF-OUT2

XTAL_OUT

RF-AGC

DC_POWER

+5V-TUN-PIN

+5V-TUN

9

IF-OUT1

MAIN HYBRIDTUNER

10

11

2

3

4

7

6

34

50

39

40

49

47

48

B-IF-_N-IF- PDP

IF-

44 IF-P

IF+

PDNB-IF+_N-IF+

TUN-P9

3 TUN-P3

ANTENNA-SUPPLYTUN-P1

1

2

7T50DRX3926K

DEMODULATOR

+5V-TUN

+5V-TUN

7T10UPC3221GV

AGC AMPLIFIER

1

IN

VCC

OUT

AGC CONTROL

1

3T70

43 CVBS4

CVBS-TER-OUT

3T70

9T63

9T617T52

9T20

3T22

33

1T5027M

7H00PNX85439EH/M2 7FN0

EP3C25F324C7N7C00PNX5120EH/M2

VIDEO STREAMSB04N

DDR2B05A

LVDSRX

B05B

SUPPLY

B05E

LVDSTX

B05E

DIGITAL VIDEO INB04H SDRAMB04G

CONTROLB04E

CONTROLB04F

F2

H3

1

5SVHS IN

24

3

1E14

1E11

CVBSFRONT-Y_CVBS

FRONT-C

1E03

AV4-Y

AV4-PB

AV4-PR

PB

PR

Y

EXT 3

SIDEI/O

EXT 1

AV2-Y_CVBSEXT 2

1E01

7

1E02

20

2021

1

7

11

1516

2021

1

7

11

1516

SCART1

SCART2

AV1_STATUS8

AV3_PB

AV3-PR15

11 AV3-Y

14

5

1 Y_CVBS-MON-OUT-SC

CVBS-TER-OUT

197E05

197E04

REGIMBEAU_CVBS-SWITCH9,10,11

1

1E05

2

3

14

13

R-VGA

G-VGA

B-VGA

H-SYNC-VGA

V-SYNC-VGA

1 610

11

5

15

VGACONNECTOR

1E04

H2

P1

M1

K1

G1

B18

A18

A19

T2

T1

M4

P4

K4

H1

N3

J3

L3

B04AAV1_BLK16

7E09

AV2-STATUS8

16 AV2-BLK7E14

B04ACONTROL

B04ACONTROL

B04ACONTROL

B04ACONTROL

3 HDMIB-RXC-

HDMIB-RX0+

HDMIB-RX0-HDMIB-RX1+

HDMIB-RX1-

HDMIB-RX2+

HDMIB-RX2-

2

100

99

97

96

94

93

HDMIB-RXC+

7E16-7E06Y-CVBS-MON-OUT

15

7

11

20

AV1-G

AV1-B

AV1-R

AV1-CVBS

9EA3

9EA1

9EA2

9EA7

J2

A3

L2

N2

G4

AV1-PB

AV1-PR

AV1-Y

AV1-Y_CVBS

B17

A17

B16

B15

A16

A13

B11

B12

A12

B14

A15

A14

B13

7P02TDA9996

HDMISWITCH

C_-C_+

D0_-

D0_+

D1_-D1_+

D2_-

D2_+

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

72

71

69

68

66

65

63

62

42

41

39

39

36

35

33

3223

22

20

19

17

16

14

13

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

90

89

87

86

84

83

81

80

191

182

1

1P05

3

4

7

910

12

6

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-HDMI SIDECONNECTOR

191

182

1

1P02

3

4

7

910

12

6

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-HDMI 1CONNECTOR

1

1P03

3

4

7

910

12

6

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

1

1P04

3

4

7

910

12

6

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

191

182

HDMI 2CONNECTOR

191

182

HDMI 3CONNECTOR

1

1P06

3

4

7

910

12

6

HDMIA-RX2+

HDMIA-RX2-

HDMIA-RX1+

HDMIA-RX1-

HDMIA-RX0+

HDMIA-RX0-

HDMIA-RXC+

HDMIA-RXC-

191

182

HDMI 4CONNECTOR

TX851A+ L14AP18TX851A- L15AN18TX851B+ K17AL18TX851B- K18AK18

TX851C+ L17AP19TX851C- M17AN19TX851D+ L13AP20TX851D- M14AN20TX851E+ P17AM20TX851E- P18AL20

TX851CLK+ N17AM19TX851CLK- N18AL19

TX852A+ U17AP22

TXF1A+ RX51001A+ AE20K5TXF1A- RX51001A- AF20L5TXF1B+ RX51001B+ AC20K2TXF1B- RX51001B- AD20K1

TXF1CLK+ RX51001CLK+ AC19M2TXF1CLK- RX51001CLK- AD19M1

TXF1C+ RX51001C+ AE19L2TXF1C- RX51001C- AF19L1TXF1D+ RX51001D+ AE18P2TXF1D- RX51001D- AF18P1TXF1E+ RX51001E+ AC18T3TXF1E- RX51001E- AD18R3

TXF2A+ RX51002A+ AE17U2TXF2A- RX51002A- AF17V3TXF2B+ RX51002B+ AC17U4TXF2B- RX51002B- AD17V4

TXF2CLK+ RX51002CLK+ AC16U6TXF2CLK- RX5100CCLK- AD16V6

TXF2C+ RX51002C+ AE16U5TXF2C- RX51002C- AF16V5TXF2D+ RX51002D+ AE15U7TXF2D- RX51002D- AF15V7TXF2E+ RX51002E+ AC15U8TXF2E- RX51002E- AD15

D

A

V8

1G50

TX2

TX1

TX3

TX4

QUAD LVDS1920x1080100/120HZ

1G51

+VDISP1

TO DISPLAY1080p 50/60Hz

TO DISPLAY1080p 100/120Hz

I2C

I2C

N.C.

TX852A- V17AN22TX852B+ U15AL22TX852B- V15AK22

TX852C+ U14AP23TX852C- V14AN23TX852D+ U13AP24TX852D- V14AN24TX852E+ U11AM24TX852E- V11AL24

TX852CLK+ U10AM23TX852CLK- V10AL23

PNX8543

H264USB 2.0

FPGAWOW

LOCALCONTRAST

9FG29FG39FG49FG59FG69FG7

9FG89FG99FGA9FGB9FGC9FGD

*JUMPERS IN CASE OF NO FPGA

DDRSDRAM8Mx16

7FL0EDD1216AJTA

7P10NAND01GW3B2BN6F

NANDFLASH

1G

18310_402_090305.eps090324

PCI-AD24<->NAND-AD

FE-DATA(0-7)

(0-12)

DDR2-D(0-15)

(16-31)

DDR2-A(0-12)

(0-12)DDR2

SDRAM

7C01EDE5116AJBG-8E-E

DDR2SDRAM

7C02EDE5116AJBG-8E-E

PNX5100-DDR2-D(0-15)

(16-31)

PNX5100-DDR2-A(0-12)

MM1-D(0-15)

MM1-A(0-12)

43

21

USB20-DMUSB20-DP

USB 2.0CONNECTOR SIDE

SW UPLOADJPEGMP3

1P07

3

1

4

2

AL16

AN16

AP16

USB-OC

PD_P

PD_N

XI

XO

IF_AGC

RF_AGC

CVBS

SIF

MD

PCMCIA

CONDITIONALACCESS

CA-MDO(0-7)MDO(0-7)

CA-MDI(0-7)

20+3V3

CA_MD0

CA_MDI

7P15-7P1674LVC245APW

BUFFER

3351

52

18

17

1P00

68P

PCMCIA-VCC-VPP

8,18,26,53+3V3VDDH

2,16,27,56+1V2VDDL

37+3V3AVDDAH_AFE1

42+3V3EVDDAH_CVBS

52+3V3DVDDAH_OSC

36,46+1V2AVDDAL_AFE

HDMI_RX1_B_P

HDMI_RX2_B_N

HDMI_RX2_B_P

HDMI_RREF

HDMI_RX1_B_N

HDMI_RX0_B_P

HDMI_RXC_B_P

HDMI_RXC_B_N

HDMI_RX0_B_N

HDMI_RX0_A_P

HDMI_RXC_A_N

HDMI_RXC_A_P

HDMI_RX0_A_N

HDMI_RX1_A_P

HDMI_RX2_A_P

HDMI_RX2_A_N

HDMI_RX1_A_N

AI51

AI44

CVBS1Y_P

AI23

AI33

AI13

AI42

AI43

AI54

PC3_AI3

VSYNCIN

PC1_AI3

PC2_AI3

PC3_AI1

PC1_AI1

PC2_AI1

AI32

AI22

AI12

AI41

TNR_TSDI

HSYNCIN

C16RREF-PNX85XX

3HK0

7E0274HC4053PW

16+5VMDX

VDDx_1V8

8,45,91,24,75,95

+1V8-PNX85XXVDDO_3V3

4+3V3

VDDx_3V346,55

+3V3

VDDH_3V3

15,21,34,40,64,70,85,88

REF-3V3

J2DDR2-VREF-DDRVREF

VREFJ2

DDR2-VREF-DDR

J1+1V8-PNX85XXVDDL

VDDLJ1

+1V8-PNX85XX

AB32DDR2-VREF-CTRL

AA31+1V8-PNX85XX

M_VREF

DQ

A

M_IREF3HJ5

12,37+3V3-NANDVCC

PCI_AD

USB_FAULT

USB_DPUSB_DM

AM17+3V3-PERUSB_RPU

3H37

AN17+3V3-PERUSB_VBUS

3H45

AK19

A_PA_NB_PB_NC_PC_ND_PD_NE_PE_N

CLK_PCLK_N

LOUT2_A_PLOUT2_A_NLOUT2_B_PLOUT2_B_NLOUT2_C_PLOUT2_C_NLOUT2_D_PLOUT2_D_NLOUT2_E_PLOUT2_E_N

LOUT2_CLK_PLOUT2_CLK_N

IREF_LVDS VDDA-LVDS

ANALOGUE AVB04K

VREFJ2

PNX5100-DDR2-VREF-DDR

VREFP24

PNX5100-DDR2-VREF-CTRL

AA5+1V2-PNX5100

L16+1V8-PNX5100

P22+1V2-PNX5100-DDR-PLL1

AB20+3V3

AB18+3V3-PNX5100-LVDS-IN

J5+1V2-PNX-TRI-PLL1

L5+1V2-PNX-TRI-PLL2

T5+1V2-PNX-TRI-PLL3

M22+1V2-PNX5100-DLL

AE25+3V3-PNX5100-DDR-PLL0

E15+1V2-PNX5100-LVDS-PLL

B15+3V3-PNX5100-LVDS-PLL

AE14+1V2-PNX5100-CLOCK

VDDLJ1

+1V8-PNX5100

VREFJ2

PNX5100-DDR2-VREF-DDR

VDDLJ1

+1V8-PNX5100

49VREF-DDR1

1+2V5-DDR1

AD14 +3V3-PNX5100-CLOCK

AJ21+3V3-PERVDD_3V3_PER

AG301V8-PMNX85XXVDD_1V8_DDR

AJ12+1V2-PNX85XXVDD_1V2_CORE

AC6+3V3-STANDBYVDD_3V3_SBPER

F16RREF-PNX85XXVDDA_HDMI_3V3_BIAS

AK20VDDA-LVDS

AK12VDDA-ADC

AJ6VDDA-DAC

VDD_3V3_LVDS

VDDA_3V3_ADAC

VDDA_3V3_AADC

AF51V2-STANDBYVDD_1V2_SBCORE

VDDB04P

LVDSB04O

PNX5120

HD-NMFHD 100Hz

+5V

3P59

+T

1

2

3

37

38

40

39

41

50

51

49

40

11

5

3

4

2

1

Page 63: Q549---32pfl9604ser

Block Diagrams EN 63Q549.2E LA 9.

2009-May-08

Block Diagram Audio

B02A FRONT-END

B02B DEMODULATOR

B07A CI: PCMCIA CONNECTOR B04 PNX8543:

B07D HDMI

B07E HDMI SWITCH

B04G PNX8543: SDRAM

B07F PNX8543: FLASH

B07C USB CONNECTOR

B04I PNX8543: AUDIO

B04I PNX8543: AUDIO B10A AUDIO

B04M PNX8543: AUDIO B08C ANALOGUE EXTERNALS C

B08C ANALOGUE EXTERNALS C

B08B ANALOGUE EXTERNALS B

B08A ANALOGUE EXTERNALS A

B07B AUDIO IN HDMI

1E07

1E10

DDR2SDRAM

7HG0EDE1116AEBG

DDR2SDRAM

7HG1EDE1116AEBG

TUN-P11

IF-AGC

RF-AGC

TUN-P10

9T23

9T18

9T11

9T21

5

4

1T25

SAW 36M125

2T15

2T17

2T19

2T20

3T98

3T53

3T55

3052

3T50

5T12

1T11HD1816AF/BHXP

IF-OUT2

+5V

RF-AGC

DC_POWER

+5V-TUN-PIN

+5V-TUN

9

IF-OUT1

MAIN HYBRIDTUNER

10

11

2

3

4

7

6

34

50

39

40

49

47

48

B-IF-_N-IF- PDP

IF-

44 IF-P

IF+

PDNB-IF+_N-IF+

TUN-P9

3 TUN-P3

ANTENNA-SUPPLYTUN-P1

1

2

7T50DRX3926K

DEMODULATOR

+5V-TUN

+5V-TUN

7T10UPC3221GV

AGC AMPLIFIER

1

IN

VCC

OUT

AGC CONTROL

1

3T70

43 CVBS43T707T52

9T20

3T22

33

1T5027M

7H00PNX85439EH/M2

VIDEO STREAMSB04N AUDIOB04L

STANDBYCONTROLLER

B04A

DIGITAL VIDEO INB04H

SDRAMB04G

CONTROLB04E

CONTROLB04F

F2

H3

B18

A18

A19

3 HDMIB-RXC-

HDMIB-RX0+

HDMIB-RX0-HDMIB-RX1+

HDMIB-RX1-

HDMIB-RX2+

HDMIB-RX2-

2

100

99

97

96

94

93

HDMIB-RXC+

B17

A17

B16

B15

A16

A13

B11

B12

A12

B14

A15

A14

B13

7P02TDA9996

HDMISWITCH

C_-C_+

D0_-

D0_+

D1_-D1_+

D2_-

D2_+

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

72

71

69

68

66

65

63

62

42

41

39

39

36

35

33

3223

22

20

19

17

16

14

13

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

90

89

87

86

84

83

81

80

191

182

1

1P05

3

4

7

910

12

6

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-HDMI SIDECONNECTOR

191

182

1

1P02

3

4

7

910

12

6

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-HDMI 1CONNECTOR

1

1P03

3

4

7

910

12

6

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

1

1P04

3

4

7

910

12

6

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

191

182

HDMI 2CONNECTOR

191

182

HDMI 3CONNECTOR

1

1P06

3

4

7

910

12

6

HDMIA-RX2+

HDMIA-RX2-

HDMIA-RX1+

HDMIA-RX1-

HDMIA-RX0+

HDMIA-RX0-

HDMIA-RXC+

HDMIA-RXC-

191

182

HDMI 4CONNECTOR

PNX8543

H264USB 2.0

7P10NAND01GW3B2BN6F

NANDFLASH

1G

18310_403_090305.eps090313

PCI-AD<->NAND-AD

FE-DATA(0-7)

(0-12)

DDR2-D(0-15)

(16-31)

DDR2-A(0-12)

43

21

USB20-DMUSB20-DP

USB 2.0CONNECTOR SIDE

SW UPLOADJPEGMP3

1P07

3

1

4

2

AL16

AN16

AP16

USB-OC

AN14

AP13

17351

2

SPEAKER-L3

4

SPEAKER-R

+AUDIO-L

-AUDIO-R

ADAC(1)

ADAC(2)

RESET-AUDIOAD1

AC5

ADAC(4)

AUDIO-HDPH-L-AP

AUDIO-HDPH-R-APADAC(3)

HeadphoneOut 3.5mm

AM12

AM11

7HV0TPA6111A2DGN

HEADPHONEAMPLIFIER

1

7

2

6

5RESET-AUDIO

A-PLOP B08A

7D10TPA3123D2PWP

CLASS DPOWER

AMPLIFIER

OUT-L

OUT-R

5

6

22

15

IN-R

IN-L

MUTE

SD

AUDIO-MUTE 4

2A-STBY

A-STBY

B08B

STANDBY &PROTECTION

7D03

LEFT-SPEAKER

RIGHT-SPEAKER

AUDIO-IN5-L

AUDIO-IN5-R

AL9

AL8

AN7

AP7

AK6

AL6

AP6

AM5

AN5

AP5

1E11

AUDIO INL+R

1E04

AUDIO-OUT-R

AUDIO-OUT-L AN11

AP10

AUDIO OUTL+R

V1DIGITALAUDIO

OUT

ADAC(5)

ADAC(6)

SPDIF-OUT

8

14

10

12

7E10A-PLOP

B04M

EXT 3

SIDEI/O

AUDIO-CL-L

A-PLOP

1

7

3

5

8

6

6

4

5

ADAC(7)

ADAC(8)

AUDIO-IN3-L

AUDIO-IN3-R

AM6

AN6

AUDIO INL+R

1E03

EF7HM2-1

EF7HM2-2

ADAC2

ADAC1

1E15

2

3

1

7HVA-1 7HVA-2

EF7E03

1

1E013

6

AP-SCART-OUT-L

AP-SCART-OUT-R

2 AV1-AUDIO-R

AV1-AUDIO-LEXT 1

EXT 2

1

1E02

3

2

6

AP-SCART-OUT-L

AP-SCART-OUT-R

AUDIO-IN2-R

AUDIO-IN2-L

2021

1

7

11

1516

SCART1

SCART2

A-PLOP

7E01A-PLOP B04M

2021

1

7

11

1516

1P0A

1P0B

AUDIO-IN4-L

AUDIO-IN4-R

AUDIO INVGA

DVI -> HDMI

7HM1

7HM1

AUDIO-CL-R3EA8

3EA7

2

2

2

2

AUDIO

9EA4

9EA4

AUDIO-IN1-L

AUDIO-IN1-R

PCMCIA

CONDITIONALACCESS

CA-MDO(0-7)MDO(0-7)

CA-MDI(0-7)

20+3V3

CA_MD0

CA_MDI

7P15-7P1674LVC245APW

BUFFER

335152

18

17

1P00

68P

PCMCIA-VCC-VPP

PD_P

PD_N

XI

XO

IF_AGC

RF_AGC

CVBS

SIF

MD

3T56

ANALOGUE AVB04K

HDMI_RX1_B_P

HDMI_RX2_B_N

HDMI_RX2_B_P

HDMI_RREF

HDMI_RX1_B_N

HDMI_RX0_B_P

HDMI_RXC_B_P

HDMI_RXC_B_N

HDMI_RX0_B_N

HDMI_RX0_A_P

HDMI_RXC_A_N

HDMI_RXC_A_P

HDMI_RX0_A_N

HDMI_RX1_A_P

HDMI_RX2_A_P

HDMI_RX2_A_N

HDMI_RX1_A_N

C16RREF-PNX85XX

3HK0

VDDx_1V8

8,45,91,24,75,95

+1V8-PNX85XXVDDO_3V3

4+3V3

VDDx_3V346,55

+3V3

VDDH_3V3

15,21,34,40,64,70,85,88

REF-3V3

8,18,26,53+3V3VDDH

2,16,27,56+1V2VDDL

37+3V3AVDDAH_AFE1

42+3V3EVDDAH_CVBS

52+3V3DVDDAH_OSC

36,46+1V2AVDDAL_AFE

AJ21+3V3-PERVDD_3V3_PER

AG301V8-PMNX85XXVDD_1V8_DDR

AJ12+1V2-PNX85XXVDD_1V2_CORE

AC6+3V3-STANDBYVDD_3V3_SBPER

F16RREF-PNX85XXVDDA_HDMI_3V3_BIAS

AK20VDDA-LVDS

AK12VDDA-ADC

AJ6VDDA-DAC

VDD_3V3_LVDS

VDDA_3V3_ADAC

VDDA_3V3_AADC

AF51V2-STANDBYVDD_1V2_SBCORE

VDDB04P

J2DDR2-VREF-DDRVREF

VREFJ2

DDR2-VREF-DDR

J1+1V8-PNX85XXVDDL

VDDLJ1

+1V8-PNX85XX

12,37+3V3-NANDVCC

AM17+3V3-PERUSB_RPU

3H37

AN17+3V3-PERUSB_VBUS

3H45

USB_FAULT

USB_DPUSB_DM

AI51

AI44

+5V

3P59

+T

IN-1

SHUTDOWN

IN-28

+3V3VDD

VO_1

VO_2

AIN_4_L

AIN_4_R

ADAC7

ADAC8

AIN_1_R

AIN_2_L

AIN_2_R

AIN_3_L

AIN_5_L

AIN_5_R

AIN_3_R

SPDIF_OUT

ADAC5

ADAC6

AIN_1_L

PO_7

PO_6

ADAC3

ADAC4

AADC

VREF_POS

AN8

AM9VDDA-AUDIO

VDDA_3V3_DACAK9

VDDA-DAC

5HRW

5HRZ

PVCC_L

PVCC_R

1,3

10,12+AUDIO-POWER

5D07

5D08

AB32DDR2-VREF-CTRL

AA31+1V8-PNX85XX

M_VREF

DQ

PCI_AD

A

M_IREF3HJ5

Page 64: Q549---32pfl9604ser

EN 64Q549.2E LA 9.Block Diagrams

2009-May-08

Block Diagram Control & Clock SignalsCONTROL + CLOCK SIGNALS

B07F PNX8543: FLASH

B07C USB CONNECTORB05A PNX5100: SDRAM

B06F FPGA WOW - DDR

B06E FPGA WOW - POWER & COTROL

B01B DC / DC

B02A FRONT END

B04G PNX8543: SDRAM

B03G PNX8543: CONTROL B05F PNX5100: CONTROL

B04B PNX8543: DEBUG

B04A PNX8543: STANDBY CONTROLLER

B07A CI: PCMCIA CONNECTOR

B07H BUFFERING

B07G ETHERNET

B09A MINI PCI CONNECTOR

B05 PNX5100:

B07D HDMI

B04 PNX8543:

B04A PNX8543: STANDBY CONTROLLER

B08D ANALOGUE EXTERNAL D

B06G FPGA WOW - IO-BANKS:

1M99

7

6

5

1M952

LED1AJ3

AN2

AD3DETECT2

AF3

AG4

RESET-STBY

4x HDMICONNECTOR

AH3RESET-SYSTEM

AE4 ENABLE-3V3

PNX8543

7H00PNX85439EH/M2

43

21

USB20-DMUSB20-DP

USB 2.0CONNECTOR

SIDE

TOIR/LED PANEL

ANDKEYBOARD CONTROL

AC1 RESET-NVM

AJ2 LED2

B04F PCI

1HF

0

27M

W2

W1

1P07

3

1

4

CONTROLB04E

STANDBY B04A

HDMI_DVB04H

AH1AV1-BLK

AD5 STANDBY

2

AF2

AN3 KEYBOARD

RC

LIGHT-SENSOR

AF1 REGIMBEAU_CVBS-SWITCH

AD1 RESET-AUDIO

AC5 AUDIO-MUTEAP2AV1-STATUS

6SPI-CLK 512KFLASH

STANDBYSW

7H02M25P05-AVMN6P

AJ1

3SPI-WPAK4

1SPI-CSBAK35SPI-SDOAJ4

2SPI-SDIAK1

AL16

AN16AP16

BACKLIGHT-OUT

BACKLIGHT-BOOST

7303DRX3926K-XK-A3

DEMODULATOR

FE-CLK 9

PCI-CLK-OUTAP28

A30

RESET-SYSTEMAN28

U3

B02BB02B B04A B04B

WC-EEPROM-PNX5100

7HC4

EEPROM(8Kx8)

7HC3M24C64-WDW6P

WP-NANDFLASH NANDFLASH

(1G)

7P10NAND01GW3B2BN6F

19

8

EEPROM(2Kx8)

7CD0M24C08-WDW6P

7

B08A

B01A

AE5 POWER-OK

B10A

B07A

B05H

7HD0 NCP303LSN30G

2INP

1OUTP

+3V3-STANDBY+3V3-STANDBY

3 GND

B04E

B04G MEMORY

B04O LVDS

B04N TUN_CA

7P02 TDA9996

HDMISWITCH

FE-VALID 10FE-SOP 5

B08A

1P001

68

RESET-SYSTEM B03G

PCMCIA

CONDITIONALACCESS

7HG0EDE1116AEBG

7HG1EDE1116AEBG

SDRAMDDR2-CLK_P

DDR2-CLK_N

AB34

B10TNR_MICLK

M_DQ

M_A

M_CLK_P

M_CLK_N

PLL_OUT

CLK

RESET_SYS

GPIO_1

GPIO_6

GPIO_4

GPIO_5

P0_1

P2_2

P2_7

P1_1

P2_6

P0_6

P0_7

P2_3

XTAL_I

XTAL_O

SPI_CLK

SPI_CSBSPI_SDOSPI_SDI

P6_5

TNR_MIVALTNR_MISTRT

CA_MICLK

CA_MDI

CA_VSN_0

CA_MOCLK

CA_MDO

CA_DATA_DIRCA_DATA_EN

CA_ADD_EN

CA_RDY

PCI_AD

XIO_ACK

XIO_SEL_0

GPIO_3

USB_FAULT

USB_DMUSB_DP

P0_5

CADC_1

CADC_0

P2_5

P2_4

P3_3

P3_5

P3_4

CADC_2

CADC_3

RESET_IN

P1_2

HDMI_RX

P1_0

PWM_1

PWM_0

TNR_TSDI

C10B9

AB33

J8

K8

7N13

7N117N12

CA-DATADIR

CA-ADDEN

CA-DATAEN

CA-MICLK H32

D31A31

B31

TOPOWER SUPPLY

B08A

AH2AV2-BLKB08A

32

CO

MM

ON

INT

ER

FAC

E

1A011

68

MIN

I PC

I CO

NN

EC

TOR

7P15-7P16

USB-OC

TOPOWERSUPPLY

+3V3-STANDBY

+5VB04M

B01B B01C

AD4DETECT1

DETECT2

B04A

B01B

9H25

9H13

3HFG

7 XIO-ACK

9 XIO-SEL-NAND

18310_404_090305.eps090327

A20

B20

L32

L31UART

SERVICECONNECTOR

UPSTANDBY

RESRES

RXD-UP

TXD-UP

FE-DATA(0-7)

DDR2-D(0-31)

DDR2-A(0-12)

LCD-PWR-ON

BACKLIGHT-PWM-ANA-DISP

AF24

B26

A26

E18

F18

7C01EDE5116AJBG

7C02EDE5116AJBG

SDRAMPNX5100-DDR2-CLK_P

PNX5100-DDR2-CLK_N

P26

P25

J8

K8

PNX5100-DDR2-D(0-31)

DDR2-A(0-12)

1

2

3

4

5

6

7

8

1M20

AG1UA_RX_0

3

AH5UA_TX_1

3

1E50

7U11

RC_UP

ARX-DDC-SCL

PCI-CLK-ETHERNET

PCI-CLK-PNX5100

PCI-CLK-MINI

1E06

3

2

1

PCMCIA-A(0-14)

PCI-AD(0-31) PCI-AD(0-31)PCI-AD(0-31)

PCMCIA-D(0-7) PCI-AD(24-31)

PCI-AD(0-31)

PCI-AD(24-31)

CA-MDI(0-7)

MDO(0-7) CA-MDO(0-7)

CA-MOCLK_VS2 H31

A34MOCLKA

DETECT-12V

HOT_PLUG_AD19HOTPLUG-AB07E

AP1AV2-STATUS B08A

J34

GNT_BE29

L34

AD2

IRQ-CA

IRQ-CA

GPIO_2U4IRQ-PCI

AE1 LAMP-ON

B01B

B05H

CLK-OUT-PNX5100

BOOST-CTRLA24B23

B01BBACKLIGHT-BOOST

AB3 RESET-PNX5100P0_2 B05F

AB2 RESET-ETHERNETP0_3 B07G

V2 B07BPNX8543-LCD-PWR-ON_SPI-DI

P1_7

P6_4

SDM2H07

SDM

SPI-PROG AK2

AG2

2H06

SPI-PROG

BACKLIGHT-PWM-ANA-DISPB05H

9

8

HDMIB-RX12BRX-DDC-SCL

CRX-DDC-SCL 61

DRX-DDC-SCL 79

31

PCEC-HDMI

CEC-HDMI

57

1 2

19

18

CONTROL

1304

27M

50

49

1P05-151P02-15

1P03-151P04-15

1P05-131P02-131P03-131P04-13TO PIN:

7P32

3HD

4

PCI-CLK-PNX8535

3HFH

3HF4

3HF2

B07G

B05G

B09A

LOUT2_CLK_N

LOUT2_CLK_P

CLK_PCLK_N

TX852CLK-AL23

TX852CLK+AM23TX851CLK-AL19

TX851CLK+AM19

B06GB06G

B06G

B06G

NAND-AD(0-7) <-- PCI-AD(24-31)

7N04DP83816AVNGNOPB

MACPHYTER II

10/100 Mb/S

7C00PNX5120EH/M2/F4

PNX5120

1N02

25M

17

18

1CD

0

27M

AE13

AF13

1N00

ETHERNETCONNECTOR

PCI-CLK-ETHERNET 60B04F

RESET-ETHERNET 62B04A

IRQ-PCI61

IRQ-PCIRESET-mPCI

PC1-GNT-MINI

MINI PCI CONNECTOR FOR WIFI PANEL

PCI-GNT-B

9H25

DDR2B05A

PCI_XIOB05G

CONTROLB05F

7FL0EDD1216AJTA

DDDRSDRAM8Mx16MM1-CLK+

MM1-CLK-

A2

A1

45

ASDOD1 5

DCLKH4 6

nCSOE2 1DATA0H3 2

MM1-D(0-15)-->DQ1(0-15)

MM1-A(0-11)

7FN0EP3C25F324C7N

I/O BANKB06G

GPIOB05H

RESET-PNX5100B04A

L3 PCI-CLK-PNX5100B04A

BACKLIGHT-CTRL

BACKLIGHT-CONTROL-FPGA-IN

CLK-OUT-PNX5100

9CG8

FPGAWOW

7CG8

46

AF14

NANDFLASH

(1G)

7P10NAND01GW3B2BN6F

PCI-AD(0-14)

9E05

9E03

9E41

9E40

Page 65: Q549---32pfl9604ser

Block Diagrams EN 65Q549.2E LA 9.

2009-May-08

Block Diagram I2C

I²CPNX8543: CONTROLB04E

PNX8543: SDRAMB04G

FPGA BACKLIGHT - LVDS & I2C - MUXB06A

FPGA BACKLIGHT - LVDS & I2C - MUXB06A

FPGA LOCAL CONTRASTLVDS IN/OUT

B06D

PNX8543: FLASHB07FPNX8543: VIDEO STREAMSB04N

ANALOGUE EXTERNALS D-B08DHDMIB07D

HDMI SWITCHB07E

PNX5100: LVDSB05E

TEMPERATURE & FAN CONTROLB06C

LED PANEL CONTROLB06B

FPGA WOW - IO BANKSB06GFPGA WOWPOWER & CONTROL

B06E

FPGA WOW - DDRB06F

PNX5100: CONTROLB05FDEMODULATORB02B

ANALOGUE EXTERNALS BB08B

FRONT-ENDB02A

PNX8543: STANDBY CONTROLLERB04A

DC/DCB01B

ANALOGUE EXTERNAL DB08D

PNX5100: SDRAMB05A

PNX5100: SDRAMB07F

FLASH1G

7P10NAND01GW3B2BN

7HG0EDE1116AEBG

SDRAM

7HG1EDE1116AEBG

7C01EDE5116AJBG

SDRAM

7C02EDE5116AJBG

DDRSDRAM8Mx16

7FL0EDD1216AJTA

7FH0M25P16

16MFLASH

7F01M25P20

2MFLASH

7H02M25P05

512KFLASH

1M99

1R08

5

6

1M71

4

2

1

3

1 610

11

5

15

VGACONNECTOR

DATA-SDA

CLK-SCL

5

6

1E05

12

15

EEPROM

256x8

7E18M24C02

7H00PNX85439EH

PNX8543

B33

D32SDA 2

SCL 2

3HPU

3HPS

2 1

7F08PCA9540BDP

I2CMULTIPLEXER

AK5

AL5

AC1

MC_SDA

MC_SCL

PO_1

3H66

3H55

5 6

7HC3M24C64

EEPROM(NVM)

3H53

3H52

83HC

2-2

+3V3-PER

RESET-NVM 3HC2-1

SDA-UP-MIPS

SCL-UP-MIPS

3H53

3H53

+3V3-STANDBY

RES

SDA2

SCL2

SDA-SET

SCL-SET

SDA-BOLT-ON

SCL-BOLT-ON

SDA-SET0

SCL-SET0

SDA-DISP

SCL-DISP

3HP

V

3HP

T

+3V3-PER

G32

D33

SDA 3

SCL 3

3HPJ

3HPH

54 53

7F00XC3S250E

SPARTAN-3FPGA

3F23

3F22

49 50

7P02TDA9996

HDMIMUX

3P77

3P76

G17 G18

7FN0EP3C25F324C7N

FPGALOCAL

CONTRAST

3FN

F

3FN

G

24 23

7T50DRX3926K

DEMODULATORMICRONAS

3T58

3T57

SDA3

SCL3

SDA-SSB

SCL-SSB

3HP

M

3HP

K

+3V3-PER

L32

L31

9

10

12

11

GPIO_4

GPIO_5

AG1

AH5

UA_RX_0

UA_TX_1

RXD-UP

TXD-UP

3HP

C

3HP

L

+3V3-PER

3H58

3H60

+3V3-STANDBY

AL27

AK27

UA2_RX

UA2_TX

RXD-MIPS2

TXD-MIPS2

E19

C18

DDC_SDA_A

DDC_SCL_A

DDCA-SDA

DDCA-SCL

3HP

R

3HP

P

+3V3-PER

H33

F33

SDA 1

SCL 1

3HPE

3HPD

SDA1

SCL1

SDA-UP-MIPS

SCL-UP-MIPS

3H50

3H49

+3V3-PER

STANDBY

HDMI_DV

PCI

MEMORY

4

5

SDA-SET1

SCL-SET1

7

8

TO TEMP

SENSOR

UARTSERVICE

CONNECTOR

3U67

3U66

+3V3

3FA6

3FA5

3CDA

3CD9

TOAMBI-LIGHT

MODULE

9F22

9F21

+3V3

3FA

A

3FA

B

+3V3

3F37

3F36

+3V3

1M59

3

4

5

7

1

3

EF7HC4

I2C-SDA

I2C-SCL

61

62

TUN-P7

TUN-P6

3T61

3T59

+3V3

TUN-SDA

TUN-SCL

RXD-UP

TXD-UP

RXD

TXD

13

14

2

9

1

4

11

8

RXD-MIPS

TXD-MIPS

RXD-UP

TXD-UP

D15

C15

DDC_SDA_B

M_DQ

M_A

DDC_SCL_B

DDC-SDA

DDC-SCL

9FA

2

9FA

1

9F20

9F19

9F15

9F13

5F05

SDA-AMBI-3V3

SCL-AMBI-3V3

3F39

3F38

+3V3

9F18

9F17

9F16

9F141 2

7F50LM75ADP

IC TEMPSENSOR

3F61

3F62

5 6

7CD0M24C08

BOOTEEPROM

3CD

D

3CD

C

K1 K2

7C00PNX5120EH

PNX5120FHD 120Hz

3CD

8

3CD

7

7 6

7F51PCA9533DP

I2C LEDDIMMER

3F67

3F66

3FH4

3FH5

D18

C18

L1

L2

3CA4

3CA5

3CA3

3CA2

TODISPLAY

TODISPLAY

TODISPLAY

RESERVED

9FNA

9FN9

7 6

1T11HD1816AF

MAINTUNER

1 2

7F50LM75ADP

IC TEMPSENSOR

3T16

3T15

9T71

9T70

9T16

9T15RES

3E70

3E47

+5VDCOUT

SCL

SDA

TO BOLT-ONMODULE

1M97

14

15

10

11

1F51

1

2

1G51

50

49

1G50

2

1

HDMICONNECTOR 3

1P04

16

15

RES

TO POWERSUPPLY

1R20

1

3

RES

1HP03U67

3U66

3E83

3E84

1

3

3P61

3P58

+5V-DDC

11

12

HDMICONNECTOR 2

1P03

16

15

3P64

3P63

+5V-DDC

30

31

HDMICONNECTOR 1

1P02

16

15

3P68

3P67

+5V-DDC

60

61

HDMICONNECTOR

SIDE

1P05

16

15

HDMICONNECTOR 4

1P06

16

15

1M96

5

6

3P66

3P65

+5V-DDC

3P29

3P28

+5V-DDC

78

79

6

5

ARX-DDC-SDA

ARX-DDC-SCL

BRX-DDC-SDA

BRX-DDC-SCL

CRX-DDC-SDA

CRX-DDC-SCL

DRX-DDC-SDA

DRX-DDC-SCL

ERX-DDC-SDA

ERX-DDC-SCL

9P19

9P20

9P29-4

5 6

7P07M24C02

EEPROM256x8

3P30

3P31

9P29-3

RES

3F41

3F40

1F53

3

23F17

3F18

5FC7

5FC5

R1-OUT

T1-IN

T1-OUT

R1-IN

7E17ST3232C

R2-OUT

T2-IN

RS232INTERFACE

3

21R08

9E35

9E36

1E50

1

3

UP

8

7T2-OUT

R2-IN

1E51

1

3

MIPS

FORMHP BOLT-ON

LEVEL SHIFTER FOR DEBUG ONLY

3E41

3E91

3HB1

3HB2

RESERVED

7E1974HC4066PW

3

10

13

6

5

12

UART-SWITCH

UART-SWITCHn

3ECK

3ECP

RXD-UP

TXD-UP3

21R12

3E08

9E41

9E40

STANDBY BUS400 kHz

SET BUS100 kHz

SSB BUS400 kHz

TUNER BUS400 kHz

AMBILIGHT BUS 30 kHz

DISPLAY BUS100 kHz

1E06

3

2

1

18310_405_090305.eps090316

7E20

B04A

QUADBILATERALSWITCHES

RESERVED

9E05

9E03

ERR53

ERR23

ERR27

ERR34

ERR25

ERR29

ERR21

ERR15

ERR13

ERR14

B04F

B04A

B04H

B04G

RESERVED

PNX5100-DDR2-D(0-31)(0-31)

PNX5100-DDR2-A(0-12)

MM1-D

MM1-A

DDR2-D

DDR2-A

PCI-AD

Page 66: Q549---32pfl9604ser

EN 66Q549.2E LA 9.Block Diagrams

2009-May-08

Supply Lines Overview

SUPPLY LINES OVERVIEW

MAINPOWER SUPPLY

B01A DC/DC

B01B DC / DC

B02B DEMODULATOR

B04A PNX8543: STANDBY CONTROLLER

B04B PNX8543: DEBUG

B04E PNX8543: CONTROL

B04F PNX8543: CONTROL

B04G PNX8543: SDRAM

B04H PNX8543: DIGITAL VIDEO IN

B04I PNX8543: AUDIO

B01C DC/DC

B02A FRONT-END

A SUPPLY

B04M PNX8543: AUDIO

B04N PNX8543: VIDEO STREAMS

B04O PNX8543: DIGITAL VIDEO OUT / LVDS

B04P PNX8543: POWER

B05A PNX5100: SDRAM

B05B PNX5100: VIDEO-IN

B05C PNX5100: POWER

B05E PNX5100: LVDS

B04L PNX8543: AUDIO

B05F PNX5100: CONTROL

B05G PNX5100: PCI

B05I PNX5100: DEBUG

B05H PNX5100: DISPLAY-INTERFACING

B06A FPGA BACKLIGHT-LVDS & I2C-MUX

B06B U-WAND

B06G FPGA WOW - IO BANKS

B07A CI: PCMCIA CONNECTOR

B07B AUDIO IN HDMI

B07C USB CONNECTOR

B06C TEMPERATURE & FAN CONTROL

B06D FPGA WOW - LVDS IN / OUT

B06E FPGA WOW - POWER & CONTROL

B06F FPGA WOW - DDR

B09A MINI PCI CONNECTOR

B07D HDMI

B08A ANALOGUE EXTERNALS A

B08B ANALOGUE EXTERNALS B

B08D ANALOGUE EXTERNALS D

B07E HDMI SWITCH

B07F PNX8543: FLASH

B07G ETHERNET

B07H BUFFERING

B09B DDR SUPPLY

B10A AUDIO

AB1 INTERFACE + SINGLE DC-DC

AB2 DUAL DC-DC

AB3 MICROCONTROLLER BLOCK

CN4

1 1

6 6

7 7

8 8

1M95+3V3-STANDBY

7U03TPS53124PW

+12VF

+12VF1

+3V3

23

15

17

+1V2-PNX85XX5U00

28

26

+12VF

12V/1V2COVERSION

12V/3V3COVERSION

5U33

5U03 +3V3F

1V2-STANDBY 1V2-STANDBY

+1V2-STANDBY

7U0M7U0NVOLT.REG.

+3V3+3V3

+3V3-STANDBY+3V3-STANDBY

+3V3-PER+3V3-PER

+5V+5V

+3V3-PER+3V3-PER

+1V8-PNX85XX+1V8-PNX85XX

3HJ3 DDR2-VREF-DDR

DDR2-VREF-CTRL

RREF-PNX85XXRREF-PNX85XX

+AUDIO-POWER+AUDIO-POWER

AUDIO-VDD

TO DC-DC INTERFAC

(OPTIONAL)

TO DISPLAY

TO DISPLAY

18310_406_090305.eps090306

CN7

1

2

3

4

5

6

24Vb

GND1

24Vb

GND1

24Vb

GND1

13161

2

3

13191

2

3

HVL

HVL

HVL

HVR

HVR

HVR

3.3V_ST

+12V

5U01

7U01TPS53124PW

+12V

+12VF2

+5V5-TUN

23

15

17

+1V2-PNX51005U04

28

26

+12VB05h

B04a,pB07d,B08d

B01a,B04p

B01c,B02b,B06c,B07b,h,B08b,B09b

B02a

B01a

B04i,m,B10a

12V/1V2CONVERSION

12V/5VCONVERSION

5U05

+1V2-PNX5100+1V2-PNX5100

+1V2-PNX85XX+1V2-PNX85XX

+3V3-PER+3V3-PER

CN5

1 1

6 6

7 7

2 2

3 3

4 4

5 5

8 8

LAMP-ON-OUT

1M99

BACKLIGHT-BOOST

+12VD

BACKLIGHT-OUT B05H

B04A

12V

12V

GND1

GND1

BL-ON_OFF

A/P_DIM

DIM

BOOST

+12V1U01

T3A

9 9 +AUDIO-POWER

10 10

RESERVED

+5V +5V

+33VTUN3U42 6U0B

VSW

7U0P

RESERVED

+3V3B01a

B01c

B01b

B01b

+3V3

+33VTUN+33VTUN

+VTUN

+5V-TUN+5V-TUN

+5V-TUN-PIN5T11

+3V3-PER+3V3-PER

+1V2A

+5V-TUN+5V-TUN

+12V+12V

+5V-TUN-CVBS

ANTENNA-SUPPLY

5T55

+3V3E5T52

+3V3D5T53

+3V3+3V3

+3V3A+3V3A

ANTENNA-SUPPLYANTENNA-SUPPLY

+12VF1U03

T3A

+12V

+12V

+VSND

GND_SND

N.C.

DualSynchronousStep-DownController

BACKLIGHT-PWM-ANA-DISP

5U31

+5V

B05H

B05H

CONTROL

CONTROL

CONTROL

CONTROLB05H

CONTROL

9 9INV_OK

POWER-OK

2 2

3 3

4 4

5 5

STANDBYB04ASTANDBY

GND1

GND1

GND1

CONTROL

7HM53HMF

CONTROL

7U50

IN OUTCOM

5U08

5U20

5U21

11 11 5U06

5U17

2K9 SUPPLIES

2K8 SUPPLIES

1M20

8

5+3V3-STANDBY TOIR/LEDPANEL

SS36

3T12

3T10

3T11

+1V2-PNX85XX+1V2-PNX85XX

+1V2

+3V3A5T54

9T64

9T62

7T54

IN OUTCOM

RES

7T56 3T69

+12V RES

3HJ1

9HM0

7HM6

RES

RES

DualSynchronousStep-DownController

7U06

7U05

7U02

7U08

7U0H-1

7U0H-2

7U0D-1

7U0D-2

+5V+5V

7HP0

IN OUTCOM

VDDA-AUDIO

+3V3+3V3

+3V3-PER+3V3-PER

VDDA-LVDSVDDA-LVDS

5HVD VDDA-LVDS

VDDA-AUDIOVDDA-AUDIO

5HY7 AUDIO-ADC

5HY4 VDDA-DAC

+1V2-PNX85XX+1V2-PNX85XX

+3V3-STANDBY+3V3-STANDBY

+1V2-STANDBY+1V2-STANDBY

+3V3+3V3

5HVH +3V3-PER

RREF-PNX85xx5HV8

+1V8-PNX5100+1V8-PNX5100

PNX5100-DDR2-VREF-CTRL

PNX5100-DDR2-VREF-DDR

+3V3+3V3

+3V3+3V3

+3V3-PNX5100-LVDS-PLL5C70

+VDISP2+VDISP2

+3V3+3V3

+3V3+3V3

VDDA-DACVDDA-DAC

3C20

3C22

1G5041

+1V8-PNX5100+1V8-PNX5100

+3V3+3V3

+3V3+3V3

+AUDIO-POWER+AUDIO-POWER

ADIO-VDDAUDIO-VDD

+1V8-PNX85XX+1V8-PNX85XX

+3V3-PNX5100-LVDS-IN5C67

+3V3-PNX5100-CLOCK5C68

+3V3-PNX5100-DDR-PLL05C69

+1V2-PNX5100+1V2-PNX5100

+1V2-PNX5100-DLL5C66

+1V2-PNX5100-CLOCK5C60

+1V2-PNX5100-TRI-PLL15C61

+1V2-PNX5100-TRI-PLL25C62

+1V2-PNX5100-TRI-PLL35C63

+1V2-PNX5100-DDR-PLL15C64

+1V2-PNX5100-LVDS-PLL5C65

1G511

+VDISP1+VDISP1

+3V3+3V3

5F04 +3V3M

7F06

IN OUTCOM

+2V5M

7F07

IN OUTCOM

+1V2M

+VDISP2

+VDISP1

+VDISP

+3V3+3V3

+12V+12V

+5V+5V

+5V+5V

PCMCIA-VCC-VPP3P09

+T

+3V3+3V3

+12V+12V

+1V2-PLL+1V2-PLL

+1V2-FPGA+1V2-FPGA

+2V5-PLL+2V5-PLL

+2V5out-FPGA+2V5out-FPGA

+2V5in-FPFA+2V5in-FPFA

+2V5-DDR1+2V5-DDR1

3V3-FPGA3V3-FPGA

VREF-FPGA1VREF-FPGA1

+2V5+2V5

+1V2-PNX85XX+1V2-PNX85XX

+3V3+3V3

+12VD+12VD

+3V3+3V3

+3V3F+3V3F

7CG2LCD-PWR-ON

+12V

+3V3+3V3

+12V

+VDISP+VDISP

1C02

T3A

1C01

T3A

1F50

T1A

5CG0

5CG2

RES

+5V+5V

1F51415FG1

5FG2

5FH4 +2V5-PLL

+1V2-PNX85XX+1V2-PNX85XX

+1V2-PLL

+1V2-FPGA

+3V3+3V3

CFH0

CFH1

+3V3-FPGA

+1V8-PNX85XX+1V8-PNX85XX

+1V8-PNX5100

+2V5+2V5

5FH2 +2V5out-FPGA

+2V5in-FPGA5FH3

5FH0

+2V5+2V5

VREF-FPGA1

+2V5-DDR15FL0

3FLM

VREF-DDR13FLK

5FH1

5FH4

7CG1

CIN-5V

1P0318HDMI 2

CONNECTORBIN-5V

1P0518HDMI SIDE

CONNECTOR

AIN-5V

1P0218HDMI 1

CONNECTOR

+3V3-STANDBY+3V3-STANDBY

+5V+5V

+3V3+3V3

1V8-HDMI

DIN-5V

1P0418HDMI 3

CONNECTOR

+5V-EDID

REF-3V3

3P47

5P11

+3V3+3V3

+5V+5V

+3V3+3V3

+5V+5V

+12V+12V

+3V3+3V3

+5V+5V

+3V3-STANDBY+3V3-STANDBY

+5V-DDC

5N07 +3V3-ET-ANA

+3V3+3V3

5N06 +3V3-ET-DIG

+3V3+3V3

+12V+12V

+5V-TUN

+5V5-TUN+5V5-TUN

+3V3+3V3

+3V3-NAND5P09

+3V3+3V3

+3V3-mPCI5A00

+5V+5V

+5V-mPCI5A01

1M963

EIN-5V1P0618HDMI SIDE

CONNECTOR

RES

7P13VOLT.REG.

+12V+12V

VLED1

+16V+16V

VLED2

RES

7P11

+3V3F+3V3F

+AUDIO-POWER+AUDIO-POWER

+2V5

+12V+12V

+2V5-REF

+V-LM833

7A00-1LCD-PWR-ON

+1V8-PNX85XX

7A00-2LCD-PWR-ON

7A07VOLT.REG.

3A26

3A07

7A01

7A02

7P01

IN OUTCOM

RES

5T51

B02b,B04a,pB06a,e

B05h,B09b

B01b,B02b,B04a,l,m,n,p,B05b,c,e,h,f,g,i,B06a,b,c,e,B07a,d,f,g,h,B08a,b,d,B09a

B04p

B04p

B09b

B04p

B04p

B01c

B04p

B01a

B01a

B01a

B01b

B02b

B01b

B01b

B07h

B07h

B02b

B01b

B01c

B01a

B01b

B01a

B01c

B04p

B01a

+3V3+3V3B01a

B01b

B04i

B04p

B01a

B01a

B04l

B02a

B02a

B06e

B01c

B01a

B01a

B05h

B05h

B06e

B01a

B01b

B01b

B09b

B04p

B01b,B04a,lB06a,B07a,c,d,B08a,b,d,B09a,d

B07h

B04aB05c

B02a

B04m

B04p

B04a,b,e,f,n

B04l

B04o

B04h

B01a

B01a

B01a

B01a

B01a

B01a

B01a

B09b

B01c

B01a

B01b

B01a

B01b

B05h

B01a

B09b

B01a

B09b

B06e

B06e

B06e

B06e

B06e

B06f

B06e

B06f

B09b

B01b

B01a

B01c

B01b

B01c

B01a

B01b

+5V-EDID+5V-EDIDB07d

+1V8-PNX85XX+1V8-PNX85XXB09b

B01c

B01a

B01a

B01a

B01c

B01a

B01a

B01c

B01b

B01c

B01a

B01b

B01c

B01b

B06d

B05e

B05e

B06g

B06g

B06g

B06g

B06g

B06g

B06g

B06g

B05a,c

B01a

B01c

B01a

B01b

B01b

AB2

AB2

B07e

B06a,e,f

B04g,p,B06e,B07d

B02a,b

AB1

AB1

AB2

AB3TO 1M59

SSBB06A

+24V

+3V3

1M90

1

1M59

6

TO CN7SUPPLY

TO AMBI-LIGHT

MODULE

OPTIONAL

OPTIONAL

OPTIONAL

6P06

1101

T3A

+24VF5102

c001

c002

+3V3+3V3

+1V8

7200TPS54283PWP

+24VF

+12V

14

12

+24VF

5201

+16V3 5200

AB1

B01b

NONSYNCHRONOUS

CONVERTER

(VLED1)

(VLED2)

7301

IN OUTCOM

1M846

11

13

1M596 TO 1M59

DC-DCOR

AMBI-LIGHTMODULE

AB1

5F05

Page 67: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 67Q549.2E LA 10.

2009-May-08

10. Circuit Diagrams and PWB Layouts

Interface Ambilight: Interface + Single DC-DC

C

VCC

GND GND_HS

SWI_EMIT

SWI_COL

VFB

LVI_OUT

VIA

LPK_SENSE

DRV_COL

BOOT_IN

21

TIM_CAP

NC

out

9

in

E

in

F

out

1M85

2 9

I

3104 328 58351

1

A

outout

13

in

3104 328 58371

out

3109 D2

out

G

13

3110 D3

7

C

D

out

5103/5104

3104 328 58341

12V

2107 E92108 D32109 E33100 B5

owne

r.

7

E

3105 D53106 D53107 D53108 E9

12V

12

16V

116

c002 E2

85

3 4

STUFFING DIVERSITIES FOR DC/DC INTERFACE AMBI 2K9

F122 E2

F123 E2F124 E2F125 B3F126 A2I100 A6I101 C6I102 C6I103 C6

B

I109 A8c001 E2

1101

H

INTERFACE + SINGLE DC-DC

out

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or

in p

arts

2

24V

10

outout

2102 C62103 D6

out

F121 E2

F114 B5F115 C2

3101 C53102 D63103 D93104 D6

F120 D2

I

3

8

1 2 3 4 5 6 7 8 9

1 2

5106 B85107 A6

5 6 7

in

6

12

J

VLED2

I104 D9I105 D5I106 D7I108 D6

C

D

E

A

B

C

D

E

1100 A61101 A71M59 C21M84 A21M85 A21M90 D22100 A62101 B5

F109 B3F110 B3

2104 D52105 D92106 D9

431

16V

3104 328 58361

F116 D2F117 D2F118 D2F119 D2

16V

63V

C

RES

See the stuffing diversities table in the case of components marked with one star (*)

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

H

G

3111 E83112 B65100 A85101 A85102 A75103 B85104 B85105 B8

16V

5108 A66100 C87100 B7

5105/5106

in

B

DC/DC INTERFACE

8

D

9

A

B

10

J

11

9101 C39102 C39103 C39104 C3F101 B3F102 B3F103 B3F104 B3F105 B3F106 B3F107 A7F108 B3

F111 B3F112 B3F113 B3

A

5

4

F

VLED1

12V

RE

S

+16V

F118

5101

30R

VSW

I108

F103

+3V3

+24VF

F112

I100

+12V

RES100R3109

4567

1735446-7

1M59

123

+24V

F107

(RES)9103

I106

3K3

3108

1%

3102

15K

2102

F101

2n2

F104

5106

30R*

+16V

+16V

F122

9104

1

SUPERS.

1

NAME

DATEMGr CHECK

3104 313 6325AMBI 2K9

DC-DC INTERFACE

A3

08-08-06

08-06-19

08-12-06

08-10-23

08-09-18

08-08-06

5

4

3

2

***031**

3

2

08-10-23

Peter Van Hove

08-06-19

CT ROYAL PHILIPS ELECTRONICS N.V. 200808-06-06********

13

SETNAMECHN

CLASS_NO

100n

2105

1M0

3105

F115

I101

F123

F111

3101

47R

123456

1735446-6

1M90

9102

F117

(RES)

3104

330R

F121

F120

+24V

220p

2103

12K

3107

F102

VLED2

*

F124

30R

5105

F126 +24V

c001

F108

F105

F109

3031

2122232425262728

10111213

1

3

1716

20

29

5

18 19

514

2

6789

NCP3163BMNR2G7100

Φ

14

VLED1

+3V3

100n

2107

T2.0A

1101 I109*

30R

5107 RES

30R

5108 RES

F110

1%33

K

3106

30R

5100

RE

S

56789

15 16

1

1011121314

234

F113

502382-1470

1M84

100K

3111

2100

220n

2101

10n

3100

0R1

F114

RE

S

VLED2

2108

100p

100R

3112

VLED1

c002

2106

100n

1100

3.0A 32VT 10u

5102

100p

2109

RE

S

9101

F116

+12V

3110100R

RES

F106

+24V

F125

I103

I105

9

15 16

I104

1314

2345678

1M85

502382-1470

*1

101112

100n

2104

+16V

SS

24

6100

30R

5104

*

5103

30R*

3103

3K3

F119

SPI-LATCH2CONN

SPI-LATCH1CONN

SPI-LATCH2CONN

SPI-LATCH1CONN

SPI-LATCH2

SPI-LATCH1

I102

CONTROL1CONTROL2

SDA

SPI-CLOCK-BUF

SPI-DATA-RETURNSPI-DATA-OUT

PWM-CLOCK-BUF

BLANK-BUFEEPROM-CS

TEMP-SENSORPROG

SCL

18310_600_090305.eps090305

Page 68: Q549---32pfl9604ser

EN 68Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

Interface Ambilight: Dual DC-DC

C

PVDD1 PVDD2

EN1SW1BOOT1

SW2

FB2EN2

BOOT2

FB1

ILIM2SEQBP

GND GND_HS

VIA2

9202 C4F200 B2F201 C7

F203 B5

F207 C4

3

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

I212 C3

I213 D5

I205 B6I206 B6I208 B3I209 B6I210 C6

3204 B33205 B63206 D3

I211 C3

3208 D7

I214 D4

3210 D3

I215 D3I216 B5I217 B4

4

B

C

DF

The components marked with two stars (**) belong to the 16V versions

12

B

13

A

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or

in p

arts

6

G

7200 B49201 B5

1

(VLED1)(VLED2)

F202 D3

2217 C7

F204 B4

2219 D2

I200 A3

75

117

2212 C42213 C62214 C3

H

6

9

8

D

DUAL DC-DC

10

I201 A6I204 B2

3202 B33203 B6

(3104 328 58331, 3104 328 58341, 3104 328 58361, 3104 328 58371).

I

1

3207 D2

8

3209 D5

2

3211 D3

8

G

6 7 8

A

J

E

Aow

ner.

6200 B26201 B7

F

3

I

D

2216 C2

C

2218 D1

E

2220 D7

2208 B72209 B72210 B82211 C3

2207 B2

2215 C6

1

C

2 13

J

3200 A33201 A6

109

2 3

1

4 5 6 7

3 4 5

2

B

C

D

7200 : TPS54383 in case of 16V or dual dc-dc converter

A

B

12

5

H

3212 D63213 D65200 B25201 B7

4

E

11

22u

2209

RES

2200 A42201 A42202 A52203 A52204 B32205 B62206 B1

E

The components marked with one star (*) belong to the 12V versions (3104 328 58351, 3104 328 58371).

2221 D32222 D52223 D82224 D8

3204

**

10R

*33

K

3213

I201

3207

68K**

**

9202

1%

I217

100u22

06

**

F202

35V

3208

47K1%

*

4u7

2207

** RES

+12V

2208

22u

F200

I214

F207

I209

2200

100u

35V

+12V

4u7

I213

RE

S

2212

I200

3209 3K

3

*

*

SS

24

6201

1n0

2215

**

+16V

2214

1n0

1n0

2213*

22n

2222

RE

S

*

2202

220n

10u

2224

3202

6R8

**

*

**

2223

10u

I205

10u

5200

220n

2201

**

+24VF

6200

SS

24

I215

9201*

F203

I210

2210

220u

25V*

3212

3K3

1%

*

47n

2205 *F204

2218

4u7

RE

S

4u7

2219

RE

S

I206

100u22

03

3203

6R8*

35V

*

3205

10R

47n**

33K**

2204

RE

S

3211

RES

2221

22n

22n

2216 2217

22n

RES

6R8

3201RES

**

RE

S

2211

1n0

VLED1

3K332

06

6R8

3200RES

F201

*

I212

5201

10u

+16V

2526

1718192021222324

87

4 15

9

1 14

10

213

16

7200TPS54283PWP

Φ 312

11

65

I204

I208

DATE

NAME

1

SUPERS.

1

CLASS_NO

EMANTESNHC

3 2

08-06-09 ROYAL PHILIPS ELECTRONICS N.V. 2008

08-06-19

Peter Van Hove

08-10-23

2

3

I211

130

2

3

4

5

08-08-06

08-09-18

08-10-23

08-12-06

08-06-19

08-08-06

A3

DC-DC INTERFACE

AMBI 2K9 3104 313 6325

CHECK

I216

1%** *

3210

3K9

VSW

2220

10u

18310_601_090305.eps090305

Page 69: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 69Q549.2E LA 10.

2009-May-08

Interface Ambilight: Microcontrollerblock

OUTIN

INH BP

COM

NC

GNDRST

IN

CD

C

-T

X2

RTXC1RTXC2

RTCK

VBAT

DBGSEL

RST

VSS VSSA

VDDAVDD_3V3VDD_1V8

X1

2313 F7

3

4

19

6

14

20

15

2320 H52321 H42322 H42323 H42324 H4

G

H

3301-3 E6

O

7 11

A

1300 E21301 H5

2303 A42304 B82305 B102306 B92307 B10

E

E

F

1302 C42300 A32301 A42302 A5

3303-1 E63303-2 D63303-3 E63304-1 D63304-2 D7

2308 D42309 D52310 F62311 F72312 F7

3305-4 G8

2314 F72315 F7

F

G

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or

in p

arts

9 103 4 5

6

2

81 2

17

2316 F82318 G22319 G6

3308-2 F83308-4 F83309-1 F83309-4 F83310 A10

3300-2 D53300-3 D73300-4 D73301-1 D63301-2 E5

3316 B10

3301-4 D73302-1 D7

O

B

C

D

J

L

RES

B

C

D

J

3302-2 D63302-3 E63302-4 D6

3330 E83331 E83332 E33333 F23334 G5

3304-3 D73304-4 D73305-1 E73305-2 G83305-3 G9

7300-1 B9

3306-1 E83306-2 E8

10

1 2 3

1

9 10 11

13

3307-1 E83307-2 F83307-4 F83308-1 F8

125 6

3311 A83312 A103313 B83314 B83315 B10

9303 F3

3317 B83318 C10

11

E

F

G

H

A

14

H

3326 D63327 D63328 E53329 E5

F308 F3F309 G6F310 G6F311 G8F312 G8

3335 G53336 G63337 G63338 E83339 F1

F320 E9

7300-2 A107301 A4

M

98

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

4 5 6 7 8

7

3306-3 E83306-4 E8

7

N

M

I310 D5I311 E7I312 E7I313 E7I314 F7

7302 E37303 F29300 E39301 F39302 F3

I320 F8

9305 G19307 H4

C

5

G

I

C

11 15

3324 D73325 D6

F304 C4F305 C4F306 D4F307 F3

P

F313 G8F314 G5F315 H4F316 C9F317 F1

I305 E6

I300 E9I302 F9

E

4

owne

r.

18

F

I

B

K

H

I306 E7I307 G6I308 G2I309 G5

16

I315 F7I316 F8I317 F6I318 F7I319 F5

16

N

20

C300 B8

13

1

P

12

A

19

3321 C53322 D53323 D5

F300 A5F301 A8F302 A10F303 B11

18

17

L

K

I303 A4I304 C10

2

B

A

98

D

I321 F6I322 G5

10

D

3

MICROCONTROLLER

3319 C83320 C5

100R3307-4 4 5

3307-1100R

1 8

I303

100n

2320

100K

3310

I321

RES

10K

3304

-227

9303RES

+3V3

F317

F320

27

2302

4u7

RES

10K

3302

-2

9302

5

3

2

4

1

7303NCP303LSN10T1

1%1K

8 RE

S

3319

4

2

1

3

5

I317

LD2985BM18R7301

I314

3322

100R

100R3307-2 2 7

2308

2309

100p

100p

10K

3300

-227

3306-3100R

3 6

1300

3337

16M

9

10K

10K

3336

3335

4 5

F306

100R

6

3305-4 10K

3300

-310

K3

3327

10K

+1V8+3V3

10K

RE

S33

26

10K

3302

-445

1 8

F310

2 7

100R3308-1

34 5

3308-2100R

1302

B3B-PH-SM4-TBT(LF)

12

+3V3

RES

3313 10

K

8

2303

10n

3301

-110

K1

I308

I304

I319

I313

1%1K

53311

5 4

3104 313 6325AMBI 2K9

DC-DC INTERFACE

A2

08-08-06

08-06-19

08-12-06

08-10-23

08-09-18

08-08-06

5

4

3

2

130

3309-4100R

3

2

08-10-23

Peter Van Hove

08-06-19

ROYAL PHILIPS ELECTRONICS N.V. 200808-06-09

33

SETNAMECHN

CLASS_NO

1

SUPERS.

1

NAME

DATECHECK

10K

3321

18

I318

10K

3305

-1

2311

100n

F315

+3V3

1K0

3339

7

9305

RE

S

100R3306-2 2

I300

+1V8

F312

2307

10n

4

2319

100p

3

21

8

LM393PT7300-1

2322

100n

3323

100R

10K RES

3332

100R3331

F303

RES 9300

10n

F316

2304

3318

10K RES

1%

3317

RE

S1K

5

3 610K3305-3

3328

3329

10K

10K

+3V3

F309

F311

3308-4100R

4 5

100p

2316

17 40

7 19 43 31

11

12

9307

28

P0.8|TXD1|MAT2.129

P0.9|RXD1|MAT2.230

6

26

2025

4

425

P0.2|SCL0|CAP0.018

P0.30|TDI|MAT3.315

P0.31|TDO16

P0.3|SDA0|MAT0.021

P0.4|SCK0|CAP0.122

P0.5|MISO0|MAT0.123

P0.6|MOSI0|CAP0.224

P0.7|SSEL0|MAT2.0

P0.22|AD0.032

P0.23|AD0.133

P0.24|AD0.234

P0.25|AD0.638

P0.26|AD0.739

P0.27|TRST|CAP2.08

P0.28|TMS|CAP2.19

P0.29|TCK|CAP2.210

P0.15|RI1|EINT245

P0.16|EINT0|MAT0.246

P0.17|CAP1.2|SCL147

P0.18|CAP1.3|SDA148

P0.19|MAT1.2|MISO11

P0.1|RXD0|MAT3.214

P0.20|MAT1.3|MOSI12

P0.21|SSEL1|MAT3.03

27

P0.0|TXD0|MAT3.113

P0.10|RTS1|CAP1.0|AD0.335

P0.11|CTS1|CAP1.1|AD0.436

P0.12|DSR1|MAT1.0|AD0.537

P0.13|DTR1|MAT1.141

P0.14|DCD1|SCK1|EINT144

5

7302LPC2103FBD48

Φ

CTRLMICRO-

10K

3301

-44

I307

I320

I309

I316

3301

-310

K3

6

100n

2323

F305

I322

I315

F308

F307

C30

0

47K

3315

RES

18

+3V3

27

3302

-110

K

36

10K

3303

-2+3V3

3303

-310

K

9301

F302

2306

100n

10K

F301

3333

27

2 7

10K

3301

-23305-2 10K

100p

2313

633

04-3

10K

3

10K

3304

-445

3309-1100R

8 1

+3V3

22R

3334

2314

100p

10K

3300

-445

RE

S

+3V3

2312

100p

100n

2301

+3V3

2300

1u0

10K

F314

RE

S

3314

I306

F304

I305

18

I310

3304

-110

K

10n

2305

RES

100n

2321

+3V3

10K

RE

S33

25

10K

3324

100R3338

I311

10K

3320

F300

36

18

3302

-310

K

RES

3303

-110

K

100R3330

I312

4

100p

2315

LM393PT7300-2

5

67

8

3316

1%1K

5

I302

+3V3

3312

1K5

1%

2310

+3V3

+3V3

100p

4 5

2318

100n

8

100R3306-43306-1

100R1

F313

2324

100n

SK

HU

BH

E01

013

01

1 23 4

PWM-CLOCK-BUF

RE

S

SPI-DATA-RETURNSPI-DATA-OUT

SPI-LATCH1SPI-LATCH2

TEMP-SENSOREEPROM-CSBLANK-BUF

PROG

CONTROL2

SDASCL

UD-MD

CONTROL1PWM-CLOCK-BUF

SPI-CLOCK-BUF

TEMP-SENSOR

18310_602_090305.eps090410

Page 70: Q549---32pfl9604ser

EN 70Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

Layout DC/DC Interface Ambilight

31043136325.5 18310_550_090309.eps090309

1100

1101

1301

13021M59

1M84

1M851M

90

2200

2201

22022203

2206

2207

2208

2209

22102218

2219

2220

2223

2224

2300

2301

2302

2303

2310

2311

2312

2315

2316

2319

2321

2322

2323

3306

3307

3308

3309

3324

3326

3331

3338

5102 5200

5201

6200

6201

7200

7301

9101

9102

91039104

9201

9202

1300

2100

2101

2102

2103

2104

21052106

2107

2108

2109

2204

2205

2211

22122213

2214

2215

2216

2217

2221

2222

2304

2305

2306

2307

2308 2309

2313

2314

2318

2320

2324

31003101

3102

3103

3104

310531063107

3108

3109

3110

3111

3112

3200

3201

3202

3203

3204

3205

3206

3207

3208

3209

3210

3211

3212

3213

3300

33013302

3303

3304 3305

3310

3311

3312

3313

3314

3315

3316

3317

3318

3319

3320

3321

3322 3323

3325

33273328

3329

3330

3332

3333

3334

3335

33363337

3339

5100

5101

5103

51045105

5106

5107

5108

6100

71007300

73027303

9300

9301

9302

9303

9305

9307

C300

F101

F102

F103

F104

F105

F106

F107

F108

F109

F110 F111

F112

F113

F11

4

F115

F116

F117

F118

F119

F120

F121

F122

F123

F124

F12

5

F12

6

F200

F201

F20

2

F203

F204

F20

7

F30

0

F30

1

F302F303

F304

F305

F306

F307

F30

8

F30

9

F310

F31

1

F312

F313

F314

F315

F316

F317

F32

0

I100

I101

I102

I103

I104

I105

I106

I108

I109

I200

I201

I204

I205

I206

I208

I209

I210

I211

I212

I213

I214

I215

I216

I217

I300

I302

I303

I304

I305

I306

I307

I308

I309

I310

I311

I312

I313

I314

I315

I316

I317

I318

I319

I320

I321

I322

c001

c002

Personal Notes:

10000_012_090121.eps090121

Page 71: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 71Q549.2E LA 10.

2009-May-08

6 LED Low-Pow: Microcontroller Block Liteon

NC

GNDRST

IN

CD

C

-T

OUTIN

INH BP

COM

X2

RTXC1RTXC2

RTCK

VBAT

DBGSEL

RST

VSS VSSA

VDDAVDD_3V3VDD_1V8

X1

F135 E1

F137 F1F138 F1F139 F1I110 G8

L

K

2

B

16

I111 G8I113 G10I114 G10I115 G10I124 E11I125 E11

F104 F5

I126 F11

F106 B12

F127 B1

F108 D7

F129 B1

F112 G8

F131 B1

F117 B13

F133 E1

F120 A1F121 A1F122 A1F123 A1

8

IN

6

3

O

D

E

15

F124 B1F125 B1F126 B1

9103 F5

F128 B1

9106 H8

F130 B1

9108 A5

F132 B1

9110 B5

F134 F1

9112 B2

F136 F1

9114 B29119 H69121 G4C140 B10

8 9

12

F

12

16

A

13

F101 A8F102 F5F103 H7

3131 G7

F105 D7

3133 H8

F107 C7

3135 A11

F109 G3

3137 B11

F116 A10

3139 B12

F118 C11

3141 C133142 F117101 A77102 E6

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or

in p

arts

H

103

4

N

MICROCONTROLLER LITEON

5

7110 F47116-1 B11

7116-2 A129101 E59102 F5

3120 F5

9104 F5

3124-1 E11

9107 A5

3124-3 E11

9109 A5

3125-1 F11

9111 A3

3125-4 F11

9113 B3

3126-2 F113126-4 F113127-1 F113127-4 F11

owne

r.

17

C

1

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

5

C

1

3128 E113129 E113130 G8

3132 H8

3134 A13

3106-3 E8

3136 A12

3108 C7

3138 B13

3110 D7

3140 C11

3112 D93113 D83114 E83115 E8

19

I

H

15

O

P

I3116 E83117 E73118 E53119 F4

3123 C11

3103-3 G11

3124-2 E11

3104-1 D8

3124-4 E11

3104-3 E8

3125-2 F11

3105-1 E9

3126-1 F11

3105-3 E83105-4 D83106-1 E83106-2 D8

G

14

G

E

119

13

20

K

18

N

P

L

3107 C7

3109 D7

A

3111 B10

4

2126 F102127 B12128 B12129 B22130 F22131 F103101-2 D73101-3 D93101-4 E93102-1 D93102-2 D93102-3 E93102-4 D93103-1 E9

7

J

18

3103-2 G10

B

3103-4 G10

10

3104-2 E8

3104-4 D9

3105-2 D8

2108 B122109 D72110 D72111 G42112 H72113 H72114 F92115 F92116 F92117 F92118 H82119 H62120 H62121 H62122 F92123 F102124 F102125 B3

11

M

2

1

20

3

19

31211101975

1 2 3 4 5 6 7 8 9 10 11 12 13

14

D

OUT

B

7

D

6

F

H

B

D

E

F

G

H

1101 E41105 B51M1A C11M2A G11M83 A11M84 E12101 A62102 A72103 A82104 B72105 B102106 B132107 B11

17

F

J

M

A

2

C

4

E

6

G

8

A

C

35V

10u21

29

3127-1 1 8

3132

10K

100R

3123

1%1K

8 RE

S

1%1K

53139

3102

-210

K2

7

100n

2119

100n

2112

10K

3105

-22

7

RES9111

100p

2126

2103

4u7

2104

10n

+3V3

+3V3

2131

100p

3131

100R

F117

9121

RE

S

4 5

I115

100R3124-4

F136

+3V3

1K5

1%

F132

RE

S

3140

100n

2102

100p

2114

RE

S

3115

2 7

10K

100R3126-2

VLED1

+3V3

5

67

84

LM393PT7116-2

45

F125

3104

-410

K

+3V3

F118

I114

100p

2123

2101

1u0

10n

100R

2105

3128

VLED1

2127

1u0

100R3125-2 2 7

47K RES

3138

2122

100p

RE

S

3126-4100R

4 5

100R3142

18 10

K31

04-1

5

3

2

4

1

F128

7110NCP303LSN10T1

45

C14

0

3101

-410

K

F105

+3V3

2116

100p

3106

-210

K2

7

10K

3120

1101

100n

2121

16M

9

1 8

F137

F108

3125-1100R

2115

100p

1614

23456789

15

1

10111213

F138

1M83

5

F102

3105

-410

K4

REF EMC HOLE1X03

1 2 3 4 5

F123

F121

2113

100n

10K3103-2

27

3102

-33

6 10K

3137 R

ES

F131

10K

F126

2 7

9102

18

3124-2100R

+3V3

10K

3102

-1

F101

I125

2130

1u0

9119

3130

22R

2108

10n

3109

100R

2110

100p

3117

10K

18

10K

2111

100n

3106

-1

VLED2

RE

S

10K

3108

10K

3114

3118

RES10K

VLED1

F127

+3V3

2128

10u

35V

I113

100p

RE

S

F116

2124

10K

3119

2107

100n

1105

1.5A T

9110

F135

1 8

2125

33p

100R3126-1

NAME

1

SUPERS.

CLASS_NO

EMANTESNHC

3 1

2008-06-02 ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-06-10

Peter Van Hove

2008-10-27

2

3

72

130

2

3

2008-08-08

2008-10-27

2008-08-08

A2

DRIVER 6LED LITEON

2K9 8204 000 8857

CHECK DATE

10K

3101

-2

3134

RES100K

+1V8F122

3105

-310

K3

6

45

21

84

3102

-410

K

LM393PT7116-1

3

F104

+3V3

I111

+3V3

9114

F133

4 5100R

3125-4

F112

100p

2117

10K

3105

-11

8

12

+3V3

4

425 17 40

7 19 43 31

11

P0.5|MISO0|MAT0.123

P0.6|MOSI0|CAP0.224

P0.7|SSEL0|MAT2.028

P0.8|TXD1|MAT2.129

P0.9|RXD1|MAT2.230

6

26

2025

P0.27|TRST|CAP2.08

P0.28|TMS|CAP2.19

P0.29|TCK|CAP2.210

P0.2|SCL0|CAP0.018

P0.30|TDI|MAT3.315

P0.31|TDO16

P0.3|SDA0|MAT0.021

P0.4|SCK0|CAP0.122

P0.1|RXD0|MAT3.214

P0.20|MAT1.3|MOSI12

P0.21|SSEL1|MAT3.03

P0.22|AD0.032

P0.23|AD0.133

P0.24|AD0.234

P0.25|AD0.638

P0.26|AD0.739

P0.13|DTR1|MAT1.141

P0.14|DCD1|SCK1|EINT144

P0.15|RI1|EINT245

P0.16|EINT0|MAT0.246

P0.17|CAP1.2|SCL147

P0.18|CAP1.3|SDA148

P0.19|MAT1.2|MISO11

7102LPC2103FBD48

Φ

CTRLMICRO-

27

P0.0|TXD0|MAT3.113

P0.10|RTS1|CAP1.0|AD0.335

P0.11|CTS1|CAP1.1|AD0.436

P0.12|DSR1|MAT1.0|AD0.537

27

3610

K31

04-2

16

3104

-310

K

14

23456789

15

1M1A

1

10111213

2

1

3

5

LD2985BM18R7101

4

3110

100R

10K

3116

I110

3133

10K

9106

36

F103

RE

S

3106

-310

K

+1V8

+3V3

VLED2

3111 10

K

I126

3103

-110

K1

8

RES 9103

1 8

3141

10K RES

100R3124-1

3112

10K

RES9113

VLED1

F120

100R4 5

+3V3

56789

15 16

3127-4

1

1011121314

234

1M2A

10K

3107

RES

+3V3

10n

2106

F106

F129

RE

S

VLED2

2118

100p

3113

10K

RE

S

3135

1K5

45

1%

3103-410K

3136

F109

1K5

1%91079108

9101

F130

+3V3

+3V3

9104RES

100p

2109

100R3129

VLED1-F

23456789

15 16

1M84

1

1011121314

3 6

+3V3

100R3124-3

F124

VLED1

F134

2120

100n

I124

36

VLED2

3101

-310

K

F107

6

9112

3103-310K3

+3V3

F139

9109

SPI-DATA-OUTSPI-DATA-RETURN

SPI-LATCHPWM-CLOCK-BUF

BLANK-BUFEEPROM-CS

TEMP-SENSOR

SCL

PROG

SDACONTROL-1CONTROL-2

EEPROM-CSTEMP-SENSOR

SPI-CLOCK-BUF

PROG

SPI-CLOCKSDA

CONTROL-2

EEPROM-CSTEMP-SENSOR

CONTROL-2CONTROL-1

SPI-DATA-RETURNSCL

PROG

BLANK

CONTROL-1SDA

SPI-DATA-INSCL

SPI-DATA-RETURN

SPI-LATCHSPI-DATA-IN

PWM-CLOCK-BUF

PWM-CLOCKSPI-LATCH

BLANK-BUFPROG

CONTROL-2

SCL

TEMP-SENSOR

SPI-DATA-OUT

PWM-CLOCK-BUF

SPI-CLOCK-BUF

EEPROM-CSTEMP-SENSOR

SPI-LATCH-2

SPI-CLOCK-BUF

SPI-DATA-RETURNSPI-LATCH

BLANK-BUFEEPROM-CS

TEMP-SENSORPROG

CONTROL-1

UD-MD

SDA

18310_610_090305.eps090410

Page 72: Q549---32pfl9604ser

EN 72Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

6 LED Low-Pow: Microcontroller Block Liteon

EN

S

GND

Q

HOLDW

VCC

C

D

EN

MODE

SIN

XHALF

XLAT

SCLK

VCC

SOUT

6

2

0

11

VIA

9

1312

10

4

IREF

GND GND_HS

OUT

GSCLK

7

14

5

3

1

8

15

XERR

BLANK

C

EN

EN

F203 C5F204 H6

F207 C10F208 D10F209 H11F210 G9F211 G9F212 G9F213 H9F214 H9

INPUT BUFFER

A

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or

in p

arts

I

1

H

3221 H113222 I8

11

F215 H9

6216 I87201-1 A107201-2 C107201-3 D107201-4 B107209 B27210 C27212 B3

12

12

10

11

7214 B67215 G79208 A109209 B99210 B109211 C99212 C109213 D99214 D10F202 B3

C

F205 B10F206 C10

2217 B122218 C122219 D122220 E93121 D93203 B53204 B73205 C53207 B93209 C93210 B33211 C93212 D113213 B33214 H63215 H6

7

16

F

3216 H63217 H63218 H63219 B113220 C11

17 18

3223 C113224 H11

N

D

E

F

G

H

I

A

B

C

D

E

F

O

P

O

N

L

M

K

B

20

6

J

18

P

20

7 8 9 10 11 12 13

A

B

C

L

J

7 8

4

Ais

pro

hibi

ted

with

out t

he w

ritte

n co

nsen

t of t

he c

opyr

ight

F

9 10 11 12 13

1 2 3 4 5 6

D

32 8

1 2

169

194

15

K

G

1 2 3 4 5 6 7 8

13

C

14

3

G

E E

owne

r.

5

H

14

G

H

I

2201 B82202 C82203 D82209 B22210 G62211 I62214 A62215 F72216 F7

9

D

6 15

13 19

5

I

17

MICROCONTROLLER LITEON

M

10

B

RES

3207

1K0

1u0

2216

F202

10K

3210

+3V3

33p

2209

6216

SM

L-31

0

2211

33p

9212

+3V3

RES

100R

3121

3220

3223

100R

3217

27R

100R

3219

100R

33p

2202

+3V3

2215

100n

F212

F211

33p

2201

+3V3

9

7

10

14

8

74HCT125PW7201-3

3214

10K

32151K2

5

4

7

2

1

8

3

9213

(64K)Φ

7214

M95010-WDW6

6

12

7

13

14

11

74HCT125PW7201-4

100R

3212

F207

3224

3K3

+3V3

F213

2217

100p

100p

2218

3221

3K3

F209

F204

3204

10K

+3V3

RES1K0

3209

F208

+3V3

+3V3

RES9214

9209

24

28

30 31 32 332326

3

910111213141516

45

27

6

78

171819202122

7215TLC5946PWP

ΦPWM CONTROL

LED DRIVER

2

1 29

25

+3V3

PDTC144EU

+3V3

7212

470R

3222

7209PDTC144EU

1

3

2

+3V3

F210

+3V3

10K

3203

3216

+3V3

14

3

100R

7201-174HCT125PW

2

7

1

100n

2214

3213

10K

+3V3

2219

100p

2008-10-27

2

3

RE

S

100p

2220

2008-08-08

A2

DRIVER 6LED LITEON

2K9 8204 000 8857

CHECK DATE

NAME

1

SUPERS.

18310_611_090305.eps090410

Page 73: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 73Q549.2E LA 10.

2009-May-08

6 LED Low-Pow: LED Liteon

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

C

GND_HS

GREEN

RED

BLUE

9304-1 E10

F343 D2F344 D12F345 D12F346 D13

F342 D1

9304-4 E109305-1 C69305-2 C69305-4 C6

9315-1 C129315-2 C129315-4 C12

9312-3 B109312-4 B10

3360 E13

9306-1 D59306-3 D59306-4 D5

9325 F109326 G109327 H10

9309-2 B6

3369 F13370 F1

9310-2 B8

F304 H5

197

F308 F4F325 F10F326 F9

9319-4 D9

9313-1 B12

F302 G5F303 G4

7004 C8

F327 G10F328 G9

7002 C47003 C6

7005 C117305 G47306 H5

F329 H10F330 H10

B

G

9319-3 D9

20

A

9310-1 B8

9313-4 B129314 G5

7317 F99301 C19302 C1

9316 H59317 F59318-1 C8

9320-1 D79320-2 D7

9312-1 B10

3358 E133359 E13

2

3361 E133362 E133363 F13

F341 D1

11

9320-4 D7

1

9308 A69309-1 B6

3368 G13

3334 F43335 D12

3371 F1

9318-3 C8

9311-1 H139311-3 H139311-4 H12

3385 F13386 F13387 F1

7

F305 H5

F340 D1

9303-4 C10

7001 C3

6

8

B R G

9319-1 D9

owne

r.

12 132

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

B

A

10 18

3311 D123312 E12

Place jumper 9325, 9326, 9327

F307 F5

7315 G97316 H10

3349 E13350 E13351 E12

9303-1 C10

F347 G12F348 G13F349 G13

9309-4 B6

3357 D13

C

11

E

4

9307 A6

16

3325 G43326 H4

63

3365 F133366 F133367 G13

3333 H4

B

C3336 D2

9310-4 B8

3373 F13374 G13384 E1

3341 D13342 E23343 D1

3388 F1

9313-2 B12

3390 G13391 G1

9318-4 C8

5

1

K

7307 F4

M

12

I

L

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or

in p

arts

3310 D12

13

1

3313 E12

L

3348 E12

3318 F123319 F123320 F12

3352 E1

9303-3 C10

3354 D133355 E1

9304-2 E10

N

J

18

I

O

3364 F13

15

3327 H4

3330 I43331 F43332 F4

A

J

D

3372 F1

3338 D13339 D23340 D1

I

A

B

3344 D1

3389 F1

3346 E1

16

7000 C2

F F

8

H

3347 D1

13 20

12

F

G

2

17

3315 E123316 E123317 F12

7 8 9

3321 G12

3353 E1

3323 G12

N

3356 E1

B

LED LITEON

8

Kif VLED < 17V

1514

3328 G4

13

G

B

D

M

3337 D2

F

G

H

4 5 6

C

3345 D12

E

17

10 11

19

3305 G93306 H93307 H9

D

R

P

5

E

O

3

3314 E12

4 5 6

C

4

10

3322 G12

12

H

G

11

3309 I9

G

9 14

9

10

if VLED < 17V

E

1 2 3

H

I

3301 F93302 F93303 F93304 G9

3

3308 H9

7

D

9

Place jumper 9314, 9316, 9317

P

R

390R

3336

9320

-45

4

9305-44 5

F325

3331

10K

3342

390R

3315

1K5

1K5

3341

3362

560R

BC847BW

3308

7315

1K0

1K5

3321

1K5

3387

560R

3354

9312

-44

5

2 7

VLED1-F

F328

1K5

9305-2

3312

3320

1K5

LTW-E500T-PH1

16

4 3

7

25

2 7

7004

F329

9315-2

9306

-11

8

3325

10K

F326

560R

3349

9310

-44

5

16

4 3

7

25

LTW-E500T-PH17001

1

3335

390R

9320

-18

3358

560R

F303

VLED1-F

3316

1K5

3311

VLED2

9304-22 71K5

9309

-22

7

9310

-11

8

3304

10K

9313

-11

8

9319

-11

8

560R

3340

560R

33661K5

3388

3334

1K0

9311

-44

5

560R

3346

3357

560R

VLED1-F

7317BC847BW

10K

3309

390R

3339

9311

-11

8

4 5

9303-33 6

9303-4

3322

560R

1K5

3363

1K5

3353

9315-44 5

3344

1K5

9326

72

16

4 3

7

25

9320

-2

7002LTW-E500T-PH1

3301

10K

27

9301

9318-4 45

9310

-2

F308

BC847BW7316

1K5

45

3391

VLED1-F

9306

-4

9327

9311

-33

6

9318-1 18

DATE

NAME

1

SUPERS.

CLASS_NO

EMANTESNHC

3 3

2008-06-02 ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-06-10

Peter Van Hove

2008-10-27

2

3

130

2

3

2008-08-08

2008-10-27

2008-08-08

A2

DRIVER 6LED LITEON

2K9 8204 000 8857

CHECK

1K5

3384

3385

1K5

10K

3306

3345

3348

390R

390R

3369

560R

F302

VLED1-F

36

3317

1K5

9312

-3

3323

1K5

F307

1

4 3

725

3360

560R

7000LTW-E500T-PH1

6

F330

10K

3326

3364

560R

9305-11 8

F348

10K

3303

560R

3370

3389

1K5

VLED2

3

7

25

1K5

3390

7003

6

18310_612_090305.eps090305

Page 74: Q549---32pfl9604ser

EN 74Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

Layout 6 LED Low-Pow

3104 313 6313.3 18310_551_090309090309

1101

1105

1M83 1M842101

2102

2103

2104 21

052106

2107

2108

2109

2110

2111

2112

2113

2114

2115

21162117

2118

2119

2120

2121

2122

21232124

2125

2126

2127

21282129

2130

2131

2201

2202

2203

2209

2210

2211

2214

22152216

2217

2218

22192220 3101

3102

3103

3104

3105

3106

3107

3108

3109

3110

3111

3112

3113

3114

3115

3116

3117

3118

31193120

3121

3123

3124

3125

3126

3127

31283129

3130

3131

31323133

3134

3135

3136

3137

31383139

3140

3141

3142

3203

3204

32053207

3209

3210

3211

3212

3213

3214

3215

3216

3217

3218

3219

3220

3221

3222

3223

3224

3301

3302

3303

3304

3305

3306

3307

3308

3309

3310

3311

3312

3313

3314

3315

3316

3317

3318

3319

3320

3321

3322

3323

3325

3326 33

27

3328 33

30

3331

3332

3333

3334

3335

33363337

3338

3339

3340

3341

3342

3343

3344

3345

33463347

3348

33493350

3351

33523353

3354

3355

3356

3357

3358

3359

3360

3361

3362

3363

3364

3365

3366

3367

3368

3369

3370337133723373

337433843385

338633873388

338933903391

6216

7000

7001

7002

7003

7004

7005

7101

7102

7110

7116

7201

7209

7210

7212

7214

7215

7305

7306

7307 73

15

7316

7317

9101

9102

9103

9104

9106

9107

9108

9109

9110

9111

9112

9113

9114

9119

9121

9208

9209

9210

9211

9212

9213

9214

9301

9302

9303

9304

9305

9306

93079308

9309

9310 93

11

9312

9313

9314

9315

9316

9317

9318

9319

9320

9325

9326

9327

C140

I110

I111

I113

I114

I115

1M1A1M2A F10

1

F102

F103

F104

F105F

106

F107 F108

F109

F112

F11

6

F117

F118

F120

F121

F122

F123

F12

4

F125

F126

F127

F128

F12

9

F130

F131

F132

F133

F134

F135

F136

F137

F138

F139

F202 F203

F204F205

F206F207

F208

F209

F210

F211

F212F213

F214

F215

F302

F303

F304

F305

F307

F30

8

F325

F326

F327

F328

F329

F330

F340

F34

1

F342

F343

F344F345

F346

F347F348 F349

I124

I125

I126

Page 75: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 75Q549.2E LA 10.

2009-May-08

8 LED Low-Pow: Microcontroller Block Liteon

-T

OUTIN

INH BP

COM

X2

RTXC1RTXC2

RTCK

VBAT

DBGSEL

RST

VSS VSSA

VDDAVDD_3V3VDD_1V8

X1

C

NC

GNDRST

IN

CD

C

E

F

G

H

1101 E41105 B51M1A C11M2A G11M83 A11M84 E12101 A62102 A72103 A82104 B72105 B102106 B132107 B11

17

F

J

M

A

2

C

4

E

6

G

8

A

10 11 12 13

1 2 3 4 5 6 7 8 9 10 11 12 13

14

D

OUT

B

7

D

6

F

H

B

D

2109 D72110 D72111 G42112 H72113 H72114 F92115 F92116 F92117 F92118 H82119 H62120 H62121 H62122 F92123 F102124 F102125 B3

11

M

2

1

20

3

19

975

2126 F102127 B12128 B12129 B22130 F22131 F103101-2 D73101-3 D93101-4 E93102-1 D93102-2 D93102-3 E93102-4 D93103-1 E9

7

J

18

3103-2 G10

B

3103-4 G10

10

3104-2 E8

3104-4 D9

3105-2 D8

2108 B12

3105-4 D83106-1 E83106-2 D8

G

14

G

E

119

13

20

K

18

N

P

L

3107 C7

3109 D7

A

3111 B10

4

3113 D83114 E83115 E8

19

I

H

15

O

P

I3116 E83117 E73118 E53119 F4

3123 C11

3103-3 G11

3124-2 E11

3104-1 D8

3124-4 E11

3104-3 E8

3125-2 F11

3105-1 E9

3126-1 F11

3105-3 E8

3126-4 F113127-1 F113127-4 F11

17

C

1 5

C

1

3128 E113129 E113130 G8

3132 H8

3134 A13

3106-3 E8

3136 A12

3108 C7

3138 B13

3110 D7

3140 C11

3112 D9

3142 F117101 A77102 E6

H

103

4

N

MICROCONTROLLER BLOCK LITEON

5

7110 F47116-1 B11

7116-2 A129101 E59102 F5

3120 F5

9104 F5

3124-1 E11

9107 A5

3124-3 E11

9109 A5

3125-1 F11

9111 A3

3125-4 F11

9113 B3

3126-2 F11

9119 H69121 G4C140 B10

8 9

12

F

12

16

A

13

F101 A8F102 F5F103 H7

3131 G7

F105 D7

3133 H8

F107 C7

3135 A11

F109 G3

3137 B11

F116 A10

3139 B12

F118 C11

3141 C13

F121 A1F122 A1F123 A1

8

IN

6

3

O

D

E

15

F124 B1F125 B1F126 B1

9103 F5

F128 B1

9106 H8

F130 B1

9108 A5

F132 B1

9110 B5

F134 F1

9112 B2

F136 F1

9114 B2

F138 F1F139 F1I110 G8

L

K

2

B

16

I111 G8I113 G10I114 G10I115 G10I124 E11I125 E11

F104 F5

I126 F11

F106 B12

F127 B1

F108 D7

F129 B1

F112 G8

F131 B1

F117 B13

F133 E1

F120 A1

F135 E1

F124

F137 F1

VLED1

F134

100n

2120

I124

36

VLED2

10K

3101

-3

F107

9112

10K3103-3

36

9109

+3V3

F139

1K531

35

1%

10K3103-4

45

3136

1%1K

5

F109

9108

9101

9107

F130

+3V3

9104

+3V3

2109

100p

RES

3129100R

56789

15 16

VLED1-F

1

1011121314

234

3 6

1M84

3124-3100R

RES10K

3141

+3V3

1 83124-1100R

10K

3112

RES9113

VLED1

F120

3127-4 4 5

+3V3

15 16

100R

1314

23456789

1M2A

1

101112

3107

10K

RES

2106

10n

F129

+3V3

F106

100p

2118

VLED2

10K

3113

RE

S

3

5

RE

S

7101LD2985BM18R

4

2

1

3110

100R

3116

10K

3133

I110

RE

S 10K

F103

9106

10K

3106

-33

6

+1V8

+3V3

10K

3111

VLED2

3103

-11

8

I126

10K

RES 9103

F104

+3V3

+3V3

I111

F133

5

9114

3125-4100R

4

F112

100p

3105

-110

K1

8

2117

12

+3V3

4

425 17 40

7 19 43 31

11

23P0.5|MISO0|MAT0.1

24P0.6|MOSI0|CAP0.2

28P0.7|SSEL0|MAT2.0

29P0.8|TXD1|MAT2.1

30P0.9|RXD1|MAT2.2

6

26

2025

8P0.27|TRST|CAP2.0

9P0.28|TMS|CAP2.1

10P0.29|TCK|CAP2.2

18P0.2|SCL0|CAP0.0

15P0.30|TDI|MAT3.3

16P0.31|TDO

21P0.3|SDA0|MAT0.0

22P0.4|SCK0|CAP0.1

14P0.1|RXD0|MAT3.2

2P0.20|MAT1.3|MOSI1

3P0.21|SSEL1|MAT3.0

32P0.22|AD0.0

33P0.23|AD0.1

34P0.24|AD0.2

38P0.25|AD0.6

39P0.26|AD0.7

41P0.13|DTR1|MAT1.1

44P0.14|DCD1|SCK1|EINT1

45P0.15|RI1|EINT2

46P0.16|EINT0|MAT0.2

47P0.17|CAP1.2|SCL1

48P0.18|CAP1.3|SDA1

1P0.19|MAT1.2|MISO1

27

13P0.0|TXD0|MAT3.1

35P0.10|RTS1|CAP1.0|AD0.3

36P0.11|CTS1|CAP1.1|AD0.4

37P0.12|DSR1|MAT1.0|AD0.5

27

MICRO-CTRL

ΦLPC2103FBD48

7102

36

3104

-210

K

10K

3104

-3

23456789

15 16

1

1011121314

1M1A

35V

10u21

28

2124

I113

RE

S

100p

10K

F116

3119

100n

2107T1.5A

1105

F135

9110

33p

2125

1 8

3

2

130

3126-1100R

ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02

13

SETNAMECHN

CLASS_NO

SUPERS.

1

NAME

DATECHECK

8204 000 8857

3104 313 6314.3

2K9

DRIVER 6LED LITEON

A2

2008-08-08

??

2008-08-08

10K

72

3

2

Peter Van Hove

2008-06-10

3101

-2

100K RES

3134

+1V8

36

F122

10K

3105

-3

10K

3102

-44

5

7116-1LM393PT

3

21

84

10n

2108

100R

3109

10K

100p

2110

18

3117

10K

3106

-1

100n

2111

VLED2

3108

10K

3114

10K

RE

S

RES

3118

10K

F127

+3V3

VLED1

F121

100n

2113

3103-210K2

7

10K

36

3102

-3

RE

S

3137

10K

F126

F131

9102

3124-2 2 7

18

100R

+3V3

3102

-1

10K

I125

1u0

2130

F101

9119

3130

22R

C14

0

10K

3101

-44

5

+3V3

F105

27

100p

2116

10K

3106

-2

3120

10K

2121

100n

F137

1101 16

M9

3125-1 1 8100R

F108

89

15 16

100p

2115

121314

234567

1M83

1

1011

F138

45

F102

3 4 5

10K

3105

-4

1X03REF EMC HOLE

1 2F123

2123

100p

1u0

2101

2105

10n

100R3128

1u0

2127

2 7

VLED1

3125-2100R

3138

RES

100p

2122

47K

4 5

RE

S

100R3126-4

3142100R

18

4

1

3104

-110

K

NCP303LSN10T17110

5

3

2

F128

F136

RE

S

F132

1%1K

53140

2102

100n

RE

S21

14

100p

2 7

3115

10K

3126-2100R

4

VLED1

+3V3

7116-2LM393PT

5

67

8

F125

10K

3104

-44

5

+3V3

I114

F118

35V

2129

10u

1 8

10K

3132

3127-1100R

RE

S1K

81%

3123

1K5

1%

27

3139

10K

3102

-2

2119

100n

9111RES

2112

100n

27

3105

-210

K

2126

100p

4u7

2103

+3V3

+3V3

10n

2104

100p

2131

100R

3131

F117

9121

I115

RE

S

3124-4100R

4 5

SPI-DATA-OUTSPI-DATA-RETURN

SPI-LATCHPWM-CLOCK-BUF

BLANK-BUFEEPROM-CS

TEMP-SENSOR

+3V3

SCL

PROG

SDACONTROL-1CONTROL-2

EEPROM-CSTEMP-SENSOR

SPI-CLOCK-BUF

PROG

SPI-CLOCKSDA

CONTROL-2

EEPROM-CSTEMP-SENSOR

CONTROL-2CONTROL-1

SPI-DATA-RETURNSCL

PROG

BLANK

CONTROL-1SDA

SPI-DATA-INSCL

SPI-DATA-RETURN

SPI-LATCHSPI-DATA-IN

PWM-CLOCK-BUF

PWM-CLOCKSPI-LATCH

BLANK-BUFPROG

CONTROL-2

SCL

TEMP-SENSOR

SPI-DATA-OUT

PWM-CLOCK-BUF

SPI-CLOCK-BUF

EEPROM-CSTEMP-SENSOR

SPI-LATCH-2

SPI-CLOCK-BUF

SPI-DATA-RETURNSPI-LATCH

BLANK-BUFEEPROM-CS

TEMP-SENSORPROG

CONTROL-1

UD-MD

SDA

18310_650_090508.eps090507

Page 76: Q549---32pfl9604ser

EN 76Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

8 LED Low-Pow: Microcontroller Block Liteon

EN

C

EN

MODE

SIN

XHALF

XLAT

SCLK

VCC

SOUT

6

2

0

11

VIA

9

1312

10

4

IREF

GND GND_HS

OUT

GSCLK

7

14

5

3

1

8

15

XERR

BLANK

EN

S

GND

Q

HOLDW

VCC

C

D

EN

5

I

17

MICROCONTROLLER BLOCK LITEON

M

10

B

5

H

14

G

H

I

2201 B82202 C82203 D82209 B22210 G62211 I62214 A62215 F72216 F7

9

D

6 15

13 19

194

15

K

G

1 2 3 4 5 6 7 8

13

C

14

3

G

E E

A

F

9 10 11 12 13

1 2 3 4 5 6

D

32 8

1 2

169

B

20

6

J

18

P

20

7 8 9 10 11 12 13

A

B

C

L

J

7 8

4

17 18

3223 C113224 H11

N

D

E

F

G

H

I

A

B

C

D

E

F

O

P

O

N

L

M

K

C

F205 B10F206 C10

2217 B122218 C122219 D122220 E93121 D93203 B53204 B73205 C53207 B93209 C93210 B33211 C93212 D113213 B33214 H63215 H6

7

16

F

3216 H63217 H63218 H63219 B113220 C113221 H113222 I8

11

F215 H9

6216 I87201-1 A107201-2 C107201-3 D107201-4 B107209 B27210 C27212 B3

12

12

10

11

7214 B67215 G79208 A109209 B99210 B109211 C99212 C109213 D99214 D10F202 B3F203 C5F204 H6

F207 C10F208 D10F209 H11F210 G9F211 G9F212 G9F213 H9F214 H9

INPUT BUFFER

A

I

1

H

7

4

14

6

RE

S10

K

3205

7201-274HCT125PW

5

F205

RES

F206

+3V3

1K0

3211

F215

+3V3

9208 RES+3V3

221033p

2214

100n

10K

3213

100p

2219

+3V3

RE

S

8204 000 88573104 313 6314.3

2K9

DRIVER 6LED LITEON

A2

2008-08-08

??

2008-08-08

3

2

130

2220

100p

3

2

Peter Van Hove

2008-06-10

ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02

23

SETNAMECHN

CLASS_NO

SUPERS.

1

NAME

DATECHECK

RES

F203

32181K2

7210PDTC144EU

1

3

2

2203

33p

9210 RES

F214

9211

RES

+3V3

9214

9209

28

30 31 32 33

2326

3

111213141516

4524

6

78

171819202122

910

2

1 2925

27

+3V3

LED DRIVERPWM CONTROL

ΦTLC5946PWP

7215

PDTC144EU7212

3222

470R

+3V3

1

3

2

+3V3

PDTC144EU7209

F210

3203

10K

100R

+3V3

+3V3

14

3

3216

2

7

1

74HCT125PW7201-1

3K3

3224

F207

F213

+3V3

100p

2217

2218

100p

3K3

3221

F209

F204

10K

3204

RES

+3V3

3209

1K0

F208

+3V3

F212

F211

2201

33p

+3V3

7201-374HCT125PW

9

7

10

14

8

3214

10K

1K23215

9213

6

5

4

7

2

1

8

3 11M95010-WDW6

7214

Φ(64K) 7201-4

74HCT125PW

12

7

13

14

3212

100R

1K0

3207

RES

1u0

F202

2216

3210

10K

33p

2209

+3V3

2211

33p

RES

SM

L-31

0

6216

+3V3

9212

3121

100R

100R

3223

3220

27R

3217100R

100R

3219

33p

2202

+3V3

100n

2215

PWM-CLOCK-BUF

BLANK-BUF

SPI-CLOCK-BUF

SPI-DATA-RETURN

SPI-CLOCK-BUF

EEPROM-CS

PWM-CLOCK

SPI-CLOCK

BLANK

DATA-RETURN-SWITCH

SPI-DATA-OUT-FIL

SPI-DATA-OUT-FIL

PWM-G1

PWM-B1

PWM-R2

PWM-G2

PWM-B2

EEPROM-CS-LOCAL

SPI-CS

SPI-LATCH

EEPROM-CS-LOCALDATA-RETURN-SWITCH

SPI-DATA-INSPI-DATA-OUT

PWM-CLOCK-BUF

EEPROM-CS-LOCALDATA-RETURN-SWITCH

PROG

PWM-R1

SPI-CS

SPI-DATA-RETURN

SPI-CLOCK-BUF

SPI-DATA-IN

BLANK-BUF

18310_651_090508.eps090508

Page 77: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 77Q549.2E LA 10.

2009-May-08

8 LED Low-Pow: LED Liteon

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

C

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

if VLED < 17V

E

1 2 3

H

I

3301 F93302 F93303 F93304 G9

3

3308 H9

7

D

9

Place jumper 9314, 9316, 9317

P

R

R

P

5

E

O

3

3314 E12

4 5 6

C

4

10

3322 G12

12

H

G

11

3309 I9

G

9 14

9

10

13

G

B

D

M

3337 D2

F

G

H

4 5 6

C

3345 D12

E

17

10 11

19

3305 G93306 H93307 H9

D

20

12

F

G

2

17

3315 E123316 E123317 F12

7 8 9

3321 G12

3353 E1

3323 G12

N

3356 E1

B

LED LITEON

8

Kif VLED < 17V

1514

3328 G43330 I43331 F43332 F4

A

J

D

3372 F1

3338 D13339 D23340 D1

I

A

B

3344 D1

3389 F1

3346 E1

16

7000 C2

F F

8

H

3347 D1

13

I

L

3310 D12

13

1

3313 E12

L

3348 E12

3318 F123319 F123320 F12

3352 E1

9303-3 C10

3354 D133355 E1

9304-2 E10

N

J

18

I

O

3364 F13

15

3327 H4

3365 F133366 F133367 G13

3333 H4

B

C3336 D2

9310-4 B8

3373 F13374 G13384 E1

3341 D13342 E23343 D1

3388 F1

9313-2 B12

3390 G13391 G1

9318-4 C8

5

1

K

7307 F4

M

12

B

A

10 18

3311 D123312 E12

Place jumper 9325, 9326, 9327

F307 F5

7315 G97316 H10

3349 E13350 E13351 E12

9303-1 C10

F347 G12F348 G13F349 G13

9309-4 B6

3357 D13

C

11

E

4

9307 A6

16

3325 G43326 H4

63

1

9308 A69309-1 B6

3368 G13

3334 F43335 D12

3371 F1

9318-3 C8

9311-1 H139311-3 H139311-4 H12

3385 F13386 F13387 F1

7

F305 H5

F340 D1

9303-4 C10

7001 C3

6

8

B R G

9319-1 D9

12 132

G

9319-3 D9

20

A

9310-1 B8

9313-4 B129314 G5

7317 F99301 C19302 C1

9316 H59317 F59318-1 C8

9320-1 D79320-2 D7

9312-1 B10

3358 E133359 E13

2

3361 E133362 E133363 F13

F341 D1

11

9320-4 D79325 F109326 G109327 H10

9309-2 B6

3369 F13370 F1

9310-2 B8

F304 H5

197

F308 F4F325 F10F326 F9

9319-4 D9

9313-1 B12

F302 G5F303 G4

7004 C8

F327 G10F328 G9

7002 C47003 C6

7005 C117305 G47306 H5

F329 H10F330 H10

B

9304-1 E10

F343 D2F344 D12F345 D12F346 D13

F342 D1

9304-4 E109305-1 C69305-2 C69305-4 C6

9315-1 C129315-2 C129315-4 C12

9312-3 B109312-4 B10

3360 E13

9306-1 D59306-3 D59306-4 D5

560R

3359

F349

VLED1-F

9316

3332

10K

9312

-11

8

560R

3365

F305

BC847BW7305

9302

3386

1K5

F304

1K5

3310

F347

390R

3351

3319

1K5

10K

3307

F341F340

1K5

F344

3318

45

1K5

3350

9313

-4

560R

3361

3330

10K

560R

3367

3347

1K5

45

36

9309

-4

3352

9319

-3

3355

560R

560R

560R

3371

1K5

3314

2

9309

-11

8

16

4 3

7

5

F343

LTW-E500T-PH17005

3333

1K0

560R

3368

4 5

3374

560R

9304-11 8

9304-4

9303-11 8

VLED1-F

3356

1K5

3327

560R

3338

10K

9308

9314

1K0

3302

9317

1K5

3313

9319

-44

5

F346

27

F327

9313

-2

BC847BW7307

36

7306BC847BW

560R

3373

9318-3

VLED1-F

1K0

3305

560R

3343

3372

560R

F345

9306

-33

6

3306

10K

390R

3345

390R

3348

560R

3369

3317

VLED1-F

F302

36

1K5F307

9312

-3

3323

560R

3360

1K5

3

7

25

16

4

F330

LTW-E500T-PH17000

3326

10K

560R

3364

1 89305-1

3303

10K

F348

3370

560R

VLED2

1K5

3389

2

3390

1K5

LTW-E500T-PH1

16

4 3

7

5

7003

9325

9307

F342

1 8

1K0

3328

9315-1

390R

3337

9303-44 5

3 6

1K5

9303-3

3363

3322

560R

3353

1K5

5

1K5

3344

9315-44

9320

-27

2

9326

3

7

25

LTW-E500T-PH17002

16

4

10K

3301

9301

9310

-22

7

9318-4 45

F308

7316BC847BW

1K5

3391

9306

-44

5

9327

VLED1-F

36

9318-1 18

9311

-3

8204 000 88573104 313 6314.3

2K9

DRIVER 6LED LITEON

A2

2008-08-08

??

2008-08-08

3

2

130

3

2

Peter Van Hove

2008-06-10

ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02

33

SETNAMECHN

CLASS_NO

SUPERS.

1

NAME

DATECHECK

3384

1K5

1K5

3385

390R

3335

9320

-18

1

560R

3358

F303

VLED1-F

3316

VLED2

1K5

7

3311

1K5

27

9304-22

18

9309

-2

9310

-1

18

10K

3304

18

9313

-1

9319

-13340

560R

560R

3366

3388

1K5

9311

-44

5

1K0

3334

560R

3346

560R

3357

BC847BW7317

3309

10K

VLED1-F

3339

390R

9311

-11

8

3336

390R

9305-44 5

54

F325

9320

-4

10K

3331

390R

3342

3341

1K5

1K5

3315

560R

3362

BC847BW7315

3308

1K0

1K5

3321

1K5

3387

560R

9312

-44

5

3354

F328

9305-22 7

VLED1-F

3320

1K5

3312

3

7

25

1K5

7004

16

4 9315-22 7

LTW-E500T-PH1

F329

10K

3325

9306

-11

8

3349

560R

45

F326

7

25

9310

-4

7001LTW-E500T-PH1

16

4 3

GREEN6GREEN6

PWM-G1

PWM-B1

BLUE6BLUE6

RED6RED6

RED-2

GREEN-2

RED-1

GREEN-1

BLUE-1

PWM-R1

RED-2

BLUE-2

GREEN-2

BLUE-2

PWM-R2

PWM-G2

PWM-B2

18310_652_090508.eps090508

Page 78: Q549---32pfl9604ser

EN 78Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

8 LED Low-Pow: LED Drive Liteon

C

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

3571 G7

4121

I

NN

98

6 7

A

3539 E9

3550 E83552 F7

3543 E73544 E83546 E73547 E83549 F7

8 9 10

1 2 3M

L

3555 F73556 F8

3572 G73573 G73574 G73584 F8

3569 F73570 F7

3587 G83588 G8

15

P

O

E

F

G

1M3A E21M85 D23536 E9

8

B

F

O

P

11 12

G

C

D

I

3540 E73541 E8

18

5 6 7

E

4

3589 G8

G

H

2

8 201954

1413

3585 F8

13

LED DRIVE

B

C

D

3

3537 E9

9

11

A

L

10

K

H

18 19

B

F

4 20

3542 E9

3 4

J

K

3590 G83591 G8

17

6

D

5

17

10

1

9 103

E

15 16

3586 F8

16

3553 F8

G

A

C

D

E

F

A

3538 E7

C

B

76

M

1 2

7006 A57007 A7

75

J

1 2

1K5

3

2

130

3550

ROYAL PHILIPS ELECTRONICS N.V. 20082008-04-20

11

SETNAMECHN

CLASS_NO

1

SUPERS.

1

NAME

DATECHECK

8204 000 88743104 313 6314.3 2K9

2LED + CONNECTOR

A2

2008-08-08

2008-05-23 0

2008-08-08

3

2

2008-10-31

Peter Van Hove

2008-05-23

560R

3572

3571

560R

1K5

3586

3537

VLED1

390R

1K5

3547

+3V3

16

4 3

7

5 2

3589

1K5

LTW-E500T-PH17006

3544

1K5

3553

560R

3555

1K5

VLED2

7

52

+3V3

7007LTW-E500T-PH1

16

4 3

390R

3539

560R

3573

3585

1K5

3543

560R

VLED2

1X04REF EMC HOLE

3569

560R

1K5

3584

VLED1

560R

3570

560R

3546

15 16

121314

23456789

1

1011

1M3A

15 16

121314

23456789

1M85

1

1011

3591

1K5

560R

3549

3552

560R

1K5

3588

3542

390R

3536

390R

3587

1K5

3556

1K5

560R

3574

3540

3538

560R

560R

3541

1K5

1K5

3590

SPI-DATA-RETURNSPI-LATCH

PWM-CLOCK-BUF

BLANK-BUFEEPROM-CS

TEMP-SENSOR

GREEN-2

RED-2

BLUE-2

SPI-CLOCK-BUF

PROG

SPI-DATA-OUT

RED-1

SPI-CLOCK-BUFSPI-DATA-OUT

SPI-DATA-RETURNSPI-LATCH

PWM-CLOCK-BUF

BLANK-BUFEEPROM-CS

TEMP-SENSORPROG

GREEN-1

BLUE-1

18310_653_090508.eps090508

Page 79: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 79Q549.2E LA 10.

2009-May-08

Layout 8 LED Low-Pow

31043136314.3 18490_550_090326.eps090326

1101

1105

1M83 1M84 1M851X03

2101

2102

2103

2104 21

052106

2107

2108

2109

2110

2111

2112

2113

2114

2115

21162117

2118

2119

2120

2121

2122

21232124

2125

2126

2127

21282129

2130

2131

2201

2202

2203

2209

2210

2211

2214

22152216

2217

2218

22192220 3101

3102

3103

3104

3105

3106

3107

3108

3109

3110

3111

3112

3113

3114

3115

3116

3117

3118

31193120

3121

3123

3124

3125

3126

3127

31283129

3130

3131

31323133

3134

3135

3136

3137

31383139

3140

3141

3142

3203

3204

32053207

3209

3210

3211

3212

3213

3214

3215

3216

3217

3218

3219

3220

3221

3222

3223

3224

3301

3302

3303

3304

3305

3306

3307

3308

3309

3310

3311

3312

3313

3314

3315

3316

3317

3318

3319

3320

3321

3322

3323

3325

3326 33

27

3328 33

30

3331

3332

3333

3334

3335

33363337

3338

3339

3340

3341

3342

3343

3344

3345

33463347

3348

33493350

3351

33523353

3354

3355

3356

3357

3358

3359

3360

3361

3362

3363

3364

3365

3366

3367

3368

3369

3370337133723373

337433843385

338633873388

338933903391

3536

3537

3538

3539

3540

3541

3542

3543

3544

3546

3547

3549

3550

3552

3553

3555

3556

3569

3570

3571

3572

3573

3574

3584

3585

3586

3587

3588

3589

3590

3591

6216

7000

7001

7002

7003

7004

7005

7006

7007

7101

7102

7110

7116

7201

7209

7210

7212

72147215

7305

7306

7307 73

15

7316

7317

9101

9102

9103

9104

9106

9107

9108

9109

9110

9111

9112

9113

9114

9119

9121

9208

9209

9210

9211

9212

9213

9214

9301

9302

9303

9304

9305

9306

93079308

9309

9310 93

11

9312

9313

9314

9315

9316

9317

9318

9319

9320

9325

9326

9327

C140

I110

I111

I113

I114

I115 1X04

1M1A1M2A1M3A F10

1

F102

F103

F104

F105

F10

6

F107 F108

F109

F112

F11

6

F117

F118

F120

F121

F122

F123

F12

4

F125

F126

F127

F128

F12

9

F130

F131

F132

F133

F134

F135

F136

F137

F138

F139

F202 F203

F204F205

F206F207

F208

F209

F210

F211

F212F213

F214

F215

F302

F303

F304

F305

F307

F30

8

F325

F326

F327

F328

F329

F330

F340

F34

1

F342

F343

F344F345

F346

F347F348 F349

I124

I125

I126

Page 80: Q549---32pfl9604ser

EN 80Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

10 LED Low-Pow: Microcontroller Block Liteon

-T

OUTIN

INH BP

COM

X2

RTXC1RTXC2

RTCK

VBAT

DBGSEL

RST

VSS VSSA

VDDAVDD_3V3VDD_1V8

X1

C

NC

GNDRST

IN

CD

C

E

F

G

H

1101 E41105 B51M1A C11M2A G11M83 A11M84 E12101 A62102 A72103 A82104 B72105 B102106 B132107 B11

17

F

J

M

A

2

C

4

E

6

G

8

A

10 11 12 13

1 2 3 4 5 6 7 8 9 10 11 12 13

14

D

OUT

B

7

D

6

F

H

B

D

2109 D72110 D72111 G42112 H72113 H72114 F92115 F92116 F92117 F92118 H82119 H62120 H62121 H62122 F92123 F102124 F102125 B3

11

M

2

1

20

3

19

975

2126 F102127 B12128 B12129 B22130 F22131 F103101-2 D73101-3 D93101-4 E93102-1 D93102-2 D93102-3 E93102-4 D93103-1 E9

7

J

18

3103-2 G10

B

3103-4 G10

10

3104-2 E8

3104-4 D9

3105-2 D8

2108 B12

3105-4 D83106-1 E83106-2 D8

G

14

G

E

119

13

20

K

18

N

P

L

3107 C7

3109 D7

A

3111 B10

4

3113 D83114 E83115 E8

19

I

H

15

O

P

I3116 E83117 E73118 E53119 F4

3123 C11

3103-3 G11

3124-2 E11

3104-1 D8

3124-4 E11

3104-3 E8

3125-2 F11

3105-1 E9

3126-1 F11

3105-3 E8

3126-4 F113127-1 F113127-4 F11

owne

r.

17

C

1

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

5

C

1

3128 E113129 E113130 G8

3132 H8

3134 A13

3106-3 E8

3136 A12

3108 C7

3138 B13

3110 D7

3140 C11

3112 D9

3142 F117101 A77102 E6

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or

in p

arts

H

103

4

N

MICROCONTROLLER BLOCK LITEON

5

7110 F47116-1 B11

7116-2 A129101 E59102 F5

3120 F5

9104 F5

3124-1 E11

9107 A5

3124-3 E11

9109 A5

3125-1 F11

9111 A3

3125-4 F11

9113 B3

3126-2 F11

9119 H69121 G4C140 B10

8 9

12

F

12

16

A

13

F101 A8F102 F5F103 H7

3131 G7

F105 D7

3133 H8

F107 C7

3135 A11

F109 G3

3137 B11

F116 A10

3139 B12

F118 C11

3141 C13

F121 A1F122 A1F123 A1

8

IN

6

3

O

D

E

15

F124 B1F125 B1F126 B1

9103 F5

F128 B1

9106 H8

F130 B1

9108 A5

F132 B1

9110 B5

F134 F1

9112 B2

F136 F1

9114 B2

F138 F1F139 F1I110 G8

L

K

2

B

16

I111 G8I113 G10I114 G10I115 G10I124 E11I125 E11

F104 F5

I126 F11

F106 B12

F127 B1

F108 D7

F129 B1

F112 G8

F131 B1

F117 B13

F133 E1

F120 A1

F135 E1

F124

F137 F1

VLED1

F134

100n

2120

I124

36

VLED2

10K

3101

-3

F107

9112

10K3103-3

36

9109

+3V3

F139

1K531

35

1%

10K3103-4

45

3136

1%1K

5

F109

9108

9101

9107

F130

+3V3

9104

+3V3

2109

100p

RES

3129100R

56789

15 16

VLED1-F

1

1011121314

234

3 6

1M84

3124-3100R

RES10K

3141

+3V3

1 83124-1100R

10K

3112

RES9113

VLED1

F120

3127-4 4 5

+3V3

15 16

100R

1314

23456789

1M2A

1

101112

3107

10K

RES

2106

10n

F129

+3V3

F106

100p

2118

VLED2

10K

3113

RE

S

3

5

RE

S

7101LD2985BM18R

4

2

1

3110

100R

3116

10K

3133

I110

RE

S 10K

F103

9106

10K

3106

-33

6

+1V8

+3V3

10K

3111

VLED2

3103

-11

8

I126

10K

RES 9103

F104

+3V3

+3V3

I111

F133

5

9114

3125-4100R

4

F112

100p

3105

-110

K1

8

2117

12

+3V3

4

425 17 40

7 19 43 31

11

23P0.5|MISO0|MAT0.1

24P0.6|MOSI0|CAP0.2

28P0.7|SSEL0|MAT2.0

29P0.8|TXD1|MAT2.1

30P0.9|RXD1|MAT2.2

6

26

2025

8P0.27|TRST|CAP2.0

9P0.28|TMS|CAP2.1

10P0.29|TCK|CAP2.2

18P0.2|SCL0|CAP0.0

15P0.30|TDI|MAT3.3

16P0.31|TDO

21P0.3|SDA0|MAT0.0

22P0.4|SCK0|CAP0.1

14P0.1|RXD0|MAT3.2

2P0.20|MAT1.3|MOSI1

3P0.21|SSEL1|MAT3.0

32P0.22|AD0.0

33P0.23|AD0.1

34P0.24|AD0.2

38P0.25|AD0.6

39P0.26|AD0.7

41P0.13|DTR1|MAT1.1

44P0.14|DCD1|SCK1|EINT1

45P0.15|RI1|EINT2

46P0.16|EINT0|MAT0.2

47P0.17|CAP1.2|SCL1

48P0.18|CAP1.3|SDA1

1P0.19|MAT1.2|MISO1

27

13P0.0|TXD0|MAT3.1

35P0.10|RTS1|CAP1.0|AD0.3

36P0.11|CTS1|CAP1.1|AD0.4

37P0.12|DSR1|MAT1.0|AD0.5

27

MICRO-CTRL

ΦLPC2103FBD48

7102

36

3104

-210

K

10K

3104

-3

23456789

15 16

1

1011121314

1M1A

35V

10u21

28

2124

I113

RE

S

100p

10K

F116

3119

100n

2107T1.5A

1105

F135

9110

33p

2125

1 8

3

2

130

3126-1100R

ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02

13

SETNAMECHN

CLASS_NO

SUPERS.

1

NAME

DATECHECK

8204 000 88572K9

DRIVER 6LED LITEON

A2

2008-08-08

??

2008-08-08

10K

72

3

2

Peter Van Hove

2008-06-10

3101

-2

100K RES

3134

+1V8

36

F122

10K

3105

-3

10K

3102

-44

5

7116-1LM393PT

3

21

84

10n

2108

100R

3109

10K

100p

2110

18

3117

10K

3106

-1

100n

2111

VLED2

3108

10K

3114

10K

RE

S

RES

3118

10K

F127

+3V3

VLED1

F121

100n

2113

3103-210K2

7

10K

36

3102

-3

RE

S

3137

10K

F126

F131

9102

3124-2 2 7

18

100R

+3V3

3102

-1

10K

I125

1u0

2130

F101

9119

3130

22R

C14

0

10K

3101

-44

5

+3V3

F105

27

100p

2116

10K

3106

-2

3120

10K

2121

100n

F137

1101 16

M9

3125-1 1 8100R

F108

89

15 16

100p

2115

121314

234567

1M83

1

1011

F138

45

F102

3 4 5

10K

3105

-4

1X03REF EMC HOLE

1 2

F123

2123

100p

1u0

2101

2105

10n

100R3128

1u0

2127

2 7

VLED1

3125-2100R

3138

RES

100p

2122

47K

4 5

RE

S

100R3126-4

3142100R

18

4

1

3104

-110

K

NCP303LSN10T17110

5

3

2

F128

F136

RE

S

F132

1%1K

53140

2102

100n

RE

S21

14

100p

2 7

3115

10K

3126-2100R

4

VLED1

+3V3

7116-2LM393PT

5

67

8

F125

10K

3104

-44

5

+3V3

I114

F118

35V

2129

10u

1 8

10K

3132

3127-1100R

RE

S1K

81%

3123

1K5

1%

27

3139

10K

3102

-2

2119

100n

9111RES

2112

100n

27

3105

-210

K

2126

100p

4u7

2103

+3V3

+3V3

10n

2104

100p

2131

100R

3131

F117

9121

I115

RE

S

3124-4100R

4 5

SPI-DATA-OUTSPI-DATA-RETURN

SPI-LATCHPWM-CLOCK-BUF

BLANK-BUFEEPROM-CS

TEMP-SENSOR

+3V3

SCL

PROG

SDACONTROL-1CONTROL-2

EEPROM-CSTEMP-SENSOR

SPI-CLOCK-BUF

PROG

SPI-CLOCKSDA

CONTROL-2

EEPROM-CSTEMP-SENSOR

CONTROL-2CONTROL-1

SPI-DATA-RETURNSCL

PROG

BLANK

CONTROL-1SDA

SPI-DATA-INSCL

SPI-DATA-RETURN

SPI-LATCHSPI-DATA-IN

PWM-CLOCK-BUF

PWM-CLOCKSPI-LATCH

BLANK-BUFPROG

CONTROL-2

SCL

TEMP-SENSOR

SPI-DATA-OUT

PWM-CLOCK-BUF

SPI-CLOCK-BUF

EEPROM-CSTEMP-SENSOR

SPI-LATCH-2

SPI-CLOCK-BUF

SPI-DATA-RETURNSPI-LATCH

BLANK-BUFEEPROM-CS

TEMP-SENSORPROG

CONTROL-1

UD-MD

SDA

18310_630_090306.eps090306

Page 81: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 81Q549.2E LA 10.

2009-May-08

10 LED Low-Pow: Microcontroller Block Liteon

EN

C

EN

MODE

SIN

XHALF

XLAT

SCLK

VCC

SOUT

6

2

0

11

VIA

9

1312

10

4

IREF

GND GND_HS

OUT

GSCLK

7

14

5

3

1

8

15

XERR

BLANK

EN

S

GND

Q

HOLDW

VCC

C

D

EN

5

I

17

MICROCONTROLLER BLOCK LITEON

M

10

B

owne

r.

5

H

14

G

H

I

2201 B82202 C82203 D82209 B22210 G62211 I62214 A62215 F72216 F7

9

D

6 15

13 19

194

15

K

G

1 2 3 4 5 6 7 8

13

C

14

3

G

E E

Ais

pro

hibi

ted

with

out t

he w

ritte

n co

nsen

t of t

he c

opyr

ight

F

9 10 11 12 13

1 2 3 4 5 6

D

32 8

1 2

169

B

20

6

J

18

P

20

7 8 9 10 11 12 13

A

B

C

L

J

7 8

4

17 18

3223 C113224 H11

N

D

E

F

G

H

I

A

B

C

D

E

F

O

P

O

N

L

M

K

C

F205 B10F206 C10

2217 B122218 C122219 D122220 E93121 D93203 B53204 B73205 C53207 B93209 C93210 B33211 C93212 D113213 B33214 H63215 H6

7

16

F

3216 H63217 H63218 H63219 B113220 C113221 H113222 I8

11

F215 H9

6216 I87201-1 A107201-2 C107201-3 D107201-4 B107209 B27210 C27212 B3

12

12

10

11

7214 B67215 G79208 A109209 B99210 B109211 C99212 C109213 D99214 D10F202 B3F203 C5F204 H6

F207 C10F208 D10F209 H11F210 G9F211 G9F212 G9F213 H9F214 H9

INPUT BUFFER

A

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or

in p

arts

I

1

H

7

4

14

6

RE

S10

K

3205

7201-274HCT125PW

5

F205

RES

F206

+3V3

1K0

3211

F215

+3V3

9208 RES+3V3

221033p

2214

100n

10K

3213

100p

2219

+3V3

RE

S

8204 000 88572K9

DRIVER 6LED LITEON

A2

2008-08-08

??

2008-08-08

3

2

130

2220

100p

3

2

Peter Van Hove

2008-06-10

ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02

23

SETNAMECHN

CLASS_NO

SUPERS.

1

NAME

DATECHECK

RES

F203

32181K2

7210PDTC144EU

1

3

2

2203

33p

9210 RES

F214

9211

RES

+3V3

9214

9209

28

30 31 32 332326

3

111213141516

4524

6

78

171819202122

910

2

1 29

25

27

+3V3

LED DRIVERPWM CONTROL

ΦTLC5946PWP

7215

PDTC144EU7212

3222

470R

+3V3

1

3

2

+3V3

PDTC144EU7209

F210

3203

10K

100R

+3V3

+3V3

14

3

3216

2

7

1

74HCT125PW7201-1

3K3

3224

F207

F213

+3V3

100p

2217

2218

100p

3K3

3221

F209

F204

10K

3204

RES

+3V3

3209

1K0

F208

+3V3

F212

F211

2201

33p

+3V3

7201-374HCT125PW

9

7

10

14

8

3214

10K

1K23215

9213

6

5

4

7

2

1

8

3 11M95010-WDW6

7214

Φ(64K) 7201-4

74HCT125PW

12

7

13

14

3212

100R

1K0

3207

RES

1u0

F202

2216

3210

10K

33p

2209

+3V3

2211

33p

RES

SM

L-31

0

6216

+3V3

9212

3121

100R

100R

3223

3220

27R

3217100R

100R

3219

33p

2202

+3V3

100n

2215

PWM-CLOCK-BUF

BLANK-BUF

SPI-CLOCK-BUF

SPI-DATA-RETURN

SPI-CLOCK-BUF

EEPROM-CS

PWM-CLOCK

SPI-CLOCK

BLANK

DATA-RETURN-SWITCH

SPI-DATA-OUT-FIL

SPI-DATA-OUT-FIL

PWM-G1

PWM-B1

PWM-R2

PWM-G2

PWM-B2

EEPROM-CS-LOCAL

SPI-CS

SPI-LATCH

EEPROM-CS-LOCALDATA-RETURN-SWITCH

SPI-DATA-INSPI-DATA-OUT

PWM-CLOCK-BUF

EEPROM-CS-LOCALDATA-RETURN-SWITCH

PROG

PWM-R1

SPI-CS

SPI-DATA-RETURN

SPI-CLOCK-BUF

SPI-DATA-IN

BLANK-BUF

18310_631_090306.eps090306

Page 82: Q549---32pfl9604ser

EN 82Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

10 LED Low-Pow: LED Liteon

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

C

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

if VLED < 17V

E

1 2 3

H

I

3301 F93302 F93303 F93304 G9

3

3308 H9

7

D

9

Place jumper 9314, 9316, 9317

P

R

R

P

5

E

O

3

3314 E12

4 5 6

C

4

10

3322 G12

12

H

G

11

3309 I9

G

9 14

9

10

13

G

B

D

M

3337 D2

F

G

H

4 5 6

C

3345 D12

E

17

10 11

19

3305 G93306 H93307 H9

D

20

12

F

G

2

17

3315 E123316 E123317 F12

7 8 9

3321 G12

3353 E1

3323 G12

N

3356 E1

B

LED LITEON

8

Kif VLED < 17V

1514

3328 G43330 I43331 F43332 F4

A

J

D

3372 F1

3338 D13339 D23340 D1

I

A

B

3344 D1

3389 F1

3346 E1

16

7000 C2

F F

8

H

3347 D1

13

I

L

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or

in p

arts

3310 D12

13

1

3313 E12

L

3348 E12

3318 F123319 F123320 F12

3352 E1

9303-3 C10

3354 D133355 E1

9304-2 E10

N

J

18

I

O

3364 F13

15

3327 H4

3365 F133366 F133367 G13

3333 H4

B

C3336 D2

9310-4 B8

3373 F13374 G13384 E1

3341 D13342 E23343 D1

3388 F1

9313-2 B12

3390 G13391 G1

9318-4 C8

5

1

K

7307 F4

M

12

B

A

10 18

3311 D123312 E12

Place jumper 9325, 9326, 9327

F307 F5

7315 G97316 H10

3349 E13350 E13351 E12

9303-1 C10

F347 G12F348 G13F349 G13

9309-4 B6

3357 D13

C

11

E

4

9307 A6

16

3325 G43326 H4

63

1

9308 A69309-1 B6

3368 G13

3334 F43335 D12

3371 F1

9318-3 C8

9311-1 H139311-3 H139311-4 H12

3385 F13386 F13387 F1

7

F305 H5

F340 D1

9303-4 C10

7001 C3

6

8

B R G

9319-1 D9

owne

r.

12 132

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

G

9319-3 D9

20

A

9310-1 B8

9313-4 B129314 G5

7317 F99301 C19302 C1

9316 H59317 F59318-1 C8

9320-1 D79320-2 D7

9312-1 B10

3358 E133359 E13

2

3361 E133362 E133363 F13

F341 D1

11

9320-4 D79325 F109326 G109327 H10

9309-2 B6

3369 F13370 F1

9310-2 B8

F304 H5

197

F308 F4F325 F10F326 F9

9319-4 D9

9313-1 B12

F302 G5F303 G4

7004 C8

F327 G10F328 G9

7002 C47003 C6

7005 C117305 G47306 H5

F329 H10F330 H10

B

9304-1 E10

F343 D2F344 D12F345 D12F346 D13

F342 D1

9304-4 E109305-1 C69305-2 C69305-4 C6

9315-1 C129315-2 C129315-4 C12

9312-3 B109312-4 B10

3360 E13

9306-1 D59306-3 D59306-4 D5

560R

3359

F349

VLED1-F

9316

3332

10K

9312

-11

8

560R

3365

F305

BC847BW7305

9302

3386

1K5

F304

1K5

3310

F347

390R

3351

3319

1K5

10K

3307

F341F340

1K5

F344

3318

45

1K5

3350

9313

-4

560R

3361

3330

10K

560R

3367

3347

1K5

45

36

9309

-4

3352

9319

-3

3355

560R

560R

560R

3371

1K5

3314

2

9309

-11

8

16

4 3

7

5

F343

LTW-E500T-PH17005

3333

1K0

560R

3368

4 5

3374

560R

9304-11 8

9304-4

9303-11 8

VLED1-F

3356

1K5

3327

560R

3338

10K

9308

9314

1K0

3302

9317

1K5

3313

9319

-44

5

F346

27

F327

9313

-2

BC847BW7307

36

7306BC847BW

560R

3373

9318-3

VLED1-F

1K0

3305

560R

3343

3372

560R

F345

9306

-33

6

3306

10K

390R

3345

390R

3348

560R

3369

3317

VLED1-F

F302

36

1K5F307

9312

-3

3323

560R

3360

1K5

3

725

16

4

F330

LTW-E500T-PH17000

3326

10K

560R

3364

1 89305-1

3303

10K

F348

3370

560R

VLED2

1K5

3389

2

3390

1K5

LTW-E500T-PH1

16

4 3

7

5

7003

9325

9307

F342

1 8

1K0

3328

9315-1

390R

3337

9303-44 5

3 6

1K5

9303-3

3363

3322

560R

3353

1K5

5

1K5

3344

9315-44

9320

-27

2

9326

3

7

25

LTW-E500T-PH17002

16

4

10K

3301

9301

9310

-22

7

9318-4 45

F308

7316BC847BW

1K5

3391

9306

-44

5

9327

VLED1-F

36

9318-1 18

9311

-3

8204 000 88572K9

DRIVER 6LED LITEON

A2

2008-08-08

??

2008-08-08

3

2

130

3

2

Peter Van Hove

2008-06-10

ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-02

33

SETNAMECHN

CLASS_NO

SUPERS.

1

NAME

DATECHECK

3384

1K5

1K5

3385

390R

3335

9320

-18

1

560R

3358

F303

VLED1-F

3316

VLED2

1K5

7

3311

1K5

27

9304-22

18

9309

-2

9310

-1

18

10K

3304

18

9313

-1

9319

-13340

560R

560R

3366

3388

1K5

9311

-44

5

1K0

3334

560R

3346

560R

3357

BC847BW7317

3309

10K

VLED1-F

3339

390R

9311

-11

8

3336

390R

9305-44 5

54

F325

9320

-4

10K

3331

390R

3342

3341

1K5

1K5

3315

560R

3362

BC847BW7315

3308

1K0

1K5

3321

1K5

3387

560R

9312

-44

5

3354

F328

9305-22 7

VLED1-F

3320

1K5

3312

3

7

25

1K5

7004

16

4 9315-22 7

LTW-E500T-PH1

F329

10K

3325

9306

-11

8

3349

560R

45

F326

7

25

9310

-4

7001LTW-E500T-PH1

16

4 3

GREEN6GREEN6

PWM-G1

PWM-B1

BLUE6BLUE6

RED6RED6

RED-2

GREEN-2

RED-1

GREEN-1

BLUE-1

PWM-R1

RED-2

BLUE-2

GREEN-2

BLUE-2

PWM-R2

PWM-G2

PWM-B2

18310_632_090306.eps090306

Page 83: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 83Q549.2E LA 10.

2009-May-08

10 LED Low-Pow: LED Drive Liteon

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

GND_HS

GREEN

RED

BLUE

C

GND_HS

GREEN

RED

BLUE

1 2 14

C

owne

r.

17

3573 G7

20

I

8 1211

NN

9

3536 E9

4

P

B

17

I

1

F

G

3589 G8

6 7

7009 A67008 A5

D

18 1916

K

4 5

18

10

M

L

3

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or

in p

arts

3555 F7

E

D

5

3572 G7

G

LED DRIVE

15

P

G

1M3A E21M85 D2

3540 E7

3537 E93538 E73539 E9

F

13

A

142 3

J

3587 G83588 G8

D

3590 G83591 G87006 A27007 A4

C

4

E

16

15

13 19

10

1 2

H

M

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

J

3552 F73553 F8

A

3556 F83569 F73570 F73571 G7

F

11

O

E

O

7

A

L

10

K

3541 E83542 E9

12

3544 E83546 E7

1

3574 G73584 F83585 F83586 F8

C

8

B

A

B

3

2 3 4 5 6

3543 E7

9

9

G

H

7

8 20

3547 E83549 F73550 E8

F

B

C

D

E

5 6 7 8 9 10

6

3590

1K5

1K5

3589

3539

390R

3536

390R

3585

1K5

3553

1K5

3588

1K5

CHECK DATE

NAME

1

SUPERS.

CLASS_NO

EMANTESNHC

1 1

2008-07-29 ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-08-14

Peter Van Hove

2008-10-31

2

3

390R

130

2

3

2008-10-24

2008-10-31

2008-08-14

A2

4 LED + CONNECTOR

LITEON 2K9 8204 000 8897

3537

560R

3543

1K5

3541

+3V3

VLED2

1X04REF EMC HOLE

4 3

7

5

2

VLED1

7008LTW-E500T-PH1

1616

4 3

7

5

2

7

5

2

7006LTW-E500T-PH1

16

4 3

LTW-E500T-PH17007

3547

1K5

1K5

3550

560R

3538

3540

560R

3584

1K5

3570

560R

560R

3569

560R

3571

3572

560R

3555

560R

456789

15 16

VLED2

1M3A

1

1011121314

23

560R

3573

390R

3542

9

15 16

+3V3

11121314

2345678

1

10

3587

1M85

3556

1K5

560R

1K5

3574

VLED1

5

2

3546

560R

16

4 3

7

LTW-E500T-PH17009

1K5

3591

3549

560R

560R

3552

3586

1K5

1K5

3544

SPI-DATA-OUTSPI-DATA-RETURN

SPI-LATCHPWM-CLOCK-BUF

BLANK-BUFEEPROM-CS

TEMP-SENSOR

RED-1

GREEN-1

BLUE-1

SPI-CLOCK-BUF

PROG

SPI-CLOCK-BUFSPI-DATA-OUT

SPI-DATA-RETURNSPI-LATCH

PWM-CLOCK-BUF

BLANK-BUFEEPROM-CS

TEMP-SENSORPROG

GREEN-2

RED-2

BLUE-2

18310_633_090306.eps090306

Page 84: Q549---32pfl9604ser

EN 84Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

Layout 10 LED Low-Pow

3104 313 6315.2 18310_553_090309090309

1101

1105

1M83 1M84 1M851X03

2101

2102

2103

2104 21

052106

2107

2108

2109

2110

2111

2112

2113

2114

2115

21162117

2118

2119

2120

2121

2122

21232124

2125

2126

2127

21282129

2130

2131

2201

2202

2203

2209

2210

2211

2214

22152216

2217

2218

22192220 3101

3102

3103

3104

3105

3106

3107

3108

3109

3110

3111

3112

3113

3114

3115

3116

3117

3118

31193120

3121

3123

3124

3125

3126

3127

31283129

3130

3131

31323133

3134

3135

3136

3137

31383139

3140

3141

3142

3203

3204

32053207

3209

3210

3211

3212

3213

3214

3215

3216

3217

3218

3219

3220

3221

3222

3223

3224

3301

3302

3303

3304

3305

3306

3307

3308

3309

3310

3311

3312

3313

3314

3315

3316

3317

3318

3319

3320

3321

3322

3323

3325

3326 33

27

3328 33

30

3331

3332

3333

3334

3335

33363337

3338

3339

3340

3341

3342

3343

3344

3345

33463347

3348

33493350

3351

33523353

3354

3355

3356

3357

3358

3359

3360

3361

3362

3363

3364

3365

3366

3367

3368

3369

3370337133723373

337433843385

338633873388

338933903391

3536

3537

3538

3539

3540

3541

3542

3543

3544

3546

3547

3549

3550

3552

3553

3555

3556

3569

3570

3571

3572

3573

3574

3584

3585

3586

3587

3588

3589

3590

3591

6216

7000

7001

7002

7003

7004

7005

7006

7007

7008

7009

7101

7102

7110

7116

7201

7209

7210

7212

72147215

7305

7306

7307 73

15

7316

7317

9101

9102

9103

9104

9106

9107

9108

9109

9110

9111

9112

9113

9114

9119

9121

9208

920992

1092

11

9212

9213

9214

9301

9302

9303

9304

9305

9306

93079308

9309

9310 93

11

9312

9313

9314

9315

9316

9317

9318

9319

9320

9325

9326

9327

C140

I110

I111

I113

I114

I115 1X04

1M1A1M2A1M3A F10

1

F102

F103

F104

F105

F10

6

F107 F108

F109

F112

F11

6

F117

F118

F120

F121

F122

F123

F12

4

F125

F126

F127

F128

F12

9

F130

F131

F132

F133

F134

F135

F136

F137

F138

F139

F202 F203

F204F205

F206F207

F208

F209

F210

F211

F212F213

F214

F215

F302

F303

F304

F305

F307

F30

8

F325

F326

F327

F328

F329

F330

F340

F34

1

F342

F343

F344F345

F346

F347F348 F349

I124

I125

I126

Page 85: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 85Q549.2E LA 10.

2009-May-08

SSB: DC/DC

C

VBST2

VIN

PGND

TEST

VREG5VFB2VO2

VFB1VO1

LL2LL1

DRVL2DRVH2

DRVL1DRVH1

GN

D

21

V5FILT

TRIP2

EN2

NC

TRIP1

EN1

VBST1

144

C

7

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

19

133

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

I

9

A

5

6

D

8

2

E

F

G

H

A

B

C

D

E

2U06 B102U07 E112U0B H92U0D H6

2U0F A52U0H C92U0J E92U0K F9

F

2U0R G10

B

2 3

D

6 7

11

F

75

O

1 2 3 4 5 6 7 8

N

2U0S F12U0T E11

13

O

10 11 12 13

G

H

1

16

C

6

D

9

12

A

DC / DC

P

17

4 5

2U1B E142U39 B6

8 9 10 11 12 13 14 15

G

C

18

H

G

2012

19

3

2U64 G9

L

3U09 H93U0A H10

2U0U E12

2U0V E122U0W A52U0Y A122U0Z B10

2U10 C142U11 C142U12 C9

14 15

2U16 E13

N

I

12V/1V2 CONVERSION

15

K

4

10

P

3U1M B93U1V F1

3U20 D53U21 E23U22 E33U23 F2

2U17 E132U19 A13

3U30 E63U31 G8

2U50 D72U54 C2

2U55 D42U56 D42U57 D22U58 D3

2U59 E22U60 E6

A

B

2U63 F6

M

B

6141

H

7U02 B67U06 D87U08 A6

7U09 E1CU77 G2FU04 E2FU05 A8

2U65 G83U06 B6

FU08 G14FU0A E8

3U0F H53U0G H6

3U0J B93U0K E93U13 C73U15 C5

3U16 C53U17 D3

2U14 A12

2U15 B13 3U1D F6

F

18

15

JJ

11

3U1J G14

1

owne

r.IU0S G5IU0T G9IU0U E1

IU11 B63U24 F73U25 F8

12V/3V3 CONVERSION

IU12 D73U74 E93U75 G103U76 E115U00 E9

5U01 B95U02 A135U03 C135U32 A13

2U61 E42U62 F2

6U03 D5

K

10 20

IU31 G9IU55 C4

7U03 D37U05 C86U02 E2

IU56 D3IU57 D3IU58 E3IU59 E3

IU60 E3IU61 D5IU62 F6IU63 D5

FU06 F5 FU0B E14FU0C B14FU0E C14IU06 G9

IU07 E9IU08 B9IU0K D7IU0N C7

3U18 D53U19 D5

FU07 B9IU0P B6

E

8 17

1 2

L

9

E

M

IU0T

IU19 H9IU1B C9

IU1D G10IU1E F9IU1P B6IU1R F1

IU1T A13IU30 E6

5U33 B13

100n

2U0S

IU56

RES

3U0G

47K

22u

2U0F

RE

S

3U15

10R

6 7 84

1 2 3

7U08

SI4800BDY5

22u

FU05

2U0Y

2U50

1n0IU12

3R3

3U13

IU11 1n0

2U393U06

3R3

FU06

+1V2-PNX85XX

3U76

RE

S10

R

3U0A

1K0

1%

3n3

2U64

1n0

2U65

1n0

2U0H

3U1M

22R

IU1T

10u

5U00

6.3V

RE

S

GND-SIG

2U16

330u

+3V3

2U0Z

22u

RE

S

IU0N

4V10

0u

2U10

22R

3U0J

100u

4V

2U11

RE

S

22u

RE

S

FU08

2U0T

+3V3

IU1P

IU07

GND-SIG

A2130

3U24

33K

2008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20082007-11-20

13

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8932TV543 R2 LDIPNX

DC/DC

FU0E

3

1u0

2U62

2U19

1u0

22u

RE

S

2U15

220u

25V

2U0U

30R

5U32

3U1D

RES

1% 3K3

100n

2U55

10R

3U16

2U0W

22u

GND-SIG

1%120R

3U1J

IU08

2U60

1n0

IU06

IU1R

BA

T54

CO

L

RE

S

3U23

10R

RE

S

6U03

100n

RE

S

GND-SIG

+12VF

2U56

IU60

3U21

20K

2U54

2u2

3U1V

RE

S

IU0K

3K3

3U09

22K

2U06

22u

+3V3

1X08REF EMC HOLE

19

21

1

14

5

10

23

4

11

22

2716

269

13

25 18

820

24

7U03

28

15

26

173

12

7

GND-SIG

GND-SIG

ΦTPS53124PW

3

2IU62

BC847BW

RES

7U09

1

2U12

1n0

10R

3U19

+1V2-PNX85XX

IU57

100n

2U57

RE

S 5 6 7 84

1 2 3SI4800BDY

7U06

6U02

BAT54 COL

RES3U

0F

1K0

IU0U

1%

IU59

2U58

100n

3U18

10R

FU0B

GND-SIG

2U14

22u

RE

S

FU04

IU63

IU55

1%47

0R

3U75

IU61

IU1B

IU0S

IU0P

3U74

22R

IU303U30

4K7

22u

2U07

IU31

4K7

3U31

1n0

2U59

RE

S

2U63

GND-SIG

GND-SIG

3n3

+1V2-STANDBY

GND-SIG

4u7

2U61

IU1E

RES

10u

5U02

IU19

GND-SIG

GND-SIG

2U0V

22u

FU0C

10u

5U01

1n0

2U0K

3U0K

22R

RE

S6.

3V10

0u2U1B

6.3V

2U17

330u

RE

S

10K

+12VF1

2U0J

1n0

30R

5U33

3U25

FU0A

+1V2-PNX85XX2U

0D

100p

RE

S

+3V3F

IU1D

CU77

IU58

3U17

2 3

3R3

5 6 7 84

1

GND-SIG

7U05

SI4800BDY

5U03

10u

FU07

1 2 3

20K

3U22

SI4800BDY

7U02

5 6 7 84

2U0B

100p

RE

S

GND-SIG

3U20

3R3

2U0R

GND-SIG

VSW

1u0

ENABLE-3V3-5V

SENSE+1V2-PNX85XX

18310_500_090302.eps090302

Page 86: Q549---32pfl9604ser

EN 86Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: DC/DC

CN

CN

CA

RE

F

K

OUTIN

INH BP

COM

FU35 A1FU36 B1FU38 B1

3

H

FU39 E5FU40 F4IU20 B4IU21 B4IU34 A8IU35 B8IU36 F7IU37 F8IU38 E7IU39 F9IU3B E8IU3C B8IU3T C8IU40 E3IU41 E3IU42 E4IU43 E3IU44 F3IU45 F4IU47 F3

E

IU48 A4

FU18 C2FU19 C1FU1A E1

3

IU49 A4IU50 A5IU51 A3IU52 B3IU53 B4IU54 F5

*

11

FU1B E1FU1C E1FU1D F1FU1F B9FU1G E9FU1H C4FU20 E1FU21 E1FU22 E1FU23 E1FU24 C1FU25 D1FU26 D1FU30 A1FU31 A1FU32 A1FU33 A1FU34 A1

7U10 B47U11 B37U40-1 E3

9

I

A

RESERVED

G

J

7U40-2 E47U41-1 F47U41-2 F57U50 C79U06 A29U07 B39U08 B5CU70 D1CU71 D1FU10 F1FU11 F1FU12 F1FU13 C1FU14 C1FU15 C2FU16 C1FU17 C2

3U98 C35U06 F25U07 A1

124

2101

5U08 E75U10 A15U11 A15U12 A1

5U13 A15U14 A15U15 B15U16 B15U17 F25U20 F25U21 F26U0B E86U0C E86U40 E37U0M A97U0N B77U0P E77U0Q E9

3U64 C23U65 C23U66 D1

13

LED PANEL

*

11

D

8

5

3U67 D23U80 E33U81 E33U82 E43U83 E43U84 F23U85 F43U86 F43U88 F33U89 F33U90 A33U91 A33U92 A33U93 B23U94 B33U95 B33U96 A43U97 A4

3U3W A83U3Y E63U3Z F6

D

G

13

F

1is

pro

hibi

ted

with

out t

he w

ritte

n co

nsen

t of t

he c

opyr

ight

7

3U40 E83U41 B53U42 E93U43 E83U44 E93U45 E93U46 A83U47 E83U4A B83U4B B43U55 C33U56 C33U57 C33U58 C33U59 B63U60 E53U61 E53U62 F53U63 F5

C

D

E

6

4

owne

r.

5

2

2U34 F12U35 F12U36 F12U37 C12U40 F32U41 A22U42 A22U43 A22U44 A22U45 B22U46 B22U47 D82U48 D82U49 D72U51 D12U52 D12U53 C13U35 B63U37 A63U3V B8

1 2 3 4 5 6

10

I

*

* IN CASE OF ONLY-ANALOG TUNER

DC / DC

4 5 6 7 8 9

A

H

9

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

B

C

D

E

F

A

B

2U23 D22U24 A72U25 B82U26 B92U27 F72U28 F8

E

B

J

2U33 F1

2U29 E82U2A E82U2B E82U2C B12U30 D22U31 D32U32 E1

C

6

7

F

TO

B

2

2K8 supplies

2K9 supplies

C

7 8 9

1 2 3

*

8

1

A

F

1M20 A11M95 E11M99 C11U01 E21U03 E22U21 B12U22 D2

FU32

6K8

3U82

3

1

2

+3V3-STANDBY

100R

3U91

2N70027U0P

FU40

SUPERS.

CLASS_NO

EMANTESNHC

3 2

2007-11-20 ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-11-21

Maelegheer Ingrid

2008-10-10 3

RE

S

130 A3

DC/DC

TV543 R2 LDIPNX 8204 000 8932

CHECK DATE

NAME

2

10K

3U63

IU3T

IU53

T 32V3.0A

1U01

53

4

FU1D

7U40-2BC847BPN(COL)

RE

S2U

33

100p

GND-AUDIO

FU24

FU20FU23

2U36

+12VF

10n

22K

3U60

2U25

2U47

100n

IU41

22n

IU3B

2U53

100p

10K

3U96RES

IU52

3U57100R

IU3C

23456789

1-1735446-1

1

1011

1M95

100p

2U52

9U08

2

6

1

RES

7U41-1BC847BS(COL)

3K3

3U86

3U3V

1K0

+3V3-STANDBY

+3V3-STANDBY

+12V

BAS316

6U0B

IU36

6U40

BZX

384-

C8V

2

5U1530R

FU39

3U67

100R RES

100p

2U46

CU71

RES

10K

3U59

2U22

10n

10K

3U85

+3V3-STANDBY

+3V3-STANDBY

+5V

3U55100R

5U08

220u

RE

S

5U1130R

10K

3U61

3U41

10K

RES

2U44

100p

IU42

10K

3U80

IU39

+12VD

2U37

1u0

3U62

22K5U06

30R

FU1B

FU26

3U94

10K

3U42

2K2

1K0

3U3Y

FU1F

2U41

100p

1u0

2U48

+12V

4

22K

3U89

TS431AILT7U0N

5

3 1

2

FU13FU1H

RES2U21

100p

30R5U14

+3V3

RE

S

100p

2U45

2U40

1u0

5U1330R

FU18

FU14

RE

S3U44 33

K

FU21

10n

2U23

10K

3U95 RES

3U81

10K

7U0QBC847BW

IU44

10K

3U88

5U07

30R

IU43

FU19

100K

3U37

1

3

2

7U0MBC847BW

30R

5U10

BZX

384-

C27

6U0C

+3V3

3U4A

1K0

RE

S1K

0

3U65

3U64

1K0

3U3Z

10K

+1V2-STANDBY

10n

2U35

FU11

+1V2-STANDBY

3U90

100R

1u0

2U49

+1V2-STANDBY

IU54

FU34

100p

2U43

1u0

2U26

IU51

BC847BS(COL)5

3

4

7U41-2

FU38

CU70

FU35

+3V3

IU21

IU20

IU50

+3V3-STANDBY

FU30

1K0

3U84

3U3W

4K7

2U24

1u0

9U07RES

2U30

1n0

33p

2U27

IU34

10K

3U4B

FU12

10R

3U98

T 32V3.0A

1U03

RES

+33VTUN3U

97

10K

IU38

100p

2U42

2U28

220p

10K

3U35

2U2A

1u0

RES

2U51

100p

220n

2U29

FU31

IU45

IU35

FU10

3U92

100R

10n

2U31

3U45

RE

S33

K

7U11BC847BW

220n

2U2B

RE

S

2

6

1

68R

3U477U40-1

BC847BPN(COL)

3U43

100KFU22

IU48

FU17

FU36

2

1

3

5

2U2C

100n

LD3985M1227U50

4

100R 3U56

FU16

9U06

FU25

BC847BW

7U10RES

FU15

IU47

10K

RE

S

68K3U

46

+5V

3U83FU1C

FU33

1112

23456789

1M99

1-1735446-2

1

10

100R

3U93

FU1G

30R

5U2130R

5U20

IU49

100p

FU1A

2U34

RE

S

IU37

5U1630R

68R

3U40

100R 3U58

IU40

2U32

10n

12345678

1M20

30R5U12

5U17

30R

100R

3U66

+AUDIO-POWER

RESSCL-SET

SDA-SET

ENABLE-3V3-5V

ENABLE-3V3

POWER-OK

LED2

LED1

LED2

LED1

LIGHT-SENSOR

STANDBY

RC

LIGHT-SENSOR

KEYBOARD

BACKLIGHT-OUT

BACKLIGHT-BOOST

VSW

DETECT-12V

BACKLIGHT-PWM-ANA-DISP

LAMP-ON-OUT

18310_501_090302.eps090302

Page 87: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 87Q549.2E LA 10.

2009-May-08

SSB: DC/DC

C

VBST2

VIN

PGND

TEST

VREG5VFB2VO2

VFB1VO1

LL2LL1

DRVL2DRVH2

DRVL1DRVH1

GN

D

21

V5FILT

TRIP2

EN2

NC

TRIP1

EN1

VBST1

M

IU29 B6

IU2C E5IU2D D5IU2T G7

IU2V C9IU2Y F9IU2Z E9IU32 D6

18

IU33 F8IU82 C9

IU09 E8IU85 E9

IU13 D3IU14 B6IU15 E6

IU16 C7IU25 D6IU28 C7

B

N

A

16

8

F

19

K

FU80 B14

H

FU87 D8

15

FU8C B8

IU2A B6FU90 E5IU00 C4IU01 C3IU02 C5

IU03 C3IU04 D5

7 20

1716

2 2101

J

E

L

IU05 D3

IU10 D35U19 C115U30 A11

C C

17

L

M

20

9

5U31 A116U00 C5

6U01 D26U09 B117U01 C37U0D-1 B7

7U0D-2 C77U0H-1 A67U0H-2 B6CU25 G2

FU00 E2FU0D F13

FU85 D14

12V/5V CONVERSION

FU8B A14

B

FU8D B14

6

3U11 E73U12 E8

3U14 B63U26 G93U27 G103U28 C6

3U2C H63U2D H63U2F F103U2G B8

3U2H D93U32 E63U33 F83U3A B12

3U3F E113U3G F113U3J B93U3N D9

5U04 D95U05 B95U09 A115U18 B11

F

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

13

A

3 15

2U8M D102U8Q E92U8R E9

2U8T H62U8U C82U8V C82U8Y F9

2U90 A123U00 C53U01 C53U02 C6

3U03 C53U04 C33U05 C53U07 D2

3U08 D33U10 E2

13

D

H

3

7

12V/1V2 CONVERSION

I

118

P

95

O

2U20 F82U38 F8

2U66 B62U67 C72U80 C42U81 C2

2U83 G72U8A A52U8C B102U8D B10

2U8E A102U8F B122U8G D102U8H D10

2U8K D10

19

1

2

O

P

E

D

K

6

4

owne

r.

G

9 10 11 12 13 14 15

A

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

5

J

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

1 2 3 4 5 6 7 8

18

G

I

B

12

C

1

D

E

F

G

H

A

B

C

D

E

F

G

H

2U00 A122U01 A42U02 C42U03 D2

2U04 D32U05 D22U08 E62U09 E4

2U13 E32U18 E6

14

11

N

3U2D

100K

4 10 14

DC / DC

SS36

6U09

GND-SIG1

FU00

IU2Z

4K7

3U32

4K7

3U33

2U38

1n0

10K

3U12

22R

3U2G

3U03

10R

GND-SIG1

IU04

GND-SIG1

GND-SIG1

GND-SIG1

+5V5-TUN

GND-SIG1

GND-SIG1

3U08

18K

IU2Y

IU02

GND-SIG1

20K

3U07

2U8D

22u

+12VF2

IU28

2U13

1u0

IU32

IU33

2U8Y

1u0

2U8E

22u

BA

T54

CO

L

6U00

RE

S

RE

S

130

GND-SIG1

25V

220u2U

8F

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20082007-11-20

33

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8932TV543 R2 LDIPNX

DC/DC

A2

FU90

32008-10-10

Maelegheer Ingrid

+1V2-PNX5100

IU2T

10R

3U00

10R3U

3F2U8G

RE

S

22u

IU85

IU2A

2U8C

22u

22u

2U8K

IU03

RE

S

IU00

1%

3U27

1K0

2U8A

22u

GND-SIG1

8

21

3U3N

22R

SI4936BDY

7U0D-1 7

1n0

2U8R

RE

S

+5V

GND-SIG12U05

1n0

470R

3U2F

1%

FU8C

GND-SIG1

100p

2U83

RE

S

3U2C

470R

FU80

1%

RE

S

+5V5-TUN

2U01

220u

25V

10R

3U10

RE

S

IU13

IU15

RE

S

FU85

+5V5-TUN

100n

2U80

FU8D

1n0

2U08

10u

5U05

5U04

FU8B

10u

IU05

IU10

2U90

1u0

100n

2U04

10R

3U02

5 6

43

SI4936BDY

7U0D-2

RES

2u2

2U81

10u

5U09

3U01

10R

3U3J

22R

5U19

RES30R

6K8

3U26

5U31

30R

5U30

30R

RES

IU16

2U67

1n0

IU14

3R3

3U28

1n0

2U66

5

10

23

4

11

22

3U14

3R3

13

25 18

820

24

19

21

1

14

15

26

173

12

7

2716

269

7U01TPS53124PW

Φ28

SI4936BDY

7U0H-2

5 64

3

1%3U

3A

2K7

2U8U

1n0

2U8Q

1n0

2U03

100n

RE

S

22u

2U8H

IU01

RE

S10

0p

2U8T

RES

30R

2U20

3n3

5U18

IU2D

RE

S

2U8M

22u

IU29

CU25

3U2H

22R

IU25

2U09

4u7

IU2C

GND-SIG1

3R3

3U05

2U02

100n

1n0

2U8V

IU82

IU09

6U01 RES

GND-SIG1

BAT54 COL

7U0H-1

SI4936BDY7 8

2

1

RE

S 25V

220u2U

00

3U04

3R3

22K

3U11

FU0D

2U18

3n3

FU87

GND-SIG1

+1V2-PNX5100

+12V

1%120R

3U3G

IU2V

ENABLE-3V3-5V

SENSE+1V2-PNX5100

18310_502_090302.eps090302

Page 88: Q549---32pfl9604ser

EN 88Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: Front End

IO2IGNDO1

GND

RF-IN

MTMT

C

RF-IN

MTMT

RF-IN

MTMT

AGC CONTROL

8

J

RESERVED

FRONT-END

5

N

M

B

IF 1T11 IS USED THEN 2T25 AND 9T11 ARE ALSO STUFFED

17

IT23 C11IT24 C12

IT30 D9IT32 D11IT34 F11IT36 G11

H

12

L

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or

in p

arts

3

C

9 15

O

A

H

owne

r.

9

20

8

I

11

G

IT11 B7IT12 B7IT13 B7IT14 E5IT15 F5IT16 B9IT17 B11IT19 C10IT20 C11IT21 C12IT22 C13

16

8161

IT25 C13IT26 D10IT28 D7

19

9T45 G7AT10 B7AT11 D7FT17 C2FT18 G5FT21 H9FT22 B3FT23 B2IT03 B5IT04 B5IT05 B1IT08 C1IT09 B5IT0D B7IT10 B5

C

K

A

F

6

2

P

3 18

1

9T22 D109T23 D79T24 E99T25 F59T27 G59T29 G79T30 G59T31 C139T32 D139T33 F119T34 G119T40 B79T41 E79T43 C109T44 D10

10

3101

5

3T14 B5

1211

G

3T18 E113T19 E113T22 G93T98 E115T10 B75T11 C25T12 F116T10 B26T11 B27T10 C119T10 B59T11 B79T12 B59T13 B79T14 C109T18 D59T20 D59T21 D7

1

L

D

20

I

IF 1T21 IS USED THEN 2T23,2T25,3T14, 3T15, 9T13, 9T11 AND 9T21 ARE ALSO STUFFED

2

2T17 C102T18 C132T19 F10

4

14

2T23 D52T25 B72T26 E5

B

2T27 D72T28 E52T29 E72T35 B52T36 B52T37 C72T39 H93T10 B23T11 B23T12 B23T13 B5

P

E

7

K

5 6 7

3T15 E53T16 E53T17 E11

11 12 13

N

E

6

4

J

13

O

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

F

1T11 C51T21 E51T25 C102T10 B32T11 B32T12 C22T13 C122T14 C22T15 C102T16 C13

B

C

D

2T20 G102T21 E112T22 B7

H

I

1T01 A5

15

1 2 3 4 5 6 7 8 9 10 11 12 13 14

1 2 3 4

14

8 9 10

17

D

19

M

7

14

A

B

C

D

E

F

G

H

I

A

E

F

G

9T25

22n

2T39

4n7

2T37

RE

S9T

24

2T14

100n

IT21

2T36

18p

9T10

18p

2T28

+VTUN

+5V-TUN-PIN

9T13

IT03

820n

5T12

2T23

4n7

9T40

5T10

30R

IT176T

11

BZ

X38

4-C

33

IT20

9T30

3

12

54

+33VTUN

130

OFWX6966M

1T25

36M125

3

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8929TV543 R2 LDIPNX

FRONT-END

A2

32008-10-10

Randal De Keyzer

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-03

1

+5V-TUN

2T25

220n

9T21

10n

2T16 IT22

3T10

100R IT04

2T27

4n7

IT28

9T34

AT11

8

RE

S

1314

15

NC

12 4

NC

2

3R

F_A

GC

6S

CL

7S

DA

XT

AL_

OU

T9

+5V

5A

S

1D

C_P

WR

10IF

_OU

T1

11IF

_OU

T2

12

1T21HD1816AF/BHXP

TUNER

RES

9T14

9T41

18p

2T35

+5V-TUN-PIN

RE

S9T

33

IT36

RE

S9T

43

IT19

IT13

FT21

3T16

47R

6K8

3T22

IT34

IT11

ANTENNA-SUPPLY

IT16

IT08

9T23

10n

2T15

FT23

47R

3T15

3T13

47R

6

SD

A7 8

XT

AL_

OU

T

10

IF_O

UT

211

12

1314

15

2N

C1

NC

24

RF

_AG

C3

SC

L

TUNERHD1816AF/BHXP

1T11

+5V

9

AS

5

DC

_PW

R1

IF_O

UT

1

220n

2T11

9T44

RES

RE

S

6K8

3T17

+5V-TUN

9T27

+5V-TUN

9T45

3T12

100R

5T11

30R

IT24

+5V-TUN

10n

2T13

+5V-TUN-PIN

10n

2T17

AT10

+3V3A

9T11

IT05

IT0D

GN

D2

2 INPUT1

3 INPUT2

7OUTPUT1

6OUTPUT2

4 VAGC

1V

CC

7T10UPC3221GV-E1

8G

ND

1

5

RE

S9T

32

17

18 19

6N

C

4S

CL

5S

DA

TU

2

FT17

1A

GC

3A

S

11IF

1

10IF

2 12

1314

15

16TUNER

9+

33V

_TU

N

7+

5VA

DC

8

1T01UV1316E

BZ

X38

4-C

33

6T10

FT18

RE

S

9T31

2T20

10n

2T21

22n

RES

9T22

IT12

2T22

4n7

100R

3T11

9T12

IT32

IT09

IT25

ANTENNA-SUPPLY

IT14

FT22

3T98

10K

2T10

220n

IT23

9T18

4n7

2T29

2T18

10n

9T29

3T19

220K

3T18

22K

9T20

IT30

IT15

10n

2T19

IT10

+VTUN

47R

3T14

2T12

22u

IT26

2T26

18p

TUN-P9

TUN-P7

PDNPDN

RF-AGC

TUN-P9

TUN-P7TUN-P8

TUN-P1

TUN-P3

TUN-P11TUN-P10

TUN-P6

TUN-P4TUN-P5

TUN-P2

IF-AGC

RF-AGC

TUN-P1

TUN-P3TUN-P4

TUN-P2TUN-P1

TUN-P5

TUN-P5

TUN-P2

TUN-P4

TUN-P9

TUN-P10B-IF+_N-IF+

TUN-P6TUN-P7TUN-P8TUN-P9

TUN-P10TUN-P11

IF+

PDP

B-IF+_N-IF+

TUN-P10

TUN-P8

TUN-P5

TUN-SDA

TUN-SCL

TUN-P3

TUN-P1

TUN-P4

TUN-P6

TUN-P7

TUN-SDA

TUN-P6

TUN-SCL

TUN-P3

TUN-P9TUN-P8TUN-P7TUN-P6

RF-AGCTUN-P2

TUN-P3

IF-AGCTUN-P9

TUN-P8

IF-

B-IF+_N-IF+

B-IF-_N-IF-

B-IF-_N-IF-

RF-AGCTUN-P11

B-IF-_N-IF-

TUN-P1TUN-P2TUN-P3TUN-P4TUN-P5

TUN-P11TUN-P10

18310_503_090302.eps090302

Page 89: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 89Q549.2E LA 10.

2009-May-08

SSB: Demodulator

TCKTDITDOTMS

GPIO1GPIO2

VIA

MSTRTMERRMCLKMVAL

01234567

RF_AGCIF_AGC

SIF

CVBS

DACL

WS

VSYNC

VIA

MD

I2S

I2C

I2C

PD

VDDH VDDL

VSSH VSSLVS

SA

H_A

FE1

VS

SA

H_C

VB

S

VS

SA

H_O

SC

VS

SA

L_A

FE1

VS

SA

L_A

FE2

GN

D_H

S

VD

DA

H_A

FE1

VD

DA

H_C

VB

S

VD

DA

H_O

SC

VD

DA

L_A

FE1

VD

DA

L_A

FE2

XI

XO

PN

SCL2

SDA1

RSTN

SAW_SW

SCL1

SDA2

COM

OUTIN

C

3T52 B23T53 B2

1 2

5 6

3T79 E123T80 A93T81 A93T82 A93T83 E33T84 F33T86 F33T87 F33T88 F53T89 F33T90 F3

2T61 E10

G

E

F

3T63 C93T64 C93T65 C93T66-1 D43T66-2 D43T66-3 D33T66-4 D43T67 D43T68 E23T69 E3

2T59 B32T60 C8

C

D

D

5T52 G65T53 H65T54 I75T55 I66T50 E36T51 F27T50 A67T51-1 C97T51-2 C107T52-1 E97T52-2 E10

3T70 D93T71 D93T72 E9

3

7

2T78 I62T79 I62T80 I72T81 I72T82 I72T83 E42T84 E32T85 E23T50 A23T51 A10

O

5

2T51 A4

12

AT50 A4AT51 B4FT20 E6FT24 C5FT25 C3FT50 B8FT51 C3FT52 C3FT53 C3FT54 C3FT55 F7

3T91 F53T92 G3

3T54 B3

4 5

RESERVED

2T52 A42T53 B32T54 B42T55 B32T56 B42T57 B32T58 B4A

B

6

15

3T61 C43T62 C9

IT59 B9IT60 B4IT61 B3IT62 B9IT63 B9IT65 C3IT66 C4IT67 C4IT68 C3IT69 C8IT70 C9

7T53-1 E117T53-2 E11

2T62 D122T63 D9

H

I

A

7

F

G

N

2T24 G52T50 A4

2T77 I6

B

3T77 E93T78 E11

IT76 D8IT77 D9IT79 D3IT80 E9IT81 E10IT83 E9IT84 E2IT85 E3IT86 F6IT88 F6IT89 F3

FT56 G8FT57 G6

K

6 7

6

14

7 8 9 10 11 12 134 5

3T59 C43T60 C9

5T50 B35T51 G7

15

IT93 G2IT94 G3IT95 G3IT96 E11IT97 E11IT98 E5

16

IT73 C9IT75 D9

13

2T64 F62T65 G6

B

C

D

E

F

G

H

I

1T50 A5

2T75 H62T76 H7

3T75 E93T76 E9

9T70 C29T71 C2

12

J

RESERVED

RESERVED

4

8

F

C

IT90 F3IT91 F4

P

I

8 9 10 11 12 13

1 2 3

3T57 C33T58 C4

3T94 H33T95 E9

IT57 B4IT58 B10

M

N

M

I

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

DEMODULATOR

19

1 9

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

2T66 G62T67 G72T68 G72T69 G72T70 G72T71 G82T72 G82T73 H62T74 H7

3T73 E113T74 E12

9T63 E119T64 F6

K

20

3

9

D

P

C

14

G

A

4

3T55 B23T56 D11

owne

r.

3T93 G3

IT53 B5IT55 B4IT56 B3

10

11

J

2 11

A

83

20

L

16

E

B

18

9T15 C19T16 C19T62 F6

17

19

O

FT58 H7FT59 I7FT60 C10FT61 D11FT62 E11FT63 I6IT50 A5IT51 A5

13

H

17

18

150R

10

1

2

E

H

L

7T54 F77T55-1 F47T55-2 G47T56 E3

+5V-TUN-CVBS

3T74

3T64

150R

+3V3

IT69

+5V-TUN

2u2

2T24

5

3

4

IT63

IT79

BC847BPN(COL)7T52-2

FT58

3T57

100R

10n

2T55

+3V3

IT66

2T77

2u2

2T61

22u

100n

2T82

100R

3T70

10K

3T75

4K7+3V3 3T59

100n

2T69

FT51

IT88

IT83

IT73

5T53

30R

+12V

FT55

+1V2A

IT51

+3V3

3T78

100R

RES100n

2T58

680n

5T50

2u2

2T73

3T68

4K7

FT63

FT25

2T50

12p

3T62

470R

+3V3E

7T53-2

BC857BS(COL)RES5

3

4

7T54

RES

1

3 2

IT96

LD1117DT12

5T51

600R

2T62

3p3

12p

2T51

600R

5T54

IT59

FT59

2T54

100p

6T50

BZX

384-

C6V

868R

3T56

100K

3T83

IT89

3T65

150R

3T92

10K

LM393PT7T55-2

5

67

84

15 28 55

29

49

50

38 41 51 35 45 7 17 25 54 3

979899

100101

697071727374

8788899091929394

68

959678

7980818283

8467 85

86

18 26 53 2 16 27 56

66

757677

44

59605758

37 42 52 36 46 8

2122

65

10

4847

33

32

31

1

34

3940

9

111213141920

43

65

430

23

62

24

61

6364

ΦDEMODULATOR

DRX3926K-XK-A27T50

+3V3 +1V2

FT56

FT53

3T52

220R

2T78

2u2

2K2

3T95

3T86

220R

IT53

+3V3D

22u

100n

2T67

2T63

100n

2T83

2T74

100n

IT60

IT50

+5V-TUN

IT57

+3V3

IT62

3T88

10K

2T72

100n

+3V3

10K

3T63

180R

9T16 RES

3T77

9T15 RES

220R

3T50

FT52

4K7

3T94

+3V3

FT57

6

1

3T54

470R

BC847BPN(COL)7T52-12

27M

1T50

3T53

560R

150R

3T76

IT97

+1V2A

2 43

2T79

100n

BCP567T561

+3V3

+1V2-PNX85XX

RE

S18

FT62

10K

3T66

-1

IT86

3T81

RE

S

RE

S

10K

IT76

3T80

10K

3T93

2K7

IT61

2T80

100n

+3V3D

+5V-TUN-CVBS

IT85

3T66

-2

10K

RE

S27

2T53

22p

3T67

4K7

IT77

FT24

FT54

100u2T

65

+1V2

9T62

4VR

ES

2T64

100n

+3V3

18K

3T60

30R

5T52

FT61

3T58

100R

+5V-TUN

IT70

2R2

3T84

27K

3T89

RE

S36

IT81

+3V3A

10K

3T66

-3

3T61

+3V3E

4K7

IT90 IT91

2T84

100n

220R

3T87

1

BC847BPN(COL)7T51-1

RES

7T53-1

BC857BS(COL)RES2

6

IT84

+3V3

IT93

100R

3T73

560R

IT65

3T55

IT98

3T51

10KAT51

2u2

2T81

3T82

10K

RE

S

+3V3

2T68

100n

18K

3T71

5

3

4

FT20

7T51-2BC847BPN(COL)RES

27K

3T90

150R

3T79

+5V-TUN-CVBS

10n

2T57

DATE

NAME

2

SUPERS.

CLASS_NO

SETNAME

3 2

2008-06-03 ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-11-21

Randal De Keyzer

2008-10-10 3

130 A2

FRONT-END

TV543 R2 LDIPNX 8204 000 8929

CHECK

IT58

2T75

2u2

2p2

2T59

2T66

100n

IT75

6T51

BAS316

+5V-TUN-CVBS

100n

2T56

+1V2

RES

FT50

3T69

2R2

IT80

IT55

3T66

-4

10K

RE

S45

2T85

22n

100p

2T52

6K8

3T91

100n

2T71

LM393PT7T55-1

3

21

84

9T64

30R

5T55

3T72

+12V

470R

+3V3

2T70

2u2

9T709T71

ANTENNA-SUPPLY

FT60

IT67

+3V3

IT682T60100n

9T63

IT94

IT56

+12V

+3V3A

IT95

+5V-TUN-CVBS

AT50

2T76

100n

RF-AGCSCL-SSB

TUN-SCL

SDA-SSB

TUN-SDA

ANTENNA-CTRL

FE-CLK

IF-AGC

TUN-SDATUN-SCL

ANTENNA-CTRL

JTAG-TMS-DRXKJTAG-TDO-DRXKJTAG-TDI-DRXK

JTAG-TCK-DRXK

RESET-SYSTEM

FE-VALID

FE-SOP

FE-DATA7

FE-DATA4FE-DATA3

FE-DATA0

FE-DATA2FE-DATA1

FE-DATA6FE-DATA5

SDA-SSBSCL-SSB

PDP

PDN

IF-P

CVBS-TER-OUT

CVBS4

IF-

IF+

18310_504_090302.eps090302

Page 90: Q549---32pfl9604ser

EN 90Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: PNX8543 - Stand-by Controller

OXTAL

ALE

EA

67

01237

012345

P6

P0

P1

P2

P3

PWM

67

01234

VSS_XTAL

UA_RXUA_TX

5

PSEN

MC

SPI

012345

01

RESET_IN

SCLSDA

CLKCSBSDI

SDO

0123

45

CADC

I

D

C

S

W

HOLD

VSS

Q

VCC

C

SCLADR

012 SDA

WC

F

C

8

11

6

1HF0 A42H00 C3

3H30 D2

5121

3 4

5

8

A 11

P

N

2H11 H72H12 H6

4 5

A

B

3H01 E2

9 10

G

H

3H07 C11

M24C64

4

2H03 F62H10 D11

3H58 D2

3H08 C113H10 B2

D

E

I

3H68 B7

1

E

16

M

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

PNX 8543 : STANDBY CONTROLLER

3H15 B13H16 B2

5 9 10

3H21 C23H22 C133H23 C1

19

18

31 2

1

3

N

7

7 8

3HD4 E13

3H24 C23H25 C13

15

13 14

7H11 H8

3H31 D13H32 B11

A

B

C

3H42 C13H43 H73H44 I4D

E

F

3H52 I133H53 I133H54 C7

G

H

I

2HF1 B33H00 E2

10

3H02 B113H03 B11

F

3H05 B113H06 C11

9H27 E3

3H60 D13H64 D2

2H01 E3

3H13 B13H14 B2

FHC6 H11

3H69 C73H70 E2

9

1 2

3H78-3 H43H78-4 H43H86-1 F4

6 7 8

3H87-1 I23H87-2 I33H87-3 I3

12 13 14

*

6

3H92-3 G3

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

16

6

10

5

IH16 F5

6H10 H76HW2 F5

12

3H27 C23H28 C1

IH26 H4

7H14 F67H16-1 F5

I

20

L7HC3 H127HC4 H127HD0 E12

7 1413

9H15 F119H25 E39H26 E3

2HC0 H132HD0 F122HF0 A3

E

RES

MAIN NVM

C

11

3H04 B11

*

3H56 C7

IHW5 B5

9H28 H13FH09 H12

3H12 C12

3H66 B73H67 B7

IHWA C5

FHC7 I13FHD0 E13

20

HOTEL TV

19

IH01 D11IH02 D3IH03 D10

3H17 B13H19 B23H20 C1

IH08 H5IH09 C13IH14 F5

B

4 18

3H92-1 G43H92-2 G4

B

3H92-4 H33HC2-1 H12

13

3HC2-3 H123HC2-4 H13

IH35 H7

IH17 G5IH18 I4

3H26 C1

7H02 D107H03 C13

O

IH32 C10IH33 H7

3H36 D23H39 C23H41 H6

IH37 C10IH91 H4IH92 F9

3H46 C23H48 C13H51 C2

IHW1 B4IHW2 B4IHW3 B4

17

G

owne

r.

C

G

L

A

O

J J

P

3

IHWB C4IHWC C4

3H65 B7

FHC2 I14FHC3 C5

IH00 D10

IHWD C4IHWF C5

3H72 G73H78-1 E63H78-2 E5

IH06 D10IH07 D10

IHWH C4

3H86-2 F43H86-3 F33H86-4 F2

F

D

*

K

2

3H87-4 I4

H

9

IH15 C10

I

14

3HC2-2 G12

IH21 I12

IH34 G8

W2

FHD1 F11FHD2 D13

7H00-6 A5

IHC2 G12IHD0 F12

IHWG C4

IH04 G4

7H16-2 G57H93-1 H57H93-2 I5

IHWM D4IHWN D5

9H05 D139H13 G89H14 E11

H

12

M

K

2

IH19 F4IH20 F7

17

IHW4 B4

DIH36 H7

IHC1 H12

IHW6 B4IHW9 B4

FHC1 H13

11

AJ2

AF3

AL5AK5

AJ1AK3AK1AJ4

W3

W1

AG1AH5AH4AH3AH2AH1

AK2AK4

AE2

AJ3

AG4AG3AG2

AC4AC3AE1AD5AD4AD3AE5AE4

AF4

AC2AC1AB3AB2AB1AD2AD1AC5

AF23EA1FA

AN3AN2AP2AP1

10K

3H08

7H00-6PNX85439EH/M2/24182

STANDBY

10K

3H44

3HD

4

10K

3H3110K

10K

3H58

3H92

-1

10K

18

3HC

2-3

36

10K

6H10

BAS3164

3H65 100R

3H92-4

10K

5

3H51

10K

IHW2

10K

3H01

IH03

IHC1

IHWH

IHC2

FHC3

3H42 RES

4 5

10K

10K

3H86-4

IH35

IH19

10K3H23

6HW

2

BA

S31

6

3H32

10K

IH02

IH36

IH14

3H70

100K

3H02 RES

4K7

3H52

100R3H53

100R

100R

3H56

RES

+3V3-STANDBY

3H03

4K7

10K3H48

4K7

3H72

3H6010K

+3V3-STANDBY

+3V3-PER

IH91

3

INP2

NC

4

OUTP 1

7H11

CD5GND

NCP303LSN30

10K

3H86

-11

8

6

1

7H93-1BC847BS(COL)

2

3H54

100R

1

IH17

NCP303LSN307HD0

5 CD

3

GND

INP2

4

NC

OUTP

RES

10K

3H36

IHW5

22p

2HF0

10K

3H87-4 45

9H28 RES

RES2HC0

100n

IHW3

+3V3-STANDBY

2H11

100n

RES3H1510K

EMC HOLE1X03

9H14

IH21

9H27

+3V3-STANDBY

IHW6

9H26

3H87-2

10K

27

1FHD1

RES3H64

10K

1HF0 27M

10K

3H04RES

IHW4

3H194K7

3K3

3H43

3

4

IH34

BC847BS(COL)7H93-2

5

10K

3H05

BC847BW

1

3 2

+1V2-PNX5100

7H03

3

2PDTC114EU

7H141

IHD0

+3V3-STANDBY

IHWA3H69

100R

RE

S9H

15

FHC6

10K

3H41

8

+1V2-PNX85XX

IH15

3H87-1

10K

1

2

1

84

3

Φ512K

FLASH

M25P05-AVMN67H02

6

5

7

72

3H92

-2

10K

+3V3-STANDBY

RES

6 3

3H2110K

3H86-3

10K

100R3H66

45

10K

3HC

2-4

3H39

10K

FHC2

+3V3-STANDBY

7HC4BC857BW

10K3H20

RES9H05

FHC1

FHD0

IHW1

RE

S

2H10

100n

IH00

IH37

2H01

100n

PNX8543 TV543 R2 LDIPNX

STANDBY CONTROLLER

A2130

FHD2

32008-10-10

Randal De Keyzer

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20052007-11-29

116

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8927

8 1

+5V +3V3-PER

10K

3HC2-1

IH18

IHWB

IH07

3H1310K

6 3

+5V

10K

3H92-3

3HC

2-2

10K

27

IH09

100n

2H12

2

6

1

RES

BC847BS(COL)7H16-1

IH26

3H2810K

36

10K

3H78

-3

4

7

RES10K

3H17

123

6

5

8

(8Kx8)Φ

EEPROM

7HC3

IH92

FHC7

100R3H68

2HF1

22p

IH01

RES3H2410K

+3V3-STANDBY

IH06

3H1610K

+3V3

+3V3-STANDBY

3H22

4K7

+3V3-STANDBY

IH33

3H67 100R10K3H14 RES

7H16-2BC847BS(COL)

5

3

4

2HD

0

100n

IH32

IH16

IHWN

3H00

10K

FH09

3H2710K

10K3H30

RESIHWF

IHWDIHWC

9H25

IHWG

+3V3-PER

3H25

10K

10K

3H78

-27

2

IHWM

+3V3-PER

10K3H26

10K

63

54

3H87-3

10K

3H78

-4

3H06

10K

IH04

3H4627K

IH08

2H03

1u0

10K

3H07

+3V3-STANDBY

9H13

IH20

2H001n0

3H78

-1

10K

81

2 7

4K7 3H

12

10K

3H86-2

RE

S

10K3H10

IHW9

RES

SDA-UP-MIPS

SCL-UP-MIPS

RESET-STBY

SPI-CLKSPI-CSBSPI-SDI

SPI-SDO

DETECT-12V

SPI-WPSPI-PROG

BOLT-ON-TS-ENn

UART-SWITCH

RC-UPRC

RC-OUT

RC-INRC-UP

RC

UART-SWITCHRESET-ETHERNETRESET-PNX5100RESET-NVMBOLT-ON-TS-ENn

WP-NANDFLASH

POWER-OKENABLE-3V3

LED1

RESET-NVM

RESET-STBY

AUDIO-MUTERESET-AUDIO

SDA-UP-MIPS

LED1LED2

TXD-UP

AV2-STATUS

DETECT2DETECT1

LAMP-ON-OUT

LAMP-ON

SPI-PROGSPI-WP

BOLT-ON-IOBOLT-ON-IO

EJTAG-DETECTLAMP-ONSTANDBYDETECT1DETECT2

POWER-OKENABLE-3V3

AV1-STATUS

SCL-UP-MIPSSDA-UP-MIPS

SPI-CLK

SPI-SDO SPI-SDI

SPI-CSB

SPI-WP

RXD-UPTXD-UP

RESET-SYSTEM

KEYBOARD

SCL-UP-MIPS

PSEN

ALE

EA

LED2

PSEN

ALE

EA

SPI-SDI

RESET-NVMRESET-PNX5100

RESET-ETHERNET

WP-NANDFLASHRESET-AUDIOAUDIO-MUTE

MHP-SWITCH

SUPPLY-FAULTSDM

RXD-UP

RESET-SYSTEMAV2-BLKAV1-BLKKEYBOARDLIGHT-SENSOR

RC-UPREGIMBEAU_CVBS-SWITCH

CEC-HDMISUPPLY-FAULT

SDM

MHP-SWITCHEJTAG-DETECTLAMP-ONSTANDBYDETECT1DETECT2

RC-UPREGIMBEAU_CVBS-SWITCHCEC-HDMI

18310_505_090302.eps090302

Page 91: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 91Q549.2E LA 10.

2009-May-08

SSB: PNX8543 - Debug

C

1

A

BIH95 D2

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

FOR DEBUG

I

A

B

4

1 2

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

SPI-PROG

G

2H07 D3

3

F

J

FTSTPOINT

2H06 C3

owne

r.

1

3HF3 A3 6HF0 B3 7HF2 B3 FH01 D2

PNX8543 : DEBUG

FOR DEBUG

4

J

I

D

53

B

C

5

D

2

G

6

IH94 C3

H

2

1

GND

TSTPOINT

3

FH00 C2

A

3

D

D

2

FOR DEBUG

E

C

C

SDM

1H11 C2

4

B

A

FH08 D3 IH93 C2

H

64

FH08

C

TSTPOINT

E

2008-11-21

Maelegheer Ingrid

2008-10-10 3

A4

DEBUG STBY CTRL

PNX8543 TV543 R2 LDIPNX 8204 000 8927

CHECK DATE

NAME

2

SUPERS.

CLASS_NO

EMANTESNHC

16 2

2007-11-29 ROYAL PHILIPS ELECTRONICS N.V. 2005

130

+3V3-PER

PDTC114EU7HF2

330R

3HF3

SM

L-31

0

6HF0

IH95

IH94

IH93

12

34

1H11

SK

HU

BH

E01

0

FH01 RES

FH00

2H07

100p

100p

2H06 RESSPI-PROG

SDM

RESET-SYSTEM

18310_506_090302.eps090302

Personal Notes:

10000_012_090121.eps090121

Page 92: Q549---32pfl9604ser

EN 92Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: PNX8543 - Control

USB_RPU

RREF

SCLSDA

SCLSDA

UA2_TXUA2_RX

EJTAG

USB_VBUS

2

1SCL1

2

3

SDA

USB

TRSTN

CLK_27_OUT

RESET_SYS

TCKTDITDO

3SMT

BL_PWM

FAULTDPDM

USB_ID

PWR_EN

C

3HPE E23HPF E23HPG E23HPH E2

3H11 C13H33 C63H37 D43H38 D5

3HFY C13HP2 C43HP3 B13HP4 B1

H

1 2 3 8 9

1

9H17 D3FH03 C5FH04 E4FH05 F4

2

E

G

7

7 8 9

A

4

G

9

8

F

A

B

C

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

F

1

2 10

C

I

3HP8 C1

11

6

H

D

IHF9 C3IHFA C3IHFB B3IHS8 C1

owne

r.

E

F

3H09 C6

9

C

3

1

3H45 D43H49 E43H50 E43HF9 A3

3

13

J

D

3HP6 B1

7

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

A

3HPP D13HPR D13HPS F23HPT F4

4 5 6 7

7H00-8 B3

J

13

12

3 4 5 6

B

8

5

2

B

C

D

E

A

FH11 F4FH12 F4IH12 C1

D

B

E

12

IHF4 B3IHF6 C3IHF7 C3IHF8 C3

3HPA C13HPB C13HPC C13HPD E2

11

5 6 10

PNX8543 : CONTROL

4

F

I

3HPJ F23HPK E43HPL C13HPM F4

3HPU F23HPV F43HPW B3

10K 3HPC

10K 3HPA

3HF9

10K

100R

3HPS

IHF7

3H38 10K

10K 3HP8

33R3HPW

IHF8

+3V3-PER

9H17RES

3H1110K

3HPL10K

3HPV

4K7

4K7

3HPT

IHF4

1K53H37AK27

AN16AP16AL16

AP17

AK16

AM17

AM16

AN17

V4 GPIO_8V5 GPIO_9

AN28

F33

D32

D33

H33

B33

G32

AL27

U2 GPIO_0U3 GPIO_1U4 GPIO_2L34 GPIO_3L32 GPIO_4L31 GPIO_5V2 GPIO_6V3 GPIO_7

AP27

AP29

AN4AP3AP4AM4AL4

7H00-8PNX85439EH/M2/24182

CONTROL

+3V3-PER

4K7

3H50

100R

3HPU

1K5

3HPM

+3V3-PER

+3V3-PER

+3V3-PER

+3V3-PER

3HPB10K

4K7

3H49

10K 3HP4

100R

IHS8

FH03

3HPJ FH05

3HP610K

3HPF

100R

RES

IHF6

3HPK

1K5

10K 3HFY

100R

3HPD

IH12

10K 3HPR

1%

3HP2

12KIHFA

3HP310K

10K3H45

PNX8543 TV543 R2 LDIPNX 8204 000 8927

CHECK DATE

NAME

2

SUPERS.

CLASS_NO

EMANTESNHC

16 5

2007-11-29 ROYAL PHILIPS ELECTRONICS N.V. 2005

2008-11-21

Maelegheer Ingrid

2008-10-10 3

130 A3

MIPS , I2C & EJTAG

100R

3HPE

3HPH

FH11

100R

FH04

+3V3-PER

IHF9

+3V3-PER

3H09

15K

15K

3H33

3HPP10K

FH12

100R

IHFB

RES 3HPG

SCL3

SDA1

SDA2

SDA3

USB20-DMUSB20-DP

USB-OC

+3V3-PER

SCL-SET

SDA-SET

SCL2 SCL-SET

SDA2 SDA-SET

USB20-DM

USB20-DP

SCL1

SCL2EJTAG-TCKEJTAG-TDI

EJTAG-TDOEJTAG-TMS

EJTAG-TRSTN

RXD-MIPSTXD-MIPS

TXD-MIPS2RXD-MIPS2

PCI-CLK-OUT

SCL-SSB

IRQ-PCI

TXD-MIPS2RXD-MIPS2

RESET-SYSTEM

SDA-UP-MIPS

SCL-UP-MIPS

SDA-UP-MIPS

SCL2 SCL-UP-MIPS

SDA2 SDA-UP-MIPS

SCL3 SCL-SSB

SDA3 SDA-SSB

BOOTMODE

IRQ-CA

SDA-SSB

IRQ-CA

EJTAG-TCKEJTAG-TDIEJTAG-TDOEJTAG-TMSEJTAG-TRSTN

TXD-MIPSRXD-MIPS

IRQ-PCIWC-EEPROM-PNX5100BOOTMODE

SCL1 SCL-UP-MIPS

SDA1

18310_507_090302.eps090302

Page 93: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 93Q549.2E LA 10.

2009-May-08

SSB: PNX8543 - Control

C

TRDY

XIO_SEL293031

012345678910111213141516171819202122

IDSELINTA_OUT

IRDYPAR

PERR

REQ

REQ_B

SERRSTOPTRDY

PLL_OUT

XIO_ACKXIO_AD25

0123

0123

CLKDEVSELFRAME

GNT

GNT_B

232425262728

PCI_AD

PCI_CBE

2

1

CLKOUT

3CLK

VDD

4

GND

REF

8

2

6

F

owne

r.

4

2

9

A

3HFE-2 A63HFE-3 A63HFG D23HFH E23HFK E73HFM E73HFN E7

1

B

3HFD-4 A5

7H00-3 A2

G

C

6

I

1

3HEU B33HF2 E23HF4 E23HF5 C33HFD-1 A6

3HES-2 B53HES-3 C53HES-4 C5

9HG3 C3IH30 B4IHF0 E2IHF1 C3IHF2 C3

9HF4 C6

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

12

F

D

3HES-1 C5

H

9

IHF3 D3IHF5 E2

C

9HF5 C6

IHS7 C3

4

8

J

10 11

5 6 7 8

A

53

I

3HFP E7

3HFD-3 A6

3 4 5 6

11

B

2

D

E

A

B

C

7 8

J

A

3HFE-1 A6

7HF1 D6

3HFR E5

C

D

E

2HF5 D72HF6 D7

3HFD-2 A5

2HF7 D7

4 71

5

B

1

PNX 8543 : CONTROL

E

7

D

9HF6 B69HF7 B6

RESERVED

2 3 10

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

13

H

E

G

13

3

12

33R

3HFM

4K73HFD-2 27

A3

2008-10-03

130

2

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20052007-11-29

616

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8927PNX8543 TV543 R2 LDIPNX

CONTROL

3HES-33 64K7

IHF0

8

3HF2

10R

3HFD-1 14K7

3HFG

9HF7

10R

3HFE-33627

4K7

4 5

3HFE-24K7

3HES-44K7

IH30

+3V3-PER

3HES-24K7

2 7

8 14K7

3HFE-1

9HF4

3HFH

10R

+3V3-PER

36

IHS7

4K73HFD-3

IHF5

3HFN

33R

33R

3HFR

3HEU100R

IHF3

3HF4

10R

*

4K73HES-11 8

10n

2HF5

10p

2HF7

9HF6

3HFP

33R7

8

4

1

6

DELAYZEROΦ

BUFFER

CY2305S7HF1

3

2

5

B20C20D20E20

+3V3-PER

E25C25

D30

E31

D25B25E26

AP28

A20B19

C21B21A21

A30A25C26

E30

E29

B30C30D26

B22

D29

A22E21

A28B28C28D28E28A27

D21

C29

A24E23D23C23B23A23E22D22C22

B29

B27C27D27E27A26B26E24D24C24B24

PCIPNX85439EH/M2/241827H00-3

A29

3HFK

33R

IHF1

+3V3-PER

3HFD-44K7

45

IHF2

9HG3

+3V3-PER

9HF5

3HF5

100R

+3V3-PER

100n

2HF6

XIO-ACK

PCI-FRAME

PCI-GNT

PCI-GNT-B

PCI-IRDYPCI-PAR

PCI-PERR

PCI-REQ

PCI-REQ-B

PCI-SERRPCI-STOPPCI-TRDY

PCI-CLK-OUT

PCI-CLK-PNX5100

PCI-CLK-PNX8535

PCI-CLK-MINI

PCI-CBE0PCI-CBE1PCI-CBE2PCI-CBE3

PCI-CLK-PNX8535PCI-DEVSEL

PCI-CLK-PNX8535

PCI-CLK-PNX5100

PCI-CLK-MINI

PCI-CLK-ETHERNETPCI-CLK-OUT

PCI-CLK-ETHERNET

XIO-SEL-NAND

PCI-CLK-OUT

PCI-GNT

PCI-GNT-BPCI-REQ-B

PCI-AD13PCI-AD12PCI-AD11PCI-AD10

PCI-AD1PCI-AD0

PCI-SERRPCI-PERR

PCI-TRDYPCI-IRDY

PCI-FRAMEPCI-DEVSEL

PCI-STOP

PCI-REQ

PCI-AD23PCI-AD22PCI-AD21PCI-AD20

PCI-AD2

PCI-AD19PCI-AD18PCI-AD17PCI-AD16PCI-AD15PCI-AD14

PCI-AD5PCI-AD4

PCI-AD31PCI-AD30

PCI-AD3

PCI-AD29PCI-AD28PCI-AD27PCI-AD26PCI-AD25PCI-AD24

PCI-REQ-MINI

PCI-GNT-MINI

PCI-REQ-ETH

PCI-GNT-ETH

PCI-AD24PCI-AD9PCI-AD8PCI-AD7PCI-AD6

18310_508_090302.eps090302

Page 94: Q549---32pfl9604ser

EN 94Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: PNX8543 - SDRAM

1

VSS

VDDQ

14

VS

SD

L

VREF

VD

DL

CK

1211

LDMUDM

15

13

78910

3456

VSSQ

BA

A

LDQS

UDQS

NC

DQ

CKEWE

ODT

RAS

2

CS

CAS

0012

VDD

12111098765430

12

1

VSS

VDDQ

14

VS

SD

L

VREF

VD

DL

CK

1211

LDMUDM

15

13

78910

3456

VSSQ

BA

A

LDQS

UDQS

NC

DQ

CKEWE

ODT

RAS

2

CS

CAS

0012

VDD

12111098765430

12

C

M_DQ

M

M_A

M_BA

M_CLK

M_DQM

M_DQS0

NP M_DQS1

NP M_DQS2

NP M_DQS3

P

0123456789101112

012

M_CASB

M_CKE

NP

M_CSB

0123

N

RASB

ODT

IREF

3130

89

1011121314151617181920212223242526272829

VREF

WEB

01234567

12

8

3111

12

3HH6 G7

3HH9 H33HHA H4

3HHD G143HHE F13

3HHH G143HHJ G13

3HHN G143HHP G13

3HHT G14

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

16

3HHU G13

C

E

O

17

D

4

PNX 8543 : SDRAM

G

3HHY H9

2HHK E62HHM E6

3HHZ H10

3HJ2 B11

3HGP F73HGR F7

3HJ3 A133HJ4 B13

3HGU G83HGV G7

3HJ5 C83HJY C8

3HGZ G83HH0 G7

3HKM G33HKN G10

3HH3 G83HH4 G7

7H00-2 A77HG0 F5

A

13

7HG1 F11FH06 A12

9

2HGD E7

FH07 A11IHG0 C7

2HGG E82HGH E9

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

P

2HGM E92HGN E10

3HHB F133HHC F13

2HGS E102HGT E10

3HHF G133HHG G13

2HGW E132HGY E13

3HHK G143HHM G13

2HH1 E142HH2 E14

3HHR G143HHS G13

2HH5 C82HHA H7

3HHV H10

B

N

1

5

20

I

5

7

3HHW H10

L

N

3HJ0 C13HJ1 A11 K

10

2HHN E112HHP E12

M

14

3HGS F83HGT G7

C

D3HGW G83HGY G7

G

H

3HH1 G83HH2 G7

B

C

3HH5 G8

1814

8

B

10

1 2

15

D

5 6

3HH7 H33HH8 H4

9 10

2HGP E102HGR E10

13 14

2HGU E122HGV E13

3 4

2HGZ E132HH0 E13

7 8

2HH3 H132HH4 C8

11 12

2HHB A11

3

P

16

F

E

20

HH

11

1 2

owne

r.

J

19

E

7

G

H

I

A

B

2HG2 E32HG3 E3

E

F

2HG6 E42HG7 E4

I

A 2HGA E72HGB E7

D

K

2HG9 E6

2HGC E7

O

6

F

18

2HGE E72HGF E8

I

3

2HGJ E92HGK E9

4 7 11 128

C

1 2

199

5 6

A

L

9 10

3

17

13

2

4

15

J

6

M

14

F

G

2HG0 E32HG1 E3

2HG4 E32HG5 E4

2HG8 E4

33R3HHK

5K6

3HJ5

33R

3HHA

33R3HH5

3HH333R

FH06

3HJ0

220R

2HG

3

100n

33R3HH9

33R3HHC

100n

2HG

F

100n

2HG

P

330u2H

HK

RE

S

6.3V

33R3HGS

3HHT33R

100n

2HG

D

DDR2-VREF-CTRL

2HG

U

100n

100n

2HG

S

33R3HHH

3HHP33R

33R3HGW

2HG

C

100n

2HH

1

100n

33R

3HHU

2HG

H

100n

3HGR33R

100n

2HG

8

33R3HHE

2HG

E

100n

33R3HH8

3HHB

33R

33R3HHG

100n

2HG

K

100n

2HH4

D8

E7 F2 F8 H2

K3

N1

P9 J7 A7

H8

B2

B8

D2

E9

G1

G3

G7

J2

A3

E3 J3

R1

J1 A9

G9

C1

C3

C7

C9

K7

B3

B7A8

A1

E1

J9 M9

F7E8

A2E2R3R7R8

K9

H3H1H9F1F9C8C2

F3

G2

D7D3D1D9B1B9

H7

L3L1

L7

J8

K2

K8

L8

G8

N2N8N3N7P2P8P3

L2

M8M3

M2P7R2

M7

7HG0

EDE1116AEBG-8E

ΦSDRAM

2HG

R

100n

100n

2HG

1

3HJ1

1K0

1%

+1V8-PNX85XX

DDR2-VREF-DDR

1u0

2HH

P

3HKN220R

RES

IHG0

2HH

B

330u

6.3V

2HH

0

100n

33R

3HGP

3HGZ33R

33R3HHN

3HH733R

F2 F8 H2

K3

N1

P9 J7 A7

H8

B2

B8

D2

D8

E7

C3

C7

C9

E9

G1

G3

G7

J2

A3

E3 J3

A8

A1

E1

J9 M9

R1

J1 A9

G9

C1

E8

A2E2R3R7R8

K9

K7

B3

B7

B9

H7H3H1H9F1F9C8C2

F3

F7

J8

K2

K8

L8

G8G2

D7D3D1D9B1

N8N3N7P2P8P3

L2L3L1

L7

Φ

EDE1116AEBG-8E

7HG1

M8M3

M2P7R2

M7N2

SDRAM

33R3HH0

2HG

A

100n

33R3HGY 3HHJ

33R

3HJY

820R

3HHW33R

100n

2HG

B

3HHY33R

33R3HHR

+1V8-PNX85XX

3HHF 33R

2HH5100n

100n2HH3

2HH

2

22u

33R

3HHZ

2HG

2

100n

100n

2HG

M

100n

2HG

V

DDR2-VREF-DDR

2HG

0

100n

2HG

5

100n

33R3HHV

100n

2HG

Y

2HG

T

100n

33R 3HHD

2HG

N

100n

3HGT33R

DDR2-VREF-CTRL

3HHS33R

2HG

W

100n

2HG

J

100n

100n

2HG

9

DATECHECK

8204 000 8927PNX8543 TV543 R2 LDIPNX

DDR2 INTERFACE

A2130

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20052007-11-29

716

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

22u

2HG

G

6.3V

RE

S2H

HN

330u

2HG

Z

100n

DDR2-VREF-DDR

1%1K

0

3HJ3

3HJ4

1K0

1%

2HHA100n

+1V8-PNX85XX

33R3HH2

3HHM33R3HH1

33R

+1V8-PNX85XX +1V8-PNX85XX

N34N33

N31N32

AA31

V31

V32

AB32

AE32

AF34AG32AK31

AJ34AJ31R34R31

AG33AG34

AH31AH32

T32P32U31U32M31

AL34

R32M32

AL33AE34AK34

P34T34R33U34

AH33

V34M33T33M34P31

AB33AB34

W31

AH34AK33

AJ32AL32AL31AF31AK32AF32

Y34AD32W33AC32W34Y31

AC34AD33AA32

W32

AE31

7H00-2PNX85439EH/M2/24182

MEMORYAA34AE33

AD34V33Y32

AA33AD31

2HH

M

1u0

FH07

2HG

7

100n

3HH6

33R

33R3HH4

1K0

3HJ2

RES

1%

220R3HKM

100n

2HG

4

100n

2HG

6

3HGU33R3HGV

33R

DDR2-RAS

DDR2-WE

DDR2-D31

DDR2-D2

DDR2-D27DDR2-D29

DDR2-D6DDR2-D5DDR2-D4DDR2-D7DDR2-D8DDR2-D9

DDR2-ODT

DDR2-D17DDR2-D19DDR2-D18

DDR2-D3

DDR2-D22DDR2-D23DDR2-D20DDR2-D21DDR2-D24DDR2-D30DDR2-D26DDR2-D25DDR2-D28

DDR2-D1DDR2-D0

DDR2-BA2

DDR2-CLK_P

DDR2-D0DDR2-D1

DDR2-D10DDR2-D11DDR2-D12DDR2-D13DDR2-D14DDR2-D15DDR2-D16

DDR2-D11DDR2-D10

DDR2-D9DDR2-D8DDR2-D7DDR2-D6DDR2-D5DDR2-D4DDR2-D2DDR2-D3

DDR2-DQS3_P

DDR2-BA2

DDR2-WE

DDR2-RAS

DDR2-ODT

DDR2-CS

DDR2-CKE

DDR2-CAS

DDR2-BA1DDR2-BA0

DDR2-D15DDR2-D14DDR2-D13DDR2-D12

DDR2-A10DDR2-A11DDR2-A12

DDR2-CLK_N

DDR2-D18DDR2-D19

DDR2-DQS3_N

DDR2-BA0

DDR2-A0DDR2-A1DDR2-A2DDR2-A3DDR2-A4DDR2-A5DDR2-A6DDR2-A7DDR2-A8DDR2-A9

DDR2-DQS0_NDDR2-DQS0_P

DDR2-DQS3_NDDR2-DQS3_P

DDR2-DQS2_NDDR2-DQS2_P

DDR2-DQM3

DDR2-DQM0DDR2-DQM1

DDR2-CKE

DDR2-CS

DDR2-CAS

DDR2-BA1

DDR2-DQM1DDR2-DQM2DDR2-DQM3

DDR2-BA2

DDR2-DQM2

DDR2-DQS1_NDDR2-DQS1_P

DDR2-CLK_NDDR2-CLK_P

DDR2-A9DDR2-A8DDR2-A7DDR2-A6DDR2-A5DDR2-A4DDR2-A3DDR2-A2

DDR2-A12DDR2-A11DDR2-A10

DDR2-A1DDR2-A0

DDR2-DQM0 DDR2-CLK_NDDR2-CLK_P

DDR2-DQS2_N

DDR2-ODT

DDR2-RAS

DDR2-WE

DDR2-CLK_PDDR2-CLK_N

DDR2-D21DDR2-D22DDR2-D23DDR2-D24DDR2-D30

DDR2-DQS2_P

DDR2-D28DDR2-D29DDR2-D27DDR2-D31

DDR2-D20

DDR2-CKE

DDR2-CS

DDR2-D16DDR2-D17

DDR2-D26DDR2-D25

DDR2-A6DDR2-A7DDR2-A8DDR2-A9

DDR2-BA0DDR2-BA1

DDR2-CAS

DDR2-A11DDR2-A12

DDR2-A2DDR2-A3DDR2-A4DDR2-A5

DDR2-DQS0_PDDR2-DQS0_N

DDR2-DQS1_PDDR2-DQS1_N

DDR2-A0DDR2-A1

DDR2-A10

18310_509_090302.eps090302

Page 95: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 95Q549.2E LA 10.

2009-May-08

SSB: PNX8543 - Digital Video In

C

N

PN

PN

PN

PN

PN

3

4

2

PDV

0

HDMI_RX0_BDV_VALID

9

HDMI_RX1_B

8

FID

HDMI_RX2_B

7

DDC_SDA_B

HDMI_RXC_B

DDC_SDA_A

DV_VS

DDC_SCL_A

HDMI_RX0_A

HDMI_RX1_A

HDMI_RX2_A

HDMI_RXC_A

HDMI_RREF

DDC_SCL_B

5

0

CLK

HOT_PLUG_A

1

2

N

1

65

DV_YIN

HOT_PLUG_B

HS

3

78

4DV_UVIN

9

6

PN

P

5 61 2 3 4

owne

r.

8

4

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

11

11

E

3HK0 B2

BB

IHSM B2TH01 C2TH02 C2TH03 C2TH04 C2TH05 C2TH06 C2TH07 D2

4 5

PNX 8543 : DIGITAL VIDEO IN

4 9

TH10 B2TH11 B2TH12 B2TH13 B2TH14 C2

B

C

6

12

135

13

C

7

A

3

1

H

7

A A

10

2

C

G

7H00-4 A39HK0 D2

7

G

E

I

5 6

TH08 D2TH09 B2

1 9

F

D

I

D

10

E

H

2

D

E

A

B

C

D

6 7

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

1

TH15 C2TH16 C2

TH02

2 3

J

8

F

12

J

3

TH07

TH14

IHSM

TH13

3HK0

12K

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8927PNX8543 TV543 R2 LDIPNX

VIDEO IN

A3130

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20052007-11-29

816

TH15

TH09TH10

TH16

9HK0

B12

A18

A14

A19

A15

D19E15

TH01B13

B18

B14

A16

A12

A17

A13

B15

B11

B16

A4E5D5C5B5A5E6D6C6

C16

B17

E7D7C7B7A7E8D8C8

A8E9

B4

C18

C15

E19

D15

B8C9D9

B6A6

TH06

HDMI_DVPNX85439EH/M2/241827H00-4

TH04

TH12TH11

TH05

TH08

TH03

HDMIB-RX2-

HDMIB-RXC-HDMIB-RXC+

HDMIB-RX0-

HDMIB-RX2+

RREF-PNX85XX

HDMIA-RX2+

HDMIA-RX1+

HDMIA-RX0+HDMIA-RX0-

HDMIA-RX1-

HDMIA-RX2-

HDMIA-RXC-

HDMIB-RX0+

HDMIB-RX1-HDMIB-RX1+

DDCA-SDA

HOT-PLUG-AHOT-PLUG

DDC-SCLDDC-SDA

DDCA-SCL

HDMIA-RXC+

18310_510_090302.eps090302

Page 96: Q549---32pfl9604ser

EN 96Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: PNX8543 - Audio

C

2 3

4

9 10 11

IHM8 C5

A

8

N

IHMG H7

3HMM-2 I93HMM-3 G93HMM-4 G10

IHNB F9

4 5 6

IHND H9

12 13

A

7HM5 B5

2HM5 H52HM8 H4

IHMW B9

3HM1 D4

1

K

L

7HM6 C5

3HMA G63HMB H6

IHNE H10

F

FHR3 A10IH22 F4IH23 H4

IHM6 B3

M

20

IHNF H6

6

F

G

H

IHM7 C5

11

I

9HM0 B5

1

2HN1 F9

3HMC G5

C

PNX 8543 : AUDIO

17

M

E

I

3HMD I53HME-1 B103HME-2 B9

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

F

9

2

J

F

G

IHNA F10

2

10

B

12 13

C

4 12

3HME-3 E9

7 20

IHMV B9

2HM4 G5

3HMU H6

7HM1-3 F10

IHNJ G5

6HM0 B4

D

10

3HMM-1 I10

3

7HM1-1 B107HM1-2 D10

7HM4 H7

2HM2 H5

3HM0-4 D5

P

3HM0-1 C5

D

9

N

7

B

5 16

E

3HM0-2 B4

1

IHM0 B3

G

IHM1 F7

3HM0-3 C4

8

IHNG F6

18

IHM2 C4IHM4 C4

2HMY H9

15

14

19

A

6

O

IHM5 D5

2HMZ I10

I

L

FHM3 H11

E

8

H

IHN3 D9

E

IHN4 H5

B

3

2HM3 G4

7

IHN6 D10IHN8 F6

P

3HMV H5

5

H

2HMG B3

IHN0 F5

3HMW H53HMY F5

19

7HM1-4 H10

H

3

K

2HMT E10

7HM2-1 F57HM2-2 H5

I

IHNK I5

4 11 15

13A

ll rig

hts

rese

rved

. Rep

rodu

ctio

n in

who

le o

r in

parts

7HM3 F7

2HM1 G5

FHM0 B11

IHNH H6

3HMZ F5

11

16

FHM1 D11FHM2 F11

2HMW G10

J

5 6 7

O

C

D

G

A

B

C

D

17

14

owne

r.

12

3HME-4 E103HMF B33HML G6

18

13

1 2

2HMJ A10

8 9 10

2HMP C10

BC857BW7HM41

3

2

10K

2 7

FHR3

3HMM-2

3n3

2HM

8

2K2

3HM

W

2K2

3HMUIHNH

IHNEIHN4

AUDIO-VDD

3 63HME-3

10K

22K

81

IHM6

27

3HM

0-1

3HM

0-2

22K

IHM4

IHNK

2HMP

33p

10K

5 4

IHN0

10K

3HMM-4

3HM

1

IHM5

3n3

2HN

1

54

22K

3HM

0-4

1

32

IH22

BC807-25W7HM5

2

6

1

IHMW

AUDIO-VDD

7HM2-1BC847BS(COL)

IH23

IHM1

33p

2HMZ

3HM

Y

2K2

IHN6

22K

3HMZ

8 13HME-1

10K

IHMV

AUDIO-VDD

5

3

4

33p

2HMT

5 4

BC847BS(COL)7HM2-2

10K

3HME-4

1u0

2HM2

2HM

3

3n3

2HM

Y

3n3

IHNA

22K

470R

3HMV

3HM

B

3HMM-18 1

FHM0

10K

4

11

IHN8

7HM1-1LM324

3

21

10K

3HME-22 7

2HMJ

100n

FHM3

AUDIO-VDD

IHM8

22K

6 3

AUDIO-VDD

3HM0-3

4R7

3HMF

470R

3HM

A

IHND

IHNJ

+AUDIO-POWER

10

98

4

11

AUDIO-VDD

7HM1-3LM324

3

2

IHM0

7HM3BC857BW

1

2HMW

33p

16 9

2007-11-29 ROYAL PHILIPS ELECTRONICS N.V. 2005

2008-11-21

Maelegheer Ingrid

2008-10-10 3

AUDIO-VDD

130 A2

AUDIO

PNX8543 TV543 R2 LDIPNX 8204 000 8927

CHECK DATE

NAME

2

SUPERS.

CLASS_NO

EMANTESNHC

FHM2

100n

2HM

4

IHNG

22K

3HM

C

2HM

G

1u0

IHMG

3HM

D

22K

IHM2

FHM1

IHNF

9HM0

3 6

10K

3HMM-3

7HM6BC847BW

2HM

5

100n

5

67

4

11

7HM1-2LM324

IHM7

1u0

2HM1

6HM

0

BZX

384-

C6V

8

12

1314

4

11

7HM1-4LM324

IHN3

2K2

3HML

IHNB

ADAC(2)

ADAC(1)

-AUDIO-R

+AUDIO-L

ADAC(7)

ADAC(8)

ADAC(5)

ADAC(6)

AUDIO-OUT-L

AUDIO-OUT-R

AUDIO-CL-L

AUDIO-CL-R

18310_511_090302.eps090302

Page 97: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 97Q549.2E LA 10.

2009-May-08

SSB: PNX8543 - Analogue AV

DAC

AI11

SYNC_IN_2

CVBS1Y

PC3_AI3PC3_AI2PC3_AI1

N

PC2_AI3

AI54AI53AI52

AI2P_IFAI2N_IF

HSYNCIN

VSYN

AGC

AI33REF 3

REF 5

AI43AI42AI41

SYNC_IN_1

AI4N

AI44

AI31

AI23

PN

AI22AI21

PC1_AI1

PC2_AI2PC2_AI1

CVBS2CP

BIAS

AI51

REF 4

AI32

REF 2

REF 1

GND_A3_TG

PC1_AIDPC1_AI3PC1_AI2

OUTIN

AI5N

CURREF

PC3_AID

PC2_AID

AI1P_IFAI1N_IF

AI13AI12

C

3HSH A9

9H55 E5

5HR9 G10

IHR4 D10

IH43 D4

7H00-1 D2

IHSA E3IHSB E1IHSC F3

3H89 C43H90 C53H91 D43H93 D5

O

3H99 C43HRP B83HRR B93HRS A12

IHSG E1

16

16

5H82 B5

18

IHV3 G3

H

IHRC C10

IHR0 B8IHR1 A10

183

3HRY D103HRZ D123HS0 E103HS1 D9

IHSE E1

3HS6 E13HS7 E13HS8 F83HS9 F12

8

3HSF B2

2HTR A92HTU C102HTV C112HTZ G8

3HSJ A83HSK E1

IHSR A12

C

2HUC H92HUK E12HUN G42HUP G4

IHSD F3

5

A

19

I

14

3HST F123HSU G83HSV F103HSW E1

IHSH G3

5H81 A5

3H79 A43H80 A53H81 A43H82 A5

5H85 B45H86 C4

C

5HR5 D9

2HSP F102HSR H102HSS I102HST G3

5HRA G115HRC A95HRG C11

B

2HT1 E52HT5 F32HT6 F3

F

19

P

13

9H54 E4

L

owne

r.

2 14

FHR1 B8FHR5 B2

IHSS B12IHST B12

2HTD G102HTE G102HTF G112HTG G11

IHV6 G3IHVE D1

IH41 B4IH42 C4

2H97 D42H98 D42H99 D32HA3 E3

IH44 A5

IH85 B5IH87 D5IHPF A8

2HS0 G42HS1 B82HS2 B8

10

6

N

B

IHR3 C11

17

2HS3 B92HS4 A102HS7 B8

IHR5 D8IHR6 F9IHR8 G11IHRB F4

2HSC C102HSD D102HSE D112HSF D10

IHRD E8IHRE F8IHRF F10IHS2 A2

12 13

1 2

IHS3 E1IHS4 E3IHS5 F4IHS6 H11

7 8 9

K

11

K

O

5HRL F9

12

2H82 A52H83 A52H84 B6

9H50 D49H51 D59H52 E49H53 E5

2H89 B42H90 B52H91 C42H92 C5

FHR6 B2IH38 A4IH39 A4IH40 B4

D

2HA4 E32HA5 F52HKL E1

IH45 C5IH46 G10IH80 A5IH81 B5

I

2H80 A62H81 A5

9

3HSM C12

158

L

EE

15A

ll rig

hts

rese

rved

. Rep

rodu

ctio

n in

who

le o

r in

parts

PNX 8543 : ANALOGUE AV

3HSN C103HSQ E83HSR G10

7 8 9 10

3HT3 H113HT4 H113HT9 E15H80 A5

2HSW D12HSY G3

A

20

5H87 D45HR0 B95HR2 B95HR3 C11

20

10 11 12

3HRT A10

4

G

2

A

B

C

D

12

3HRU B93HRV B83HRW C12

2H95 C42H96 D5

A

B

3HS2 D83HS3 H93HS4 I93HS5 E1

2HU8 F32HUB H11

5

5

3HSA G93HSB G103HSD G103HSE G11

F

7

H

17

3H29 C4

G

7

9

2 3 4 5

N

3H34 F93H40 G103H47 G11

2HSM D92HSN G8

G

2HSU I9

3H83 B43H84 B53H85 B43H88 C5

H3H95 A43H96 A43H97 B43H98 B4

3

11

J

D

13

F

2H85 B5

M

3

4

1

2H87 A52H88 A4

6

2H93 C5

2HT7 E52HT8 F82HTB G92HTC G10

I

2HTH D32HTK G32HTL B22HTP A8

E

2HU0 G92HU5 E3

2H86 D3

2HSV G4

1

C

13

11

D

J

6

10

1

H

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

I

2HS8 B82HS9 B92HSA C102HSB E8

4

2HSJ D82HSK D8

P

2H94 C4

M

6

2HRZ A8

E

F

G

27R

3HS9

22n2HSY

2HSF

22n

56R

3H88

IH85

2HRZ

22n

IHV3

3HRZ

27R

56R

3HS

2

18R

3H89

IH41

3HSB

18R

3HS

J

56R

330n

5H85

3HS

0

47R

100p

2HS

D

100n

120n

5HRL

2HSR

2H92

100p

2H90

22n

27R

3HRS

56R

3H82

IHSH

100p

2H87

IH45IH42

100p

2H88

100p

2HTF

56R

2H86

10n

3HS

U

2H96

22n

100p

2HTD

IHRE

2H95

100p

10n

2H99

IH44

100p

2HS

E

100p

2H83

2H82

22n 2HTR

100p

22n

2HSJ

IHSG

5HRA

120n2HST22n

100p

2HUC

IH46

27R

3HS1

100p

2HTV

2HTP

100p

2HT622n

IHVE

2HS

2

100p

2H94

100p

330n

5H86

27R

3HRU

18R

IHR0

3H47

75R3HS6

2HS

U

12p

3H85

18R

27R

3HSM

IH38

3HT4

27R

18R

3H83

IHR3

2HT122n

22n

2H84

22n

2HS4

22n2HSA

IHRB

2H85

100p

2HTL

270p

3HS54K7

IHR1

IHSA

2HUP22nIHV6

IH87

3HS

A

56R

100n

2HSS

22n

2HA4

2HTB

22n

4K73HT9

2H80

22n

330n

5HR0

3HSW75R

IH40

3HS

F

75R

22n2HSW

IHSE

IH43

FHR1

2HS1

22n

5HR3

330n

22n2HSN

27R

3HST

5H80

330n

3HSH

27R

18R

3H81

56R

3H80

22n

2HTE

56R

3HR

Y

22n

2HA5

2HSB22n

3HS4

820R

IHST

IHSS

IHSR

IH81

3H90

56R

5H81

330n

3HR

V

56R

2HSC

22n

47R

3HT3

IHSD

IHS3

RES 22n

2H89

2HSV

IH39

100p

3HR

P

56R

100p

2HS

9

IH80

18R

3H91

75R3HS7

3H96

18R

18R

3H95

3HR

T

47R

2HU

0

100p

3H40

18R

47R

3HS

8

CLASS_NO

EMANTESNHC

16 11

2007-11-29 ROYAL PHILIPS ELECTRONICS N.V. 2005

2008-11-21

Maelegheer Ingrid

2008-10-10 3

130 A2

ANALOG AV

PNX8543 TV543 R2 LDIPNX 8204 000 8927

CHECK DATE

NAME

2

SUPERS.

N4

L4

J4

H4

G2

R1R3

T2U1

P3P4P5

M1M3M4M5

K1K3K4K5

G1

F1

A1

B3A3

B2A2

C3

J5

T1 P1

J2J3

G4H1H2H3

G3

F2F3F4

N1N2N3

D2D1

L1L2L3

E2E1

J1

ANALOG_VIDEOPNX85439EH/M2/241827H00-1

C2

3HRW

27R

FHR6

18R

3HSE

22n2HT7

270p2HUK

2HKL270p

IHS6

18R

3H79

2HS

3

100p

22n2HU8

100p

2HS

K

100p

IHR5

2HTG

5H82

330n

56R

3HS

D

56R

3HS

N

3H93

56R

22n2HTK

2HS

8

100p

330n

5HR2

5HR5

330n

IHRC

3HS

Q

47R

5HRG

330n

820R

3HS3

2H97

100p

IHRD

FHR5 56R

3H84

18R

IHS2

3H99

3H29

18R

9H51

22n

9H50

2HS7

2HU522n

IHPF

100p

2H81

3HRR

27R

22n2HT5

IHR8

330n

5H87

IHSC

2HTC

100p

IHS5

2HS022n

2H98

100p

3HSR

18R

IHR6

22n2HUN

2HTZ

100p

2HTH

IHS4

22n

47R

18R 3HS

V

3HSK

3H34

10K

22n

2HT8

IHSB

2H91

100p

2HUB

22n

18R

3H97

3H98

2HTU

18R

100p

IHRF

120n

5HR9

IHR4

100p

2HS

M

2HSP22n

330n

5HRC

22n

2HA3

22n

2H93

9H559H54

35H925H9

V-SYNC-VGAH-SYNC-VGA

Y_CVBS-MON-OUT

AV4-PB

AV4-Y

AV5-PR

AV5-PB

AV5-YAV5-Y

B-VGA

G-VGA

R-VGA

AV4-PR

AV1-Y

AV1-PB

FRONT-C

AV4-Y

AV3-PR

AV1-Y_CVBS

AV1-PR

IF-P

IF-N

CVBS4

AV3-Y

AV3-PB

AV2-Y_CVBS

FRONT-Y_CVBS

18310_512_090302.eps090302

Page 98: Q549---32pfl9604ser

EN 98Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: PNX8543 - Audio

OUT IN

INHBP

COM

SPDIF_IN

ADAC7BUFADAC8BUF

PNADAC5

PNADAC4

PN

P

AOUT

ADAC6 N

RESREF

VCOM_ADC

P

OSCLK

VSSA_ADAC

7

PN

R AIN_5

SPDIF_OUT

ADAC1

AGND1

NEG

RL

I2S_OUT_WS

VRNEG

VREF

I2S_OUT

I2S_OUT_SD

ADAC

VREF_AADC

AADCAADC

POS

8

I2S_IN_WS

SD4SD3SD2SD1

4

OSCLKSCK I2S_IN

I2S_IN

321

LR

12

AIN_1

LR AIN_2

LR AIN_3

LR AIN_4

L

ADAC3

VDDA_3V3_DAC

SCK

NADAC2

C

M

I

18

10

3HRM G5

4121

B

2HR7 D4

I3HRJ-4 F2

IHSV D6

IHS1 D3

175

I

IHPD F9

L

O

14

3HRC-3 E3

IHRY D3

18

P

IHS0 D3

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

15

F

D

IHRZ E3

J

A

1 5

IHSW C9

H

FHPE C10

O

1

3HRJ-3 F3

8

P

3HRJ-2 E3

19

IHSU C6

9H12 C49H11 C4

G

IHSZ D6

3HR3-1 D3

E

11

A

2

15

IHRJ D4

17

M

IH13 C11

7

7HP0 C10

IHRH C4

10

IHRM G6

12

IHRU F3IHRV E3IHRW E3

3HRJ-1 F23HRC-4 E2

3HAG D11

N

2HPA C11

A

F

G

H

19

2HP8 D9

3

3HT8-3 D10

L

3HRK H6

3HAH D11

3HRN G5

2HRB D4 C

3HT8-4 E95HP2 C105HRW D65HRZ D67H00-7 D7

3HR0-3 C33HR0-4 D3

1

owne

r.

16

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

2101

2HRC E42HRD E42HRE E42HRF E4

IHRT F3

2HRH F4

2HRK F4

3HR3-2 D4

IHRL G6IHRK G5

3HR8-1 E33HR8-2 E33HR8-3 D33HR8-4 D33HRC-1 E33HRC-2 E3

3H62 F63H63 F6

12

B

C

D

E

2HRT E11

2HP6 D9

I

9

B

C

D

E

F

1072

3HP0 F9

3HT8-1 F93HT8-2 F9

3HP5-2 E9

1

3HP5-4 F9

2HRV C6

3HR0-1 C33HR0-2 C4

2HR9 E42HRA D4

8764 11

9

5

K

2HRS E11

2HRM D6

43 6 7

F

16

2HRJ F3

11

IH11 C10

3HR3-3 D33HR3-4 D3

G

PNX 8543 : AUDIO

2HRW G62HRY G6

G

K

A

4

2HR2 C4

139

13

B

H

2HR8 E4

3

N

2HP7 D9

8

J

2

3HP1 F10

6

6

IHSY D11

2HRN D6

11

2HR5 D4

3HPN G9

H

2

2HR4 D4

2HP5 D953

C

3HP5-1 E10

2HP4 D10

2HPB D10

3HP5-3 F10

20

2HR0 C4

E

2HRP C6

2HR6 D4

20

8

D

2HRG E3

2HRU C6

9

2HR1 D5

2HR3 C5

4

IHSU

VDDA-DAC

RES

IHRU

2HR633p

3HR0-1

33K

81

3n3

2HR

T

10u

2HR

P

33R3HP1

RES

IHRT

5HP2

30R

2HRF

1u0

1u0

2HRB

3HRJ-33 633K

100n

2HR

U

22K

3HAG

1u0

2HRK

VDDA-AUDIO

2HP

8

100n

33R3HT8-3

2 7

33R3HT8-2

54

33K

3HR8-2

5

33K

3HR0-4

33K

3HR8-44

2HR7

1u0

10n

2HP

B

VDDA-AUDIO

47K

3H63

33p

2HRC

RES

IHPD

IHS1

AN8

AJ10

IHSW

B1

U5C19

V1

AM7

AK9AK7AL7

AM8AM9

AP8

AM15AL15

AM14AA2

Y2

Y3AA1AA3AA4

Y1

AM6AN6

AP6AM5

AN5AP5

C1

AN15AL14

AK14AP15

AN10AM10

AL9

AP9

AL8

AN9

D3

AN7AP7

AK6AL6

AM12AN12AP12

AM11AL11AK11

AN11AP11AL10

AP10

AUDIO

PNX85439EH/M2/241827H00-7

AN14AP14AL13

AP13AN13AM13

4K7

3HR

N

2

1

3

5

LD2985BM33R7HP0

4

3633K

3HR3-3

3HP5-233R

2 73HR3-2

33K1u0

2HR5

273HRJ-2

33K

IHRH

2HP

5

100n

5HRZ 30R

3HP5-433R

18

3HPN

68R

33K

3HRC-1

4 5

6

3HRC-4

33K

3HR8-333K

3

33p2HRA

RES

IHS

Y

1u0

2HRD

IH11

IH13

2HR0

33pRES

VDDA-AUDIOIHSZ

33R3HP5-1

IHRM

3633K

3HRC-3

2HR9

1u0

RES

IHRK

IHS0

33p2HR2

3HR8-1

33K

1 8

+5V

5

IHRL

3HRJ-4

33K

4

VDDA-AUDIO

9H11

3HR

M

4K7

7 2FHPE

130

33K

3HR0-2

ROYAL PHILIPS ELECTRONICS N.V. 20062007-11-29

1216

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8927PNX8543 TV543 R2 LDIPNX

AUDIO

3

A3

2008-10-10

Maelegheer Ingrid

2008-11-21

3HR

K

75R

33R3HP5-3

100n

2HR

M

1u0

2HR3

2HRJRES

33K

3HRJ-118

33p

2HRH

1u0

IHRY

2HR

V

100n

3HA

H

22K

9H12

IHSV

100n

2HR

W

IHRZ

2HR1

1u0

3HT8-1 33R

IHRW

2HP

A

10u

47K

3H62

IHRV

10u

2HR

Y

2HR8

33pRES

IHRJ 2HP

7

100n

2HR

N

100n

3HT8-433R

2HR

S

3n3

2 73HRC-2

33K

3HR0-3

33K

6 3

3HR3-4

33K

4 5

2HRG

33pRES

33K

3HR3-11 8

2HP

4

10u

100n

2HP

6

30R5HRWRES 33p

2HR4

2HRE33pRES

3HP033R

+3V3

RES

ADAC(8)ADAC(7)

SPDIF-IN1

ADAC(2)

ADAC(1)

ADAC(7)ADAC(8)

ADAC(8)ADAC(7)

ADAC(6)

ADAC(5)

ADAC(4)

ADAC(3)

AUDIO-IN1-L

AUDIO-IN2-L

AUDIO-IN3-R

AUDIO-IN3-L

AUDIO-IN4-R

AUDIO-IN4-L

AUDIO-IN5-L

AUDIO-IN5-R

SPDIF-OUT

AUDIO-IN1-R

AUDIO-IN2-R

18310_513_090302.eps090302

Page 99: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 99Q549.2E LA 10.

2009-May-08

SSB: PNX8543 - Audio

C

VIAGND_HS

VOIN-

VDD

1

SHUTDOWN

BYPASS

2

GND

2

1

2101

F

D

1 4

4

J J

2

A

B

C

D

E

3

2 11

owne

r.

C

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

8

3H71 A13H74 B13H75 A33H76 B2

3H18-1 B5

IHW8 E7IHWE C2IHWJ C5IHWL C2

I

H

6

B

97

IH24 C2IH25 C2IH27 D4IH29 D8IH31 C8

13

3H18-2 C23H18-3 C23H18-4 B53H35 C7

B

7A

ll rig

hts

rese

rved

. Rep

rodu

ctio

n in

who

le o

r in

parts

G

1

8 9

6

C

11

A

E

F

10

G

I

E

PNX 8543 : AUDIO

IH47 C1IH48 C1IH51 A2IH52 A2IH53 B1IH54 C2IH55 B2IHV1 C5IHVA D8IHW7 D7

5

D

H

133 12

A

A

B

C

D

E

1HV9 B32H02 D42H04 A22H05 B2

3H94 C23HV3 D23HV4-1 D73HV4-2 C83HV4-3 E63HV4-4 E67H01-1 A27H01-2 B27HV0 C47HVA-1 E77HVA-2 D8FH50 B3FHV3 E6FHV4 A3FHV5 C3

5

2H25 D12H26 D12HVA A52HVB B52HVC C52HVD C12HVE C22HVG E62HYC B32HYD C3

1 2 3 4 5 6

IH52

7 8

1 2 3 4 5 6 7 8

3H77 B2

100p

2HY

C

2HY

D

100n

3HV4-1 18

IH29

22K

5K6

3H74

100R

3H76

100n

2HVD

100R

3H75

7H01-2BC847BS(COL)5

3

4

AUDIO-VDD

IH27

IHWE

22K

3H18-44 5

1n0

2HV

G

3HV

4-3

22K

63

2H25

3n3

IHW7

3H94

470R

IHWL

33p

2HVB

IH51

3H71

5K6

2H05

1u0

2H04

1u0

IH25

22K

3HV4-44 5

10K

3HV3

2HVA

33p

FHV5

FHV4

2H02

1u0

100n

2HV

C

CHECK

8204 000 8927PNX8543 TV543 R2 LDIPNX

AUDIO

A3130

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20052007-11-29

1316

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATE

6

1

AUDIO-VDD

+3V3

7H01-1BC847BS(COL)2

IH24

+AUDIO-POWER

FHV3

IH31

470R

3H77

IHV1

27

IHVA

3HV

4-2

22K

7 2

IHW8

1

22K

3H18-2

7HVA-1BC847BPN(COL)

2

6

IHWJ

22K

3H18-11 83n

3

2H26

6 322K

3H18-3IH47

IH48

1HV9

1735446-3

123

3H35

5

3

4

10K

BC847BPN(COL)7HVA-2

100n

2HVE

1011

1

7

3

4 9

2

6

5

8

ΦAMPLIFIER

7HV0TPA6111A2DGN

IH53FH50

IH54

ADAC(3)

IH55

AUDIO-HDPH-R-AP

AUDIO-HDPH-L-AP

A-STBY

ADAC(4)

A-PLOP

RESET-AUDIO

RESET-AUDIO

18310_514_090302.eps090302

Page 100: Q549---32pfl9604ser

EN 100Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: PNX8543 - Video Streams

CA_RST

1

DIR

CA_MOCLK

CA_RDY

4

01

0

10

2

10

TNR_MIVAL

TNR_MISTRT

CA_MDO3

765432

7654

TNR_MICLK

TNR_ERROR

CA_MDI

CA_MISTRT

ENTNR_TSDI

CA_VCCEN

CA_VPPEN

CA_MIVAL

CA_MOSTRT

CA_MOVAL

CA_OOB_EN

3210

CA_ADD_EN

567

CA_VSN

CA_MICLK

CA_DATA

CA_CDN

G3

12

3EN23EN1

C

G3

12

3EN23EN1

B

C

D

E

F

G

2H08 D32H09 F33H73 F23HB1 C23HB2 C2

owne

r.

O

D

5

13

P

F

16

1 2 3 4 5 6 7 8 9

7

C

J

42

A

J

1

1

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

17

10 11

1 2 3 4 5 6 7

19

K

8 8151

G

PNX 8543 : VIDEO STREAMS

H

8

2

11

A

B

C

D

E

F

G

A

12

I

10

B B

G

9

P

N

3HB3 C23HB4 D2

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

20

M

3HWN-1 B113HWN-2 B113HWP C103HWR-1 B113HWR-2 B11

N

10

K

18

O

15

6

5

L

7 14

16

M8 9 10

3HWV-3 C103HWV-4 B107H00-12 B97H04 D37H05 F3

11

H

3

C

D

17

14

E

L

123 4

6

9H06-2 B29H06-3 B29H06-4 B29H07-1 B2

3HB5 D23HB6 F23HB7 F43HWK D5

9H08-1 C29H08-2 C29H08-3 C29H08-4 B29HW0 D69HW1 D109HW2 C8IH50 F2

19 20

IHW0 D6

11

A

9

13

E

I

F

9H06-1 B2

3HWR-3 C103HWR-4 B103HWV-1 B103HWV-2 C10

3HWR-347R

3 6 9H07-2 B29H07-3 B29H07-4 B2

+3V3

3HB5

10K

9H06-11 8 83HWV-147R

1

E10A9A11C11D11E11A10

J34

C34

C33

A33

J32A34

C12

B10

B9

C10

D10

B32J30K34K33H30J33

J31

E32

E34

D34

C31

G33G31G30H34F34F32F31G34

E33C32

B31

K32A32

D31A31

H32H31

TUN_CAPNX85439EH/M2/241827H00-12

17161514131211

1

10

19

20

2

3456789

18

2 7

74LVC245A7H04

647R

3HWV-2

3HWV-347R

3

100n

2H09

9HW2

IH50

2H08

100n

5

+3V3-PER

47R3HWR-4 4

9H06-33 6

130Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20082008-06-05

1416

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8927PNX8543 TV543 R2 LDIPNX

CONDITIONAL ACCESS

A2

32008-10-10

100R

3HB1

1 8

7

47R 3HWN-1

3HWR-247R

2

4 547R

3HWV-4

+3V3

3HB6

10K

2 7

9H08-44 5

9H06-2

1 847R

3HWR-1

3HB3

100R

3HB2100R

9H08-11 8

9HW1

10K

3HB

4

4 5

IHW0

+3V3

9H06-4

3 69H08-3

9H07-11 8

3 69H07-44 59H07-3 47R

2 7 3HWN-2

9HW

0

+3V3

3HWK

4K7

11

1

10

19

20

789

18

171615141312

2

3456

9H07-22 7

7H0574LVC245A

2 79H08-2

3HB7

10K

10K

3H73

3HWP33R

CA-DATAEN

IRQ-CA

CA-RST

CA-VS1

TSINO-DATA7TSINO-DATA6TSINO-DATA5TSINO-DATA4TSINO-DATA3TSINO-DATA2TSINO-DATA1TSINO-DATA0

TSO-SYNCTSO-BIT-VALID

TSO-BIT-CLK

RESET-BOLT-ON

I2C-SDAI2C-SCL

CA-ADDEN

CA-CD1CA-CD2

CA-DATADIR

FE-ERR

FE-CLKFE-VALIDFE-SOPFE-DATA0FE-DATA1FE-DATA2FE-DATA3FE-DATA4FE-DATA5FE-DATA6FE-DATA7

TSO-BIT-ERR

SCL-BOLT-ONSDA-BOLT-ON

BOLT-ON-IO

CA-MDI6

FE-DATA7

FE-DATA6FE-DATA5FE-DATA4FE-DATA3FE-DATA2FE-DATA1FE-DATA0

TSINO-DATA7

TSINO-DATA6TSINO-DATA5TSINO-DATA4TSINO-DATA3TSINO-DATA2TSINO-DATA1TSINO-DATA0

FE-SOPFE-VALIDFE-CLKFE-ERR

TSO-SYNCTSO-BIT-VALID

TSO-BIT-CLKTSO-BIT-ERR

BOLT-ON-TS-ENn

CA-MOCLK_VS2

CA-MDI5

CA-MIVAL

CA-MDI3

CA-MDI0

CA-MDI2CA-MDI1

CA-MISTRT

CA-MDO2CA-MDO3CA-MDO4CA-MDO5

CA-MDO7CA-MDO6

CA-MDI7

CA-MOCLK_VS2

CA-MOSTRT

CA-MOVAL

FE-CLK

FE-SOP

FE-VALID

FE-ERR

CA-MDO0CA-MDO1

FE-DATA7FE-DATA6FE-DATA5FE-DATA4FE-DATA3FE-DATA2

FE-DATA1FE-DATA0

CA-MDI4

CA-MICLK

FE-ERR

18310_515_090302.eps090302

Page 101: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 101Q549.2E LA 10.

2009-May-08

SSB: PNX8543 - Digital Video Out/LVDS

C

NC

NC NC

NC

N

IREF_LVDS

NP

B

CLK

NPC

NPD

NPE

LOUT2_A

NPLOUT2_B

LOUT2_CLK NP

LOUT2_C NP

LOUT2_D NP

LOUT2_E NP

PN

PA

NP

6

9

3

4 5

E

9

1

B

I

G

10

7H00-5 A64

B

7

3HP9 A7

5

D

H

C

6 7

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

1

2

H

E

I

J

9

PNX8543 : DIGITAL VIDEO OUT / LVDS

8

54

8

B

E

12

3

A

D

F

122

A

13

E

B

6

9

8

owne

r.

10

2 3

2

6 7

1

DD

C

11

A

F

F

J

1 13

A

IHPG A7

7H00-11 B2

C

3

5

F

C

8

4 11

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

7

G

CHECK

8204 000 8927PNX8543 TV543 R2 LDIPNX

LVDS

A3130

VDDA-LVDS

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20052007-11-29

1516

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATE

AM23

AN23AP23

AN24AP24

AL24AM24

AN19AP19

AN20AP20

AL20AM20

AN22AP22

AK22AL22

AL23

AK19

AN18AP18

AK18AL18

AL19AM19

M30

K31

W5F11F12

LVDSPNX85439EH/M2/241827H00-5

AD

29A

E29

AF2

9A

G29

AM

30

R5

AN

30A

P30

AN

31A

P31

AP

32

P29R29T29U29V29

W4W

29Y

29A

A29

AB

29A

C29

AM28AK29AL29AM29

T4

AN29K29L29M29N29

AK

26A

L26

AM

26A

N26

AP

26

R4

Y4

AM

27A

N27

AK28AL28

AJ11AL12AK15

AL1

7A

N21

C4

AP

21A

L25

AM

25A

N25

AP

25

7H00-11PNX85439EH/M2/24182

NC

R2

F13F14F15C14

IHPG

1%12K

3HP9

TX852C-TX852C+

TX852D-TX852D+

TX852E-TX852E+

TX851C+

TX851D-TX851D+

TX851E-TX851E+

TX852A-TX852A+

TX852B-TX852B+

TX852CLK-TX852CLK+

TX851A-TX851A+

TX851B-TX851B+

TX851CLK-TX851CLK+

TX851C-

18310_516_090302.eps090302

Page 102: Q549---32pfl9604ser

EN 102Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: PNX8543 - Power

C

COM

OUTIN

VSSVSS

VSS

VSS

VSS

VDD_1V2_HDMI_1

VPP_ID_8543

VDDA_1V2_HDMI_EQVDD_3V3_HDMI_TERM_2VDDA_HDMI_3V3_BIAS

VDDA_3V3_VID_4

VDDA_3V3_MCAB

VDD_3V3_LVDS

VDD_3V3_PER

VDD_3V3_SBPER VDDA_3V3_USB

1

VDDA_1V2_USB_PLL

GNDA_USB

0

VDDA_1V2_ADC4A

VDDA_1V2_CAB

VDD_1V8_DDR

VDD_1V2_SBCORE

VDDA_1V2_DLL

VDDA_3V3_DDRPLL0

VDD_1V2_DDRPLL0

74

VSS_DDRPLL

VDDA_3V3_VIDOUT

JTAG_VSST1

VSSA_DLL

VDDA_3V3_VID_1_2VDDA_3V3_VID_1_1

VDDA_3V3_HDMI_PLL_2

VDDA_3V3_DCSCCOVDDA_1V2_DCS_A

VDD_1V2_HDMI_2

VPP_ID_8542

VDDA_1V2_AADC

VDD_1V2_CORE

VDDA_1V2_LVDS_PLL

VDDA_3V3_ADAC

VSSA_DDRPLL0

VDDA_3V3_AADC

VDDA_3V3_LVDS

VDDA_3V3_ACT

VSS_CL

VDDA_3V3_HDMI_PLL_1VDD_3V3_HDMI_TERM_1VDDA_1V2_HDMI_EQ

VDDA_1V2_VID

F

G

3 4

2H13 E42H14 D2

7 8

2H17 A32H18 A3

11 12

19

B

G

I

5121

13 14

A

B

C

D

E

F

G

H

I

A

B

C

D

E

2H35 A102H36 A11

H

I

2H39 C102H40 C11

2H15 A32H16 A3

2H43 D22H44 D2

A

169

6

A

P

1 2 3 4 5 6 7 8 9 10 11 12 13 14

1 2

2HU4 F92HU6 F9

5 6

2HUA A22HV0 B4

9 10

2HV3 C42HV4 C3

11

3

C

L

15

C

H

18

2H19 A42H20 A42H21 A42H22 A42H23 A52H24 F112H27 D102H28 D112H29 D112H30 A92H31 A92H32 A102H33 A102H34 A10

2HVY G32HVZ G3

2H37 A112H38 A11

4 5

2H41 C112H42 C2

1

J

O

H

20

10A

ll rig

hts

rese

rved

. Rep

rodu

ctio

n in

who

le o

r in

parts

E

M

7

P

owne

r.

F

1 1412

2H50 C42H51 C42H52 C32HH6 E112HH9 E112HU1 B32HU2 A122HU3 C12

2HZC-4 F102HZD F11

2HU7 F32HU9 B2

2

I

2HV1 C32HV2 F2

13 17

018

N

2HV5 D42HV6 D42HV7 E22HV8 D22HV9 F22HVF E32HVH E52HVJ F42HVK D102HVL C122HVM C102HVN B112HVP B132HVR B102HVS B32HVT B42HVU A112HVV A102HVW A9

5HV3 F45HV4 C3

B

16

E

3

F

17

K

G

6

K

2 1497

2HY2 E22HY3 E32HY4 B112HY5 B122HY6 C102HY7 C112HY8 D112HY9 D122HYA A132HYB A132HYE F42HYF F52HZB F102HZC-1 F112HZC-2 F112HZC-3 F10

5HYB E47H00-10 F6

PNX 8543 : POWER

18

J

7H00-9 A6

11

D

9H19 E59H20 E5

M

54

2HZE F102HZF F92HZG F92HZH H42HZK A52HZL A42HZM A32HZV I42HZY-1 B32HZY-2 B22HZY-3 B22HZY-4 B23H55 D23H57 C25H50 C35HG0 E125HV0 B45HV1 C35HV2 C1

IHY5 A11IHY6 C10

20

L

IHY9 B5IHYA E2

O

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

IHYH D2IHYM F5

13

198

5HV5 D35HV6 D15HV7 E15HV8 F25HV9 E35HVA E3

5HVB D115HVC C135HVD C135HVE B125HVF B135HVG B105HVH A125HY2 A125HY3 C115HY4 H35HY5 D125HY6 A135HY7 I3

IHY7 E4IHY8 D4

D

N

IHYC D4IHYF C3

7H06 C29H18 E5

IHYN F2IHYP F3

9H21 E5CH53 F3FHK1 D4IH05 E5IH10 E5IH28 B10IH49 C4IH60 C2IH61 D2IHK1 B12IHK2 D11IHK3 C12IHK4 C12IHSK E11IHSL B11IHSN D11IHSP A13IHY0 E5IHY1 H3IHY2 I4IHY3 F11IHY4 A12

IHYA

+1V2-PNX85XX

5HV4

30R

2H52

1u0

+3V3

100n

2H50

+1V2-PNX85XX

+1V2-PNX85XX

2H28

100n

2HV

N

100n

+3V3

IH28

IH49

100n

2HZV

+1V2-PNX85XX

+1V2-PNX85XX

30R

5HV1

2HV

T

100n

+1V2-PNX85XX

2HV

S

100n

IH61

10u

2HV

3

VDDA-AUDIO

FHK1

2HV

7

100n

VDDA-LVDS

+1V2-STANDBY

+1V8-PNX85XX

100n

2HV

5

100n

2H30

10u

35V

100n

2H19

2H44

IHY8

IHY3

IH60

IHY9

1u0

IHY0

2HU

3

100n

2HV

8

5HVE

30R

+3V3-PER

5HVB

30R

100n

2HZE

9H19RES

30R

5HV6

2H15

100n

+1V2-PNX85XX

2H32

100n

2HY

7

1u0

100n

2HV

W

2HZB

100n

2HZH

100n

10u

2H51

100n

2H36

IH10

IH05

3H57

68R

IHYN

100n

2HV

K

100n

2H35

30R

5HY2

30R

+1V2-PNX85XX

5HVF

5

5H50

30R

2HZY

-4

100n

4

100n

2H23

2H13

1u0

2HU

1

1u0

RREF-PNX85XX

2HV

M

100n

36

VDDA-ADC

100n

2HZC

-3

IHYP

30R

5HVH

100n

2HV

V

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8927PNX8543 TV543 R2 LDIPNX

POWER

A2130

100n

2H16

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20052007-11-29

1616

SETNAMECHN

2HV

H

100n

2H34

100n

30R

5HVD

5HV8

30R

9H18RES

5HYB

30R

IHYM

1u0

2HU

2

IHY5

2H14

100n

5HG0

30R

IHYC

2HV

6

22u

6.3V

RREF-PNX85XX

6.3V

330u2H

VY

45

+3V3

IHK1

2HZC

-4

100n

30R

5HVG

2HU

A

+3V3-STANDBY

2H43

RES

1u0

10u

100n

2HV

9

100n

2HY

42H

38

100n

30R

5HY6

2HV

4

100n

+3V3

IHSL

2HU

9

1u0

100n

2HZM

+3V3

2HV

U

100n

+1V2-PNX85XX

+3V3

100n

2HY

F

IHSN2H

20

100n

IHK3

2HY

8

100n

2HY

3

1u0

100n

2H39

30R

5HY4

IHY7

2HU

6

1u0

2HY

6

100n

100n

2HZG

IHK4

2HV

P

100n

2H22

100n

100n

2H29

7H06LD1117

1

324

+3V3

100n

+3V3

+1V2-PNX85XX

2H33

5HV0

30R

VDDA-AUDIO

5HV5

1u0

2HY

B

IHY1

30R

VDDA-ADC

30R

5HV7

2HZF

100n

100n

2H24

2HY

9

1u0

27

IHSP

2HZY

-2

100n

2HY

5

18

1u0

+3V3

100n

2HZC

-1

SENSE+1V2-PNX85XXCH53

9H20

+1V2-PNX85XX

IHY4

2H18

100n

+1V2-PNX85XX

+3V3

100n

2H31

2HH

9

100n

2H27

100n

+3V3-PER

1u0

2HV

2

100n

2HZL

T15T16T17T18T19T20

P21P33R14R15R16R17

AA5

R18R19R20T14

N5P14P15P16P17

AA21 P18P19

P2P20

F7 F8G

29 G5

G6

AA20

H6

K2

L33

L5M2

E12

E18 E

3E

4F2

1

AA19

F22

F27

F29

F30 F5

AN

33A

N34

AP

33A

P34

AA18

B34

D12

D13

D17

D18

AM18

AM

2A

M21

AM

22AA17

AM

31A

M32

AM

33A

M34

AN

1A

N32

AJ9AK10AK13AK23

AA16

AK25AL1AL2AL3AL30AM1

AG31AH29AH6

AA15

AJ15AJ24AJ25AJ29AJ33AJ5

Y17

Y18

Y19

AC31

Y20

Y33

Y5

Y6

AC33AE6AF33

W14

W15

W16

AB5W

17W

18W

19W

20Y

14Y

15Y

16

U33

U6

AB4

V14

V15

V16

V17

V18

V19

V20

AA14

AB31

T31U14U15U16U17U18U19U20

+1V2-PNX85XX

PNX85439EH/M2/241827H00-10

+3V3

2HV

J

100n

100n

2HH

6

5HVA

30R

100n

2H40

IHY6

5HVC

+3V3-PER

IHY2

30R

30R

5HV3

IHSK

VDDA-DAC

100n

2HZY

-11

8

+1V2-PNX85XX

VDDA-DAC

100n

2HV

L

IHK2

2H42

10u

6.3V

1u0

2HU

7

2HZD

100n

30R

5HY3

IHYF

30R

5HV9

+3V3

100n

2HV

F10

0n

2HV

1

5HY7

30R

2HV

Z

330u

6.3V

100n

2HY

2

27

100n

2HV

R

2HZC

-2

100n

AM3

T6

AA30

F24F28

AC6AD6

AJ26F17

AD30

W30AK30N30AE30

F6H29J29J6

W6

AJ22AJ27AJ28AJ8F10F23

T30

U21

V21

W21

E13

E17

AK20AK21AK24AL21

AJ21

AF5AF6AG5AG6

AG

30

Y21

AH

30R

21R

30 T21

AJ13AJ14AJ20AJ23F18F19F20F25

AB30

C13C17

R6H5

F16

AJ12

F26F9K30L30U30V30V6

AK12

T5

AC30E14

E16

AJ19

AB6

AJ17

D4

P6

P30AF30D14

D16

AJ18

AK17

L6M6N6

AJ6AK8

PNX85439EH/M2/241827H00-9

AJ16

AJ7

K6

AA6

T3

Y30AJ30

VDD

3H55

2R2

5HY5

30R

100n

2HY

A

2HZK

100n

2HV

0

100n

2H41

100n

2H17

100n

1u0

+1V2-PNX85XX

6

2HY

E

100n

2HZY

-33

IHYH

9H21RES

30R

5HV2

+1V8-PNX85XX

100n

2H21

1u0

2HU

4

+3V3

100n

2H37

+3V3

18310_517_090302.eps090302

Page 103: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 103Q549.2E LA 10.

2009-May-08

SSB: PNX5100 - SDRAM

C

NP

NP

NP

NP

PN

VREFIREF

CSB

CKEODT

WEBCASBRASB

BA2

10111213

BA1BA0

1211109876543210

232425262728293031

0123

D

A

DQM

DQS0

DQS1

DQS2

DQS3

CLK

222120191817161514

0123456789

121110

9876543

0123456789101112

CK

VD

DL

VREF

VS

SD

L

14

VDDQ

QSSVSSV

BA

A

LDQS

UDQS

NC

DQ

CKEWE

ODT

RAS

1

CS

CAS

0012

VDD

LDMUDM

15

131211109876543

0123456789101112

CK

VD

DL

VREF

VS

SD

L

14

VDDQ

QSSVSSV

BA

A

LDQS

UDQS

NC

DQ

CKEWE

ODT

RAS

1

CS

CAS

0012

VDD

LDMUDM

15

13

E

3C27-4 I8

3C07-2 G5

3

I

119

3C30-4 I9

IC04 C2

3C09-3 H5

20

3C28-1 H12

77

3C28-2 H11

3C05-4 H5

9

3C06-2 H53C06-3 H23C06-4 I2

1810

M

3C22 B12

3C25-3 H11

N

F

3C28-4 H12

10

16

I3C11 H6

B

3C13 I23C20 B9

H

13

H

O

2C43-4 F8

3C23 B123C25-1 G123C25-2 G12

3C25-4 H12

3C30-2 H113C30-3 I8

3C03 H2

3C06-1 H5

14 19

3C21 B9

1817

3C04 H8

1

3C05-2 G63C05-3 I5

P

G

72

3C07-1 G6

I

3C31 H123C32 H12

19

7C01 F3

FC05 B11FC06 B9

2C43-3 F8

C

5

12

19

O

8

D

1

3C09-4 H63C10 C4

H

3C12 I2

3 115

2C34 F12

3C26-1 G123C26-2 G11

3C28-3 H11

3C26-4 H12

3C30-1 H11

3C27-2 H113C27-3 H9

2C41-3 F2

85

H

2 17

E

6

3C05-1 G6

O

L

6

K

B

17

3C07-3 G53C07-4 H6

7C00-8 A6

3C08-2 H5

7C02 F9

3C09-1 H63C09-2 H5

2C32 F11

1211 20

C

13

2 8

16

15

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

16

18

12

86

C 2C33 F11

1

2C44-1 F92C44-2 F9

3C26-3 G11

2C44-4 F9

3C27-1 H11

3C01 D23C02 D3

C

17

4

J

3

F

G

6

D

G

M

L

F

4

H

N

1C00 D9

8

E

10

2C41-4 F22C42-1 F2

3C08-1 H5

2C42-3 F2

3C08-3 H6

2C43-1 F82C43-2 F8

E

F

K

G

N

12

J

I

19

M

18

A

5 16

0197

2

12

2C35 F122C36 F12

2C44-3 F9

2C39 I12

3C00 C2

2C41-1 F12C41-2 F1

7

K

14 15

31

14

13

J

B

8 9

2

I

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

2C00 E42C01 D4

9

2C13 F4

C

11

2C42-2 F2

2C18 F6

2C42-4 F3

2C29 E102C30 E10

5

D

6

D

O

owne

r.

F

P

M

10

L

2013

G

L

14

A2

2015

D

11

PNX5100 : SDRAM

F

2C38 F12

H

2C40 I6

A

B

4

N

4 5 6

2C02 E4

2C14 F5

A

P

A

15

P

7

10

K

4

I

E

B

31

11 12

2C17 F5

9

2C19 F6

2C15 F52C16 F5

13

A

B

C

D

E

4

13

1

G

3

J

PNX5100-DDR2-VREF-DDR

63

RE

S

33R3C09-3

2C29

330u

6.3V

4533R

3C28-4

ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-11-21

Maelegheer Ingrid

2008-10-10 3

A2

DDR2 PNX5100

TV543 R2 LDIPNX 8204 000 8928

CHECK DATE

NAME

2

SUPERS.

CLASS_NO

EMANTESNHC

9 1

45

130

3C05-4

33R

100n

2C32

3C05-233R

2772

33R3C26-2

IC04

2C43

-3

100n

36

2C41

-1

100n

18

+1V8-PNX5100

33R3C32

2C42

-1

100n

18

100n

2C36

22u

2C19

33R3C28-2 27

3C06-133R18

REF EMC HOLE1X01

3C05-133R

18

1u0

2C30

3C20

1K0

1%

3C08-233R27

3 6

3C30-3 33R

81

PNX5100-DDR2-VREF-DDR

45

33R3C26-1

3C25-4

33R

18

2C44

-1

100n

6333R

3C07-3

2C02

1u0

3C103K3 RES

27

100n

2C43

-2

5

3C27-4 33R4

2C15

100n

+1V8-PNX5100

33R3C28-3 36

8133R

3C07-1

82C

43-1

100n

1

1%1K

0

3C22

2C42

-3

100n

36

4 53C06-4

33R

1%5K6

3C00

2C44

-3

100n

36

3C27-3

33R3 6

PNX5100-DDR2-VREF-CTRL

54

5

33R3C09-4

100n

2C41

-44

6.3V

330u2C

00R

ES

100n

2C18

150R3C03

2C33

100n

100n

2C34

PNX5100-DDR2-VREF-CTRL

+1V8-PNX5100

2C40

100n

45

3C3133R

100n

2C43

-4

100n

2C42

-22

7

33R183C08-1

+1V8-PNX5100

7233R

3C09-2

3C06-3

33R3 6

3C1333R

100n

2C16

8

FC05

3C30-133R

1

45

100n

2C44

-4

2C17

100n

45

1

100n

2C42

-4

33R3C09-18

3C05-333R

36

3C02

100R

RES

Y23Y24

E26E25

E23E24

N23

K23

K24

P24

U24

AB26V26W24

AB23

AA26AA23G26G23

W25W26

F23H24F24J23J24D23

AC26

G24D24

AC25U26

AB24V24F26H26G25J26

Y25

K26D25H25D26

U23

P25P26

L23

Y26AB25

AA24AC24AC23

V23

T23M26T24L25R24L26M23

R26T25N24

L24

7C00-8PNX5100E

DDR2Φ

N26U25

T26K25M24

N25

33R

3C12

100n

2C41

-22

7

D8

E7 F2 F8 H2

K3

A3

E3 J3 N1

P9 J7 A7

H8

B2

B8

D2

A9

G9

C1

C3

C7

C9

E9

G1

G3

G7

J2

K7

B3

B7A8

A1

E1

J9 M9

R1

J1

C2

F3F7E8

A2E2L1R3R7R8

K9

D1D9B1B9

H7H3H1H9F1F9C8

L3

L7

J8

K2

K8

L8

G8G2

D7D3

P7R2

M7N2N8N3N7P2P8P3

L2

ΦSDRAM

HYB18TC512160CF-2.57C02

M8M3

M2

2C41

-3

100n

36

1C00HOOK1

18

72

33R3C28-1

33R3C07-2

5433R

3C26-4

100n

2C39

100n2C01

3C25-333R36

D8

E7 F2 F8 H2

K3

A3

E3 J3 N1

P9 J7 A7

H8

B2

B8

D2

G9

C1

C3

C7

C9

E9

G1

G3

G7

J2

K7

B3

B7A8

A1

E1

J9 M9

R1

J1 A9

C2

F3F7E8

A2E2L1R3R7R8

K9

D9B1B9

H7H3H1H9F1F9C8

L3

L7

J8

K2

K8

L8

G8G2

D7D3D1

P7R2

M7N2N8N3N7P2P8P3

L2

ΦSDRAM

HYB18TC512160CF-2.57C01

M8M3

M2

FC06

3C27-233R

27

3C25-133R

1863

18

33R3C26-3

3C27-133R

1%1K

0

3C21

3C01

820R 1%

27 3C25-233R

33R3C07-454

PNX5100-DDR2-VREF-DDR

3C04150R

3C1133R

33R27

+1V8-PNX5100

3C30-2

3C23

1K0

3C06-233R27

1%

100n

2C35

100n

2C14

33R36 3C08-3

2C13

100n

2C38

22u

27

4 5

2C44

-2

100n

3C30-4

33R

PNX5100-DDR2-D30PNX5100-DDR2-D31

PNX5100-DDR2-D4PNX5100-DDR2-D5PNX5100-DDR2-D6PNX5100-DDR2-D7PNX5100-DDR2-D8PNX5100-DDR2-D9

PNX5100-DDR2-DQM0PNX5100-DDR2-DQM1PNX5100-DDR2-DQM2PNX5100-DDR2-DQM3

PNX5100-DDR2-DQS0_NPNX5100-DDR2-DQS0_P

PNX5100-DDR2-DQS1_NPNX5100-DDR2-DQS1_P

PNX5100-DDR2-DQS2_NPNX5100-DDR2-DQS2_P

PNX5100-DDR2-DQS3_NPNX5100-DDR2-DQS3_P

PNX5100-DDR2-D1

PNX5100-DDR2-D10PNX5100-DDR2-D11PNX5100-DDR2-D12PNX5100-DDR2-D13PNX5100-DDR2-D14PNX5100-DDR2-D15PNX5100-DDR2-D16PNX5100-DDR2-D17PNX5100-DDR2-D18PNX5100-DDR2-D19

PNX5100-DDR2-D2

PNX5100-DDR2-D20PNX5100-DDR2-D21PNX5100-DDR2-D22PNX5100-DDR2-D23PNX5100-DDR2-D24PNX5100-DDR2-D25PNX5100-DDR2-D26PNX5100-DDR2-D27PNX5100-DDR2-D28PNX5100-DDR2-D29

PNX5100-DDR2-D3

PNX5100-DDR2-WE

PNX5100-DDR2-RAS

PNX5100-DDR2-ODT

PNX5100-DDR2-CS

PNX5100-DDR2-CLK_PPNX5100-DDR2-CLK_N

PNX5100-DDR2-CKE

PNX5100-DDR2-CAS

PNX5100-DDR2-BA1PNX5100-DDR2-BA0

PNX5100-DDR2-A9PNX5100-DDR2-A8PNX5100-DDR2-A7PNX5100-DDR2-A6PNX5100-DDR2-A5PNX5100-DDR2-A4PNX5100-DDR2-A3PNX5100-DDR2-A2

PNX5100-DDR2-A12PNX5100-DDR2-A11PNX5100-DDR2-A10

PNX5100-DDR2-A1PNX5100-DDR2-A0 PNX5100-DDR2-D0

PNX5100-DDR2-DQS3_PPNX5100-DDR2-DQS3_N

PNX5100-DDR2-D26

PNX5100-DDR2-DQM3

PNX5100-DDR2-D10

PNX5100-DDR2-DQM1

PNX5100-DDR2-A3PNX5100-DDR2-A2

PNX5100-DDR2-A12PNX5100-DDR2-A11PNX5100-DDR2-A10

PNX5100-DDR2-A1PNX5100-DDR2-A0

PNX5100-DDR2-RAS

PNX5100-DDR2-DQM0PNX5100-DDR2-DQS0_PPNX5100-DDR2-DQS0_N

PNX5100-DDR2-DQS1_NPNX5100-DDR2-DQS1_P

PNX5100-DDR2-DQM2

PNX5100-DDR2-DQS2_NPNX5100-DDR2-DQS2_P

PNX5100-DDR2-D15

PNX5100-DDR2-D8

PNX5100-DDR2-D4PNX5100-DDR2-D3

PNX5100-DDR2-D1

PNX5100-DDR2-D6

PNX5100-DDR2-D0

PNX5100-DDR2-D2

PNX5100-DDR2-WE

PNX5100-DDR2-ODT

PNX5100-DDR2-CS

PNX5100-DDR2-CLK_N

PNX5100-DDR2-CKE

PNX5100-DDR2-CLK_P

PNX5100-DDR2-CAS

PNX5100-DDR2-BA1PNX5100-DDR2-BA0

PNX5100-DDR2-A9PNX5100-DDR2-A8PNX5100-DDR2-A7PNX5100-DDR2-A6PNX5100-DDR2-A5PNX5100-DDR2-A4

PNX5100-DDR2-D28

PNX5100-DDR2-D5

PNX5100-DDR2-D7

PNX5100-DDR2-D12PNX5100-DDR2-D11

PNX5100-DDR2-D9

PNX5100-DDR2-D14

PNX5100-DDR2-D16

PNX5100-DDR2-D18

PNX5100-DDR2-D29

PNX5100-DDR2-D31

PNX5100-DDR2-D24

PNX5100-DDR2-D13

PNX5100-DDR2-WE

PNX5100-DDR2-D20PNX5100-DDR2-D19

PNX5100-DDR2-D17

PNX5100-DDR2-D22PNX5100-DDR2-D21

PNX5100-DDR2-D23

PNX5100-DDR2-D30

PNX5100-DDR2-D25

PNX5100-DDR2-D27

PNX5100-DDR2-A7PNX5100-DDR2-A8PNX5100-DDR2-A9

PNX5100-DDR2-BA0PNX5100-DDR2-BA1

PNX5100-DDR2-CAS

PNX5100-DDR2-CLK_P

PNX5100-DDR2-CKE

PNX5100-DDR2-CLK_N

PNX5100-DDR2-CS

PNX5100-DDR2-ODT

PNX5100-DDR2-RAS

PNX5100-DDR2-A0PNX5100-DDR2-A1

PNX5100-DDR2-A10PNX5100-DDR2-A11PNX5100-DDR2-A12

PNX5100-DDR2-A2PNX5100-DDR2-A3PNX5100-DDR2-A4PNX5100-DDR2-A5PNX5100-DDR2-A6

18310_518_090302.eps090302

Page 104: Q549---32pfl9604ser

EN 104Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: PNX5100 - Video-In

C

262728293031

D D

16

2120191817

1234

0123456789101112131415

242322

25

CLK

DPDN

CPCN

CLKPCLKN

BPBN

AP

AP

BNBP

CLKNCLKP

CNCP

DNDP

ENEP

AN

LIN1

LIN2

AN

EPEN

C

E

5

3C33 E2

2 3 8ow

ner.

C

9

B

11

D

IC54 C7

3C50 C6

7C00-5 B4

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

B

J

2

8

3C14 B2

3C18 C2

1 6

3C16 B2

F

3

2

E

5

C

10

E

13

G

10

G

A

5

6

H

1

B

7

D

F

3C15 B2

E

1

8

RES

B

4

A

6

12

J

H

3C17 C2

3C19 D2

3 13

4

7

3C36 F2

3C29 D2

9876

4

3C51 C7

5 9

I2

7C00-9 C7

4

12

C

9

3

3C35 E2A

I1

PNX5100 : VIDEO-IN

D

7

A

3C24 D2

F

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

F

D

3C34 E2

11

3C29

100R

3

3C17

100R

VIDEO PNX5100

TV543 R2 LDIPNX 8204 000 8928

CHECK DATE

NAME

2

SUPERS.

CLASS_NO

EMANTESNHC

9 2

ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-11-21

Maelegheer Ingrid

2008-10-10

130 A3

AC20

AD19AC19

AF19AE19

AF18AE18

AD18AC18

AC16

AF16AE16

AF15AE15

AD15AC15

AF20AE20

AD20

ΦLVDS_RX

PNX5100E7C00-5

AF17AE17

AD17AC17

AD16

IC54

100R

3C16

3C15

100R

F1E3E1D2

3C19

100R

B7C7D7A8B8

F4

C8D8

F3F2

B4

C4A5B5C5

G1

D5A6B6C6A7

D6A4E2G4

G3G2

D1C1A2A3B3

ΦVDI

PNX5100E7C00-9

100R

3C14

100R

3C33

3C50

1K0

1K0

3C36

1K0

3C35

100R

3C24

3C34

1K0

3C51

1K0

100R

3C18

RX51002B+

RX51001A+

RX51001CLK+

RX51001B+

RX51001B-

RX51001CLK-

RX51002CLK-RX51002C+

RX51002C-

RX51002D-

RX51002E-

RX51001A-

RX51001C+

RX51001D+

RX51001E+

+3V3

RX51001D-

RX51001C-

RX51002E+

RX51002D+

RX51002CLK+

RX51002A-

RX51001E-

RX51002A+

RX51002B-

18310_519_090302.eps090302

Page 105: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 105Q549.2E LA 10.

2009-May-08

SSB: PNX5100 - Power

VSS

VDD_3V3_PER

VSS

VDD_3V3_LVDSOUT

VDD_1V8_DDR

VSS

VDD_3V3_LVDSIN

VDD_1V2_CORE

VSS

VSS

C

5C63 E6

IC89 E9

13

G

21

F

E

2C71 E2

65

D

C

CC60 A3FC07 A2

IC86 D9IC87 E9IC88 E9

5C68 E85C69 E85C70 F87C00-10 A47C00-11 A7

7

IC85 F7

5

5 6 7

2C45 D12C55 D1

J

2C90 F9

D

B

2C94 F7

8 9

A

B

2C58 F92C59 A1

IC84 E7

2C95 A1

C

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

43

5C61 D6

5C62 E6

12

8

2C85 D92C86 D9

2C69-4 D22C70-1 D3

2C64 B32C65 B32C66-1 C1

G

F

A

2C70-3 D32C70-4 D3

2C72 E22C73 E22C74 E22C75 E2

2C78-2 B1

H

E

IC83 E7

1361

I

9

1 2 3

IC90 F9

3 109

2C89 E9

4

2C91 F82C92 F9

2C96 A22C97 A25C60 D6

C

D

E

5C64 F65C65 F65C66 D8

A

11

2C81 B32C82 F6

2C67-2 C22C67-3 C2

2C62-2 D62C62-3 B22C62-4 E6

2C68-3 D22C68-4 D22C69-1 D22C69-2 D2

F

2C69-3 D2

B

2C70-2 D3

2C56 D12C57 D9

2C63-4 B3

6

2C60-1 B1

F

2C76 E32C77 C92C78-1 B1

IC80 D7IC81 D7IC82 E7

2C79 D6

12

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

htow

ner.

3 4 5

2C83 F62C84 D8

1 2

2C87 D92C88 E9

2C66-2 C2

2C60-2 B12C60-3 B12C60-4 B12C61-1 B2

9

2C78-3 B12C78-4 D3

10

I

PNX5100 : POWER

J

5C67 E8

2C67-4 C22C68-1 D12C68-2 D2

2C66-4 C22C67-1 C2

D

E

2C66-3 C2

2C61-2 B22C61-3 B22C61-4 B2

18

2C62-1 B2

4

7 8

A

B

C

2

2C80 D6

87

H

11

2C63-1 B32C63-2 B32C63-3 E6

2C61

-1

100n

2C88

100n

2C60

-4

100n4

5

+1V2-PNX5100-CLOCK

2C92

100n

100n

2C91

+1V2-PNX5100

+3V3-PNX5100-DDR-PLL0

+1V2-PNX5100-TRI-PLL1

+3V3

2C78

-3

100n3

6

+3V3-PNX5100-LVDS-IN

2C90

100n

18

30R

5C60

100n

2C67

-1

52C

67-4

100n4

5C61

30R

2C69

-3

100n3

6

+1V2-PNX5100-CLOCK

100n

2C87

100n

2C85

2C58

100n

100n

2C66

-22

7

+1V2-PNX5100

2C81

100n

+1V2-PNX5100-DDR-PLL1

+1V2-PNX5100-TRI-PLL3

10u

2C55

+1V2-PNX5100

+1V2-PNX5100

30R

5C68

30R

5C70

45

+1V2-PNX5100-DDR-PLL1

2C65

100n

2C78

-4

100n

2C84

100n

100n

2C94

100n

2C64

100n

2C80

2C70

-2

100n2

7

18

2C61

-3

100n3

6

100n

2C70

-1

+1V2-PNX5100

+1V2-PNX5100-TRI-PLL2

+3V3

2C72

100n

45

IC84

2C70

-4

100n

IC82

IC89100n

2C63

-33

+1V2-PNX5100

30R

5C66

100n

2C75

+1V2-PNX5100-CLOCK

+1V2-PNX5100

+3V3-PNX5100-LVDS-IN

100n

2C83

30R

5C65

+1V2-PNX5100

T14T15V25W23

AE26

AC2AC3AC4

+3V3-PNX5100-CLOCK

R11R12R13R14R15

AC1

R23R25T11T12T13

N13N14N15P11

AB5

P12P13P14P15P23

L14L15M11M12

AB4

M13M14M15M25N11N12

D3D4E4E5

AB3

F25H23J25L11L12L13

B1A10A13

AA25

A17B2

A20C2

C25C3

G5M5N5

A1

AD1AD2AD24

AD3AE1AE2AF1

D13D17D20

AB20

V5W5

AB6AB7D22E6E7

E16

L16M16N16P16R16T16

AB15AB17

D10

K22P5R5Y5

AB16AB8AB9AC9AD9AE9AF9

ΦSUPPLY_1

PNX5100E7C00-10

AA5

E8E9F5J22

45

100n

2C66

-4

18

+1V2-PNX5100

100n

2C63

-1

2C95

10u

2C63

-4

100n4

5

+3V3

27

2C60

-2

100n

IC90

+3V3-PNX5100-DDR-PLL0

+1V8-PNX5100

10u

2C96

2C73

100n

16V

220u2C

45

27

+1V2-PNX5100-DLL

100n

2C69

-2

100n

2C89

VSS_MCAB1 AB13VSS_MCAB2

VSSA_TRI_PLL2

U4 VSSA_TRI_PLL3

AE12VSSA_XTAL

J3 VSSD_TRI_PLL1

K3 VSSD_TRI_PLL2

U3 VSSD_TRI_PLL3

AD26VSS_DDRPLL0

R22VSS_DDRPLL1

AC13

VSSA_DLL0

AB22 VSSA_DLL1

E22 VSSA_DLL4

U22VSSA_DLL7

A15VSSA_LVDS1 C15VSSA_LVDS2

AB19 VSSA_LVDSIN

J4 VSSA_TRI_PLL1

K4

VDDD_1V2_TRI_PLL1

K5 VDDD_1V2_TRI_PLL2

U5 VDDD_1V2_TRI_PLL3

AD25VDD_1V2_DDRPLL0

N22VDD_1V2_DDRPLL1

AB14VDD_1V2_MCAB1 AC14VDD_1V2_MCAB2

T22VSSA_DDRPLL1

L22

VDDA_1V2_TRI_PLL3

AF12VDDA_1V2_UIP_PLL

AD13VDDA_1V2_XTAL

AE25VDDA_3V3_DDRPLL0

B15VDDA_3V3_LVDS1 D15VDDA_3V3_LVDS2

AB18 VDDA_3V3_LVDSIN

AD14VDDA_3V3_SYS_PLL

H5

VDDA_1V2_DDRPLL1

M22 VDDA_1V2_DLL0

AA22 VDDA_1V2_DLL1

F22 VDDA_1V2_DLL4

V22VDDA_1V2_DLL7

E15VDDA_1V2_LVDS_PLL

J5 VDDA_1V2_TRI_PLL1

L5 VDDA_1V2_TRI_PLL2

T5

SUPPLY_2Φ

PNX5100E7C00-11

AE14VDDA_1V2_1_7_MCAB

P22

2C69

-1

100n1

8

+1V2-PNX5100-TRI-PLL1 2C57

10u

5C67

30R

27

18

100n

2C78

-2

100n

2C60

-1

2C97

10u

2C86

100n

6

2C59

330u

10V

2C66

-3

100n3

FC07

+1V2-PNX5100

30R

5C62

+1V2-PNX5100-TRI-PLL3

+3V3-PNX5100-CLOCK

100n

2C61

-44

5

2C68

-4

100n4

5

+1V2-PNX5100

5C64

30R

2C56

10u

2C67

-2

100n2

7

IC87

2C68

-2

100n2

7

IC80

+1V2-PNX5100-LVDS-PLL

2C82

100n

+1V2-PNX5100

+1V2-PNX5100-LVDS-PLL

2C76

100n

45

+1V2-PNX5100

IC81

100n

2C69

-4

4

100n

2C62

-4

2C79

100n

+1V2-PNX5100

8

5C63

30R

2C78

-1

100n1

2

36

100n

2C62

-2

6

100n

2C70

-3

100n

2C68

-33

5C69

30R

CC60

2C63

-2

100n2

7

+1V2-PNX5100-DLLIC86

+3V3

IC83

2C66

-1

100n1

8

100n

2C77

27

100n

2C61

-2

+3V3

+3V3-PNX5100-LVDS-PLL

+3V3

18

100n

2C71

2C62

-1

100n

IC85

130

+1V2-PNX5100-DLL

ROYAL PHILIPS ELECTRONICS N.V. 2008

39

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8928TV543 R2 LDIPNX

SUPPLY PNX5100

A3

32008-10-10

Maelegheer Ingrid

2008-11-21

+3V3

100n

2C74

8+1V2-PNX5100-TRI-PLL2

+1V2-PNX5100

+3V3-PNX5100-LVDS-PLL

100n

2C68

-11

IC88

36

36

100n

2C60

-3

100n3

610

0n

2C67

-32C

62-3

SENSE+1V2-PNX5100

18310_520_090302.eps090302

Page 106: Q549---32pfl9604ser

EN 106Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: PNX5100 - Audio

C

SCKOSCLK

SD

OUTIN

OSCLKSCK

0123

WS

WS

SD0

CLKDE

SYNC_HSYNC_V

AMBI

01234567

B

C

D

E

3C41 D43C95-1 B53C95-2 B53C95-3 B43C95-4 B47C00-6 B3

9

2

12

5

C

E

12

6

PNX5100 : AUDIO

I

8

D

1311

E

J

7

8

9

A

BB

owne

r.

9

321

F

11

H2

D

7C00-7 C3

1 2 3 4 5 6 7 8

1

C

J

101 76

A

D

E

A

3

5

H

G

8

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

F

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

3 4 5 6

I

G

C

4 9 107

13

A

B

4

AE11AD11

AC11AB11

AB12AC12

100R

3C41

AF10AE10AD10AC10AB10AF11

AF21AC21

AE21

AD21

ΦAMBI

PNX5100E7C00-7

AC22AD22

AF22AD23AE23AF23

AE22 2 7

PNX5100E7C00-6

ΦAUDIO

3 6

100R

3C95-2100R

3C95-3 100R

3C95-1

1 8

100R

3C95-4

4 5

CHECK

8204 000 8928TV543 R2 LDIPNX

AUDIO PNX5100

A3130

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 2008

49

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATE

BL-OSCLK

BL-SCK

BL-SD0

BL-WS

AMBI-VS

18310_521_090302.eps090302

Page 107: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 107Q549.2E LA 10.

2009-May-08

SSB: PNX5100 - LVDS

C

CNCP

DNDP

BPBN

APAN

DPDN

CPCN

CLKPCLKN

BPBN

APAN

EPEN

IREF

LOUT1

LOUT2 LOUT4

LOUT3

RGB_CLKLVDS2LVDS1

EP

EP

ANAP

BNBP

CLKNCLKP

DPDN

CPCN

EN

EN

CLKPCLKN

BPBN

APAN

EPEN

DPDN

CPCN

CLKPCLKN

14

7 8 9

3

3 4 5 6

2CAB D52CAC E52CAD E52CAE E52CAF E52CAG F5

G

H

1G50 E81G51 F14

H

A

B

D

E

F

D

E

F

G

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

4 5

2CAZ B102CB0 C102CB1 C102CB2 C102CB3 C102CB4 D10C

6 7 8 9 10 11 12 13 14

A

167

1 2

2CA7 C52CA8 C52CA9 C52CAA D5

2CBL B132CBM B132CBN B132CBP B132CBR B132CBS B14

2CAH F52CAJ F52CAK F52CAM G5

10 11 12 13 14

1 2 3

20

18

C

C

B

85

2CAT A102CAV B102CAW B102CAY B10

3CA4 B123CA5 B123CA6 B13CA7 B13CA9 B123CAA B12

2CB5 D102CB6 E102CB7 E102CB8 E10

B

101

2CA0 A52CA1 A52CA2 B52CA3 B5

11

1

N

P

2CA4 B52CA5 B52CA6 C5

2CBG G102CBH G102CBJ B132CBK B13

9CA5 B8FC08 B7FC10 B7FC12 C12FC13 C13FC14 C13

2CBY F82CBZ F82CH4 B62CH5 B6

2CAN G5

H

9

L

20

K

I

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

F

9

2CAP G52CAR G52CAS A10

2CH7 C73CA2 E73CA3 E7

FCAH D8FCAJ E8FCAK E8FCAM E8FCAN E7FCAP E7

3CAB C123CAC C123CAD C123CAE C12

2CB9 E10

2

19

16

2

15

O

4

2CBC F102CBD F102CBE G102CBF G10

9CA1 B149CA2 B89CA3 B89CA4 B8

FCB4 D12FCB5 D12FCB6 D12FCB7 D12FCB8 D12FCB9 D12

FC15 C13FC16 C13FC17 E14FC19 B12

2CH6 B7

8

PNX5100 : LVDS

A

15

G

I

E

3

FCAD D7FCAE D7FCAF D8FCAG D8

FCBG E12FCBH E12FCBJ E12FCBK E12FCBM E14FCBN B8

FCAR E7FCAS B12FCAT B12FCAV C12

7C00-4 B1

13

13 17

E

G

F2CBA F102CBB F10

9C11 C79C31 C89C32 C89CA0 E14

A

6

FCAY C12FCAZ C12FCB0 C12FCB1 C12FCB2 C12

FCBA D12FCBB D12FCBC D12FCBD D12

FCA0 C7

1776 10 11

TO DISPLAY

FCA3 C7FCA4 C8FCA5 C7FCA6 D8FCA7 D7FCA8 D8FCA9 D7FCAA D8

FCAB C8FCAC D7

ICAE B14

TO DISPLAY

M

FCBP E8FCBR E8FCJ4 B7FCJ5 C7

FCAW C12

K

J

12

P

12

B

ICAA B1

M

O

5

D

144

9C10 B7

L

FCBF E13

C

FCB3 D12

H

J

FCBE E12

RES

D

1918

FCA1 C7FCA2 C8

N

owne

r.

ICA1 B8ICA2 B8ICA9 B1

3CA3

100RRES +VDISP1

4p7RES

2CAY 9CA14p7RES

2CA5

10p

2CB

J

RES2CAA 4p7

3CA

7

12K

2CBE 4p7

FCA0

RES

FCAP

FCAV

ICA9

FCB9

2CB6 4p7RES

100R3CA5

4p72CAWRES

FCAF

4p7

FCAT

2CB4RES

RES4p72CAR

2CB

K10

p

RE

S2C

BZ

10p

2CB9RES4p7

100R3CACRES

ICAA

FC15

RES4p72CB7

100R3CA2RES

100p

2CB

LR

ES

FC19

FC16

FCB5

FC12

4p7RES

2CAE4p7RES

2CAF

9CA0

4p72CAHRES

FCBN

2CAZRES4p7

10p

2CB

Y

4546 4748 4950

RE

S

41

56789

42

51

4344

313233343536373839

4

40

212223242526272829

3

30

1213141516171819

2

20

1G50

FI-RE41S-HF

1

1011

100RRES 3CAB

3CA

6

12K 2CA4

RES4p7

2CB

M10

0p

FCA9

RE

S

2CAJ 4p7RES

+3V3

100R

2CAN

3CA4

4p7RES

4p7RES

2CBDRES4p7

2CA1

RES4p72CA0

2CAV 4p7RES

2CA3 4p7RES

RES2CB2 4p7

FCBF

FCB6

4p7

4p7RES

2CBFRES

2CA9

RES

FCAW

4p72CB1

FCAG

FCBG

2CA7 4p7

2CBH

RES

4p7RES

FCBE

FCA8

FCB1

RES4p72CBA

FCB8

100p

2CB

R

FCAS

RE

S

FCBC

FCAN

+3V3

54 5556 5758 5960

5

5051

6789

52

61

53

40414243444546474849

30313233343536373839

4

20212223242526272829

3

111213141516171819

2

1G51

FI-RE51S-HF

1

10

2CAS 4p7RES

FCAZ

FCBK

FCAA

4p7RES

2CAK

RE

S2C

BS

100p

RES4p72CAT

FCAE

RE

S10

0p2C

BN

FCBP

RES4p72CB3

FC10

2CB8RES4p7

FCB7

FC17

FCB0

FCBB

4p7RES

2CBG

2CB0RES4p7

RES4p72CA2

2CBCRES4p7

4p7RES

2CA6

FCAD

ICAE

FCBR

FCB2

100R3CAA

4p72CAMRES

FCB3

FC14

RES4p72CAC

RE

S2C

BP

100p

RES

FCAJ

+VDISP2

3CAD100R

FCBD

FCA4

2CA8RES4p7

FCAC

FCA5

FCBH

4p7RES

2CAB

FCBM

FCJ4

RES

FCA1

2CH5 10p

RES 9C319C32

9CA

4

RES

RES9C11

RES

9CA

3

100R3CAE

FCBA

FCB4

FCAK

FCAY

FCAB

FCAR

2CAD 4p7RES

4p72CAP

D11

E10E11

B10C10

A9B9

C9D9

A22

RES

E13

B13C13

A12B12

C12D12

A11B11

C11

B17C17

A16B16

C16D16

A14B14

C14D14

E12

C20

A19B19

C19D19

A18B18

C18D18

E18E19

E17E14

A21B21

C21D21

E20E21

B20

ΦLVDS_TX

PNX5100E7C00-4

2CBB 4p7RES

9CA

2

FCBJ

130

9C10RES

9

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8928TV543 R2 LDIPNX

LVDS PNX5100

A2

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 2008

5

4p7RES

2CAG

FC08

2CH6

10pRES

FCA3

FCJ5

2CB5RES4p7

RES10p2CH4

2CH7

RES10p

9CA

5

FCA6

FCA2

FCAM

FC13

3CA9100R

FCA7

FCAH

ICA2

ICA1

TXCLK+

TXDAT-

TXDAT+

TXCLK-

TX3B-TX3B+

TX3A-TX3A+

SCL-DISPSDA-DISP

TX1E-

LAMP-ON-OUTBACKLIGHT-OUT

TX4B+

TX4A-TX4A+

TX3E-TX3E+

TX3D-TX3D+

TX3CLK-TX3CLK+

TX3C-TX3C+

TX1A-TX1A+

TX4E-TX4E+

TX4D-TX4D+

TX4CLK-TX4CLK+

TX4C-TX4C+

TX4B-

TX1E-TX1E+

TX1D-TX1D+

TX1CLK-TX1CLK+

TX1C-TX1C+

TX1B-TX1B+

TX2E-TX2E+

TX2D-TX2D+

TX2CLK-TX2CLK+

TX2C-TX2C+

TX2B-TX2B+

TX2A-TX2A+

TX3E-TX3E+

TX4A-TX4A+TX4B-TX4B+

TX3A-TX3A+TX3B-TX3B+TX3C-TX3C+

TX3CLK-TX3CLK+

TX3D-TX3D+

TX4C+TX4C-

CTRL-DISP1CTRL-DISP2CTRL-DISP3CTRL-DISP4

SCL-DISPSDA-DISP

TX3B+

TX3C-

TX3C+

TX3CLK+

TX3CLK-

TX3D-

TX3D+

TX3E-

TX3E+

TX4A-

TX4A+

TX4B-

TX4B+

TX4C-

TX4C+

TX4CLK+

TX4CLK-

TX4D-

TX4D+

TX4E+

TX4E-

TX4CLK-TX4CLK+

TX4D-TX4D+TX4E-TX4E+

TX1E+

TX2A-

TX2A+

TX2B-

TX2B+

TX2C+

TX2C-

TX2CLK-

TX2CLK+

TX2D-

TX2D+

TX2E+

TX2E-

TX2E-TX2E+

TX3A-

TX3A+

TX3B-

TX2D-TX2D+

TX2A+TX2A-

TX2B+TX2B-

TX2C+TX2C-

TX2CLK+TX2CLK-

TX1A+TX1A-

TX1C+TX1C-

TX1CLK+TX1CLK-

TX1D+TX1D-

TX1E-TX1E+

TX1B+TX1B-

TX1A-

TX1A+

TX1B-

TX1B+

TX1C-

TX1C+

TX1CLK+

TX1CLK-

TX1D-

TX1D+

18310_522_090302.eps090302

Page 108: Q549---32pfl9604ser

EN 108Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: PNX5100 - Control

TDITDO

RESET_SYS

SDASCL

SDASCL

RXTX

RXTX

XTAL

UA1

UA2

1

2TMSTRST

NC

RESET_IN

OUT2

OUT

IN

VPP_ID

OBSERVE

TCK

C

SCLADR

012 SDA

WC

6 7

2

1

J

4 7

732

I

2

3CD0 B2

A

4

3CDA B5

B

C

F

3CD1-2 C23CD1-3 C2

9CD0 D7

12

11

I

FCD8 B3

E

C

B

3

9

FCD2 B3

3CDC D6

11

4

8

9

H

1CD0 A2

3C40 C1

G

12 13

3CD1-1 C2

A 3CD9 B5

B

only for DEBUG

3CD7 B53CD8 B5

FCD0 B3

A

3 4

H

FCD6 D5

6

3CDB D7

2CD1 A2

3CD2 C2

owne

r.

D

C

6

F

3CD3 B2

A

8

2 3

ICD8 B3

3CD1-4 C1

PNX5100 : CONTROL

5

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

7

G

5

B

13

10

E

FCD9 D5

FCD1 B3

1

7C00-1 A37CD0 C4

6

5

5

C

DD

10

3CDD D6

1

FCD3 B3FCD4 B3

D

C08 OR C16

2CD0 A21

J

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

10K

3C40

+3V3

100R

3CDD

130

9CD

0

ROYAL PHILIPS ELECTRONICS N.V. 2008

69

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8928TV543 R2 LDIPNX

CONTROL PNX5100

A3

FCD6

32008-10-10

Maelegheer Ingrid

2008-11-21

FCD3 RES100R3CD9

+3V3

3CD0

100R

J1J2

AF8AE8

AD8AC8

AB21

AE13

AF13

AF14

R1

AF24AD12

K2

L2

K1

L1

H4H2H3

CONTROLΦ

7C00-1PNX5100E

G22H22W22Y22

27p

FCD2

2CD

1

123

6

5

84

7

M24C16-WDW67CD0

EEPROM

Φ(2Kx8)

FCD8

3CDA 100R

RES

+3V3

3CD

1-1

10K

ICD8

1CD0

27M

+3V3

10K

3CD3

10K

10K

3CD

1-2

3CD

1-4

27p

2CD

0

FCD0

3CDB

4K7+3V3

FCD9

+3V3

FCD4

10K

3CD

2

3CD8 100RFCD1

+3V3

3CDC

100R

10K

3CD

1-3

100R3CD7

SDA-AMBI-3V3EJTAG-PNX5100-TDO

EJTAG-PNX5100-TCK

+3V3

RESET-PNX5100PNX5100-RST-OUT

EJTAG-PNX5100-TRSTn

CLK-OUT-PNX5100

EJTAG-PNX5100-TDI

EJTAG-PNX5100-TMS

SCL-SSB

WC-EEPROM-PNX5100

SCL-SSB

SDA-SSB

WC-EEPROM-PNX5100

SDA-SSB

SCL-AMBI-3V3

18310_523_090302.eps090302

Page 109: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 109Q549.2E LA 10.

2009-May-08

SSB: PNX5100 - PCI

C

78910111213

0

CLKINTA

0123

56

AD

CBE

SEL

XIO

GNTBGNTA

GNTREQBREQA

REQSERRPERRIDSEL

DEVSELSTOPTRDYIRDY

FRAMEPAR

3210

3

PLL_OUT

4

141516171819202122232425262728293031

AD25ACK

21

653

8

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

1

8

G

B

5

I

F

B

C

EE

91

A

D

IC50 C5

C

10

10

3CFK-1 B5ow

ner.

D

7

E

3CFN B5

J

3CFL-1 B5

6

A

3CF1 C57

3

11

6

E

4

12

42

8

7C00-2 A3

1

4

C

A

31

D

1311

IC51 C5

A

5

7

12

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

J

I

2 6

H

4

3CFL-3 B5

D

3CFL-2 B5

8

5

3CFK-3 B5

C

B

B

H

G

F

13

3CFK-2 B52

3 9

72

PNX5100 : PCI

+3V3

Maelegheer Ingrid

2008-10-10 3

A3

PCI PNX5100

TV543 R2 LDIPNX 8204 000 8928

CHECK DATE

NAME

2

SUPERS.

CLASS_NO

EMANTESNHC

9 7

ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-11-21

130

1 8RES 3CFK-1 100R3 6RES 100R3CFK-3

3 6RES 3CFL-3 100R

IC50

10K

3CF1

3CFK-2 100R2 7

AC6AF7

M2M3M4N1

RES

M1

V1

W3

W1

AD6AC7AD7

W2

V4V2

H1

AD5AC5AF4

L3

V3

U2

AE6AF6AE7

L4

N4

AF3

N3N2

AE3AF2AB2AB1AA4AA3

AE5

T3

AD4

T2T1R4R3R2P4P3P2P1

AE4

AA2AA1Y4Y3Y2Y1W4U1T4

ΦPCI_XIO

PNX5100E7C00-2

AF5

IC51

3CFL-2 2 7

+3V3

RES 100R10K3CFN

1 8RES 100R3CFL-1

PCI-CBE0PCI-CBE1PCI-CBE2PCI-CBE3

PCI-CLK-PNX5100

PCI-DEVSEL

PCI-FRAME

PCI-AD25

PCI-IRDY

PCI-PAR

PCI-PERRPCI-SERR

PCI-STOPPCI-TRDY

PCI-AD0PCI-AD1

PCI-AD10PCI-AD11PCI-AD12PCI-AD13PCI-AD14PCI-AD15PCI-AD16PCI-AD17PCI-AD18PCI-AD19

PCI-AD2

PCI-AD20PCI-AD21PCI-AD22PCI-AD23PCI-AD24PCI-AD25PCI-AD26PCI-AD27PCI-AD28PCI-AD29

PCI-AD3

PCI-AD30PCI-AD31

PCI-AD4PCI-AD5PCI-AD6PCI-AD7PCI-AD8PCI-AD9

18310_524_090302.eps090302

Page 110: Q549---32pfl9604ser

EN 110Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: PNX5100 - Display-Interfacing

EN

GPIO

0

121110987654321

131415

C

L

IC03 G3ICG1 C4ICG2 C2

ICG3 C2ICG4 D4ICG5 D4ICG6 D5ICG7 E2ICG8 E2

32V

32V

ICGA E2ICGH H12ICGK G13ICGM G12ICGN G11ICGP G11ICGR G10

9CG1 B3

E

9CG4 H139CG7 G109CG8 G10

ICGV B8ICGW C3

ICHA B8ICHB B8

ICH1 G9ICH2 G9ICH3 H9ICH4 A8ICH5 D10ICH6 D11ICH7 D11ICH8 D12ICH9 D13

FCG1 B5FCG2 E6FCG3 E6FCG4 E6FCG5 E6FCG6 H13FCG7 E13FCG8 B4IC01 E3

3CHG E13

WIRE BRIDGE

ICG9 E2

F

6

IC02 G3

K

G

8

15

RES

7CG4 H127CG5 G127CG6-1 G137CG6-2 G137CG8 B127CH0 D127CH1-1 D137CH1-2 D139CG0 B3

3CGG E3

209

N

K

13

9CG9 H109CH0 E13BCG0 E6BCG1 E6

ICGY B12ICGZ B8

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rtsis

pro

hibi

ted

with

out t

he w

ritte

n co

nsen

t of t

he c

opyr

ight

BCG2 E6BCG3 E6BCG5 A5BCG6 B5FCG0 A5

3CH7 C23CH8 D113CH9 D113CHA D133CHB D123CHC D113CHD D113CHE E113CHF E12

2CGD G11

1

6

RESERVED

19

11

O

5

5CG2 B45CG3 B46CG0 C36CG2 C57C00-3 A97C03 G47CG0 B27CG1 C37CG2 C4

3CG0-4 C33CG1 C23CG5 D43CG6 E53CG7 E53CG8 E53CG9 E53CGA E33CGF E3

C

3

7

M

B

3CGH E33CGJ E33CGN H113CGP H12

H

3CGT G113CGV G133CGZ B123CH0 B123CH1 B123CH2 C43CH3 G113CH4 H113CH5 G11

2CG2 C42CG3 C22CG4 D52CG5 F52CG6 F52CG7 F52CG8 F52CGB H122CGC H12

11

owne

r.

E

D

18

14

4

5CG0 A45CG1 A4

2CH1 E123C37 G33C38 G33C39 G33C42 G93C43 A73C44 B83CG0-2 D53CG0-3 D5

C

D

E

F

G

H

I

A

B

9

CAPACITOR OR

10

12 13

NOTE : CAN BE

3CGR H133CGS G12

N

L

M

18

P

G

C

2CG1 B5

2 3 4 5 6 7 8 9 10

2CG0 A5

J J

152

10

16

2CH0 E11

O

RES

RES

12 13 14

A

B

17

1 2 3 4 5 6 7 8

9

87

5

C

12

D

A

I

14

F

P

1

10 11 12 13 14

1

17

I

D

E

F

G

H

I

1C01 A5

PNX5100 : DISPLAY-INTERFACING

VDISP-SWITCH

1C02 B52C03 H52C04 G4

2

2043

B

A

9161

11

H

7CG51

3

2

+VDISP

RESBC847BW

2CG

C

1u0

RE

S

47R

3CG1

ICH4

1K0

3CG

R

1

3

2

BCG0

7CH0BC847BW

100p

2CG

5

ICGA

T3.0A

1C01

+3V3

FCG0

BC847BPN(COL)7CG6-25

3

4

2

6

1

+12VD

7CH1-1BC847BPN(COL)

3CG

Z

10K

+3V3

ICG3

RE

S10

K

3CH

1

9CG7

RE

S

10K

3CH

8

RES

3CH4

10K

ICH5

FCG2

4K7

1C02

3.0A T

RES

3CH5

3CG

8 RE

S

RES9CG4

47R

ICGP

7CG1SI3441BDV

3C38

47R

ICGM

ICH9

100n

2CG

1

ICG8

BCG2

4K7

3CHC

RES

15K

3CH

F

RE

S

FCG5

RE

S1u

0

2CH

13CGG

47R RES

47R

3CGH

RES

9CH0RES

220u

25V

2C03

ICGV

5CG2

30R

4

1u0

2CG

B

7CH1-2BC847BPN(COL)5

3

3CGF

3CG0-2

47K

2 7

RES47R 1K0

3CHE

RES

FCG1

2

6

1BC847BPN(COL)7CG6-1

ICH3

IC02

ICHB

9CG

9

ICH8

ICG2

2CG

6

100p

BCG3

2CG

2

22u

RE

S

ICGH

47R

3C37

10K

3C39

9CG8

47R

RE

S

RES

3CG

6

ICGR

47K

3CH

A

FCG4

ICH1

5

4

+3V3

7C03

2

3

1

470p

2CGD

74LVC1G125GW

RES

6CG2

ICG4

BCG1

LTST-C190KGKT

+3V3

ICH2

BCG6

470K

+3V3

3CG

T

10K

3C42

+12VD

ICG6

ICH6

ICG1

12K

3CHB

9CG0

5CG1

RES

30R

3CG5

4K7

7CG4PDTC114EU

BCG5

RES

RE

S

3CG

9

10K

2CH0

470p

ICGK

ICGY

1u0

2CG3

+3V3F

100R

3CGA

2CG

0

3CGS

470K

100n

ICHA

RES

RE

S

3CG

P

15K

2K2

IC01 3CH

D

RE

S

5 4

IC03

47K

3CG0-4

30R

5CG0

2K2

3CH2

RES

+VDISP1

FCG7

9CG1

ICGN

3CH

G

1K0

ICG9

47K

3CG0-33 6

100n

2C04

C26B25B26A26A25A24

AE24AF25

B24A23B23C23B22C22

AF26C24

GPIOΦ

PNX5100E7C00-3

RES

7CG0SI4835DDY

FCG8

2CG

4

100n

FCG6

PDTA114EU7CG8

27K

3CH

9

+12VD

3CG

7

ICG7

ICGZ

RE

S47

R

100R

3C43

100R

3C44

+3V3

3CGJ

47R RES

3CH7

47K

+3V3

BZX384-C5V6

6CG0

47K

CHECK

8204 000 8928TV543 R2 LDIPNX

DISPLAY INTERF PNX5100

A2130

3CG

V

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 2008

89

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATE

5CG3

30R

100R

3CH0

+VDISP2

FCG3

100p

2CG

8

ICG5

ICGW

ICH7

10K

3CG

N

100p

2CG

7

+3V3+3V3

13

2

+3V3

3CH

3

BC847BW7CG2

BACKLIGHT-CTRL

BACKLIGHT-PWM-ANA-SSB

BACKLIGHT-OUT2

2K2

RE

S

BACKLIGHT-BOOST

BACKLIGHT-CTRL

CTRL4-PNX5100

CTRL-DISP4

BACKLIGHT-OUT

CTRL-DISP4

CTRL-DISP3

CTRL-DISP2

CTRL4-PNX5100

CTRL3-PNX5100CTRL2-PNX5100CTRL1-PNX5100

LCD-PWR-ONBACKLIGHT-PWM-ANA-DISP

BACKLIGHT-CTRL

BOOST-CTRL

BACKLIGHT-CONTROL-FPGA-IN

FAN-CTRL-1FAN-CTRL-2

BOOST-CTRL

CTRL1-PNX5100 CTRL-DISP1

CTRL2-PNX5100

CTRL3-PNX5100

CTRL4-PNX5100

LCD-PWR-ON

BACKLIGHT-PWM-ANA-SSB

18310_525_090302.eps090302

Page 111: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 111Q549.2E LA 10.

2009-May-08

SSB: PNX5100 - Debug

C

E

D

C

7CJ0 D3 FCJ0 D3

G

D

E

C

D

3 4

A

B

654

RESERVED

3

I

2

1

J

F

H

I

J

5

B

C

D

3CJ0 C3 3CJ1 C3 6CJ0 C3B

C

1

A

H

G

F

A

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

PNX5100 : DEBUG

3

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

2

1 2 3 4

1 2

B

64

owne

r.

A

7CJ0PDTC114EU

+3V3

3CJ0

330R

FCJ0

+3V3

SM

L-31

0

6CJ0

10K

3CJ1

CHECK

8204 000 8928TV543 R2 LDIPNX

DEBUG SHEET PNX5100

A4130

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 2008

99

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATE

PNX5100-RST-OUT

18310_526_090302.eps090302

Personal Notes:

10000_012_090121.eps090121

Page 112: Q549---32pfl9604ser

EN 112Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: FPGA Backlight-LVDS I2C-Mux

COM

OUTIN

-BUSCTRLFIL

I 2 CINP

VCCO

VCCO

BANK2

BANK3

GND

VCCINT

VCCO

IP

IO

TMSTDOTDITCK

PROG_B

DONE

VCCO

VCCAUX

BANK1

BANK0

C

OUTIN

INH BP

COM

D

C

S

W

HOLD

VSS

Q

VCC

8

3

A

1

C

L

D

F

RESERVED

K

7

L

3

19

J

G

H

I

A

E

F

G

H

I

1F03 H51F05 H11

10

B

1F29 I61F50 B14

12

G G

16

11

13

DEBUG

C

M

17

D

I

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht2 3 4 5 6 7 8 9 10 11

D

2F12 C2

4

2F14 C3

12 13

FOR

156

H

14

64321

B

8 9 10 11 12 13 14

A

2F29 F13C2F31 A2

E

F

FPGA Backlight-LVDS & I2C-MUX

19

FOR

17

2

11

1F53 E141M59 A141M71 C142F00 I2

2F02 I10

2F04 C112F05 I42F06 D132F07 D132F08 E132F09 C22F10 C22F11 D3

3F00-3 H2

2F13 C3

3F01 I2

2F15 C32F16 C2

TO

12

C

P

2

owne

r.

K

T 1A

63V

7

2F17 C3

5

2F19 D2

7

2F21 C32F22 B22F23 B22F24 B22F25 B32F26 A112F27 A112F28 E13

3F18 D13

2F30 A2

3F20 E13

2F32 A22F33 A2

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

5

6

F

J

O

SENSOR

2F34 B32F35 B32F36 A32F37 A32F38 A32F39 A32F40 F132F41 G13

2F01 H9

2F46 C13

2F03 D11

2F48 C142F49 A62FA6 B132FA7 B132FND F112FNE F113F00-1 I33F00-2 I2

3F84 E7

3F00-4 H2

3FA5 A12

3F02 H83F03 H10

1614

10

A

DEBUG

H

3F06 I83F07 D113F08 D113F09 D113F10 E113F11 D7

2F18 D1

3F13 C10

2F20 B2

3F15-1 G43F15-2 G43F15-3 G53F16-1 H43F16-2 H43F16-3 H43F16-4 H53F17 D13

9F01 E11

3F19 E13

9F03 D10

3F21 F133F22 E7

5

I

TO

3F23 E73F24 E13F25 E23F26 F63F27 F23F28 F43F29 F133F30 G13

2F42 G13

3F36 A8

2F47 C13

3F38 A83F39 B83F40 C133F41 C133F79 F103F80 F103F82 E73F83 E7

9F15 A8

3F85 E7

9F17 B6

3FA6 A123FAA A10

M

9

E

3FAB A105F02 C15F03 A25F04 A25F05 B145F06 B14

6F13 E2

3F12 C11

6F83 E6

3F14 F7

6F85 F67F00 B87F01 H97F05 E27F06 B27F07 D27F08 A69F00 D11

FF11 B6

9F02 E11

FF13 G5

9F04 D79F05-1 F9

15

FF16 B6FF17 A3FF20 B14FF21 C14

14

FF23 F14

N

B B

9

3F31 G13

9F05-3 F9

3F37 A8

9F06 D109F08 E109F09 A59F10 A59F11 A59F12 A59F13 A89F14 A8

IF12 B3

9F16 A8

IF14 D7

9F18 B69F19 B6

4

E

8 18

20

IF15 D10

AMBILIGHT

13

9F20 B69F21 A129F22 A129FA1 A69FA2 A6

6F82 E6

FF01 I1

6F84 E6

FF03 H8FF04 I8FF05 I8FF06 G4FF07 G4FF08 B6FF09 C3FF10 A3

IF16 D10

FF12 F7

FF14 G4FF15 B6

D

20

FF02 H10

FF22 C14

FF25 F14FF30 G5FF31 F14FF40 E14FF41 E14FF42 E14FF43 E14FF44 E14FF54 F6FFA7 A13

IF17 D10

9F05-2 F9

9F05-4 F9

FFA8 A14FFA9 A13IF00 H9IF01 F10IF02 D10IF07 C10IF08 D9IF09 C10

18

N

IF18 D9IF19 E9IF20 C13IF21 C13IF29 B14IF32 E7IF33 E7

FF24 F14

IF13 C10

FF00 I2

IF34 F7IF35 F7IF36 E10IF37 E10IF38 F10IF39 F10IFA8 A11IFA9 A10

TEMPERATURE

FOR FACTORY USE ONLY

1

O

P

2F40

10p

100R

3F29

2F42

10p

100R

3F31

2F29

10p

100R

3F21

3F20

100R

2F07

10p

3F18

100R

+2V5M

2F08

10p

100R

3F19

2F06

10p

100R

3F17

9F08

FF17

FF24

+3V3

+3V3M

FF14

2F01

100n

+3V3M

10p

2FA

7

+3V3M

FF23

FF25

9F16

10K

3F14

1

3 2

RES

7F07LD1117DT12

10p

2F41

3F30

100R

9

1516

+3V3

1011121314

2345678

502382-1470

1F53

1

10p

2F28

3F12100R

2F18

100n

100n

2F12

RES9F11

100n

2F23

+2V5M

+3V3

BC847BW7F05

IF36

2F15

100n

RE

S2F

46

10p

10p2F03

9F18

100R

3F01

3FA5

220R

100R

3F09

2F11

4u7

FF06

100R

3F40

2F38

100n

2F24

100n

IF39

100n2F

05R

ES

120R

5F04

3F15

-22

7

330R

27

RE

S

6.3V

47u

2F10

100R

3F16

-2

30R

5F05

9F22

FF15

+3V3

4K7

3F36

567

+3V3M

RES

1F05

1234

6F83 LTST-C190KGKT

+2V5M

IF02

3FA

B

2K2

+2V

5M

FF01

1F29HOOK1

RES3F13 10K

81

2F17

10n

100R

3F16

-1

2F36

100n

9F21

2F14

+3V3

+1V

2M

100n

100n2F

00R

ES

100R1 8 3F00-1

2 7

9F02

IF07

100R3F00-2

36

VSS

3F15

-3

330R

5SC0

8SC1

4LCS1 SD0

7SD12 SDA

3

VDD

6

7F08PCA9540B

3F101K0

RES

9F19

IF38

RES

+3V3

+1V

2M

FF31

1u0

2F21

9F05-1

9F04+3V3M

IF33

9F17

FF54

+3V3M

IF34

2F02

33p

FF20

9F05-2

+2V5

FF21

3F80

150R

RE

S

3F22 100R

9F06

2K2

3FA

A

+3V3

IF35

IFA9

+3V3

3F15

-1

330R

18

9F13

IF37

3F16

-3

100R

36

3F83

+3V3M

470R

2F16

1u0

9FA1

+3V3

FF30

RE

S2F

30

100n

+1V

2M

+3V3

FF16

FF03

FFA9

IF32

RES 4K7

3F38

RES 3F37

4K7

73

3145

820

21 46 74 96 6 28 56 80

8297

55

39IP_L05N|M2|GCLK1

38IP_L05P|RDWR_B|GCLK0

69 IP|VREF

30IP|VREF

1

771007675

IO_L07P|M0

IO_L07P22

48IO_L08N|VS1

47IO_L08P|VS2

50IO_L09N|CCLK

49IO_L09P|VS0

13

89IP_L04N|GCLK9

88IP_L04P|GCLK8

IO_L06P|D2|GCLK2

17IO_L06P|LHCLK6

99IO_L07N|HSWAP

71IO_L07N

44IO_L07N|DIN|D0

IO_L07N23

98IO_L07P

70IO_L07P

43

IO_L05P|RHCLK4

15IO_L05P|LHCLK4

95IO_L06N|VREF

68IO_L06N|RHCLK7

41IO_L06N|D1|GCLK3

18IO_L06N|LHCLK7

94IO_L06P

67IO_L06P|RHCLK6

40

IO_L04N|LHCLK3

62IO_L04P|RHCLK2

35IO_L04P|D4|GCLK14

11IO_L04P|LHCLK2

91IO_L05N|GCLK11

66IO_L05N|RHCLK5

16IO_L05N|LHCLK5

90IO_L05P|GCLK10

65

IO_L03N|D6|GCLK13

10IO_L03N|LHCLK1

85IO_L03P|GCLK6

60IO_L03P|RHCLK0

32IO_L03P|D7|GCLK12

9IO_L03P|LHCLK0

63IO_L04N|RHCLK3

36IO_L04N|D3|GCLK15

12

IO_L02N|MOSI|CSI_B

IO_L02N|VREF5

83IO_L02P|GCLK4

57IO_L02P

26IO_L02P|DOUT|BUSY

IO_L02P4

86IO_L03N|GCLK7

61IO_L03N|RHCLK1

33

IO_L01N3

78IO_L01P

53IO_L01P

24IO_L01P|CSO_B

IO_L01P2

84IO_L02N|GCLK5

58IO_L02N

27

59 64 72

92

34IO|D5 42IO|M1

79IO_L01N

54IO_L01N

25IO_L01N|INIT_B

51

7 81 87 9314 19 29 37 52

ΦSPARTAN-3 FPGA

XC3S100E-4VQG100C7F00

+3V3

+3V3M

2F13

100n

3F07 1K0 RES

IF08

+2V5M

3F82 470R

67

FF08

FFA7 1M59

12345

3 6 3F00-3100R

+3V3M

FF02

IF00

FF00

470R3F85

FF11

220R

+2V

5M

3FA6

3F06

100R

2F22

100n

9F15

+2V5M

IF16

1X02EMC HOLE

IF13

1F50

FF43

+3V3

IF29

9F09

150p

2F26

RES

9

RES9F12

1F03

1234567

8

RE

S

FF13

150R

3F79

FF10

120R

5F02RES

FF04

1K0 RES3F08

+3V3

RE

S2F

09

100n

RE

S

RE

S

10p

2F47

4 5

2F34

100n

100R

3F00-4

IF12

IF19

IF15

100R3F23

+3V3

9F00

+2V5M

2F48

100n

+1V2-PNX85XX

RES

3F39

4K7

9F05-3

IF17

IF18

IF14

100n

2F20

4

2

1

3

5

7F06LD3985M25

FF41

FF44

+3V3M

FF40

4

FFA8

123

RES

1735446-4

1M71

130

120R

5F03

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20052007-12-04

18

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8933TV543 R2 LDIPNX

FPGA Backlight-LVDS & I2C-MUX

A2

9F01

32008-10-10

RES

FF22

5F06

30R

LTST-C190KGKT6F84

IF211

IFA8

2FA

6

10p

3F26

10K

LTST-C190KGKT6F85

100n

2F25

+3V3

+3V3

FF12

RES3F111K0

9F10 RES

IF09

10R

3F03

2F27

150p

4K7

3F02

FF07

9F14

RES

45

RES

100n

2F19

3F16

-4

100R

SML-310

6F13

100n

2F37

100n

2F33

9F03

3F24

470R

+3V3M

100n2F

35R

ES

2FN

D

4p7

FF05

RE

S

9F05-4

+1V2M

FF42

IF01

3F84 470R

+2V

5M

6F82 LTST-C190KGKT

33p

2F04

IF20

+5V3F

27

100K

2F32

100n

100K

3F25

+1V

2M

4u72F

31R

ES

4p7

2FN

E

FF09

RE

S

+2V

5M

9FA2

100n

2F39

3F28

10K

100n

2F49

RES9F20

+3V3M

4

3

100R

3F41

6

5

7

2

1

8

BL-HS

BL-CS

*Φ2M

FLASH

M25P20-VMN7F01

BL-MOSI

BL-MISO

BL-VS

SDA-SET

SCL-SET

BL-CLK

BL-WSBL-SD0BL-OSCLK

SCL-AMBI-3V3

SDA-AMBI-3V3

BL-VS

SCL-BOLT-ONSDA-SET SDA-BOLT-ON

+3V3M

BL-MISOBL-CS

AMBI-VS

BACKLIGHT-CONTROL-FPGA-IN

TXDAT+

TXDAT-

TXCLK+

TXCLK-

SDA-SET0SDA-DISP

SDA-SET1SDA-BOLT-ON

SCL-SET0SCL-SET1

SDA-SET0SDA-SET1SDA-SET

SCL-SET

SCL-SET SCL-DISPSDA-SET SDA-DISPSCL-SET

SCL-SET0SCL-DISP

SCL-SET1SCL-BOLT-ON

DONE

MISO

SCL-SET

SDA-SET

SCL-DISP

SDA-DISP

SCL-BOLT-ON

SDA-BOLT-ON

MOSI

BL-SCK

SCL-SSBSDA-SSB

CSO-BINIT

PROG-B

DONE

CCLK

MOSI MISO

CSO-B

CSO-B

PROG-B

CSO-BMOSIMISOCCLK

BL-CLKBL-MOSI

BL-HS CLK-OUT-PNX5100

CCLK

18310_527_090302.eps090302

Page 113: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 113Q549.2E LA 10.

2009-May-08

SSB: U-Wand

C

G

4

I

2

FFC2 A3FFC3 A3

4

A

FFC5 A3

J

FFHG C3FFHH C3

F

FOR FACTORY

6

1

H

RES U-WAND

2

owne

r.

3

FFHJ C3FFHK C3

FFHL C3IFC0 A2

3

E

C

1F10 B3

3

D

2

IFC1 A3

4

IFC5 A2

C

F

B

6

D

1R20 A3 5FC8 A25FC9 A3

USE ONLY

2

C FFHB B3FFHC B3

E

1

5FC7 A3

J

G

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

FFC4 A3 FFHD B3FFHE B3FFHF C3

1

5

5

I

C

B

H

A

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

A

B

A

B

4

1

5FC5 A35FC6 A2

3

U-WAND

FFHL

FFHB

30R5FC6 2

345

FFHD

1735446-5

1R20

1

FFC4

FFC5

+3V3

FFC2

FFHH

IFC15FC9

30R

FFHJ

FFHF

+12V

FFHG

IFC0

IFC5

5FC5

30R

1314

23456789

1F10

1

101112

FFHC

5-147279-3

FFHK

FFC3

2008-11-21

Maelegheer Ingrid

2008-10-10 3

FFHE

A4

U-WAND

TV543 R2 LDIPNX 8204 000 8933

CHECK DATE

NAME

2

SUPERS.

CLASS_NO

EMANTESNHC

8 2

2007-12-04 ROYAL PHILIPS ELECTRONICS N.V. 2007

130

5FC730R

30R5FC8

TXD-MIPS2

RXD-MIPS2

EJTAG-TCK

EJTAG-TDI

EJTAG-TDO

EJTAG-TMS

EJTAG-TRSTNEJTAG-DETECT

18310_528_090302.eps090302

Personal Notes:

10000_012_090121.eps090121

Page 114: Q549---32pfl9604ser

EN 114Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: Temperature & Fan control

C

SCL

SDA

VSS

LED3

LED2

LED1

LED0

VDD

C

A

7

C

D

2F59 C8

F

2F61 F8

G

B

E

1F02 B12F50 B2

3F58 F33F59 D2

32F51 B2

5

E

C

8 9

6

3F65 B9

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

5 6

2F53 C2

2F55 C2

9

5

1 2

6

64

1

E

13

3 4

3F69 E83F70 E63F71 F8

8

A

B

3F51 E2

1 11

7F53 E4

4

2F52 B2

3F60 A7

2F54 C2

B

2F57 E42F58 B8

2F60 E8

3F50 E3

3F52 E53F53 E3

D

1F01 A1

3F56 E23F57 F2

7F56 F97F57 F69F07 F6

3F61 B73F62 B7

2F56 E4

7

J

3F64 C9

FF53 C3

9

139

3

F

12

8

G

IF51 E3

H

10

2

3F67 D73F68 E8

IF58 E8IF57 E8

IF60 F8

3F72 F83F73 F8

A

7F51 C87F52 D3

IF68 D7IF67 E4

B

I

E

D

7

2

FF52 C3

IF69 D7

owne

r.

IF61 F8

TEMPERATURE- & FAN-CONTROL

11

F

3F55 E5

7F54 D9

7

9F50 B89F51 B9

3F63 C8

FF51 B3

3F66 D7

IF56 F3

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

10

5 8

4

IF64 B9

7F50 B7

IF66 B9

FF50 A3

12

IF50 D2

IF52 E3IF53 E4

1

2

F

IF59 E6

IF62 B8

6F50 B76F51 D2

IF63 B7

IF65 B7

3F54 E4

IF54 E5IF55 F2

7F55 E3

D

C

I

FF50

3

9F52 C9FF49 A2

H

J

A

2F59

100n

100p

2F54

100p

A2 5

GN

D4

OS3

SCL2

SDA1

2F51 7F50

LM75ADP

+VS

8

A0 7

A1 6

9F50

9F07

RE

S

+3V3

6F51

SM

L-31

0

+12V

100R

IF67

3F66

IF54

IF52

IF53

3F71

27K

7F54

PDTA114EU

+12V

7F52BCP53

1

243

IF64

IF57

2F52

1u0

+12V

+3V3

IF65

IF56

24

3

FF49

+3V

3

RES

BCP537F55

1

10K

2008-10-10 3

RE

S3F

70

A3

TEMPERATURE- & FAN-CONTROL

TV543 R2 LDIPNX 8204 000 8933

CHECK DATE

NAME

2

SUPERS.

CLASS_NO

EMANTESNHC

8 3

2007-12-04 ROYAL PHILIPS ELECTRONICS N.V. 2007

2008-11-21

Maelegheer Ingrid 130

10K

3F72

100R

3F54

10K

3F50

+3V3

FF51

IF59

FF521u

0

2F50

123

9F51

1F02

23

6F50 SM

L-31

0

1F01

1

+12V

9F52

3F73

1K0

+3V3

RE

S

IF61

3F59

1K0

RE

S3F

64 1K0

1

2

3

5

6

7

84

Φ

PCA9533

7F51

3F61

100R

27K

3F68

IF66

7F53BC857BW

FF53

3F67

100R

10u2F

571

2

IF50

22K

3F55

1u0

3F58

+12V

2F53

RES

100R10

K

3F5210R

3F51

IF51

IF58

IF55

IF60

3F69

10K

3F53

100R

1u0

2F55

7F57

PDTC114EU

RE

S

1K0

3F63

100n

2F58

2F60

100n

3F65 1K

0RE

S

+12V

+12V

100n

2F61

10R

3F56

IF68

IF62

IF69

3F62

100R

IF63

1K0

3F60

2F56

1u0

RES

3F57

10R

RES

PDTA114EU

7F56

TACHO2

FAN2-DRV

TACHO2-INVFAN-CTRL-1

TACHO2

FAN2-DRV

TACHO1TACHO1-INV

FAN1-OUT

FAN1-DRV

SDA-SET

SCL-SET

SDA-SET

SCL-SET

FAN1-OUT

TACHO1-INV

TACHO2-INV

FAN1-DRVTACHO1

18310_529_090303.eps090303

Page 115: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 115Q549.2E LA 10.

2009-May-08

SSB: FPGA WOW - LVDS In/Out

C

D

E

F

A

3FE3 F5

5

2F69 B62F70 C6

11

3FF6-1 B5

1 2 3

H

91 2

C

9

10

C

3FFA-2 E5

2F71 C62F72 C62F73 D62F74 D6

I

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

B

6

7

4

2F63 A62F64 A6

C

D

E

F

2F65 A62F66 B62F67 B62F68 B6

2FN8 F82FN9 B82FNA B8

2F62 A6

3FG4 B2

3FE6 F53FF4-1 A53FF4-2 A53FF4-3 A5

3 4 5

F

7 8

B

TO DISPLAY

8

owne

r.

4 5

3FH4 A8

7 8 9

A

E

6

3FF9-2 D53FF9-3 D53FF9-4 D5

8

9FG4-3 C2

3FFA-3 E53FFA-4 E53FFB B53FFC-1 F5

2F75 D62F76 E6

11

C

10

D

B

FFL3 A8

2F77 E62F78 E62F79 E62F80 F6

1F51 B9

2F82 F6

J

12

2F85 C6

3FFW E53FG1 A23FG2 A2

3FE0 E5

9FG6-3 E2

3FG5 C23FG6 C23FG8 D23FG9 D2

3FF4-4 A53FF5 A5

6

9

3

J

7

D

2

H

3FF6-2 B53FF6-3 B53FF6-4 B53FF7-1 C5

B

3FF7-3 C5

3FF9-1 E5

9FG3-3 B29FG3-4 B29FG4-1 C2

3FFA-1 F5

9FGB-4 D3

9FG4-4 C29FG5-1 E29FG5-2 D29FG5-3 D2

3FFC-2 F53FFC-3 F5

3

A No FPGA

13

13

G

9FG6-2 E2

2

E

5

3FFC-4 F5

2F81 F6

3FFH C5

2F83 F62F84 F6

3FFT D5

9FG8-1 A39FG8-2 A29FG8-3 A3

3FG3 B2

9FG6-4 E29FG7-1 F29FG7-2 F29FG7-3 F2

3FGA E23FGB F2

1

With FPGAFPGA WOW - LVDS IN/OUT

9FGA-3 C3

I

F

12

9FG9-4 B2

3FH5 B85FG1 E8

5FG2 E89FG2-1 A2

3FF7-2 C5

9FG2-3 A2

3FF7-4 C53FF8 A5

9FG3-2 B2

9FGC-3 E2

9FG2-4 A29FG3-1 B2

9FGB-3 D2

9FG2-2 A2

9FGB-1 E29FGB-2 D3

3FGC F23FGE E2

9FG5-4 D2

9FGC-4 E39FGD-1 F29FGD-2 F3

6

9FGD-4 F3FFL2 E8

9FG6-1 F2

With FPGA A

1 8

9FGD-3 F2

9FGC-1 F29FGC-2 E3

9FG4-2 C2

3FFE B5

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

3FFL C53FFP D5

9FG7-4 F2

FFL4 B8

1

G

4

9FGA-1 C39FGA-2 C2

9FGA-4 C2

9FG8-4 A29FG9-1 B39FG9-2 B29FG9-3 B3

180R

3FF7-1

3FG

5

100R

3FG

4

100R

150R

3FF8

3 6

150R

3FE

3

3FF9-3

180R

RES

+VDISP

2F82 4p7

4p72F81RES

3FFC-3

180R3 6

180R

3FFC-44 5

1 8

3FF9-1

180R

RES

4p72F77RES

2F78 4p7

FFL3

FFL4

3FF4-33 6

3FF4-4

180R4 5

180R

RES4p72F73

2F74 4p7RES

3 69FG6-3

4p72F84RES

RES

2 7

2F83 4p7

4 5

180R

3FFC-2

180R

3FF9-4

4p72F80RES

2F79 4p7RES

100R

3FG

9

100R

3FG

E

4p72F76RES

RES2F75 4p7

150R

3FE

6

RES

RES

4p72F85

8

2F72 4p7

7

3FFC-1

180R1

3 6

9FG5-22

4 5

9FG5-3

8

9FG5-4

3 6

9FGC-11

9FG8-3

9FG6-44 5

5FG

1

30R

RE

S

150R

3FFW

180R

3FFA-33 6

3FFA-4

180R4 5

9FGC-33 6

9FG9-44 5

42

51

4344 4546 4748 4950

3839

4

4041

56789

2829

3

3031323334353637

1819

2

2021222324252627

RES

1

1011121314151617

1F51

FI-RE41S-HF

4 5

FFL2

180R

3FF6-49FG9-11 8

9FGB-22 7

3FH4

100R

150R

3FFE

RES

3FFA-11 8

3FFA-2

180R2 7

180R

9FG4-11 8

9FG2-22 7

3FFH

150R

3 6

4 5

180R

3FF7-3

3FF7-4

180R

9FG5-11 8

3FE

0

150R

7

9FG6-11 8

9FG6-22

100R

3FG

33F

G2

100R

9FG3-11 8

2 7180R

3FF9-2

150R

3FFP

7

100R

3FG

C

3FF7-2

180R2

1 8

9FG9-33 6

9FGB-1

9FGD-11 8

9FGD-22 7

9FGD-33 6

RES

RES

2F71 4p7

4p72F70

7

1 8

9FG8-22

4 5

9FG8-1

9FG7-4

2 7

3 6

180R

3FF6-2

7

3FF6-3

180R

3FF4-2

180R2

150R

3FFT

2FN

9R

ES

2FN

A

10p

RE

S

10p

8

RES100R

3FH5

3FF6-1

180R1

59FGC-4

4

9FGC-22 7

1 8

9FGA-22 7

9FGA-1

2 7

9FG3-33 6

9FG3-2

4p72F69RES

RES2F68 4p7

150R

3FFL

1 8180R

3FF4-1

4 5

4 5

9FG8-4

1 8

9FG4-4

9FG2-1

9FG9-22 7

9FG3-44 5

4 59FGA-4

100R

3FG

A3F

GB

100R

RES

4p72F66RES

2F67 4p7

9FGA-33 6

RES

4p72F62RES

2F63 4p7

130

ROYAL PHILIPS ELECTRONICS N.V. 20072007-12-04

48

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8933TV543 R2 LDIPNX

FPGA WOW - LVDS IN/OUT

A3

32008-10-10

Maelegheer Ingrid

2008-11-21

3FF5

150R

4p72F65RES

RES2F64 4p7

3FG

6

100R

150R

3FFB

9FGD-44 5

9FGB-33 6

9FGB-44 5

9FG2-33 6

2 7

9FG4-33 6

9FG4-2

3FG

8

100R

9FG7-11 8

9FG7-22 7

9FG7-33 6

59FG2-4

4

100n

2FN

8R

ES

30R

5FG

2R

ES

3FG

1

100R

RX51002D+

RX51002E-

RX51002E+

RX51002B+

RX51002C-

RX51002C+

RX51002CLK-

RX51002CLK+

RX51002D-

RX51001E+

RX51001A-

RX51001A+

RX51002A-

RX51002A+

RX51002B-

RX51001C+

RX51001CLK-

RX51001CLK+

RX51001D-

RX51001D+

RX51001E-

RX51002D+

RX51002E-

RX51002E+

RX51001B-

RX51001B+

RX51001C-

RX51002B-

RX51002B+

RX51002C-

RX51002C+

RX51002CLK-

RX51002CLK+

RX51002D-

RX51001D-

RX51001D+

RX51001E-

RX51001E+

RX51002A-

RX51002A+

RX51001A+

RX51001B-

RX51001B+

RX51001C-

RX51001C+

RX51001CLK-

RX51001CLK+

RX51001A-

RX51002D+RX51002D-RX51002CLK+RX51002CLK-

SDA-DISP

SCL-DISP

RX51002C+RX51002C-

RX51002B+RX51002B-RX51002A+RX51002A-

RX51001E+RX51001E-RX51001D+RX51001D-RX51001CLK+RX51001CLK-

RX51001C+RX51001C-

RX51001B+

RX51002E+

RX51001B-RX51001A+RX51001A-

RX51002E-

TXF2C+

TXF2CLK+

TXF2CLK-

TXF2D-

TXF2D+

TXF1CLK-

TXF2E+

TXF2E-

TXF1E+

TXF2A-

TXF2A+

TXF2B-

TXF2B+

TXF2C-

TXF1A-

TXF1A+

TXF1B-

TXF1B+

TXF1C-

TXF1C+

TXF1CLK+

TXF1D-

TXF1D+

TXF1E-

TX852CLK-

TX852CLK+

TX852D-

TX852D+

TX852E-

TX852E+

TX852A-

TX852A+

TX852B-

TX852B+

TX852C-

TX852C+

TX851CLK-

TX851CLK+

TX851D-

TX851D+

TX851E-

TX851E+

TX851A-

TX851A+

TX851B-

TX851B+

TX851C-

TX851C+

18310_530_090303.eps090303

Page 116: Q549---32pfl9604ser

EN 116Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: FPGA WOW - Power & Control

C

D

C

S

W

HOLD

VSS

Q

VCC

6FH3 I3

6FH0 I2

15

FOR DEBUG

L

D

6FH6 I3

6FH1 I26FH2 I2

H

98

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

2FHW D32FHZ D32FJ0 D3

4

6FH7 I3

105

C

2

2012

2FJ1 D22FJ2 D22FJ3 F11

17

2FJ4 F11

18

FFH6 E10

FOR

16

P

O

N

16

1715

E

B

10

2FH9 E3

DEBUG

6

11

8

2FHA A32FHB C32FHC B32FHD B4

6FH8 B12

19

137

J

4

A

113 7

19

H

FPGA WOW - POWER & CONTROL

O

2FH1 B5

8

2FH3 A3

9

6 7 8

2FJ5 F112FJ6 F11

B

FFH7 E10FFH8 E10FFH9 E10

D

FFHM B9

6

FFHP B9FFHR C9FFHS C9

IFH4 A7

5FH4 E2

P

13

1

5

21110197543

2FHE B42FHF B4

7FH0 B87FH2 C129FH0 D11

CFH1 D6

FFH1 B3FFH2 B3FFH3 C3

G

FFH5 E10

A

I

6

F

G

2FH8 E3

I

1F00 E122FH0 B5

M

2FH2 A3

2FH4 A32FH5 A42FH6 E2

2 9

2FJ8 C22FJ7 D12

H3FHB-4 E103FHG C9

FFHA E3

3FHK C12

FFHN B9

3FHM B125FH0 A25FH1 B2

FFHT C11

5FH3 D2

N

F

14

K

18

owne

r.

B

F

3FH2 H23FH3 H33FH6 H33FH7 H33FH8 D93FH9-1 D9

2FJA C3

CFH0 B2

2FHP C3

FFH0 A3

3FH9-2 D93FH9-3 E93FHB-1 E10

FFH4 D3

3FHB-3 E10

I

E

2FHJ B5

2FH7 E2

13

14

J

K

1

20

10 11

D

E

F

2FHG B4

H

3FHJ C12

2FJJ B82FJK B72FJP B33FH0 H23FH1 H2

1

2FHS C3

5FH2 C2

G

C

L

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

G

3

2

E

2FHL B22FHM B22FHN C2

2FHR C3

13

2FHT B32FHV C3

5431

2FHH B4

3FHL B11

2FHK B5

3FHB-2 E10

C

D

A

B

12

IM

2

2FJ9 C2

12

2FJB C32FJC C32FJD F12

A

C

100p

2FJ3

CFH1

+2V5

RE

S

5FH3

30R

10K

+1V8-PNX85XX

2FJ1

3FH

L

100n

2FH

K

10n

+2V5

+2V52F

HW

100n

3FH

9-1

1K0

2FJB

100n

FFH8

30R

5FH2

1K0

3FH

9-3

2FH

T

330u

6.3V

RE

S

5FH

0

30R

FFH42F

H2

100n

100n

2FJA

3FHB-4100R

4 5

FFH1

2FJP

4u7

+2V5

30R

5FH1

100R

3FHB-22 7

9FH

0R

ES

+1V8-PNX5100

3FHK

100K

2FH

3

100n

2FH

J

10n FFHP

+2V5in-FPGA

10n

2FH

1

23456789

5-147279-2

1F00

1

10

3FH

2

470R

FFHR47

0R

3FH

1

+3V3

FFH7

100n

2FH

7

FFH2

+2V5

100R

3FHB-11 8

470R

3FH

3

RE

S2FJ4 10

0p

LTS

T-C

190K

GK

T

6FH

2

1K0

3FH

M

100n

2FH

F

10n

2FH

4

4u7

FFHN

+3V3-FPGA

2FH

N

+1V2-FPGA

3FH

0

470R

2FH

L

100u

4V

3 63FHB-3

100R

100n

2FH

R

2FJ6 10

n

FFH6

RE

S

FFH9

2FH

0

10n

6FH

3

LTS

T-C

190K

GK

T

+1V2-PNX85XX

RE

S10

0p

2FJD

100n

2FJK

FFHT

6FH

8

SM

L-31

0

+2V5in-FPGA

+3V3

BC847BW7FH2

2FH

E

10n

47R

3FHG

130

+2V5out-FPGA

ROYAL PHILIPS ELECTRONICS N.V. 20072007-12-04

58

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8933TV543 R2 LDIPNX

FPGA WOW - POWER & CONTROL

A2

32008-10-10

Maelegheer Ingrid

2008-11-21

FFHM

2FJ0

100n

100n2F

JJ

10n

RE

S

2FH

G

2FH

5

100n

100n

2FH

V

RE

S

100n

2FJC

2FJ7 10

n

4u7

2FH

A

5

7

2

1

8

4

3

M25P167FH0

16MΦ

FLASH 6

100n

2FH

B

FFHA+2V5

+3V3IFH4

2FJ8

4u7

2FJ9

100n

2FH

P

100n

FFHS

+1V2-PLL

2FH

6

100n

100n

2FH

S

100p

2FJ5

6FH

7

LTS

T-C

190K

GK

T

RE

S

470R

3FH

7

RE

S3FH

J

100K

2FH

D

10n

+2V5-PLL

+2V5

100n

2FH

9

2FH

8

100n

1K0

3FH

9-4

3FH

6

470R

100n

2FH

Z

3FH

8

1K0

RE

S

FFH5

10n

2FH

C

+2V5

2FH

M

4u7

CFH0

10n

2FH

H

FFH0

LTS

T-C

190K

GK

T

6FH

6

LTS

T-C

190K

GK

T

6FH

0

6FH

1

LTS

T-C

190K

GK

T4u

7

2FJ2

FFH3

30R

5FH4

nCSO

ASDO

DATA0

CON26

CON27

DCLK

CON23

CONF-DONE

CON20

CON21

CON22

TCK

TDI

TDO

TMS

18310_531_090303.eps090303

Page 117: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 117Q549.2E LA 10.

2009-May-08

SSB: FPGA WOW - DDR

14

9

VSSQVSS

13

4

BA

CS

5

2

CASWE

15

RAS

0

CKE

6

12

8

10

VDDQ

D

A

DQSLU

VDD

710

NC

1011

AP3

789

11

456

123

CLK

DMUL

VREF

10

CLK

C

3FLA C4

2FLL C8

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

9

B

3FLF C4

4

3FLH D4

2FLB B8

10

3FL4 C4

5FL0 C75FL1 C77FL0 B2

8

2FLF D7

C

H

2FLN C9

3FLN B9

2

3FL0 B43FL1 B43FL2 C4

FFL1 B7

2FLD C62FLE C6

2FLR B4

B

9

3FLB C43FLC C43FLD C4

3FL6 C4

13

3FLJ D13FLK B63FLL B6

1

2FLS B4

I

3FLG D4

7

FFL0 B8

J

4

3FL8 C43FL9 C4

3FL3 C4

E

3FL5 C4

3FL7 C4

7

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

9

2FLH C72FLJ C8

10

6

IFL1 C7

8

3FLM B9

FPGA WOW - DDR

A

5

F

3

3FLE C4

2FL4 B4

D

E

A

1 2

G

C

2FLC B8

G

2 6 11

2FLK C8

A

2FLM C8

2FLP A1

2FLA B8

1

B

8

I

7

2FL6 C1

D

H

11

C

D

2FL0 A1

owne

r.

2FL5 B5

9

2FL7 B6

31

A

5

4 5

3

126

F

6

E

2

3

4

C

D

E

12

7

5

2FL1 A12FL2 B32FL3 B4

J

8

B

13

2FL9 B6

IFL1

RE

S

6.3V

330u

2FLD

100n

2FLS

100n

2FLM

100n

2FLE

100n

2FLF

+2V5-DDR1+2V5

3FL6 22R22R3FL5

220R

3FLJ

22R3FLH

+2V5-DDR1

FFL0

560R

3FLM

3FLN

560R

22R3FLA3FL9 22R

22R3FL822R3FL7

2FLL

100n

120R

RES 120R

5FL1

5FL0

NAME

DATECHECK

8204 000 8933TV543 R2 LDIPNX

FPGA WOW - DDR

A3130

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20072007-12-04

68

SETNAMECHN

CLASS_NO

SUPERS.

2

16V

22u2F

LH

2FLR

100n

3FL0 22R

58 64

21

49

34 48 66 6 12 52

1 18 33 3 9 15 55 61

2543505342

23

47

51

545620

16

141719

6365

578

101113

4546

24

24

57596062

37383940

2627

22

44

2930

2841

31323536

SDRAM8Mx16

ΦDDR

EDD1216AJTA-5B-E

7FL0

2FL9

1u0

3FLF 22R22R3FLE

3FLD 22R3FLC3FLB 22R

22R

2FL5

10u

100n

2FL4

FFL1VREF-DDR1

2FLN

100n

3FL2 22R22R3FL1

560R

3FLL

VREF-DDR1

2FL7

100p

2FLJ

100n

2FL1

100n

100n

2FL0

2FLC

1u0

100p

2FLA

2FL3

100n

100n

2FL2

+2V5-DDR1

VREF-FPGA1

100n

2FLB

2FL6100n

22R3FLG

+2V5-DDR1

100n

2FLP

22R3FL422R3FL3

100n

2FLK

3FLK

560R

DQ1(15)

MM1-A12

+2V5-DDR1

DQ1(8)DQ1(9)

DQ1(10)DQ1(11)DQ1(12)DQ1(13)DQ1(14)

DQ1(0)DQ1(1)DQ1(2)DQ1(3)DQ1(4)DQ1(5)DQ1(6)DQ1(7)

DQ1(9)DQ1(10)DQ1(11)DQ1(12)DQ1(13)DQ1(14)DQ1(15)

DQS11

DQ1(3)DQ1(4)DQ1(5)DQ1(6)DQ1(7)DQ1(8)

MM1-D14MM1-D15

MM1-DQS1MM1-DQS0DQS10

MM1-D9MM1-D10MM1-D11MM1-D12MM1-D13

MM1-D3MM1-D4MM1-D5MM1-D6MM1-D7MM1-D8

MM1-RAS

DQS11

MM1-WE

MM1-D0MM1-D1MM1-D2

MM1-CKE

MM1-CLK-

MM1-CS0

DQ1(0)DQ1(1)DQ1(2)

DQS10

MM1-A5MM1-A6MM1-A7MM1-A8MM1-A9

MM1-BA0MM1-BA1

MM1-CAS

MM1-CLK+

MM1-A0MM1-A1

MM1-A10MM1-A11

MM1-A2MM1-A3MM1-A4

18310_532_090303.eps090303

Page 118: Q549---32pfl9604ser

EN 118Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: FPGA WOW - I/O Banks

C

VCCD_PLL2 VCCA2

CONF_DONE

MSEL0MSEL1MSEL2MSEL3

GNDA2

VCCD_PLL1 VCCA1

GNDA1

VCCINT

VCCINT

VCCINT

VCCINT

VCCINT

VCCIO6

VCCIO1

VCCIO8

VCCIO5

VCCIO2

VCCIO4

VCCIO7

VCCIO3

VCCD_PLL3

GNDA3

CECONFIGDCLKSTATUSTCKTDITDOTMS

VCCA3

GND

GND

GND

GNDGND

GND

GND

GND

VCCD_PLL4 VCCA4

GNDA4

9FND C9FF18 A1FF19 B1

FF48 B1IFN0 A2

P

19

IFN4 B9

IFN5 B9IFN6 B11IFN7 B11

IFN8 B137FN0-5 C17FN0-6 C57FN0-7 C10

7FN0-8 C137FN0-9 E49FN0 D4

IFNB B15IFNC D13IFND E11

IFNF D7IFNG D5IFNH D3

IFNJ D3IFNK D4IFNL D4

IFNM D5

I

5

FPGA WOW - IO-BANKS

L

155

IFNN D59FN8 D59FN9 D7

9FNA D79FNB D79FNC E7

3F74-3 B23F74-4 B53FN1 A1

3FN2 B13FN3 B13FNF E7 IFN1 A4

IFN2 B8IFN3 B8

1411

O

H

6

10

B

7

A

O

13

K

IFN9 B13IFNA B15

7FN0-2 A67FN0-3 A107FN0-4 A13

C

D

E

F

G

H

9FN1 D49FN4 E49FN6 E4

E

3

N

118

E

H

7

owne

r.

M

K

9FN7 E4

12

3F74-2 B4

6 7 8 9 10 11

3FNG E77FN0-1 A37FN0-10 F11

B

91

1

13 19

G

184

M

14 15

A

B

8 9 10 11 12 13

A

B

C

L

20

C

3

F

C

144

2 3 4 5

2FN0 D92FN1 D9

2FN2 D92FN3 D92FN5 D12

2FN6 D13

12 13

17

9 18

F

16A

ll rig

hts

rese

rved

. Rep

rodu

ctio

n in

who

le o

r in

parts

15 20

1

D

4 5 6 7

JJ

I

14

12

2 17

N

D

62

G

A

P

D

15

1

F

G

H

2F43 E7

6

+1V2-FPGA

E

2FN7 D13

8

10

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

2 3

16

3F74-347R3

3FNF100R

IFNB

TV543 R2 LDIPNX 8204 000 8933

CHECK DATE

NAME

2

SUPERS.

CLASS_NO

EMANTESNHC

8 7

2007-12-06 ROYAL PHILIPS ELECTRONICS N.V. 2007

2008-11-21

Maelegheer Ingrid

2008-10-10 3

130 A2

FPGA WOW - IO-BANKS

+2V5-PLL

9FN

6

+1V2-PLL

IFNK

+2V5-DDR1

VREF-FPGA1

IFNG

+2V5-PLL

+1V2-FPGA

+3V3-FPGA

+1V2-FPGA

+1V2-FPGA

3FNG100R

+3V3-FPGA

IFND

IFNA

+3V3-FPGA

IFNF

1n0

+1V2-FPGA

+1V2-FPGA

2FN

0

9FN

7

3FN2

10K

VREF-FPGA1

9FN8

2FN

5

1n0

IFN3

+2V5out-FPGA+2V5out-FPGA

VREF-FPGA1

+2V5in-FPGA

IFN4

1n0

2FN

6

+1V2-FPGA

+1V2-FPGA

IFN2

+1V2-FPGA

IFNN

IFN0

+2V5in-FPGA

FF19

+2V5in-FPGA

9FNC

+2V5-DDR1

RES

IFNC

K13J18J17J14

F14

E15

+2V5in-FPGA

IO_G18|R27N|INIT_DONE G18

IO_H13|R8P|RDY H13

IO_H14|R8N|AVD_ H14

IO_H15|VREFB6N1H15

IO_H16|R23N H16

IO_H17|R28P H17IO_H18|VREFB6N2H18

IO_J13|VREFB6N3J13

IO_C17|R5P|PADD21 C17

IO_C18|R5N|PADD22 C18

IO_D17|R12P|OE_ D17

IO_D18|R12N|WE_ D18

IO_E17|R24P|CLKUSR E17

IO_E18|R24N|CEO_ E18

IO_G14|R7N|PADD23 G14

IO_G17|R27P|CRC_ERROR G17

CLK4|CLK_2PF17

CLK5|CLK_2NF18

K14

F15

IO_B17|VREFB6N0B17

IO_B18|R4N|PADD20 B18

7FN0-6EP3C40F324C7N

BANK6

V5IO_V5|B18N

V6IO_V6|B24N

V7IO_V7|B26N

V8IO_V8|B27N

+2V5in-FPGA

IO_U5|B18P

U6IO_U6|B24P

U7IO_U7|B26P

U8IO_U8|B27PV1 IO_V1|B1N

V2IO_V2|PLL1_CLKOUTNV3 IO_V3|B16N

V4 IO_V4|B17N

IO_R8|B21P

T4 IO_T4|VREFB3N3

T6 IO_T6|VREFB3N2

T8IO_T8|B21N

U1 IO_U1|B1P

U2IO_U2|PLL1_CLKOUTPU3 IO_U3|B16P

U4 IO_U4|B17P

U5

V9 CLK14|CLK_6N

U9 CLK15|CLK_6P

P6 IO_P6|B6P

P7 IO_P7|VREFB3N1

P8 IO_P8|VREFB3N0 P9IO_P9|B23N

R8

BANK3

EP3C40F324C7N7FN0-3

VREF-FPGA1

+1V2-FPGA

9FNDRES

VREF-FPGA1

3FN3 10K

+3V3-FPGA

VREF-FPGA1

IO_T1|RDN1 T1IO_T2|RUP1 T2

IO_T3|L52P T3

N5

P4

IO_M5 M5

IO_P1|L44N P1IO_P2|L44P P2

IO_R1|VREFB2N2R1

IO_R2|L45P R2

IO_R3|L52N R3

IO_R4 R4

IO_R5|VREFB2N3R5

IO_L2|L32PL2

IO_L3|L33N L3IO_L4|L33P L4

IO_L5|L28NL5

IO_L6|VREFB2N0L6 IO_M1|L34N M1IO_M2|L34P M2

IO_M3|VREFB2N1M3

CLK2|CLK_1PN2

CLK3|CLK_1NN1

P5

IO_K1|L26NK1 IO_K2|L26PK2

IO_K5|L28PK5

IO_L1|L32N L1

7FN0-2EP3C40F324C7N

BANK2

FF48

+2V5-PLL

RES9FNB

IO_D12|VREFB7N1D12

IO_D14|PLL2_CLKOUTP D14

IO_D16|T49P D16IO_E11|VREFB7N3E11 IO_E12|T45P|PADD0 E12

IO_E13|RDN4 E13IO_E14|RUP4 E14

IO_B14|T36P|PADD6 B14

IO_B15|T37P|PADD4 B15

IO_B16|T41P|PADD2 B16

IO_C10|T27N|PADD13C10

IO_C12|VREFB7N2C12

IO_C14|PLL2_CLKOUTN C14

IO_C16|T49N C16IO_D10|T27P|PADD14D10

A14

IO_A15|T38N|PADD3 A15

IO_A16|T41N|PADD1 A16IO_A17|VREFB7N0A17

IO_A18|T48P A18

IO_B11|T29P|PADD12B11

IO_B12|T31P|PADD10B12

IO_B13|T35P|PADD8B13

CLK8|CLK_5NA10

CLK9|CLK_5PB10

IO_A11|T29N|PADD11A11

IO_A12|T31N|PADD9A12

IO_A13|T35N|PADD7A13

IO_A14|T36N|PADD5

7FN0-7EP3C40F324C7N

BANK7

+1V2-FPGA

E6 IO_E6|VREFB8N3

E7 IO_E7|T5N|DATA9

E8 IO_E8|T8P|DATA6

E9 IO_E9|VREFB8N0

IFNJ

B8IO_B8|T20P|DATA3

C5IO_C5|T11P|DATA5

C7 IO_C7|VREFB8N1

C9IO_C9|T24N|PADD16

D5 IO_D5|T3P|DATA12

D7 IO_D7|VREFB8N2

D9IO_D9|T24P|PADD17

E10IO_E10|T25P|PADD15

A6IO_A6|T18N|PADD19

A7IO_A7|T19N|PADD18

A8IO_A8|T20N|DATA2

B3 IO_B3|T4P|DATA11

B4 IO_B4|T6P|DATA8

B5IO_B5|T16P|DATA13

B6IO_B6|T18P|DATA15

B7IO_B7|T19P|DATA4

A9 CLK10|CLK_4N

B9 CLK11|CLK_4P

A1IO_A1|PLL3_CLKOUTN

A2IO_A2|PLL3_CLKOUTP

A3 IO_A3|T4N|DATA10

A4 IO_A4|T7N|DATA7

A5IO_A5|T16N|DATA14

7FN0-8EP3C40F324C7N

BANK8

V15IO_V15|B35N

V16IO_V16|B44N

V17IO_V17|B47N

V18IO_V18|PLL4_CLKOUTN

U15IO_U15|B35P

U16 IO_U16|VREFB4N1

U17IO_U17|B47P

U18IO_U18|PLL4_CLKOUTP

V11 IO_V11|B28N

V12 IO_V12|VREFB4N3

V13 IO_V13|B32N

V14IO_V14|B34N

R13IO_R13|B48N

T11 IO_T11|VREFB4N2

T13IO_T13|RUP2 T14IO_T14|RDN2

U11 IO_U11|B28P

U12 IO_U12|B29PU13 IO_U13|B32P

U14IO_U14|B34P

V10 CLK12|CLK_7N

U10 CLK13|CLK_7P

P10 IO_P10|B33PP11 IO_P11|B33N

P12IO_P12

P13 IO_P13|VREFB4N0 R11IO_R11|B36N

BANK4

EP3C40F324C7N7FN0-4

+3V3-FPGA

+1V2-FPGA

VREF-FPGA1

IFN8

+1V2-FPGA

RES9FN9

VREF-FPGA1

+3V3-FPGA

2FN

1

+2V5out-FPGA

+1V2-FPGA

+2V5-DDR1

1n0

+1V2-PLL

IFN1

IFN7

+1V2-FPGA

1n0

2FN

3

+1V2-FPGA

9FNAIFNM

+2V5out-FPGA

+1V2-PLL

RES

3FN1 1K0

+1V2-FPGA

9FN

0R

ES

+1V2-FPGA

9FN

4

+3V3-FPGA

FF18

+2V5out-FPGA

3F74-2

47R2 7

IFN6

+1V2-FPGA

+3V3-FPGA

IFNL

+3V3-FPGA

IFN5

IFN9

+1V2-FPGA

2FN

7

1n0

+1V2-FPGA

IFNH

G5J1J6J5J2

E4

F5

IO_E2|L10P|FLASH_CE_|CSO_ E2

IO_F3|VREFB1N1F3

IO_G1|L20N G1IO_G2|L20P G2

IO_H1|VREFB1N3H1

IO_H2 H2

IO_H3|DATA0 H3

IO_H6|VREFB1N2H6

IO_B2|L1P B2

IO_C1|L3N C1

IO_C2|VREFB1N0C2

IO_C3|L4P|RESET_ C3

IO_D1|L8N|DATA1|ASDO D1IO_D2|L8P D2IO_D3|L7P D3

IO_E1|L10N E1

K6

CLK0|CLK_0PF2

CLK1|CLK_0NF1

H5H4

E5

IO_B1|L1N B1

+1V2-FPGA

7FN0-1EP3C40F324C7N

BANK1

47R4 5

D8

+1V2-FPGA

3F74-4

K15M15R15

F16G15J15

D11D13D15

D4D6

J4

K4M4N4

R6R7R9

R10R12R14

N7N9

F6F8G10G11G12G13G7

F4G4

L12L7M11

F12

M12M6M7M8M9N11N13

F10

G8H12H7J12J7K12K7

7FN0-9EP3C40F324C7N

VCC

2F43

1n0

+1V2-FPGA

9FN

1

+2V5out-FPGA

+2V5-PLL

1n0

+1V2-FPGA

+2V5-DDR1

+2V5in-FPGA

2FN

2

IO_R16|RDN3

IO_R17|VREFB5N2R17

IO_R18|VREFB5N3R18

IO_T16|RUP3 T16

IO_T17|R54N T17

IO_T18 T18

N14

P15

IO_L18|VREFB5N0IO_M14|R38N M14

IO_M17|R33N M17

IO_M18|R32N|DEV_OEM18

IO_N15|R55P N15

IO_N16|VREFB5N1N16

IO_P17|R42P P17

IO_P18|R42N P18

R16

P14

IO_K17|R29PK17

IO_K18|R29NK18

IO_L13|R38P L13

IO_L14|R36P L14

IO_L15|R36N L15

IO_L16|R33P L16

IO_L17|R32P|DEV_CLR_L17

L18

BANK5

CLK6|CLK_3PN17

CLK7|CLK_3NN18

+1V2-FPGA

7FN0-5EP3C40F324C7N

+1V2-FPGA

+1V2-FPGA

+1V2-PLL

T9

C13

T10T12T15

C15E3E16F7

M16

C11

N3N6N8

N10N12

P3P16

T5T7

K9C8K10K11K16

L8L9

L10L11M10M13

C6

H11J3J8J9J10J11J16

K3K8

C4

F9F11F13G3G6G9G16H8H9H10

7FN0-10EP3C40F324C7N

GND

ASDOnCSO

nSTATUS

MSEL2MSEL1

MSEL3

+2V5-DDR1+2V5-DDR1

TX851CLK-

TX851CLK+

CLK-OUT2-PNX5100CLK-OUT-PNX5100

TX851B+TX851B- MM1-A2

MM1-A4

TX851D-TX851B+

TX851C+

TX851A-TX851A+

TX851D+

TX851E-TX851E+

TX851C-

nCONFIGnCE

MSEL0

CLK-OUT2-PNX5100

SCL-AMBI-3V3

SDA-AMBI-3V3

BACKLIGHT-OUTBACKLIGHT-CONTROL-FPGA-IN

SDA-SSBSCL-SSB

DCLK

TMS

nCEnCONFIG

nSTATUSTCKTDITDO

MM1-A6

MM1-D15

MM1-D11

MM1-A5

MM1-D9

MM1-D14MM1-A8 MM1-DQS0

MM1-D10

MM1-D12

MM1-D13

MM1-A12

MM1-A11

MM1-A9

MM1-A7

MM1-BA1MM1-BA0

MM1-CLK-MM1-CLK+

MM1-CKE

MM1-D8

MM1-DQS1

MM1-D4

MM1-RAS

MM1-D6

MM1-A3MM1-WE

MM1-A1

MM1-D0

MM1-D5

MM1-CAS

MM1-D7

MM1-A0

MM1-A10

MM1-D2

CON23

CON22

CON21CON20MM1-D1

MM1-CS0

MM1-D3

TX852D-

TX852C-

TX852B-

TX852A-

CONF-DONE

BACKLIGHT-OUT2

CON27

CON26

TX852E+

TX852D+

TX852C+

TX852B+

TX852A+

TX852E-

TXF2B-

TXF2C-

TXF2CLK-

TXF2D-

TXF2E-

TX852CLK-

TX852CLK+

TXF2A+

TXF2B+

TXF2C+

TXF2CLK+

TXF2D+

TXF2E+

TXF2A-

TXF1CLK-TXF1CLK+

TXF1D-TXF1D+

TXF1E-TXF1E+

DATA0

TXF1A-TXF1A+

TXF1B-

TXF1B+

TXF1C-TXF1C+

18310_533_090303.eps090303

Page 119: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 119Q549.2E LA 10.

2009-May-08

SSB: CI: PCMCIA Connector

G3

12

3EN23EN1

+T

C

G3

12

3EN23EN1

2

F

3P09 A2ow

ner.

E

C

7

1P00-A B1

C

3P85-2 E8

A

3

7

3P13-3 A63P24 D6

D

8

1 9

D B

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

4

B

12P16 C8 3P27-4 E6

RESERVED

H E

104

3

3P11 C7

11

1P00-B B5

5

3P27-3 E6IP04 A6

C

9

3P10-2 A6 3P80-4 B9

2

3P82-1 D9

A

5

5

2P15 A8

2

I

F

I

3P10-4 A6

C

A

3P12 A6

1

F

8

D

3P10-1 A6

8

3P85-1 E8

J

3P13-1 A6

3P87 E8

3P20 D2 7P15 A8

6

3P26-1 E6

3P26-2 E6IP01 A6

J

IP18 D2

6

9

CABLE CARD INTERFACE

6

13

I

124

H

10

3

2

3P27-2 E6IP03 A6

3P80-1 B93P80-2 B9

10

3P81 B9

H

4

3P82-3 D9

3P82-4 D9

B

1

9

7

3P84-3 E8

B

3

J

26

3P83-4 D92P40 A2

13

E

5

E

3P85-3 E83P85-4 E8

3P13-2 A6

73P88 E8

A

3P25 E6 FP04 A2FP05 D6

B

IP00 A6

G

IP08 D2

E

3P26-4 E6

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

J

8

3P84-4 E8

1

CI : PCMCIA CONNECTOR

4

103

3P84-1 E8

IP05 A6

1

3P80-3 B93P84-2 E83P82-2 D9

C

7P16 C8

2

11

D

IP02 A6

A

G

3P27-1 E6

3P86 E8

6

3P83-3 D9

4

D

FP04

5

6

3

G

IP09 C9

5

12

3P26-3 E6

3P80-1147R

47R3P85-18

447R

3P80-4

3P27-4

10K4

847R

3P84-1

2 3P27-2

10K3P8747R

10K

3P27-33

PCMCIA-VCC-VPP

PCMCIA-VCC-VPP

100n

2P16

3P13-1 18

5

10K

47R3P85-4

3P80-247R

2

3P83-447R

4

FP05

22u

2P40

3P25

10K

47R3P84-36

11

1

10

19

20

789

18

171615141312

74LVC245A7P16

2

3456

3 3P80-347R

PCMCIA-VCC-VPP

+3V3

3P85-247R

7

5 3P84-447R

3P11

100K

210K

3P26-2

2P15

100n

1810K

3P10-1

3

3P09

0R4

1

3P82-347R

10K

3P27-1

EMC HOLE1X06

3P26-1

10K1

347R

3P83-3

VS2

59 WAIT

IP08

IORD

45 IOWR

71 72

61 REG

58 RESET

51 VCC2

52 VPP2

43 VS1

57

D13

40 D14

41 D15

64 D8

65 D9

35 GND3

68 GND4

60 INPACK

44

BVD1|STSCHG62 BVD2|SPKR

36 CD1

67 CD2

42 CE2

66 D10

37 D11

38 D12

39

A18

48 A19

49 A20

50 A21

53 A22

54 A23

55 A24

56 A25

63

ROW_B1P00-B

46 A17

47

47R3P82-44

IP03

PCMCIA-VCC-VPP

3P8147R

IP09

IP05

10K

3P24

CHECK

8204 000 8934 DIGI i/O TV543 R2 LDIPNX

UFD2K8

A3130

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20072007-10-18

18

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATE

47R6 3P85-3

47R3P88

IP18

2 3P82-247R

IP00

47R3P86

IP01

3P26-3310K

10K27 3P13-2

1X05REF EMC HOLE

PCMCIA-VCC-VPP

47R3P82-11

IP02

3P10-2

10K27

+3V3

1

10

19

20

89

18

17161514131211

74LVC245A7P15

2

34567

RES

10K

3P12

10K

3P20

17 VCC1

18 VPP1

15 WE|P

WP|IOIS1633

+3V3

D5

5 D6

6 D7

1 GND1

GND23469 70

9 OE

16 RDY|BSY

A811 A9

7 CE1

30 D0

31 D1

32 D2

2 D3

3 D4

4

20 A1519 A16

27 A226 A325 A424 A523 A622 A7

12

29 A028 A1

8 A10

10 A11

21 A12

13 A13

14 A14

ROW_A1P00-A

IP04

47R7 3P84-2

36 3P13-3

10K

10K

3P26-44

4510K

3P10-4

CA-MDO2CA-MDO1

MOVALMOSTRT

MDO0

MDO1MDO2

CA-MDO6CA-MDO5MDO5

MDO6

CA-RST

MDO7 CA-MDO7

MOCLK_VS2 CA-MOCLK_VS2

CA-MOCLK_VS2

CA-MOVALCA-MOSTRT

CA-MDO0

CA-MDO1CA-MDO2

MOVALMOSTRT

MDO0

MDO1MDO2

CA-MOVALCA-MOSTRT

CA-MDO0

MDO3

MDO4

MDO7

MOCLK_VS2

CA-MDO3

CA-MDO4

CA-MDO7

MDO3 CA-MDO3MDO4 CA-MDO4MDO5 CA-MDO5MDO6 CA-MDO6

PCMCIA-A8PCMCIA-A9 CA-IOWR

MOCLK_VS2

PCMCIA-A14

CA-INPACK

MOCLK_VS2

+5V

PCMCIA-D6PCMCIA-D7

PCMCIA-A10

PCMCIA-A11

PCMCIA-A13

PCMCIA-A12

PCMCIA-A3PCMCIA-A2PCMCIA-A1PCMCIA-A0PCMCIA-D0PCMCIA-D1PCMCIA-D2

CA-MISTRT

PCMCIA-A4

PCMCIA-A6PCMCIA-A5

MOSTRT

MOVAL

MDO0

MDO1

MDO2

MDO3

MDO4

MDO5

MDO6

MDO7

CA-INPACK

CA-VS1

CA-CD2

CA-CD1

IRQ-CA

CA-WAIT

PCMCIA-D3PCMCIA-D4PCMCIA-D5

CA-MDI7

CA-RSTCA-WAIT

CA-REGMOVAL

MOSTRTMDO0MDO1MDO2

CA-CD2

CA-CE1

CA-OE

CA-WEIRQ-CA

CA-MIVALCA-MICLK

PCMCIA-A7

CA-CD1MDO3MDO4MDO5MDO6MDO7

CA-CE2CA-VS1

CA-IORD

CA-MDI0CA-MDI1CA-MDI2CA-MDI3

CA-MDI4CA-MDI5CA-MDI6

18310_534_090303.eps090303

Page 120: Q549---32pfl9604ser

EN 120Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: Audio In HDMI

C

2P09 D22P10 D3

C

C

2

E

1

2

H

E

12

6 7

4

3P07 D3

4

I

6P02 D3FP01 D2

A

6

IP06 B4IP07 D4

E

6

D

3P08 D4

1P9A B3

B

8

3P05 B3

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

9

1P9B D3

13

F

13

H4

B

11

G

6

1

11

A

D

B

C

1

owne

r.

D

7

I

C

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

2P08 B4

3

E

G

F

9

5

3P06 B4

12

3 4

B2P11 D4

D

7

5

1

FP02 B2

2

10

5

3

2

6P01 B3

7

J

FP24 D2

3

AUDIO IN HDMI

8

2

2007-10-18 ROYAL PHILIPS ELECTRONICS N.V. 2005

2008-11-21

Maelegheer Ingrid

2008-10-10 3

J

1P0A B21P0B D2

A

10

2P06 B22P07 B3

5

A

A3

UFD2K8

DIGI I/O TV543 R2 LDIPNX 8204 000 8934

CHECK DATE

NAME

2

SUPERS.

CLASS_NO

EMANTESNHC

8 130

1P0B

YKB11-3004

1

2

1P0A 1

2

+12V

+12V

YKB11-3004

RE

S

RE

S

100p

2P11

100K

3P08

1K0

3P07 IP07

IP06FP02

FP0110

0n

2P10

BZX

384-

C

6P02

FP24

1P9B

V_N

OM

1n0

2P09

2P08

100p

3P06

100K

RE

S

3P05

1K0

RE

S

2P07

100n

RE

S

6P01

BZX

384-

CV

_NO

M

1P9A

2P06

1n0

AUDIO-IN4-L

AUDIO-IN4-R

18310_535_090303.eps090303

Page 121: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 121Q549.2E LA 10.

2009-May-08

SSB: USB Connector

+T

C

31

E

6

1 4

D

H

A

B

C

1P07 C41P10 C22P17 A1

2P24 B22P27 A12P30 A1

2P31 A13P16 A2

USB

3P17 A2

3P18 A23P19 A33P21 A3

3P23 A43P55 A43P56 A4

3P59 A2

owne

r.

3

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

J

4

D

F

USB CONNECTOR

B

I

2

A

2

C

4

1 2 3 4

A

B

C

6

1

B

J

5A

ll rig

hts

rese

rved

. Rep

rodu

ctio

n in

who

le o

r in

parts

C

5

F

A

3

I

3P60 B23P62 B2

5P07 A29P21 C39P22 C3

FP27 C3FP28 C3FP29 C3

E

H

CONNECTOR

G G

FP2A C3FP45 B1IP12 A2

IP13 C2IP19 C2

2

3P56

100R

RE

S

100R

3P55

100R

3P23

3P21

100R

IP19

IP13

100R

3P19

9P22

45

6 7

9P21

1P10

502382-0570

123

180R

3P18

RE

S

3P17

180R

RE

S

RE

S

180R

3P16

56K

3P60

0R4

3P59

6.3V

FP2A5 6

2P24

47u

292303-4

1P07

1234

IP12

FP29

FP27FP28

5P07

220R

2007-10-18 ROYAL PHILIPS ELECTRONICS N.V. 2007

2008-11-21

Maelegheer Ingrid

2008-10-10 3

A4

DIGI I/O UFD2K8

TV 543 R2 LDIPNX 8204 000 8934

CHECK DATE

NAME

2

SUPERS.

CLASS_NO

EMANTESNHC

8 3130

16V

220u2P

27

2P30

330u

10V

22u

2P31

2P17

220u

16V

+5V

FP45

100K

3P62

USB20-DMUSB20-DP

+5V

+3V3

USB-OC

18310_536_090303.eps090303

Personal Notes:

10000_012_090121.eps090121

Page 122: Q549---32pfl9604ser

EN 122Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: HDMI

COM

OUTIN

XTAL

01

I2C

SEL

HP_CTRL

C

RXAD0

+ D1-+ D2-

RXB

C

+- D0

+- D1

+- D2

+-

RXC

C

+- D0

+- D1

+- D2

+-

RXD

C

+- D0

+- D1

+- D2

OUT

C

+-D0

+-D1

+-D2

DDC

RXA DDC

5VCLKDATHPD

RXB DDC

5VCLKDATHPD

RXC DDC

5VCLKDATHPD

RXD DDC

CDEC

VD

DC

_1V

8 VDDH_3V3

VSS

VD

DS

_3V

3

VD

DO

_3V

3

VD

DO

_1V

8

VD

DH

_1V

8

VD

DC

_3V

3

5VCLKDATHPD

NC

DDCSTBY

CEC

TEST

+-

R12K

PD

DATCLK

MODE

+-+-

+-

OUT

IN

SCLSDA

INT

C

11 12 13

4 5 6 7

1P02 E11P03 C11P04 A1

2P32 H132P33 I122P34 D122P35 D12

10

HDMI CONNECTOR 2

13

C

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

15

10A

ll rig

hts

rese

rved

. Rep

rodu

ctio

n in

who

le o

r in

parts

D

J

E

2P36 D102P37 D102P38 D92P39 D9

8

D

E

D

O

J

HDMI CONNECTOR SIDE

2 3 4 5

3

Remark for service:

Replacing the TDA 9996

I

1 2

Requires reprogrammingof its I2C address from 0xC0 to 0xCE

7

6

B

8

8 9 10 11

2P45 C112P46 B102P47 C102P48 A5

H

E

K

15

11

C

12

16

I

3P34 E14

16

4

1P05 H12P03 C62P05 C102P28 H13

1

RES

B B

RES

3P36 F143P38 H63P43 E9

F

G

H

1

A

B

C

D

6 7 8 9

3P77 E9

I

14

1 2 3

I2C Address = 0xCE

C

2P41 D92P42 D92P43 D122P44 C10

5P11 B105P12 C105P13 C105P14 C10

2P49 A62P50 D122P51 D12

17

2P53 D132P54 D132P55 D132P56 F12

13 14

A

B

BP1E F2

2

C

L

HDMI

9

G

D

19

H

19

N

BP1H F2BP1J A2BP1K A2BP1L A2

3P47 H143P53 H53P58 B4

I

3P63 D43P64 D43P65 I43P66 I4

E

F

G

H

BP5D C2

18

3 18

I

1210

5P08 C12

M

owne

r.

G

5P15 H136P03 G137P01 A6

2P52 D13

7P12 H57P32 G69P0J G79P33 E9

2P57 F122P58 G122P59 G123P14 F13

BP5M H2

L

M

F

P

E

FP03 F14FP06 F1FP07 F1FP08 G1

20

BP1F F1BP1G F2

FP0F D1FP0G D2FP0H D2FP0J E1

BP1M A2BP1N A2BP1P A2

3P61 B4

BP1S B2BP1T B1BP1U E1BP1V G1

3P67 F33P68 G33P75 G53P76 E9

FP16 G1

17

A

5

HDMI CONNECTOR 1

6

H

G

13

FP21 E9FP22 H12FP23 I10FP25 D8

7

7P02 D10

BP5E D2BP5F D2BP5G D2

BP1A F2BP1B F1BP1C F2BP1D F1

IP26 H5IP5U G6IP5V G7

4

11

9

FP09 G1FP0A G1FP0C G1FP0E D1

K

NFP0P D1FP0R I1

FP0S I1

BP1R B2

FP0U I2FP0W I1FP10 B1FP11 B1

BP1W I1BP5A C2BP5B C2BP5C C2

FP41 C10FP42 A6FP43 H12FP44 F13

14

IP10 G12IP11 H12IP17 F13

F

O

12

FP17 I1FP20 B11

5

FP26 D12FP39 C12FP40 C11

14

P

IP5Y G6

BP5H D2BP5J H2BP5K H2BP5L H2

IP5Z H6IP60 H13

FP0T I2

FP12 B1

BP5N I2BP5P I2BP5R I2BP5S I2

FP0G

FP13 B1FP14 B2FP15 B1

20

F

A

HDMI CONNECTOR 3

FP09

BP1A

FP0U

100n

2P37

BP5H

232425

26

30R

5P14

23456789

202122

1

10111213141516171819

DC1R019WBER220

1P04

FP0A

232425

26

FP23

23456789

202122

10111213141516171819

DC1R019WBER220

1P03

1

BIN-5V

CIN-5V

100n

+5V

BP1W

2P36

FP0T

100n

2P32

BP5G

BP5L

BP5C

2P38

100n

FP21

2P56100n

BP5D

2P51

100n

1X07EMC HOLE

BP1K

BP5F

LD1117DT187P01

1

3 2

FP0C

2P41

100n

BP1J

FP42

BP5N

1K83P

36

FP39

IP5U

FP26

BP1T

BP5A

2P33

100n

FP0P

FP44

2P55

100n

3P61

47K

47K 3P

64

+5V-EDID

BC847BW7P32

3P53BP5M

FP22

22K

FP0W

+3V3-STANDBY

FP16

+3V3

2P46

100n

DIN-5V

BIN-5V

BP1H

FP43

52

FP13

987 18 26 37 43 56 67 73

51

40 64 70 82 8895 4 55

1 85 92

76

27

8 45 91 4624 75 15 21 34

848387869089

8180

7978

62666569687271

616058

77

363539384241

313028

5963

20192322

12119

29

3332

9394

56

48

74

10

14131716

5049

53

47

25

23

99100

9697

TDA99967P02

Φ

4454

57

100R

FP25

100R

3P76

3P77

+3V3

IP5Y

AIN-5V

IP5Z

5P11

30R

FP17

2P03

220u

16V

FP10

BC847BW7P12

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8934 DIGI IO TV543 R2 LDIPNX

UFD2K8

A2130

3P47

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20052007-10-18

48

4R7

5P15

30R

BP1C

BP1D

FP12

AIN-5V

FP07 BIN-5V

100n

100n

2P50

+3V3

2P35

9P0J

BP5RBP5P

30R

5P12

2P53

100n

IP60

BP1M

89

202122232425

26

16171819

234567

DC1R019WBER220

1P02

1

101112131415

FP0H

2P34

100n

IP26

2P39

100n

AIN-5V

5P13

30R

FP15

FP03

BP1S

BP1N

DIN-5V

BP1L

5P08

FP0R

30R

IP17

IP5V3P75

100R

FP0J

100n

2P43

100n

2P42

BP5E47

K 3P68

3P67

47K

3P66

47K

+3V3

DIN-5V

22u

2P47

47K 3P

58

10u

2P49

BIN-5V

100n2P59

100n2P57

BP5S

+3V

3

BP5J

REF-3V3

100n

2P52

BP1E

IP11

CIN-5V

22K

3P38

FP06

BP1P

1V8-HDMI

BP1F

REF-3V3

9

20212223

171819

2345678

1P05

1

10111213141516

DC1R019JB1E400

100n

DIN-5V

2P44

1K0

3P43

3P14

12K 1%

1V8-HDMI

3P63

47K

BP5B

FP11

FP0F

9P33

CIN-5V

100n

2P54

2P58100n

AIN-5V

BP1B

BP1G

CIN-5V

+3V3

47K 3P

65

IP10

+5V

100n

3P34

1K8

2P45

100n

2P48

FP08

FP40

FP41

2P28

100n

+3V3

BP1U

BP1V

BAT54 COL

6P03

FP0S

+1V8-PNX85XX

FP14

FP20

FP0E

+5V

BP1R

BP5K

2P05

22u

6.3V

ARX1+ARX0-ARX0+

PCEC-HDMI

WRITE-PROT

WC-EEPROM-PNX5100

CRX1+CRX0-CRX0+

BRXC-BRXC+

BRX2-BRX2+BRX1-BRX1+BRX0-BRX0+

ARXC-ARXC+

ARX2-ARX2+ARX1-

HDMIB-RX1-

HDMIB-RX0-

HDMIB-RXC-

DRXC-DRXC+

DRX2-DRX2+DRX1-DRX1+DRX0-DRX0+

CRXC-CRXC+

CRX2-CRX2+CRX1-

CRX-DDC-SCL

BRX-DDC-SDABRX-DDC-SCL

ARX-DDC-SDAARX-DDC-SCL

DDC-SDADDC-SCL

HDMIB-RX2+

HDMIB-RX1+

HDMIB-RX0+

HDMIB-RXC+

HDMIB-RX2-

DRX-HOTPLUG

CRX-HOTPLUG

BRX-HOTPLUG

ARX-HOTPLUG

SDA-SSB

SCL-SSB

DRX-DDC-SDADRX-DDC-SCL

CRX-DDC-SDA

DRX-DDC-SDA

CRX-DDC-SCLCRX-DDC-SDA

CRX-DDC-SCL

PCEC-HDMICRXC-

CRXC+

CRX2+

ARX-DDC-SDAARX-DDC-SCL

BRX-DDC-SCLBRX-DDC-SDA

DRX-DDC-SCLDRX-DDC-SCL

PCEC-HDMIDRXC-

DRXC+

DRX2+

CRX0-

CRX0+CRX1-

CRX1+CRX2-

CRX-HOTPLUG

CRX-DDC-SDA

BRX-DDC-SDABRX-DDC-SCL

PCEC-HDMIBRXC-

BRXC+

BRX2+

DRX0-

DRX0+DRX1-

DRX1+DRX2-

DRX-HOTPLUG

DRX-DDC-SDA

ARX-HOTPLUG

ARX2-ARX1+

ARX1-ARX0+

ARX0-

BRX0-

BRX0+BRX1-

BRX1+BRX2-

BRX-HOTPLUG

PCEC-HDMI CEC-HDMI

ARX2+

ARXC+

ARXC-PCEC-HDMI

ARX-DDC-SCLARX-DDC-SDA

18310_537_090303.eps090303

Page 123: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 123Q549.2E LA 10.

2009-May-08

SSB: HDMI Switch

SCLADR

012 SDA

WC

C

1M96 D11P06 A12P04 A52P12 A52P23 E62P60 B13P15 C5

6 7

3 8

FP33 B1FP34 B1

4 5

G

13

8 9

A

B

C

D

E

9P19 A69P20 A6

H H

5P06 A56P06 D67P07 B47P17 C5

2

3P33 C43P35 C3

6

B

C

D

E

D

3P22 B53P28 B5

9P29-3 D29P29-4 D29P30-1 E29P30-2 E29P30-3 E29P30-4 E2

5

owne

r.

FP35 B5FP36 D1

973

E

6 7 8 9

1 2 3

C

HDMI 4

BA

I

G

F

1

D

EDID0

4 10

5 10

F

A

13

3P30 B53P31 B53P32 C6

4 5is

pro

hibi

ted

with

out t

he w

ritte

n co

nsen

t of t

he c

opyr

ight

127

12

1

3P29 B6

BP52 A1BP53 A2BP54 A1BP55 A1BP56 B2

FP37 D2FP38 D2

9

J

9P31-2 E29P31-3 E29P31-4 E2

642

J

HDMI CONNECTOR 4

11

HDMI SWITCH

E

8

B

I

11

C

IP14 A6IP15 A6IP16 B5IP20 C4IP23 C5IP28 B4IP68 C6

9P32-1 D19P32-2 D19P32-4 D1BP50 A1BP51 A2

A

EDID NVM9P31-1 E2

2 3

1A

ll rig

hts

rese

rved

. Rep

rodu

ctio

n in

who

le o

r in

parts

BP57 B1BP5Z B1FP00 B1FP0B A4FP30 B1FP31 B1FP32 B1

84

7

3P15 10K RES

7P07

123

6

5

BP50

(256x8)Φ

EEPROM

M24C02-WDW6

252627282930

3456789

22

31

2324

141516171819

2

2021

FI-RE21S-HF-R1500

1M96

1

10111213

1 8

9P32-4 45

9P31-1

9P30-22 7

3P33

22R

BP56

FP30

BP53

BP54

BP52

FP36

BP55

BP57

3P22

10K

9P20

3 6

FP33

9P31-3

FP35

9P31-22 7

27

120R

5P06

9P29-3 36

9P32-2

7P17BC847BW

2

NAME

DATECHECK

8204 000 8934 DIGI I/O TV543 R2 LDIPNX

UFD2K8

A3130

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20062007-10-18

58

SETNAMECHN

CLASS_NO

SUPERS.

9P32-1 18

IP68

3P31

22R

1K0

3P35

BP5Z

IP20

IP14

FP31

+5V-DDC

9P19

3P32

10K

9P30-44 5

47K

3P28

EIN-5V

IP15

45

FP0B

FP38

9P29-4

789

202122232425

26

1516171819

23456

DC1R019WBER220

1

1011121314

FP37

1P06

EIN-5V

EIN-5V

100n

2P04

3P30

22R

2P12

100n

BP51

100n

2P23

+5V-DDC

EIN-5V6P06

BAT54

+5V-EDID

3 6

3P29

9P30-3

47K

IP28

2P60100n

FP00

1 8

IP23

FP34

9P30-1

9P31-44 5

IP16FP32

ERX-HOTPLUG

ERX-DDC-SDA

ERX-DDC-SDA

ERX-DDC-SCL

HOT-PLUG-A

HDMIA-RX1-HDMIA-RX1+HDMIA-RX2-HDMIA-RX2+

ERX-DDC-SCL

PCEC-HDMI

HDMIA-RXC-HDMIA-RXC+HDMIA-RX0-HDMIA-RX0+

HDMIA-RXC+

ERX-HOTPLUG

ERX-DDC-SDAERX-DDC-SCL

HDMIA-RXC-

HDMIA-RX2-

HDMIA-RX2+

ERX-HOTPLUGWRITE-PROT

PCEC-HDMI

DDCA-SCL

DDCA-SDAHDMIA-RX1+

HDMIA-RX1-HDMIA-RX0+

HDMIA-RX0-

18310_538_090303.eps090303

Page 124: Q549---32pfl9604ser

EN 124Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: PNX8543: Flash

C

BRWP

VCC

VSS

IO

NC

01234567

CLEALECEREWE

11

B

C

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

2

H

19

5

I

3P39-1 C3

14

D

10

8

6

H

4

5

12 13

9

3P48-1 E3

10

C

12

13

6

2

F

1 11

17

8

I

B

A

E

92P14 C73P37 C1

3P39-2 C33P39-3 C3

103

E

IP30 E4

16

G

A

O

1

F

D

7

1M97 C12

4

2P13 C6

15

D

G

2 3

3 4

5P09 B1

3P48-2 E33P48-3 F3

10

N

H

19

E

L

12 13

20

owne

r.

J

11

C

D

20

A

H

N

3P44 D3

3P39-4 D3

F

12

L

3P40-2 D33P40-3 D3

11

G

8

3P40-1 D3

IP29 B5

K

J

1 5

B

C

P

I

9

7P10 C5

3P42 E3

3P48-4 F3

1

P

7 18

IP27 D5

F

3P57 C11

13

4 149

O

K

E

16

PNX 8543 : FLASH

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

15

8

M

173

G

18

3P40-4 D3

6

5

IP24 E5

7

7

I

B

A

2

M

6

100n

2P13

IP29

4 5100R

3P39-4

100n

2P14

IP27

1 83P40-1100R

3P48-4100R

4 5

4 5

2 7

100R

3P40-4

3P48-2100R

IP24IP30

3P39-2 2 7100R

3 63P40-3100R

2 7

13 36

1819

100R3P40-2

456

101114

8

7

12 37

33343538394045464748

3

202122232425262728

2

16

2930313241424344

1

15

1G[FLASH]

ΦNAND01GW3B2BN6F

7P10

179

1 8

+3V3-NAND

3P39-1100R

3P42

10K+3V3-NAND

30R

5P09

+3V3-NAND

8204 000 8934

CHECK DATE

NAME

2

SUPERS.

CLASS_NO

EMANTESNHC

8 6

2007-10-18 ROYAL PHILIPS ELECTRONICS N.V. 2007

2008-11-21

Maelegheer Ingrid

2008-10-10 3

130 A2

UFD 2K8

DIGI I/O TV543 R2 LDIPNX

22 2324 2526 2728 29

19

2

2021

3456789

1

101112131415161718

FI-RE21S-VF-R1300

1M97

3 63P39-3100R

3P44

2K2+3V3-NAND

+3V3-NAND

10K

3P37

100R3P48-3 3 6

10K

+3V3

3P57

3P48-1 1 8100R

I2C-SDAI2C-SCL

RESET-BOLT-ON

TSO-BIT-CLKTSO-BIT-VALIDTSO-SYNCTSINO-DATA0TSINO-DATA1TSINO-DATA2TSINO-DATA3TSINO-DATA4TSINO-DATA5TSINO-DATA6TSINO-DATA7NAND-AD(7)

NAND-AD(6)NAND-AD(5)NAND-AD(4)NAND-AD(3)NAND-AD(2)NAND-AD(1)NAND-AD(0)

NAND-CLE

XIO-SEL-NANDNAND-ALE

XIO-ACK

PCI-CBE2

NAND-CLENAND-ALENAND-WEnNAND-REn

XIO-SEL-NAND

XIO-ACK

WP-NANDFLASH

WP-NANDFLASHNAND-WEnNAND-REn

PCI-AD24PCI-AD25PCI-AD26PCI-AD27PCI-AD28PCI-AD29PCI-AD30PCI-AD31

NAND-AD(0)NAND-AD(1)NAND-AD(2)NAND-AD(3)NAND-AD(4)NAND-AD(5)NAND-AD(6)NAND-AD(7)

PCI-AD0PCI-AD1PCI-CBE1

18310_539_090303.eps090303

Page 125: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 125Q549.2E LA 10.

2009-May-08

SSB: Ethernet

C

VSS

10

C1

REGE

INTA

PCICLK

PMEM

TPRDM

X1

MWR

MRD

12

COL

CRS

0

3

0

EEDO

1

RXDV

AD<0:31>

32

LED100LNK

RXOE

TXE

3

PCIVDD

TXD

LED10LNK

GNT

DEVSEL

TPRDP

CLKRUN

PWRGOOD

3VAUX

IAUXVDD

RXD

TXCLK

RESERVED

MDC

VREF

X2

TPTDM

TPTDP

MDIO

RXCLK

EESEL

MCS

IDSEL

2

MA5

0

LEDACT

AUXVDD

MD<0:7>

EECLK

RXER

FRAME

SERR

0

STOP

RST

REQ

PAR

IRDY

TRDY

PERR

EEDI

7

MA<0:15>

CFGDIS

DATA

BECMD/

31

7N04-2 H77N04-1 B36N01 F86N00 F8

IP0J D1IP0H B10IN10 F8IN0Z F7

G

3N0N-4 A93N0N-3 A93N0N-2 A93N0N-1 A93N0L-4 A83N0L-3 A83N0L-2 A9

FN0C D3

8

1

I

IN0P A9IN0N H3

ETHERNET CONNECTOR

4 18

IN0M C7IN0L G10IN0K E7FN15 B10

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

htA

ll rig

hts

rese

rved

. Rep

rodu

ctio

n in

who

le o

r in

parts

14

3N0F C72N1C H32N17 G112N16 G112N15 G112N14 G122N13 G112N12 G12

RES

5

7

16 20

54

7 8

E

L

2

P

C

B

A2N0Y G122N0W H10

1715

D

18

L

C

2N0Q G102N0P G102N0N H42N0M D32N0L D82N0K D8

1110

FN06 A10FN05 A10BN0D B10BN0C B10BN0B B10BN0A A10

A

F

E

D

C

B

IN0Y F7IN0W E7IN0V C8IN0U H10IN0T C8

E

139

N

P

6

16

3N0Y D13N0W E83N0V C83N0T-4 C93N0T-3 C93N0T-2 B93N0T-1 B9

1312

131211109

FN0B F9FN0A E9FN09 C11FN08 B11FN07 B10

15

K

3

H

D

J

2

1N02 C81N00 A11

H

3N0L-1 A83N0K F83N0J E83N0H C73N0G D3

1110987654

2N11 G122N10 G122N0Z G13

5N07 H105N06 G10

F

O

ETHERNET

20

N

14

F

12

21

A

BB

2N0V H102N0U B92N0T B102N0S C82N0R A9

1

M

3

I

H

M

owne

r.

17

9

H

G

6

G

CA

G

F

E

D

11

K

10 19

321

543

19

J

12 13

O

2N0P

4u7

6.3V

12

876

7 2

33R

3N0N-2

2N0N

100n

3N0H

10K

4u7

12

2N0V

5N07

220R

BAS316

2N13

6N01

100n

+3V3-ET-DIG

7 2

5N06

220R

2

22R

3N0L-2

3N0T

-2

100R

7

+3V3-ET-ANA

BN0D

2N0K

22p

100n

567813 14

2N10

1840420-1

1N00

1234

3N0K

220R

3N0N-4

33R

4 5

2N1C

10u

6.3V

+3V3-ET-ANA

IN0N

2N15

100n

IN0P

100n

2N0R

+3V3-ET-DIG

FN09

FN05

CLASS_NO

EMANTESNHC

8 7

2007-10-18 ROYAL PHILIPS ELECTRONICS N.V. 2007

2008-11-21

Maelegheer Ingrid

2008-10-10 3

130 A2

UFD 2K8

DIGI I/O TV543 R2 LDIPNX 8204 000 8934

CHECK DATE

NAME

2

SUPERS.

100n

2N12

IN10

IN0Z

FN0A

BN0B

470R

3N0F18

114

136

16 20 26 32 35 38 44 49

17

30

40

8 51 52 55 57 65 77 90 103

6

13

98

96

45

46

53

54

93

31

107

117

97

59

123

48

64

41

50

127

62

140141

5

4

130

131

99

60

69 80 94

101112

129

132133134135138139

1522232425

143144

1237

95

128

91

6339 47

76

61

92

142

14

56 58 137

19

28

29

1111008975

66

116115113112110109

9 21 27 33

817978747372717068

118

67

10510410210188878683

119

82

7N04-1DP83816AVNG

10/100 Mb/sMacPhyter II

122

121120

108106

3N0W

1K0

3N0Y

10K+3V3-ET-ANA

IP0H

25M

1N02

NX5032GB

100n

2N0W

IN0Y

+3V3

2N0U100n

FN0B

IN0W

IN0U

FN07

FN0C

2N0L

22p

2N14

100n

IN0V

BN0A

1u0

2N0M

100n

2N0T

2N16

100n

BN0C

100n

2N0Y

+3V3-ET-ANA

IP0J

84

NC7 85

NC8 124

NC9 125

NC134

NC10 126

NC236

NC337

NC442

NC543

NC6

DP83816AVNG7N04-2

100R

3N0T

-18

1

IN0K

+3V3

IN0L

IN0M

6N00

BAS316

100n

2N17

100R

3N0T

-44

5

100n

2N11

3N0J

270R

6

3N0V

1M0

3N0L-3

22R

3

22R

3N0L-44 5

33R

1 83N0N-1

2N0S

100n

FN06

+3V3-ET-DIG

2N0Z

100n

2N0Q

100n

33R

3N0N-33 6

1 8

36

22R

3N0L-1

100R

3N0T

-3

3N0G

100R

FN08

IN0T

FN15

RESET-ETHERNET

PCI-AD23

PCI-AD21PCI-AD22PCI-AD23PCI-AD24PCI-AD25PCI-AD26PCI-AD27PCI-AD28PCI-AD29PCI-AD30PCI-AD31

PCI-AD10PCI-AD11PCI-AD12

PCI-AD14PCI-AD13

PCI-AD15PCI-AD16PCI-AD17PCI-AD18PCI-AD19PCI-AD20

PCI-TRDY

PCI-AD0PCI-AD1PCI-AD2PCI-AD3PCI-AD4PCI-AD5PCI-AD6PCI-AD7PCI-AD8PCI-AD9

PCI-PAR

PCI-CLK-ETHERNET

PCI-PERR

PCI-REQ-ETH

RESET-ETHERNET

PCI-SERR

PCI-STOP

PCI-CBE0PCI-CBE1PCI-CBE2PCI-CBE3

PCI-DEVSEL

PCI-FRAME

PCI-GNT-ETH

IRQ-PCI

PCI-IRDY

18310_540_090303.eps090303

Page 126: Q549---32pfl9604ser

EN 126Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: Buffering

G3

12

3EN23EN1

G3

12

3EN23EN1

G3

12

3EN23EN1

G3

12

3EN23EN1

C

IN32 E4IN34 B2IN35 B2IP31 D8IP32 D8

3P54 E85P10 C97N10 D27N11 B5

9 10

10

BUFFERING

J

2 31

H

8

7N12 D57N13 B27P11 D97P13 D7FP18 D7FP19 D8IN20 B4IN21 D4IN22 D2IN30 D2

3N31 B43N32 D43N33 E43N34 D23P46 C73P49 D63P50 D83P51 D8

3

E

9

C

5

F

I

4 7

E

I

11

H

3P52 E8

A

B

C

D

E

F

A

B

42

J

G

F

D

1

B

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

2P22 C82P25 D82P26 E92P61 C72P62 C83N30 D1

13

1 2 3 4 5

86

D

A

C

6 7 8 9 10

1 2 3 4 5 6 7 8 9 10

7 11

B

136

A

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

12

owne

r.

C

D

E

F

2N30 D32N31 B52N32 D52N33 B32P18 E92P19 E92P20 D72P21 C8

5

IN30

12

G

IP31

FP18

2K2

3P46

100n

2N32

IN21

1u0

2P19

RE

S

2P21

1u0

2P20

22n

5P10

30R

RE

S

2P18

1u0

RE

S

20

2N31

100n

18

17161514131211

1

10

19

2

3456789

1

10

19

20

7N1274LVC245A

89

18

17161514131211

2

34567

7N1174LVC245A

IN20

+3V3

+5V-TUN

+3V3

100n

2N33

10K

3N33

+3V3

10K

3N30

IN34

RES

3P52

10K

11

1

10

19

20

6789

18

171615141312

2

345

7N1074LVC245A

2P26

22u

16V

2P22

1u0

220p

2P25

2P61

220u

25V

25V

220u2P

62

10K

3N32

+5V5-TUN

3N34

10K

1K

R

2

TS24317P13

A3

FP19

1K0

3P54

2

1

3

PHD38N02LT7P11

3P51

1K0

3P50

1K0

3P49

10K

8204 000 8934

CHECK DATE

NAME

2

SUPERS.

CLASS_NO

EMANTESNHC

8 8

2007-10-18 ROYAL PHILIPS ELECTRONICS N.V. 2007

2008-11-21

Maelegheer Ingrid

2008-10-10 3

1

10

19

20

130 A3

UFD 2K8

DIGI I/O TV543 R2 LDIPNX

89

18

17161514131211

2

34567

7N1374LVC245A

10K

3N31

+3V3

IN32

+12V

IN35

2N30

100n

IN22

CA-OECA-WE

CA-IOWRCA-IORDCA-REG

IP32

PCI-CBE1

PCI-AD17

PCI-AD23

PCI-AD19PCI-AD22

PCI-AD16PCI-CBE2

PCI-AD18

CA-CE1CA-CE2

PCMCIA-A2

PCI-AD10

PCI-AD8PCI-AD9

PCMCIA-A10

PCMCIA-A8PCMCIA-A9

CA-WAIT

PCI-AD3

PCI-AD0PCI-AD1PCI-AD2

PCMCIA-A1

PCMCIA-A3

CA-ADDEN

PCMCIA-A7

PCMCIA-A6PCMCIA-A5PCMCIA-A4

PCMCIA-A0

PCMCIA-A12

PCMCIA-A14

PCMCIA-A11

PCMCIA-A13

PCI-AD11

PCMCIA-D2

PCMCIA-D1

PCMCIA-D0

PCMCIA-D4

PCMCIA-D6PCMCIA-D5

PCMCIA-D7

PCMCIA-D3 PCI-AD7

PCI-AD6PCI-AD5PCI-AD4

PCI-AD14

PCI-AD13

CA-ADDEN

CA-DATADIR

CA-DATAEN

PCI-AD12

CA-ADDEN

PCI-AD26

PCI-AD25PCI-AD27PCI-AD28PCI-AD29PCI-AD30PCI-AD31PCI-AD24

18310_541_090303.eps090303

Page 127: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 127Q549.2E LA 10.

2009-May-08

SSB: Analogue Externals A

4X1

G4

4X2

12

VDD

VEEVSS

C

I

1E02 C8

1E13 E7

1009 B12

1022 A7

1024 B7

1027 D6

642

O

7 8 12 13 14

(AV1)

15

O

18

2E16 D5

A

2E18 E12

B

2

C

4

D

6

E

8

F

10

G

12

H

14

A

B

C

H

19

G

D

E

F

C

J

G

H

I

2E75 D1

1E12 D12

2E82 C7

1001 E11

1E18 F12

1015 C12

1E22 H13

1023 B7

1E24 I7

1025 C7

1E26 H7

1

1E31 B12

3

2E04 C11

5

2E10 B11

8

N

H

6

I

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

2E12 G12

9 10 11ow

ner.

2E17 E6

3E18 B5

1

2E24 H11

3

2E30 B5

5

2E32 B5

7

2E41 I6

9

2E50 A7

11

2E70 B7

13

2E74 G2

3

7

K

E

F

9

1028 E61E00 A121E01 C14

3E54 G11

2E77 C2

3E59 I11

1E16 F7

2E88 A12

1E19 G12

2E91 C12

1E23 I11

2EA5 A3

1E25 I11

3E06 D4

1E27 I7

3E11 A6

2E01 A11

3E14 C6

2E06 B11

3E16 D6

17

B

J

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

P

2E13 G62E14 F122E15 D12

20

3E17 E5

3EB9 I1

2E19 F6

3E21 B5

2E29 A5

3E24 A5

2E31 C5

3E28 D11

2E33 E5

3E31 D11

2E44 I12

3E34 C5

2E51 A7

3E38 F11

2E73 I2

3E44 H11

B

121 2

ANALOGUE EXTERNALS A

4 1310

C

6E30 I11

3E55 F5

6E32 I11

2E87 A13

3E62 I6

2E90 B12

3E64 B6

2EA4 A3

3E69 H6

3E02 D6

3E99 C2

3E07 A11

3EA8 A3

3E12 A11

3EB0 B2

3E15 B11

3EB7 H2

11

N

* EUSCART1

3 115

(AV2)

9E18 F5

3EB8 I2

9E20 G10

3E19 C11

6E02 E6

3E22 C11

6E07 B12

3E27 B11

6E09 C12

3E30 B11

6E12 B6

3E32 E11

6E22 E12

3E37 A11

6E24 D6

3E43 H12

6E28 G12

7

A

F

14

E

9

A

1 5

3E45 I103E51 E53E52 I5

FE68 C7

6E31 I6

FE71 C13

3E61 H6

6E35 F6

3E63 A6

6E37 I6

3E68 H12

7E01-2 B2

3E73 G5

7E04 I1

3EA7 A3

7E09 H11

3EA9 A2

7E15 C3

3EB6 H1

9E12 C5

1912

M

* EU

SCART2

6 10

L

9E19 F5

FE85 F13

6E01 A12

9E23 D10

6E03 B12

9E25 F10

6E08 B6

9E27 G10

6E10 A6

FE60 A7

6E14 C6

FE62 B7

6E23 D11

FE64 D7

6E26 F12

17

D

18

D

G

I

6E29 H12

IEC1 A2

FE70 C13

IEC3 B2

6E34 E6

FE73 D13

6E36 H7

FE75 D13

7E01-1 A2

FE77 F7

7E02 D2

FE79 F7

7E05 H1

FE81 E13

7E14 H5

FE83 F13

9E10 I3

2 16

16

P

20

9E15 D59E16 E59E17 E5

FEA1 B3

* EU

IE05 D5

9E22 D10

IE09 H11

9E24 E10

IE16 E5

9E26 G10

IE18 D10

9E33 F2

IE21 C5

FE61 A7

IE23 C11

FE63 D7

IE51 H5

FE65 E7

IE92 H2

4 13

14

IE93 I2IE94 I1IE96 E2

M

15

IE97 D3IE98 C2IEC0 A3

L

FE66 E7FE67 E7

* EU

IEC2 A3

K

FE72 C13

FE74 D13

FE76 E7

8

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2008-01-18 ROYAL PHILIPS ELECTRONICS N.V. 2005

2008-11-21

Maelegheer Ingrid

2008-10-10 3

130 A2

ANA + SIDE I/O

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18310_542_090303.eps090303

Page 128: Q549---32pfl9604ser

EN 128Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: Analogue Externals B

C

SCLADR

012 SDA

WC

3

EDID NVM VGA

M

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FE13 B4FE16 B6FE19 B9FE26 C10

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15

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18310_543_090303.eps090303

Page 129: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 129Q549.2E LA 10.

2009-May-08

SSB: Analogue Externals C

C

CVBS

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I

9

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1E15

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32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20072008-01-18

34

SETNAMECHN

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RC-OUT

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AUDIO-IN5-L

AUDIO-IN5-R

FRONT-C

FRONT-Y_CVBS

AUDIO-IN5-L

AUDIO-IN5-R

AUDIO-HDPH-L-AP

AUDIO-HDPH-R-AP

FRONT-Y_CVBS

FRONT-C

18310_544_090303.eps090303

Page 130: Q549---32pfl9604ser

EN 130Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: Analogue Externals D

C

4X1

G4

4X2

12

VDD

VEE VSS

1

X11

1

X11

1

X11

1

X11

V+

V-

VCC

C1+

C1-

C2+

T2T1IN

IN OUT

OUT

GN

D

T1

C2-

R2R1

T2

R1R2

S1A

D2

S1B

IN1

IN2

S2B

D1

S2A

NC

S4B

D4

S4A

IN4

S3B

D3

S3A

IN3

VDD

GND VSS

I

IEB5 F10IEC4 E9

3

FE11 G1

IED0 H12IED1 H11

IE78 C12

9

M

161

FE36 H1FE37 H1FE44 E5FE45 E5

9E40 F3

IEA1 B10IEA2 C10IEA3 C10

IE79 A4IE81 C2IE82 E2IE84 E2

FE57 F5

IE99 D12

IEA5 C10

16

K

O

DEBUG

IEB4 G10

I

G

B

USE ONLY

K

BEB5 D10BEB6 C10BEB7 C10BEB8 C10BEB9 C10

FEB0 H10

6E19 C3

FEB4 H2FEB5 I10FEB6 I10FEB7 I10

IEC5 E9

FEB9 D1

IED2 H11

FEB1 H9

IE95 C12

IEC6 F9IEC7 G9IEC8 G12IEC9 G12

19

D

SDA

FOR MHP BOLT-ON

3

J

9E08 C39E09 C49E30 H11

9E31 A69E35 C6

FE47 C1

3ECG H10

FE92 D5FE93 E5FE94 E5FE95 B1

IEA4 C10

FE97 F4

IEA6 C10IEA7 D10IEA8 E11IEB0 E10IEB1 E10

FEA9 H10

D

11

7

M

N

15

3ECS-3 F83ECS-4 F93ED1 D123ED2 C85E03 H1

FE10 G2

3EAC D9

FE12 F1FE14 G2FE15 G1FE27 I2

FEB8 I10

FE29 I2

FEC0 E1IE11 H1IE12 H1IE75 F1IE76 F1

FE35 H2

18

4

F

E

20

7151

9E05 E1

18

UP

3EC9 D123ECE H11

9E36 C6

2ECH A5

9E41 E39EA1 A119EA2 A119EA3 A11

FE96 F4

9EA5 G11

FE99 C3FEA5 H10FEA6 H10FEA7 H10FEA8 H10

BEB4 D10

A

H

12

O

13

11

7

3E87 H53E88 G143E91 F23E93 I23EAA D9

5EA1 B10

2EA9 B11

6E25 F36E27 F46E50 C37E17 D2

FE28 I1

7E19-2 A4

FE30 G2FE31 G2FE32 G1FE33 H1FE34 H2

9E03 D2

SHIFTED

B

8A

ll rig

hts

rese

rved

. Rep

rodu

ctio

n in

who

le o

r in

parts

is p

rohi

bite

d w

ithou

t the

writ

ten

cons

ent o

f the

cop

yrig

ht

F

2EB6 D122ECB I92ECC I92ECD I9

3ECF H10

13

3ECH H103ECK A13ECL A23ECM B3

9EA4 G11

3ECP B1

9EA7 A11BEB0 E5BEB1 D5BEB2 E5BEB3 E5

3ECS-2 G9

CONNECTOR

4 20

E

8

UART

19

SCL

14

3E86 H3

2E62 D22E63 D22EA1 C82EA2 C82EA3 C8

3EAB D9

1

3EAT C123EAV C83EAY H103EAZ H10

7E19-1 A3

3EC2 C9

7E19-3 B57E19-4 B57E20 C37EA1 B107EA3 E11

3EC8 D9

L

ANALOGUE EXTERNAL D

96

owne

r.

H

5

TO ITV BOLT - ON MODULE

7 8 9 10 11

2ECE C12

N

3E00 G33E08 C23E09 H23E23 H2

3ECN B1

3E40 C2

3ECQ-1 E83ECQ-2 F93ECQ-3 E93ECQ-4 E93ECS-1 G8

3E85 I2

13

HOTEL TV

P

5

DEBUG / RS232 INTERFACE

2E03 I1

2E20 I22E25 G22E38 G22E60 D32E61 D4

2EA6 D8

6

2EAA B112EAB E112EAC E92EAD E9

3EB3 C12

2EAF G9

3EC3 C93EC4 C93EC5 C93EC6 D83EC7 D8

2EAQ D8

1 17

FOR

6

MIPS

14

64321

C

D

E

2

10

14

A

B

C

3E39 I5

F

3E41 F23E57 H33E67 G23E83 H33E84 H3

B

C

L

2

I

FOR MHP BOLT-ON

1R07 F11R08 H11R12 H9

1008 F51029 F51E06 F61E50 D61E51 E61HP0 I1

2E09 I2

4 5

2EAE F9

7 8

J

P

2 3

2EAK I102EAL I102EAM I112EAN I112EAP C8

9

10

IEA8

C

A

SERVICE

10 11 12 13

LEVEL

G

14

12

5

12

H

I

A

G

H

D

E

F

G

FE14

IE76

2EA6 4u7

3EC9

47K

RE

S2E

CB

100p

3E88

10K

68R3ECE10K

3E87

1029

FE45

IE81

FE44

2EAB

100n

+3V3

47K

3ED

2

3ECL

100R

1K03EAY

4u72EA1

IE79

9E05

3ECS-333K3 6

33K

3EC

Q-2

27

IEB1

47K

RES

3EC

4

3E39

10K

IE12

IEB4

3ED1

47K

FEB4

+3V3100R

3E86

DATE

NAME

2

SUPERS.

CLASS_NO

EMANTESNHC

4 4

2008-01-18 ROYAL PHILIPS ELECTRONICS N.V. 2007

2008-11-21

Maelegheer Ingrid

2008-10-10 3

130 A2

ANA + SIDE I/O

TV543 R2 LDIPNX 8204 000 8930

CHECK

234

56

B4B-PH-SM4-TBT(LF)1E50

1FE93

IE75

FE28

BEB7

9E41

9E40

100p

2E38

IE82

FE10

+3V3

FE11

100R

3ECK2ECH

100n

1 8

3ECS-133K

3EC

6

47K

9E03

6E50

PMEG1020EA

FE12

100p

2E03

3EA

B

47K

IE78

8

13

1

3

12

2

5

14

15

4

6

11

10

9

167

MDX

7EA374HC4053PW

3E00

100R

2E25

100p

3EC

8

47K

FE31

9EA7

100R3E83

2E20

100p

IEB5

1u0

+3V3-STANDBY

2EAD

4u7

2EB6

IE84

47K

3EB3

BEB0

+3V3-STANDBY

FEA9

9E30

BEB3

3ECP

100R

FEB6100p

2E09

100n

2E60

2EAP 4u7

10K

3ECM

910 11

9E36

12345678

1R07

FEC0

+3V3

1110

FE29

12

714

7E19-374HC4066

6

714

89

74HC40667E19-4

5

714

43

74HC40667E19-2

3E41

BEB2

FE37

100R

IEC7

FE57

IEA2

100R

3E91

47K

3EA

A

FE34

IEA7

47K

3EAT

+5V

9E31

2EA3 4u7

FEB9BEB4

FE33

1n0

2EA

L

123

4 5

1HP0

100R

3ECN

IED0

RE

S2E

AM

100p

47K

3EA

C

2ECE

4u7

3E08

9E35

100R

100R 3E93

7

2

6

16

FEA8

4

5

15

213198

411110

ST3232C

ΦRS2321

3

IEA4

7E17

9EA3

9EA17E19-1

74HC4066

13

714

12

FEA7

2E63

100n

FE96

2E61

100n

9E08RES

9EA5

100R

FEB8

3E57

30R

5EA

1

FE30

2EA9

BEB5

100n

BEB6

IEC53ECQ-1

33K

8 1

FEB1

RE

S

2

1

3

PM

EG

1020

EA

6E19

1E06

10K

3E40

RES

+3V3

1u02EAF

FE92

100R3ECF

789

15 16

1

1011121314

23456

1R12

BM14B-SRSS-TBT

IE99

FE32

9E09

RE

S

+3V3-STANDBY

6E27

BZX

384-

C5V

1

FE94

100R3E23FE35

FE36

1K03EAZ

FE47

47K

3EC

2

FE95

3EC

3

47K

FEB0

30R5E03

2EA

K

1n0

9EA2

IEA1

IEB0

BEB8

47K

3EC

7

4u7

89

IEC4

2EA2

B10P-PH-K-S

1R08

1

10

234567

FE99

BEB1

IEC9

FE97

IEC8

PDTC114EU7E20

45

3E67

100R

1E51

B3B-PH-SM4-TBT(LF)

123

IED2

IE95

IED1

27

3EC

S-2

33K

4u72EAQ

3ECG 100R100R3ECH

3EC

5

47K

3E85100R

+3V3-STANDBY

BZX

384-

C5V

1

6E25

IEA3

IEC6

3EA

V

47K

19

17

165

3E09 100R

10

11

20

15

2

4

9

7

12

14

ADG734BRU7EA1

ΦSPDT

SWITCH

3

8

13

18

6

1

IE11

10u

2EAA

100p

2EA

NR

ES

3EC

Q-4

45

33K

100p

2EC

CR

ES

22p

2EC

D

FEB74

5

RE

S

33K

3EC

S-4

FE27

FEA6

BEB9

1u02EAC

IEA5

IEA6

33K

3ECQ-33 6

100n

2E62

100R

3E84

9EA4

FE15

FEB5

1008

1u02EAE

FEA5

RXD-MIPS RXD

TXD-MIPS TXD

TXD

RXD

CVBS-TER-OUTSTANDBY

AV1-BLK

RXD-UP

RXD-MIPS

TXD-UP

TXD-MIPS

RXD

UART-SWITCH

UART-SWITCHn

TXD

UART-SWITCH

UART-SWITCHn

BOLT-ON-IORXD-UPTXD-UP

SPDIF-IN1

BO-AUDIO-LBO-AUDIO-R

SCL-BOLT-ONSDA-BOLT-ON

RC-UPBOLT-ON-IO

MHP-SWITCH

BO-AUDIO-R

AV1-AUDIO-R

MHP-SWITCH

AV1-BLK-BOAV1-AUDIO-L

BO-AUDIO-L

BO-CVBS

BO-RBO-GBO-B

AV1-PB

AV1-AUDIO-L AUDIO-IN1-L

AV1-AUDIO-R AUDIO-IN1-R

AV1-PR

AV1-PB

AV1-Y_CVBS

AV1-Y

BO-CVBS

AV1-CVBS

AV1-CVBS AV1-Y_CVBS

MHP-SWITCH

AUDIO-IN1-L

SDA-SSB

AV1-CVBS

BO-R

AV1-R

BO-B

AV1-B

BO-G

AV1-G

AUDIO-IN1-R

AV1-R

AV1-G AV1-Y

AV1-B

AV1-PR

TXD-UP

RXD-UP

RXD-MIPS

TXD-MIPS

RXD-UPTXD-UP

BOLT-ON-IO

AV1-AUDIO-LAV1-AUDIO-R

AV1-BAV1-GAV1-R

SCL-SSB

18310_545_090303.eps090303

Page 131: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 131Q549.2E LA 10.

2009-May-08

SSB: Mini PCI Connector

C

13

1 6 7 8 9

5 6 7 8

2

B

9832

C

3

2A01 A32A02 A32A03 A3

A

B

C

F

2A04 A4

2A09 A52A50 A72A51 A7

E

D

A

B

2A52 A8

3A04 D93A05 D93A06 E9

B

C

D

E

5A00 A2

FA30 E1FA31 E2FA32 E1

11

FA33 E1

IA20 B9

5

D

13

MINI PCI CONNECTOR

5

I

12

J

H

G

IA21 D9IA22 D9IA23 D9

F

E

6 7

IA24 E9

IA29 B2

8

2A00 A3

C

D

E

101

A

1A01-A A1

12

J

I

H

G

owne

r.is

pro

hibi

ted

with

out t

he w

ritte

n co

nsen

t of t

he c

opyr

ight

1

2 3 4

FA37 A8

1 2 3

IA30 C4

4 9

4

A

9 10 11

5A

ll rig

hts

rese

rved

. Rep

rodu

ctio

n in

who

le o

r in

parts

4

1A01-B A6

76

IA25 E9IA26 B7IA27 B7IA28 A3

2A05 A42A06 A42A07 A42A08 A5

3A00 E93A01 C43A02 B93A03 D9

5A01 A79A00 B39A01 B79A02 B9

FA34 E6FA35 E6FA36 E6

IA22

FA36

+5V-mPCI

5A01

30R

RES

+5V-mPCI+3V3-mPCI

IA25

+3V3-mPCI

+3V3

+3V3-mPCIIA27

10K

3A06

IA28

111113115117

11

119121123

131517

939597

9

99101103105107109

737577

7

79818385878991

5557

5

59616365676971

3537

3

3941434547495153

1

1921232527293133

1A01-AROW_A

1734065-3

30R

5A00

+3V3-mPCI

+3V3-mPCI

+3V3-mPCI

+3V3-mPCI

FA32

FA34

REF EMC HOLE1X09

RES

100R

3A03

10K

3A01

12

120122124

141618

125126

100102104106108110112114116118

80828486889092949698

10

60626466687072747678

8

424446485052545658

6

222426283032343638

4

40

1734065-3

ROW_B1A01-B

2

20

+5V-mPCI

FA37

FA35

2A02

100n

+5V

2A01

1u0

+3V3-mPCI

2A09

100n

IA24

IA20

IA23

IA29

IA21

FA33

FA31FA30

100R3A04RES

100n

2A51

1u0

2A5010

0n

2A06

100n

2A05

100n

2A03

2A04

100n

+3V3-mPCI

+3V3-mPCI

CLASS_NO

EMANTESNHC

2 1

2007-10-16 ROYAL PHILIPS ELECTRONICS N.V. 2008

2008-11-21

Maelegheer Ingrid

2008-10-10 3

130 A3

MINI PCI

TV543 R2 LDIPNX 8204 000 8935

CHECK DATE

NAME

2

SUPERS.

9A01

3A00

10K

6.3V

330u

2A00

RE

S

9A00RES

+3V3-mPCI

3A05100R

3A02

10K

IA26

IA30

9A02

100n

2A08

2A52

100n

IRQB-mPCI

IRQA-mPCI

2A07

100n

PCI-CLKRUN

PCI-AD12

PCI-CLKRUN

PME

RESET-mPCI RESET-ETHERNET

PCI-AD13PCI-AD13PCI-AD11

IDSEL

PCI-AD11

IDSEL

MPCIACT

M66EN

PCI-AD16

PCI-FRAMEPCI-TRDYPCI-STOP

PCI-DEVSEL

PCI-AD15

PCI-AD9PCI-CBE0

PCI-AD6PCI-AD4PCI-AD2PCI-AD0

M66EN

MPCIACT

IRQ-PCIIRQ-PCI

PCI-AD10

PCI-AD8PCI-AD7

PCI-AD5

PCI-AD3

PCI-AD1

RESET-mPCI

PCI-GNT-MINI

PME

PCI-AD30

PCI-AD28PCI-AD26PCI-AD24

PCI-AD22PCI-AD20PCI-PAR

PCI-AD18

PCI-CLK-MINI

PCI-REQ-MINI

PCI-AD31PCI-AD29

PCI-AD27PCI-AD25

PCI-CBE3PCI-AD23

PCI-AD21PCI-AD19

PCI-AD17PCI-CBE2PCI-IRDY

PCI-SERR

PCI-PERRPCI-CBE1PCI-AD14

PCI-AD12

18310_546_090303.eps090303

Page 132: Q549---32pfl9604ser

EN 132Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: DDR Supply

NC

NCA

RE

F

K

C

3A21 C3

6 7 8

IA12 E7

IA13 E6IAC2 E3

IA09 E5IA10 C1IA11 E5

6 7 8

DDR SUPPLY

G

C

D

E

2A30 E72AC0 E1

E

1M01 E32A10 E3

A

B

7A00-2 D5

3A07 C1

I

2A11 E52A12 E52A13 B6

D

2A15 C4

3

C

IA03 A5

G

13

IA04 B5IA05 A6IA06 B5IA07 D4IA08 D3

4 51 2 3

3A20 C3

7A03 D3

3A22 C4

1 2 3

IAC3 E3

5

1 2

9 10

C

E

H

All

right

s re

serv

ed. R

epro

duct

ion

in w

hole

or i

n pa

rts

5

F

2A21 B52A22 C1

A

B

2A25 A72A26 A72A27 B72A28 D72A29 D7

7A00-1 A5

3A26 A13A27 A1

7A01 A6

11

8

2A14 B6

12is

pro

hibi

ted

with

out t

he w

ritte

n co

nsen

t of t

he c

opyr

ight

J

2A16 C42A19 A52A20 A4

IA02 A4

6

3A10 B33A11 A33A12 A4

H

3A15 B53A16 E53A17 B53A18 E63A19 D6

7A02 D7

7A07 A1

FAC0 E3

4

FA01 A6FA02 E6FA03 E6FA04 A1

D

IAC4 E1

F

E

J

IA01 B3

2A23 E62A24 E6

3AC0 E15AC1 E25AC2 E25AC4 E36A01 E7

3A25 D43A24 D4

D

Aow

ner.

A

B

C

2 51

13

11

43

64

3A08 A3

3A13 A63A14 B5

7

3A09 A3

5

67

84

FA06 C4

12

7 8 9 10

B

I

3A23 C5

LM8337A00-2

3A18

1K0

+V-LM833

100n

2A20

+12V

IA08

3A13

22R

+3V3F

1n0

2A11

330p2A

12 6A01

SS

24

1K0

3A14

IA12IA13

RES

3A20

4K7

IA02

FA02

2A13 1u

0

+V-LM833

2A29

1u0

FA01

2A21

330p

FA06

FA03

TS24317A07

3

AK

1

R2

53 1

2

4RES

TS431AILT7A03

1%2K

23A25

22K

3A24

RE

S

RES

4K7

3A21

470R

RES

3A08

3A09

RE

S47

0R

10K

3A11

1u0

2A24

RE

S 6.3V

22u2A

301u

0

2A26

22R

3A19

+2V5-REF

3A15

22K

3A16 1K

0

2A15

22n

IA10

RES

2A28

1u0

IA03

1K0

3A23

+12V

3A22

RES1%

TV543 R2 LDIPNX

MINI PCI

A3130

RES

1K0

32008-10-10

Maelegheer Ingrid

2008-11-21

ROYAL PHILIPS ELECTRONICS N.V. 20082008-01-18

22

SETNAMECHN

CLASS_NO

SUPERS.

2

NAME

DATECHECK

8204 000 8935

IA07

+2V5

3A12 1K

0

1u0

2A14

+V-LM833

IA01

100n

2A10

IAC4

RE

S

30R5AC2

IAC2

+3V3F

10R

3AC0

7A02PHD38N02LT

FAC0

1K03A

17

7A00-13

21

84

+2V5-REF

LM833

+12V

IA05

2K2

3A26

1K0

3A10

2A22

100n

3A07

10R

+1V8-PNX85XXIA11

IA06

IA04

IA09

2A27

22u

6.3V

RE

S

+3V3-STANDBY IAC3

2A25

1u0

30R5AC4

FA04

3

5AC1

30R

PHD38N02LT7A01

2

1

1M01

123

RES

2A16

330p

100p

2AC0

2A23

1u0

2A19

1n0

3A27

2K2

KEYBOARD

18310_547_090303.eps090303

Page 133: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 133Q549.2E LA 10.

2009-May-08

SSB: Audio

VIA VIA

VIA

VIA

VCLAMP

MUTE

IN

BSL

SD

R

AVCC

L

BSR

GND_HS

L

PGNDAGND L R

L

OUT

R

BYPASS

1

R

0

PVCC

GAIN

C

1

E

2

12

F

1735 E9

3 4 9

A

G

7

D

J

4

1D38 E6

12

1

4

AUDIO

J

2 3 4 5

I

H

2D12 C82D13 F9

ID38 D4

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2007-10-12 ROYAL PHILIPS ELECTRONICS N.V. 2007

2008-11-21

Randal De Keyzer

2008-10-10 3

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LEFT-SPEAKER

18310_548_090303.eps090303

Page 134: Q549---32pfl9604ser

EN 134Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: SRP List Explanation

1 . 1 . Introduction

Example

SRP (Service Re ference Protocol) is a softw are too l that creates a list w i th all refer e n c es to signal lines. The list contains references to the signals w i thin all schemat ics of a PWB. It replaces the text refe r ences currentl y p r inted next t o the signal names in the schematics. These printed refe rences are created man ually an d are t h e r efore n o t guar an teed to be 100 % correct. In additio n , in the current crowded schema t ics there is often none or ver y little pl ace for these references. Some of the PW B schematics w ill use SRP while others w ill sti ll use the manual refe rences. Either there w ill be an SRP r e fer ence list for a schematic, or ther e w ill be pr inted r e ferences in the schematic.

1.2. No n - SRP Schematics

There a r e severa l different signals available in a schematic:

1.2.1. Po w e r Supply Lines

All pow er suppl y lines are available in t he suppl y line overview (see chapter 6). I n th e schematics (se e chapter 7) is n o t indicated w h e r e supplies are coming from or going to. It is how ever indi cated if a supply is incoming (created elsew h e r e), o r outgoing (cr eat ed or adapt ed in the current sche m atic).

+5 V +5 V

Outgoing Incoming

1.2.2. Normal Signals

For no rmal signals, a schematic r e ference (e. g . B1 4b) is placed next to the signals.

si gnal _nam e B 14b

1.2.3. Grounds

For no rmal and s pecial grounds (e .g. GN DH OT o r GND3V3 etc.), n o thing is indicate d.

1.3. SRP Schematics

SRP is a tool, w h ich automatically creates a list w i th signal reference s , indicating on which sc hematic t he signals are used. A reference is cr eated for all signals indicat ed w i th an SRP s y mbol, these s y mbols are:

+5 V +5 V Power suppl y li ne.

na m e na m e Stand alone signal or sw itching li ne (used as less as possible).

na m e na m e

Signal line into a w i re tree.

na m e na m e

Sw itching line into a w i re tre e .

na m e

Bi-directional lin e (e.g. SDA ) into a w i r e tree.

na m e

Signal line into a w i r e tree, its dir e ction depends on t he circuit (e.g. ingoing for PD P, outgoing for L C D sets).

Remarks: • When there is a black dot on the "signal dire ction arrow" it is an SRP symbol, so there will be a reference to the signal

name in the SRP list. • All references to normal grounds (Ground symbols without additi onal text) are not listed in the reference list, this to keep

it concise. • Signals that are not used in multiple schematics, but only onc e or several times in the same schematic, are included

in the SRP reference list, but only with one reference.

Additional Tip:

When using the PDF service manual file, you can very easily search for signal names and follow the signal over all the schematics. In Adobe PDF reader: • Select the signal name you want to sear ch for, with the "Select text" tool. • Copy and paste the signal name in the "Search PDF" tool. • Search for all occurrences of the signal name. • Now you can quickly jump between the different occurrences and follow the signal over all schematics. It is advised to

"zoom in" to e.g. 150% to see clearly, which text is select ed. Then you can zoom out, to get an overview of the complete schematic.

PS. It is recommended to use at least Adobe PDF (reader) version 6. x, due to better search possibilities in this version. 10000_031_090121.eps

090121

Net Name Diagram +12-15V AP1 (4x) +12-15V AP4 (4x) +12-15V AP5 (12x) +12-15V AP6 (4x) +12-15V AP7 (8x) +12V AP1 (4x) +12V_NF AP1 (2x) +12VAL AP1 (2x) +25VLP AP1 (4x) +25VLP AP2 (1x) +3V3-STANDBY AP5 (3x) +400V-F AP1 (2x) +400V-F AP2 (2x) +400V-F AP3 (2x) +5V2 AP1 (6x) +5V2 AP2 (1x) +5V2-NF AP1 (1x) +5V2-NF AP2 (1x) +5V-SW AP1 (6x) +5V-SW AP2 (1x) +8V6 AP1 (3x) +AUX AP1 (2x) +AUX AP2 (1x) +DC-F AP1 (2x) +DC-F AP3 (2x) +SUB-SPEAKER AP5 (1x) +SUB-SPEAKER AP6 (2x) -12-15V AP1 (4x) -12-15V AP4 (6x) -12-15V AP5 (14x) -12-15V AP6 (6x) -12-15V AP7 (8x) AL-OFF AP1 (2x) AUDIO-L AP4 (1x) AUDIO-L AP5 (1x) AUDIO-PROT AP5 (3x) AUDIO-R AP4 (1x) AUDIO-R AP5 (1x) AUDIO-SW AP5 (1x) AUDIO-SW AP7 (1x) BOOST AP1 (2x) CPROT AP4 (2x) CPROT AP5 (1x) CPROT-SW AP5 (1x) CPROT-SW AP6 (2x) -DC-F AP1 (2x) -DC-F AP3 (2x) DC-PROT AP1 (1x) DC-PROT AP5 (2x) DIM-CONTROL AP1 (2x) FEEDBACK+SW AP6 (2x) FEEDBACK-L AP4 (2x) FEEDBACK-R AP4 (2x) FEEDBACK-SW AP6 (2x) GND-AL AP1 (2x) GNDHA AP1 (40x) GNDHA AP2 (20x) GNDHA AP3 (2x) GNDHOT AP3 (2x) GND-L AP1 (2x) GND-L AP4 (4x) GND-L AP5 (34x) GND-LL AP4 (7x) GND-LL AP5 (1x) GND-LR AP4 (7x) GND-LR AP5 (1x) GND-LSW AP5 (1x) GND-LSW AP6 (15x) GND-S AP1 (11x) GND-SA AP4 (8x) GND-SA AP5 (2x) GND-SA AP6 (8x) GND-SA AP7 (6x) GNDscrew AP3 (2x) GNDscrew AP5 (2x) GND-SSB AP5 (3x) GND-SSP AP1 (51x) GND-SSP AP2 (15x) IN+SW AP6 (2x) IN-L AP4 (2x) IN-R AP4 (2x) IN-SW AP6 (2x) INV-MUTE AP4 (1x) INV-MUTE AP5 (1x) INV-MUTE AP6 (1x) LEFT-SPEAKER AP4 (1x) LEFT-SPEAKER AP5 (1x) MUTE AP4 (2x) MUTE AP5 (1x) MUTE AP6 (2x) ON-OFF AP1 (3x) OUT AP6 (1x) OUT AP7 (2x) OUTN AP6 (1x) OUTN AP7 (1x) POWER-GOOD AP1 (2x) POWER-OK-PLATFORM AP1 (2x) RIGHT-SPEAKER AP4 (1x) RIGHT-SPEAKER AP5 (1x) SOUND-ENABLE AP5 (3x) STANDBY AP1 (5x) STANDBY AP2 (1x) -SUB-SPEAKER AP5 (1x) -SUB-SPEAKER AP6 (2x) V-CLAMP AP1 (1x) V-CLAMP AP3 (2x)

Personal Notes:

Page 135: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 135Q549.2E LA 10.

2009-May-08

SSB: SRP List Part 1

3104 313 6343.218310_700_090309.eps

090309

Netname Schematic

B01B +12VB01C +12VB02B +12VB06B +12VB06C +12VB07B +12VB07H +12VB08B +12VB09B +12VB01B +12VDB05H +12VDB01A +12VFB01B +12VFB01A +12VF1B01C +12VF2B02B +1V2B02B +1V2AB06E +1V2-FPGAB06G +1V2-FPGAB06A +1V2MB06E +1V2-PLLB06G +1V2-PLLB01C +1V2-PNX5100B04A +1V2-PNX5100B05C +1V2-PNX5100B05C +1V2-PNX5100-CLOCKB05C +1V2-PNX5100-DDR-PLL1B05C +1V2-PNX5100-DLLB05C +1V2-PNX5100-LVDS-PLLB05C +1V2-PNX5100-TRI-PLL1B05C +1V2-PNX5100-TRI-PLL2B05C +1V2-PNX5100-TRI-PLL3B01A +1V2-PNX85XXB02B +1V2-PNX85XXB04A +1V2-PNX85XXB04P +1V2-PNX85XXB06A +1V2-PNX85XXB06E +1V2-PNX85XXB01A +1V2-STANDBYB01B +1V2-STANDBYB04P +1V2-STANDBYB05A +1V8-PNX5100B05C +1V8-PNX5100B06E +1V8-PNX5100B04G +1V8-PNX85XXB04P +1V8-PNX85XXB06E +1V8-PNX85XXB07D +1V8-PNX85XXB09B +1V8-PNX85XXB06A +2V5B06E +2V5B06F +2V5B09B +2V5B06F +2V5-DDR1B06G +2V5-DDR1B06E +2V5in-FPGAB06G +2V5in-FPGAB06A +2V5MB06E +2V5out-FPGAB06G +2V5out-FPGAB06E +2V5-PLLB06G +2V5-PLLB09B +2V5-REFB01B +33VTUNB02A +33VTUNB01A +3V3B01B +3V3B02B +3V3B04A +3V3B04L +3V3B04M +3V3B04N +3V3B04P +3V3B05C +3V3B05E +3V3B05F +3V3B05G +3V3B05H +3V3B05I +3V3B06A +3V3B06B +3V3B06C +3V3B06E +3V3B07A +3V3B07C +3V3B07D +3V3B07F +3V3B07G +3V3B07H +3V3B08A +3V3B08B +3V3B08D +3V3B09A +3V3B02A +3V3AB02B +3V3AB02B +3V3DB02B +3V3EB07G +3V3-ET-ANAB07G +3V3-ET-DIGB01A +3V3FB05H +3V3FB09B +3V3FB06E +3V3-FPGAB06G +3V3-FPGAB06A +3V3MB09A +3V3-mPCIB07F +3V3-NANDB04A +3V3-PERB04B +3V3-PERB04E +3V3-PERB04F +3V3-PERB04N +3V3-PERB04P +3V3-PERB05C +3V3-PNX5100-CLOCKB05C +3V3-PNX5100-DDR-PLL0B05C +3V3-PNX5100-LVDS-INB05C +3V3-PNX5100-LVDS-PLLB01B +3V3-STANDBYB04A +3V3-STANDBYB04P +3V3-STANDBYB07D +3V3-STANDBY

B08D +3V3-STANDBYB09B +3V3-STANDBYB01B +5VB01C +5VB04A +5VB04L +5VB06A +5VB07C +5VB07D +5VB08A +5VB08B +5VB08D +5VB09A +5VB01C +5V5-TUNB07H +5V5-TUNB07E +5V-DDCB07D +5V-EDIDB07E +5V-EDIDB09A +5V-mPCIB02A +5V-TUNB02B +5V-TUNB07H +5V-TUNB02B +5V-TUN-CVBSB02A +5V-TUN-PINB04I +AUDIO-LB10 +AUDIO-LB01B +AUDIO-POWERB04I +AUDIO-POWERB04M +AUDIO-POWERB10 +AUDIO-POWERB05H +VDISPB06D +VDISPB05E +VDISP1B05H +VDISP1B05E +VDISP2B05H +VDISP2B09B +V-LM833B02A +VTUNB07D 1V8-HDMIB04I (1×) ADAC(1)B04L (1×) ADAC(1)B04I (1×) ADAC(2)B04L (1×) ADAC(2)B04L (1×) ADAC(3)B04M (1×) ADAC(3)B04L (1×) ADAC(4)B04M (1×) ADAC(4)B04I (1×) ADAC(5)B04L (1×) ADAC(5)B04I (1×) ADAC(6)B04L (1×) ADAC(6)B04I (1×) ADAC(7)B04L (3×) ADAC(7)B04I (1×) ADAC(8)B04L (3×) ADAC(8)B07D (4×) AIN-5VB04A (2×) ALEB05D (1×) AMBI-VSB02B (2×) ANTENNA-CTRLB02A (2×) ANTENNA-SUPPLYB02B (1×) ANTENNA-SUPPLYB04M (1×) A-PLOPB08A (1×) A-PLOPB08B (2×) A-PLOPB08A (3×) AP-SCART-OUT-LB08A (3×) AP-SCART-OUT-RB07D (2×) ARX0-B07D (2×) ARX0+B07D (2×) ARX1-B07D (2×) ARX1+B07D (2×) ARX2-B07D (2×) ARX2+B07D (2×) ARXC-B07D (2×) ARXC+B07D (3×) ARX-DDC-SCLB07D (3×) ARX-DDC-SDAB07D (2×) ARX-HOTPLUGB06E (1×) ASDOB06G (1×) ASDOB04M (1×) A-STBYB10 (2×) A-STBYB04I (1×) AUDIO-CL-LB08A (1×) AUDIO-CL-LB04I (1×) AUDIO-CL-RB08A (1×) AUDIO-CL-RB04M (1×) AUDIO-HDPH-L-APB08C (1×) AUDIO-HDPH-L-APB04M (1×) AUDIO-HDPH-R-APB08C (1×) AUDIO-HDPH-R-APB04L (1×) AUDIO-IN1-LB08D (2×) AUDIO-IN1-LB04L (1×) AUDIO-IN1-RB08D (2×) AUDIO-IN1-RB04L (1×) AUDIO-IN2-LB08A (1×) AUDIO-IN2-LB04L (1×) AUDIO-IN2-RB08A (1×) AUDIO-IN2-RB04L (1×) AUDIO-IN3-LB08B (1×) AUDIO-IN3-LB04L (1×) AUDIO-IN3-RB08B (1×) AUDIO-IN3-RB04L (1×) AUDIO-IN4-LB07B (1×) AUDIO-IN4-LB04L (1×) AUDIO-IN4-RB07B (1×) AUDIO-IN4-RB04L (1×) AUDIO-IN5-LB08C (2×) AUDIO-IN5-LB04L (1×) AUDIO-IN5-RB08C (2×) AUDIO-IN5-RB04A (2×) AUDIO-MUTEB10 (1×) AUDIO-MUTEB04I (1×) AUDIO-OUT-LB08B (1×) AUDIO-OUT-LB04I (1×) AUDIO-OUT-RB08B (1×) AUDIO-OUT-RB04I (1×) -AUDIO-RB10 (1×) -AUDIO-RB04I (7×) AUDIO-VDDB04M (2×) AUDIO-VDDB08A (1×) AV1-AUDIO-LB08D (3×) AV1-AUDIO-LB08A (1×) AV1-AUDIO-RB08D (3×) AV1-AUDIO-R

B08A (1×) AV1-BB08D (3×) AV1-BB04A (1×) AV1-BLKB08A (1×) AV1-BLKB08D (1×) AV1-BLKB08A (1×) AV1-BLK-BOB08D (1×) AV1-BLK-BOB08A (1×) AV1-CVBSB08D (3×) AV1-CVBSB08A (1×) AV1-GB08D (3×) AV1-GB04K (1×) AV1-PBB08D (2×) AV1-PBB04K (1×) AV1-PRB08D (2×) AV1-PRB08A (1×) AV1-RB08D (3×) AV1-RB04A (1×) AV1-STATUSB08A (1×) AV1-STATUSB04K (1×) AV1-YB08D (2×) AV1-YB04K (1×) AV1-Y_CVBSB08B (1×) AV1-Y_CVBSB08D (2×) AV1-Y_CVBSB04A (1×) AV2-BLKB08A (1×) AV2-BLKB04A (1×) AV2-STATUSB08A (1×) AV2-STATUSB04K (1×) AV2-Y_CVBSB08A (1×) AV2-Y_CVBSB08B (1×) AV2-Y_CVBSB04K (1×) AV3-PBB08A (1×) AV3-PBB04K (1×) AV3-PRB08A (1×) AV3-PRB04K (1×) AV3-YB08A (1×) AV3-YB04K (1×) AV4-PBB08A (1×) AV4-PBB08B (1×) AV4-PBB04K (1×) AV4-PRB08A (1×) AV4-PRB08B (1×) AV4-PRB04K (2×) AV4-YB08A (1×) AV4-YB08B (1×) AV4-YB04K (1×) AV5-PBB08A (1×) AV5-PBB04K (1×) AV5-PRB08A (1×) AV5-PRB04K (2×) AV5-YB08A (1×) AV5-YB01B (1×) BACKLIGHT-BOOSTB05H (1×) BACKLIGHT-BOOSTB05H (1×) BACKLIGHT-CONTROL-FPGA-INB06A (1×) BACKLIGHT-CONTROL-FPGA-INB06G (1×) BACKLIGHT-CONTROL-FPGA-INB05H (3×) BACKLIGHT-CTRLB01B (1×) BACKLIGHT-OUTB05E (1×) BACKLIGHT-OUTB05H (1×) BACKLIGHT-OUTB06G (1×) BACKLIGHT-OUTB05H (1×) BACKLIGHT-OUT2B06G (1×) BACKLIGHT-OUT2B01B (1×) BACKLIGHT-PWM-ANA-DISPB05H (1×) BACKLIGHT-PWM-ANA-DISPB05H (2×) BACKLIGHT-PWM-ANA-SSBB02A (3×) B-IF-_N-IF-B02A (3×) B-IF+_N-IF+B07D (4×) BIN-5VB06A (2×) BL-CLKB06A (2×) BL-CSB06A (2×) BL-HSB06A (2×) BL-MISOB06A (2×) BL-MOSIB05D (1×) BL-OSCLKB06A (1×) BL-OSCLKB05D (1×) BL-SCKB06A (1×) BL-SCKB05D (1×) BL-SD0B06A (1×) BL-SD0B06A (2×) BL-VSB05D (1×) BL-WSB06A (1×) BL-WSB08D (2×) BO-AUDIO-LB08D (2×) BO-AUDIO-RB08D (2×) BO-BB08D (2×) BO-CVBSB08D (2×) BO-GB04A (2×) BOLT-ON-IOB04N (1×) BOLT-ON-IOB08D (3×) BOLT-ON-IOB04A (2×) BOLT-ON-TS-ENnB04N (1×) BOLT-ON-TS-ENnB05H (3×) BOOST-CTRLB04E (2×) BOOTMODEB08D (2×) BO-RB07D (2×) BRX0-B07D (2×) BRX0+B07D (2×) BRX1-B07D (2×) BRX1+B07D (2×) BRX2-B07D (2×) BRX2+B07D (2×) BRXC-B07D (2×) BRXC+B07D (3×) BRX-DDC-SCLB07D (3×) BRX-DDC-SDAB07D (2×) BRX-HOTPLUGB04K (1×) B-VGAB08B (1×) B-VGAB04N (1×) CA-ADDENB07H (3×) CA-ADDENB04N (1×) CA-CD1B07A (2×) CA-CD1B04N (1×) CA-CD2B07A (2×) CA-CD2B07A (1×) CA-CE1B07H (1×) CA-CE1B07A (1×) CA-CE2B07H (1×) CA-CE2B04N (1×) CA-DATADIRB07H (1×) CA-DATADIRB04N (1×) CA-DATAEN

B07H (1×) CA-DATAENB07A (2×) CA-INPACKB07A (1×) CA-IORDB07H (1×) CA-IORDB07A (1×) CA-IOWRB07H (1×) CA-IOWRB04N (1×) CA-MDI0B07A (1×) CA-MDI0B04N (1×) CA-MDI1B07A (1×) CA-MDI1B04N (1×) CA-MDI2B07A (1×) CA-MDI2B04N (1×) CA-MDI3B07A (1×) CA-MDI3B04N (1×) CA-MDI4B07A (1×) CA-MDI4B04N (1×) CA-MDI5B07A (1×) CA-MDI5B04N (1×) CA-MDI6B07A (1×) CA-MDI6B04N (1×) CA-MDI7B07A (1×) CA-MDI7B04N (1×) CA-MDO0B07A (2×) CA-MDO0B04N (1×) CA-MDO1B07A (2×) CA-MDO1B04N (1×) CA-MDO2B07A (2×) CA-MDO2B04N (1×) CA-MDO3B07A (2×) CA-MDO3B04N (1×) CA-MDO4B07A (2×) CA-MDO4B04N (1×) CA-MDO5B07A (2×) CA-MDO5B04N (1×) CA-MDO6B07A (2×) CA-MDO6B04N (1×) CA-MDO7B07A (2×) CA-MDO7B04N (1×) CA-MICLKB07A (1×) CA-MICLKB04N (1×) CA-MISTRTB07A (1×) CA-MISTRTB04N (1×) CA-MIVALB07A (1×) CA-MIVALB04N (2×) CA-MOCLK_VS2B07A (2×) CA-MOCLK_VS2B04N (1×) CA-MOSTRTB07A (2×) CA-MOSTRTB04N (1×) CA-MOVALB07A (2×) CA-MOVALB07A (1×) CA-OEB07H (1×) CA-OEB07A (1×) CA-REGB07H (1×) CA-REGB04N (1×) CA-RSTB07A (2×) CA-RSTB04N (1×) CA-VS1B07A (2×) CA-VS1B07A (2×) CA-WAITB07H (1×) CA-WAITB07A (1×) CA-WEB07H (1×) CA-WEB06A (3×) CCLKB04A (2×) CEC-HDMIB07D (1×) CEC-HDMIB07D (4×) CIN-5VB06G (2×) CLK-OUT2-PNX5100B05F (1×) CLK-OUT-PNX5100B06A (1×) CLK-OUT-PNX5100B06G (1×) CLK-OUT-PNX5100B06E (1×) CON20B06G (1×) CON20B06E (1×) CON21B06G (1×) CON21B06E (1×) CON22B06G (1×) CON22B06E (1×) CON23B06G (1×) CON23B06E (1×) CON26B06G (1×) CON26B06E (1×) CON27B06G (1×) CON27B06E (1×) CONF-DONEB06G (1×) CONF-DONEB07D (2×) CRX0-B07D (2×) CRX0+B07D (2×) CRX1-B07D (2×) CRX1+B07D (2×) CRX2-B07D (2×) CRX2+B07D (2×) CRXC-B07D (2×) CRXC+B07D (3×) CRX-DDC-SCLB07D (3×) CRX-DDC-SDAB07D (2×) CRX-HOTPLUGB06A (4×) CSO-BB05H (2×) CTRL1-PNX5100B05H (2×) CTRL2-PNX5100B05H (2×) CTRL3-PNX5100B05H (3×) CTRL4-PNX5100B05E (1×) CTRL-DISP1B05H (1×) CTRL-DISP1B05E (1×) CTRL-DISP2B05H (1×) CTRL-DISP2B05E (1×) CTRL-DISP3B05H (1×) CTRL-DISP3B05E (1×) CTRL-DISP4B05H (2×) CTRL-DISP4B02B (1×) CVBS4B04K (1×) CVBS4B08B (2×) CVBS-MON-OUT-CINCHB08A (2×) CVBS-OUT-SC1B02B (1×) CVBS-TER-OUTB08A (1×) CVBS-TER-OUTB08D (1×) CVBS-TER-OUTB06E (1×) DATA0B06G (1×) DATA0B06E (1×) DCLKB06G (1×) DCLKB04H (1×) DDCA-SCLB07E (1×) DDCA-SCLB04H (1×) DDCA-SDAB07E (1×) DDCA-SDA

B04H (1×) DDC-SCLB07D (1×) DDC-SCLB04H (1×) DDC-SDAB07D (1×) DDC-SDAB04G (3×) DDR2-A0B04G (3×) DDR2-A1B04G (3×) DDR2-A10B04G (3×) DDR2-A11B04G (3×) DDR2-A12B04G (3×) DDR2-A2B04G (3×) DDR2-A3B04G (3×) DDR2-A4B04G (3×) DDR2-A5B04G (3×) DDR2-A6B04G (3×) DDR2-A7B04G (3×) DDR2-A8B04G (3×) DDR2-A9B04G (3×) DDR2-BA0B04G (3×) DDR2-BA1B04G (2×) DDR2-BA2B04G (3×) DDR2-CASB04G (3×) DDR2-CKEB04G (4×) DDR2-CLK_NB04G (4×) DDR2-CLK_PB04G (3×) DDR2-CSB04G (2×) DDR2-D0B04G (2×) DDR2-D1B04G (2×) DDR2-D10B04G (2×) DDR2-D11B04G (2×) DDR2-D12B04G (2×) DDR2-D13B04G (2×) DDR2-D14B04G (2×) DDR2-D15B04G (2×) DDR2-D16B04G (2×) DDR2-D17B04G (2×) DDR2-D18B04G (2×) DDR2-D19B04G (2×) DDR2-D2B04G (2×) DDR2-D20B04G (2×) DDR2-D21B04G (2×) DDR2-D22B04G (2×) DDR2-D23B04G (2×) DDR2-D24B04G (2×) DDR2-D25B04G (2×) DDR2-D26B04G (2×) DDR2-D27B04G (2×) DDR2-D28B04G (2×) DDR2-D29B04G (2×) DDR2-D3B04G (2×) DDR2-D30B04G (2×) DDR2-D31B04G (2×) DDR2-D4B04G (2×) DDR2-D5B04G (2×) DDR2-D6B04G (2×) DDR2-D7B04G (2×) DDR2-D8B04G (2×) DDR2-D9B04G (2×) DDR2-DQM0B04G (2×) DDR2-DQM1B04G (2×) DDR2-DQM2B04G (2×) DDR2-DQM3B04G (2×) DDR2-DQS0_NB04G (2×) DDR2-DQS0_PB04G (2×) DDR2-DQS1_NB04G (2×) DDR2-DQS1_PB04G (2×) DDR2-DQS2_NB04G (2×) DDR2-DQS2_PB04G (2×) DDR2-DQS3_NB04G (2×) DDR2-DQS3_PB04G (3×) DDR2-ODTB04G (3×) DDR2-RASB04G (2×) DDR2-VREF-CTRLB04G (3×) DDR2-VREF-DDRB04G (3×) DDR2-WEB04A (3×) DETECT1B01B (1×) DETECT-12VB04A (1×) DETECT-12VB04A (3×) DETECT2B07D (4×) DIN-5VB06A (2×) DONEB06F (2×) DQ1(0)B06F (2×) DQ1(1)B06F (2×) DQ1(10)B06F (2×) DQ1(11)B06F (2×) DQ1(12)B06F (2×) DQ1(13)B06F (2×) DQ1(14)B06F (2×) DQ1(15)B06F (2×) DQ1(2)B06F (2×) DQ1(3)B06F (2×) DQ1(4)B06F (2×) DQ1(5)B06F (2×) DQ1(6)B06F (2×) DQ1(7)B06F (2×) DQ1(8)B06F (2×) DQ1(9)B06F (2×) DQS10B06F (2×) DQS11B07D (2×) DRX0-B07D (2×) DRX0+B07D (2×) DRX1-B07D (2×) DRX1+B07D (2×) DRX2-B07D (2×) DRX2+B07D (2×) DRXC-B07D (2×) DRXC+B07D (3×) DRX-DDC-SCLB07D (3×) DRX-DDC-SDAB07D (2×) DRX-HOTPLUGB04A (2×) EAB07E (4×) EIN-5VB04A (2×) EJTAG-DETECTB06B (1×) EJTAG-DETECTB05F (1×) EJTAG-PNX5100-TCKB05F (1×) EJTAG-PNX5100-TDIB05F (1×) EJTAG-PNX5100-TDOB05F (1×) EJTAG-PNX5100-TMSB05F (1×) EJTAG-PNX5100-TRSTnB04E (2×) EJTAG-TCKB06B (1×) EJTAG-TCKB04E (2×) EJTAG-TDIB06B (1×) EJTAG-TDIB04E (2×) EJTAG-TDO

B06B (1×) EJTAG-TDOB04E (2×) EJTAG-TMSB06B (1×) EJTAG-TMSB04E (2×) EJTAG-TRSTNB06B (1×) EJTAG-TRSTNB01B (1×) ENABLE-3V3B04A (2×) ENABLE-3V3B01A (1×) ENABLE-3V3-5VB01B (1×) ENABLE-3V3-5VB01C (1×) ENABLE-3V3-5VB07E (3×) ERX-DDC-SCLB07E (3×) ERX-DDC-SDAB07E (3×) ERX-HOTPLUGB06C (2×) FAN1-DRVB06C (2×) FAN1-OUTB06C (2×) FAN2-DRVB05H (1×) FAN-CTRL-1B06C (1×) FAN-CTRL-1B05H (1×) FAN-CTRL-2B02B (1×) FE-CLKB04N (3×) FE-CLKB02B (1×) FE-DATA0B04N (3×) FE-DATA0B02B (1×) FE-DATA1B04N (3×) FE-DATA1B02B (1×) FE-DATA2B04N (3×) FE-DATA2B02B (1×) FE-DATA3B04N (3×) FE-DATA3B02B (1×) FE-DATA4B04N (3×) FE-DATA4B02B (1×) FE-DATA5B04N (3×) FE-DATA5B02B (1×) FE-DATA6B04N (3×) FE-DATA6B02B (1×) FE-DATA7B04N (3×) FE-DATA7B04N (4×) FE-ERRB02B (1×) FE-SOPB04N (3×) FE-SOPB02B (1×) FE-VALIDB04N (3×) FE-VALIDB04K (1×) FRONT-CB08C (2×) FRONT-CB04K (1×) FRONT-Y_CVBSB08C (2×) FRONT-Y_CVBSB10 (2×) GND-AB01B (1×) GND-AUDIOB10 (16×) GND-AUDIOB01A (15×) GND-SIGB01C (15×) GND-SIG1B04K (1×) G-VGAB08B (1×) G-VGAB04H (1×) HDMIA-RX0-B07E (2×) HDMIA-RX0-B04H (1×) HDMIA-RX0+B07E (2×) HDMIA-RX0+B04H (1×) HDMIA-RX1-B07E (2×) HDMIA-RX1-B04H (1×) HDMIA-RX1+B07E (2×) HDMIA-RX1+B04H (1×) HDMIA-RX2-B07E (2×) HDMIA-RX2-B04H (1×) HDMIA-RX2+B07E (2×) HDMIA-RX2+B04H (1×) HDMIA-RXC-B07E (2×) HDMIA-RXC-B04H (1×) HDMIA-RXC+B07E (2×) HDMIA-RXC+B04H (1×) HDMIB-RX0-B07D (1×) HDMIB-RX0-B04H (1×) HDMIB-RX0+B07D (1×) HDMIB-RX0+B04H (1×) HDMIB-RX1-B07D (1×) HDMIB-RX1-B04H (1×) HDMIB-RX1+B07D (1×) HDMIB-RX1+B04H (1×) HDMIB-RX2-B07D (1×) HDMIB-RX2-B04H (1×) HDMIB-RX2+B07D (1×) HDMIB-RX2+B04H (1×) HDMIB-RXC-B07D (1×) HDMIB-RXC-B04H (1×) HDMIB-RXC+B07D (1×) HDMIB-RXC+B04H (1×) HOT-PLUGB04H (1×) HOT-PLUG-AB07E (1×) HOT-PLUG-AB04K (1×) H-SYNC-VGAB08B (1×) H-SYNC-VGAB04N (1×) I2C-SCLB07F (1×) I2C-SCLB04N (1×) I2C-SDAB07F (1×) I2C-SDAB09A (2×) IDSELB02A (1×) IF-B02B (1×) IF-B02A (1×) IF+B02B (1×) IF+B02A (2×) IF-AGCB02B (1×) IF-AGCB04K (1×) IF-NB02B (1×) IF-PB04K (1×) IF-PB09A (1×) IRQA-mPCIB09A (1×) IRQB-mPCIB04E (2×) IRQ-CAB04N (1×) IRQ-CAB07A (2×) IRQ-CAB04E (2×) IRQ-PCIB07G (1×) IRQ-PCIB09A (2×) IRQ-PCIB01B (1×) KEYBOARDB04A (2×) KEYBOARDB09B (1×) KEYBOARDB04A (3×) LAMP-ONB01B (1×) LAMP-ON-OUTB04A (1×) LAMP-ON-OUTB05E (1×) LAMP-ON-OUTB05H (2×) LCD-PWR-ONB01B (2×) LED1B04A (2×) LED1B01B (2×) LED2

B04A (2×) LED2B10 (3×) LEFT-SPEAKERB01B (2×) LIGHT-SENSORB04A (1×) LIGHT-SENSORB09A (2×) M66ENB07A (4×) MDO0B07A (4×) MDO1B07A (4×) MDO2B07A (4×) MDO3B07A (4×) MDO4B07A (4×) MDO5B07A (4×) MDO6B07A (4×) MDO7B04A (2×) MHP-SWITCHB08D (3×) MHP-SWITCHB06A (3×) MISOB06F (1×) MM1-A0B06G (1×) MM1-A0B06F (1×) MM1-A1B06G (1×) MM1-A1B06F (1×) MM1-A10B06G (1×) MM1-A10B06F (1×) MM1-A11B06G (1×) MM1-A11B06F (1×) MM1-A12B06G (1×) MM1-A12B06F (1×) MM1-A2B06G (1×) MM1-A2B06F (1×) MM1-A3B06G (1×) MM1-A3B06F (1×) MM1-A4B06G (1×) MM1-A4B06F (1×) MM1-A5B06G (1×) MM1-A5B06F (1×) MM1-A6B06G (1×) MM1-A6B06F (1×) MM1-A7B06G (1×) MM1-A7B06F (1×) MM1-A8B06G (1×) MM1-A8B06F (1×) MM1-A9B06G (1×) MM1-A9B06F (1×) MM1-BA0B06G (1×) MM1-BA0B06F (1×) MM1-BA1B06G (1×) MM1-BA1B06F (1×) MM1-CASB06G (1×) MM1-CASB06F (1×) MM1-CKEB06G (1×) MM1-CKEB06F (1×) MM1-CLK-B06G (1×) MM1-CLK-B06F (1×) MM1-CLK+B06G (1×) MM1-CLK+B06F (1×) MM1-CS0B06G (1×) MM1-CS0B06F (1×) MM1-D0B06G (1×) MM1-D0B06F (1×) MM1-D1B06G (1×) MM1-D1B06F (1×) MM1-D10B06G (1×) MM1-D10B06F (1×) MM1-D11B06G (1×) MM1-D11B06F (1×) MM1-D12B06G (1×) MM1-D12B06F (1×) MM1-D13B06G (1×) MM1-D13B06F (1×) MM1-D14B06G (1×) MM1-D14B06F (1×) MM1-D15B06G (1×) MM1-D15B06F (1×) MM1-D2B06G (1×) MM1-D2B06F (1×) MM1-D3B06G (1×) MM1-D3B06F (1×) MM1-D4B06G (1×) MM1-D4B06F (1×) MM1-D5B06G (1×) MM1-D5B06F (1×) MM1-D6B06G (1×) MM1-D6B06F (1×) MM1-D7B06G (1×) MM1-D7B06F (1×) MM1-D8B06G (1×) MM1-D8B06F (1×) MM1-D9B06G (1×) MM1-D9B06F (1×) MM1-DQS0B06G (1×) MM1-DQS0B06F (1×) MM1-DQS1B06G (1×) MM1-DQS1B06F (1×) MM1-RASB06G (1×) MM1-RAS

Page 136: Q549---32pfl9604ser

EN 136Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

SSB: SRP List Part 2

3104 313 6343.218310_701_090309.eps

090309

Netname Schematic

B06F (1×) MM1-WEB06G (1×) MM1-WEB07A (4×) MOCLK_VS2B06A (3×) MOSIB07A (4×) MOSTRTB07A (4×) MOVALB09A (2×) MPCIACTB06G (1×) MSEL0B06G (1×) MSEL1B06G (1×) MSEL2B06G (1×) MSEL3B07F (2×) NAND-AD(0)B07F (2×) NAND-AD(1)B07F (2×) NAND-AD(2)B07F (2×) NAND-AD(3)B07F (2×) NAND-AD(4)B07F (2×) NAND-AD(5)B07F (2×) NAND-AD(6)B07F (2×) NAND-AD(7)B07F (2×) NAND-ALEB07F (2×) NAND-CLEB07F (2×) NAND-REnB07F (2×) NAND-WEnB06G (2×) nCEB06G (2×) nCONFIGB06E (1×) nCSOB06G (1×) nCSOB06G (2×) nSTATUSB07D (6×) PCEC-HDMIB07E (2×) PCEC-HDMIB04F (1×) PCI-AD0B05G (1×) PCI-AD0B07F (1×) PCI-AD0B07G (1×) PCI-AD0B07H (1×) PCI-AD0B09A (1×) PCI-AD0B04F (1×) PCI-AD1B05G (1×) PCI-AD1B07F (1×) PCI-AD1B07G (1×) PCI-AD1B07H (2×) PCI-AD1B09A (1×) PCI-AD1B04F (1×) PCI-AD10B05G (1×) PCI-AD10B07G (1×) PCI-AD10B07H (1×) PCI-AD10B09A (1×) PCI-AD10B04F (1×) PCI-AD11B05G (1×) PCI-AD11B07G (1×) PCI-AD11B07H (1×) PCI-AD11B09A (2×) PCI-AD11B04F (1×) PCI-AD12B05G (1×) PCI-AD12B07G (1×) PCI-AD12B07H (1×) PCI-AD12B09A (2×) PCI-AD12B04F (1×) PCI-AD13B05G (1×) PCI-AD13B07G (1×) PCI-AD13B07H (1×) PCI-AD13B09A (2×) PCI-AD13B04F (1×) PCI-AD14B05G (1×) PCI-AD14B07G (1×) PCI-AD14B07H (1×) PCI-AD14B09A (1×) PCI-AD14B04F (1×) PCI-AD15B05G (1×) PCI-AD15B07G (1×) PCI-AD15B09A (1×) PCI-AD15B04F (1×) PCI-AD16B05G (1×) PCI-AD16B07G (1×) PCI-AD16B07H (1×) PCI-AD16B09A (1×) PCI-AD16B04F (1×) PCI-AD17B05G (1×) PCI-AD17B07G (1×) PCI-AD17B07H (1×) PCI-AD17B09A (1×) PCI-AD17B04F (1×) PCI-AD18B05G (1×) PCI-AD18B07G (1×) PCI-AD18B07H (1×) PCI-AD18B09A (1×) PCI-AD18B04F (1×) PCI-AD19B05G (1×) PCI-AD19B07G (1×) PCI-AD19B07H (1×) PCI-AD19B09A (1×) PCI-AD19B04F (1×) PCI-AD2B05G (1×) PCI-AD2B07G (1×) PCI-AD2B07H (1×) PCI-AD2B09A (1×) PCI-AD2B04F (1×) PCI-AD20B05G (1×) PCI-AD20B07G (1×) PCI-AD20B09A (1×) PCI-AD20B04F (1×) PCI-AD21B05G (1×) PCI-AD21B07G (1×) PCI-AD21B09A (1×) PCI-AD21B04F (1×) PCI-AD22B05G (1×) PCI-AD22B07G (1×) PCI-AD22B07H (1×) PCI-AD22B09A (1×) PCI-AD22B04F (1×) PCI-AD23B05G (1×) PCI-AD23B07G (2×) PCI-AD23B07H (1×) PCI-AD23B09A (1×) PCI-AD23B04F (2×) PCI-AD24B05G (1×) PCI-AD24B07F (1×) PCI-AD24B07G (1×) PCI-AD24B07H (1×) PCI-AD24B09A (1×) PCI-AD24B04F (1×) PCI-AD25

B05G (2×) PCI-AD25B07F (1×) PCI-AD25B07G (1×) PCI-AD25B07H (1×) PCI-AD25B09A (1×) PCI-AD25B04F (1×) PCI-AD26B05G (1×) PCI-AD26B07F (1×) PCI-AD26B07G (1×) PCI-AD26B07H (1×) PCI-AD26B09A (1×) PCI-AD26B04F (1×) PCI-AD27B05G (1×) PCI-AD27B07F (1×) PCI-AD27B07G (1×) PCI-AD27B07H (1×) PCI-AD27B09A (1×) PCI-AD27B04F (1×) PCI-AD28B05G (1×) PCI-AD28B07F (1×) PCI-AD28B07G (1×) PCI-AD28B07H (1×) PCI-AD28B09A (1×) PCI-AD28B04F (1×) PCI-AD29B05G (1×) PCI-AD29B07F (1×) PCI-AD29B07G (1×) PCI-AD29B07H (1×) PCI-AD29B09A (1×) PCI-AD29B04F (1×) PCI-AD3B05G (1×) PCI-AD3B07G (1×) PCI-AD3B07H (1×) PCI-AD3B09A (1×) PCI-AD3B04F (1×) PCI-AD30B05G (1×) PCI-AD30B07F (1×) PCI-AD30B07G (1×) PCI-AD30B07H (1×) PCI-AD30B09A (1×) PCI-AD30B04F (1×) PCI-AD31B05G (1×) PCI-AD31B07F (1×) PCI-AD31B07G (1×) PCI-AD31B07H (1×) PCI-AD31B09A (1×) PCI-AD31B04F (1×) PCI-AD4B05G (1×) PCI-AD4B07G (1×) PCI-AD4B07H (1×) PCI-AD4B09A (1×) PCI-AD4B04F (1×) PCI-AD5B05G (1×) PCI-AD5B07G (1×) PCI-AD5B07H (1×) PCI-AD5B09A (1×) PCI-AD5B04F (1×) PCI-AD6B05G (1×) PCI-AD6B07G (1×) PCI-AD6B07H (1×) PCI-AD6B09A (1×) PCI-AD6B04F (1×) PCI-AD7B05G (1×) PCI-AD7B07G (1×) PCI-AD7B07H (1×) PCI-AD7B09A (1×) PCI-AD7B04F (1×) PCI-AD8B05G (1×) PCI-AD8B07G (1×) PCI-AD8B07H (1×) PCI-AD8B09A (1×) PCI-AD8B04F (1×) PCI-AD9B05G (1×) PCI-AD9B07G (1×) PCI-AD9B07H (1×) PCI-AD9B09A (1×) PCI-AD9B04F (1×) PCI-CBE0B05G (1×) PCI-CBE0B07G (1×) PCI-CBE0B09A (1×) PCI-CBE0B04F (1×) PCI-CBE1B05G (1×) PCI-CBE1B07F (1×) PCI-CBE1B07G (1×) PCI-CBE1B07H (1×) PCI-CBE1B09A (1×) PCI-CBE1B04F (1×) PCI-CBE2B05G (1×) PCI-CBE2B07F (1×) PCI-CBE2B07G (1×) PCI-CBE2B07H (1×) PCI-CBE2B09A (1×) PCI-CBE2B04F (1×) PCI-CBE3B05G (1×) PCI-CBE3B07G (1×) PCI-CBE3B09A (1×) PCI-CBE3B04F (2×) PCI-CLK-ETHERNETB07G (1×) PCI-CLK-ETHERNETB04F (2×) PCI-CLK-MINIB09A (1×) PCI-CLK-MINIB04E (1×) PCI-CLK-OUTB04F (3×) PCI-CLK-OUTB04F (2×) PCI-CLK-PNX5100B05G (1×) PCI-CLK-PNX5100B04F (3×) PCI-CLK-PNX8535B09A (2×) PCI-CLKRUNB04F (2×) PCI-DEVSELB05G (1×) PCI-DEVSELB07G (1×) PCI-DEVSELB09A (1×) PCI-DEVSELB04F (2×) PCI-FRAMEB05G (1×) PCI-FRAMEB07G (1×) PCI-FRAMEB09A (1×) PCI-FRAMEB04F (2×) PCI-GNTB04F (2×) PCI-GNT-BB04F (1×) PCI-GNT-ETHB07G (1×) PCI-GNT-ETHB04F (1×) PCI-GNT-MINIB09A (1×) PCI-GNT-MINIB04F (2×) PCI-IRDYB05G (1×) PCI-IRDYB07G (1×) PCI-IRDY

B09A (1×) PCI-IRDYB04F (1×) PCI-PARB05G (1×) PCI-PARB07G (1×) PCI-PARB09A (1×) PCI-PARB04F (2×) PCI-PERRB05G (1×) PCI-PERRB07G (1×) PCI-PERRB09A (1×) PCI-PERRB04F (2×) PCI-REQB04F (2×) PCI-REQ-BB04F (1×) PCI-REQ-ETHB07G (1×) PCI-REQ-ETHB04F (1×) PCI-REQ-MINIB09A (1×) PCI-REQ-MINIB04F (2×) PCI-SERRB05G (1×) PCI-SERRB07G (1×) PCI-SERRB09A (1×) PCI-SERRB04F (2×) PCI-STOPB05G (1×) PCI-STOPB07G (1×) PCI-STOPB09A (1×) PCI-STOPB04F (2×) PCI-TRDYB05G (1×) PCI-TRDYB07G (1×) PCI-TRDYB09A (1×) PCI-TRDYB07A (1×) PCMCIA-A0B07H (1×) PCMCIA-A0B07A (1×) PCMCIA-A1B07H (1×) PCMCIA-A1B07A (1×) PCMCIA-A10B07H (1×) PCMCIA-A10B07A (1×) PCMCIA-A11B07H (1×) PCMCIA-A11B07A (1×) PCMCIA-A12B07H (1×) PCMCIA-A12B07A (1×) PCMCIA-A13B07H (1×) PCMCIA-A13B07A (1×) PCMCIA-A14B07H (1×) PCMCIA-A14B07A (1×) PCMCIA-A2B07H (1×) PCMCIA-A2B07A (1×) PCMCIA-A3B07H (1×) PCMCIA-A3B07A (1×) PCMCIA-A4B07H (1×) PCMCIA-A4B07A (1×) PCMCIA-A5B07H (1×) PCMCIA-A5B07A (1×) PCMCIA-A6B07H (1×) PCMCIA-A6B07A (1×) PCMCIA-A7B07H (1×) PCMCIA-A7B07A (1×) PCMCIA-A8B07H (1×) PCMCIA-A8B07A (1×) PCMCIA-A9B07H (1×) PCMCIA-A9B07A (1×) PCMCIA-D0B07H (1×) PCMCIA-D0B07A (1×) PCMCIA-D1B07H (1×) PCMCIA-D1B07A (1×) PCMCIA-D2B07H (1×) PCMCIA-D2B07A (1×) PCMCIA-D3B07H (1×) PCMCIA-D3B07A (1×) PCMCIA-D4B07H (1×) PCMCIA-D4B07A (1×) PCMCIA-D5B07H (1×) PCMCIA-D5B07A (1×) PCMCIA-D6B07H (1×) PCMCIA-D6B07A (1×) PCMCIA-D7B07H (1×) PCMCIA-D7B07A (5×) PCMCIA-VCC-VPPB02A (2×) PDNB02B (1×) PDNB02A (1×) PDPB02B (1×) PDPB09A (2×) PMEB05A (3×) PNX5100-DDR2-A0B05A (3×) PNX5100-DDR2-A1B05A (3×) PNX5100-DDR2-A10B05A (3×) PNX5100-DDR2-A11B05A (3×) PNX5100-DDR2-A12B05A (3×) PNX5100-DDR2-A2B05A (3×) PNX5100-DDR2-A3B05A (3×) PNX5100-DDR2-A4B05A (3×) PNX5100-DDR2-A5B05A (3×) PNX5100-DDR2-A6B05A (3×) PNX5100-DDR2-A7B05A (3×) PNX5100-DDR2-A8B05A (3×) PNX5100-DDR2-A9B05A (3×) PNX5100-DDR2-BA0B05A (3×) PNX5100-DDR2-BA1B05A (3×) PNX5100-DDR2-CASB05A (3×) PNX5100-DDR2-CKEB05A (3×) PNX5100-DDR2-CLK_NB05A (3×) PNX5100-DDR2-CLK_PB05A (3×) PNX5100-DDR2-CSB05A (2×) PNX5100-DDR2-D0B05A (2×) PNX5100-DDR2-D1B05A (2×) PNX5100-DDR2-D10B05A (2×) PNX5100-DDR2-D11B05A (2×) PNX5100-DDR2-D12B05A (2×) PNX5100-DDR2-D13B05A (2×) PNX5100-DDR2-D14B05A (2×) PNX5100-DDR2-D15B05A (2×) PNX5100-DDR2-D16B05A (2×) PNX5100-DDR2-D17B05A (2×) PNX5100-DDR2-D18B05A (2×) PNX5100-DDR2-D19B05A (2×) PNX5100-DDR2-D2B05A (2×) PNX5100-DDR2-D20B05A (2×) PNX5100-DDR2-D21B05A (2×) PNX5100-DDR2-D22B05A (2×) PNX5100-DDR2-D23B05A (2×) PNX5100-DDR2-D24B05A (2×) PNX5100-DDR2-D25B05A (2×) PNX5100-DDR2-D26B05A (2×) PNX5100-DDR2-D27B05A (2×) PNX5100-DDR2-D28B05A (2×) PNX5100-DDR2-D29B05A (2×) PNX5100-DDR2-D3

B05A (2×) PNX5100-DDR2-D30B05A (2×) PNX5100-DDR2-D31B05A (2×) PNX5100-DDR2-D4B05A (2×) PNX5100-DDR2-D5B05A (2×) PNX5100-DDR2-D6B05A (2×) PNX5100-DDR2-D7B05A (2×) PNX5100-DDR2-D8B05A (2×) PNX5100-DDR2-D9B05A (2×) PNX5100-DDR2-DQM0B05A (2×) PNX5100-DDR2-DQM1B05A (2×) PNX5100-DDR2-DQM2B05A (2×) PNX5100-DDR2-DQM3B05A (2×) PNX5100-DDR2-DQS0_NB05A (2×) PNX5100-DDR2-DQS0_PB05A (2×) PNX5100-DDR2-DQS1_NB05A (2×) PNX5100-DDR2-DQS1_PB05A (2×) PNX5100-DDR2-DQS2_NB05A (2×) PNX5100-DDR2-DQS2_PB05A (2×) PNX5100-DDR2-DQS3_NB05A (2×) PNX5100-DDR2-DQS3_PB05A (3×) PNX5100-DDR2-ODTB05A (3×) PNX5100-DDR2-RASB05A (2×) PNX5100-DDR2-VREF-CTRLB05A (3×) PNX5100-DDR2-VREF-DDRB05A (3×) PNX5100-DDR2-WEB05F (1×) PNX5100-RST-OUTB05I (1×) PNX5100-RST-OUTB01B (1×) POWER-OKB04A (2×) POWER-OKB06A (2×) PROG-BB04A (2×) PSENB01B (1×) RCB04A (2×) RCB04A (1×) RC-INB08C (1×) RC-INB04A (1×) RC-OUTB08C (1×) RC-OUTB04A (4×) RC-UPB08D (1×) RC-UPB07D (2×) REF-3V3B04A (2×) REGIMBEAU_CVBS-SWITCHB08A (1×) REGIMBEAU_CVBS-SWITCHB04A (2×) RESET-AUDIOB04M (2×) RESET-AUDIOB04N (1×) RESET-BOLT-ONB07F (1×) RESET-BOLT-ONB04A (2×) RESET-ETHERNETB07G (2×) RESET-ETHERNETB09A (1×) RESET-ETHERNETB09A (2×) RESET-mPCIB04A (3×) RESET-NVMB04A (2×) RESET-PNX5100B05F (1×) RESET-PNX5100B04A (2×) RESET-STBYB02B (1×) RESET-SYSTEMB04A (2×) RESET-SYSTEMB04B (1×) RESET-SYSTEMB04E (1×) RESET-SYSTEMB02A (4×) RF-AGCB02B (1×) RF-AGCB10 (3×) RIGHT-SPEAKERB04H (1×) RREF-PNX85XXB04P (2×) RREF-PNX85XXB04K (1×) R-VGAB08B (1×) R-VGAB05B (1×) RX51001A-B06D (3×) RX51001A-B05B (1×) RX51001A+B06D (3×) RX51001A+B05B (1×) RX51001B-B06D (3×) RX51001B-B05B (1×) RX51001B+B06D (3×) RX51001B+B05B (1×) RX51001C-B06D (3×) RX51001C-B05B (1×) RX51001C+B06D (3×) RX51001C+B05B (1×) RX51001CLK-B06D (3×) RX51001CLK-B05B (1×) RX51001CLK+B06D (3×) RX51001CLK+B05B (1×) RX51001D-B06D (3×) RX51001D-B05B (1×) RX51001D+B06D (3×) RX51001D+B05B (1×) RX51001E-B06D (3×) RX51001E-B05B (1×) RX51001E+B06D (3×) RX51001E+B05B (1×) RX51002A-B06D (3×) RX51002A-B05B (1×) RX51002A+B06D (3×) RX51002A+B05B (1×) RX51002B-B06D (3×) RX51002B-B05B (1×) RX51002B+B06D (3×) RX51002B+B05B (1×) RX51002C-B06D (3×) RX51002C-B05B (1×) RX51002C+B06D (3×) RX51002C+B05B (1×) RX51002CLK-B06D (3×) RX51002CLK-B05B (1×) RX51002CLK+B06D (3×) RX51002CLK+B05B (1×) RX51002D-B06D (3×) RX51002D-B05B (1×) RX51002D+B06D (3×) RX51002D+B05B (1×) RX51002E-B06D (3×) RX51002E-B05B (1×) RX51002E+B06D (3×) RX51002E+B08D (3×) RXDB04E (2×) RXD-MIPSB08D (3×) RXD-MIPSB04E (2×) RXD-MIPS2B06B (1×) RXD-MIPS2B04A (2×) RXD-UPB08D (4×) RXD-UPB04E (2×) SCL1B04E (3×) SCL2B04E (2×) SCL3

B05F (1×) SCL-AMBI-3V3B06A (1×) SCL-AMBI-3V3B06G (1×) SCL-AMBI-3V3B04N (1×) SCL-BOLT-ONB06A (3×) SCL-BOLT-ONB08D (1×) SCL-BOLT-ONB05E (2×) SCL-DISPB06A (3×) SCL-DISPB06D (1×) SCL-DISPB01B (1×) SCL-SETB04E (2×) SCL-SETB06A (5×) SCL-SETB06C (2×) SCL-SETB06A (2×) SCL-SET0B06A (2×) SCL-SET1B02B (2×) SCL-SSBB04E (2×) SCL-SSBB05F (2×) SCL-SSBB06A (1×) SCL-SSBB06G (1×) SCL-SSBB07D (1×) SCL-SSBB08D (1×) SCL-SSBB04A (3×) SCL-UP-MIPSB04E (3×) SCL-UP-MIPSB04E (2×) SDA1B04E (3×) SDA2B04E (2×) SDA3B05F (1×) SDA-AMBI-3V3B06A (1×) SDA-AMBI-3V3B06G (1×) SDA-AMBI-3V3B04N (1×) SDA-BOLT-ONB06A (3×) SDA-BOLT-ONB08D (1×) SDA-BOLT-ONB05E (2×) SDA-DISPB06A (3×) SDA-DISPB06D (1×) SDA-DISPB01B (1×) SDA-SETB04E (2×) SDA-SETB06A (5×) SDA-SETB06C (2×) SDA-SETB06A (2×) SDA-SET0B06A (2×) SDA-SET1B02B (2×) SDA-SSBB04E (2×) SDA-SSBB05F (2×) SDA-SSBB06A (1×) SDA-SSBB06G (1×) SDA-SSBB07D (1×) SDA-SSBB08D (1×) SDA-SSBB04A (3×) SDA-UP-MIPSB04E (3×) SDA-UP-MIPSB04A (2×) SDMB04B (1×) SDMB04P (2×) SENSE+1V2-PNX85XXB04L (1×) SPDIF-IN1B08D (1×) SPDIF-IN1B04L (1×) SPDIF-OUTB08B (1×) SPDIF-OUTB04A (2×) SPI-CLKB04A (2×) SPI-CSBB04A (2×) SPI-PROGB04B (1×) SPI-PROGB04A (3×) SPI-SDIB04A (2×) SPI-SDOB04A (3×) SPI-WPB01B (1×) STANDBYB04A (2×) STANDBYB08D (1×) STANDBYB04A (2×) SUPPLY-FAULTB06C (2×) TACHO1B06C (2×) TACHO1-INVB06C (2×) TACHO2B06C (2×) TACHO2-INVB06E (1×) TCKB06G (1×) TCKB06E (1×) TDIB06G (1×) TDIB06E (1×) TDOB06G (1×) TDOB06E (1×) TMSB06G (1×) TMSB04N (2×) TSINO-DATA0B07F (1×) TSINO-DATA0B04N (2×) TSINO-DATA1B07F (1×) TSINO-DATA1B04N (2×) TSINO-DATA2B07F (1×) TSINO-DATA2B04N (2×) TSINO-DATA3B07F (1×) TSINO-DATA3B04N (2×) TSINO-DATA4B07F (1×) TSINO-DATA4B04N (2×) TSINO-DATA5B07F (1×) TSINO-DATA5B04N (2×) TSINO-DATA6B07F (1×) TSINO-DATA6B04N (2×) TSINO-DATA7B07F (1×) TSINO-DATA7B04N (2×) TSO-BIT-CLKB07F (1×) TSO-BIT-CLKB04N (2×) TSO-BIT-ERRB04N (2×) TSO-BIT-VALIDB07F (1×) TSO-BIT-VALIDB04N (2×) TSO-SYNCB07F (1×) TSO-SYNCB02A (5×) TUN-P1B02A (5×) TUN-P10B02A (4×) TUN-P11B02A (5×) TUN-P2B02A (6×) TUN-P3B02A (5×) TUN-P4B02A (5×) TUN-P5B02A (5×) TUN-P6B02A (5×) TUN-P7B02A (5×) TUN-P8B02A (6×) TUN-P9B02A (2×) TUN-SCLB02B (2×) TUN-SCLB02A (2×) TUN-SDAB02B (2×) TUN-SDAB05E (3×) TX1A-B05E (3×) TX1A+B05E (3×) TX1B-B05E (3×) TX1B+

B05E (3×) TX1C-B05E (3×) TX1C+B05E (3×) TX1CLK-B05E (3×) TX1CLK+B05E (3×) TX1D-B05E (3×) TX1D+B05E (3×) TX1E-B05E (3×) TX1E+B05E (3×) TX2A-B05E (3×) TX2A+B05E (3×) TX2B-B05E (3×) TX2B+B05E (3×) TX2C-B05E (3×) TX2C+B05E (3×) TX2CLK-B05E (3×) TX2CLK+B05E (3×) TX2D-B05E (3×) TX2D+B05E (3×) TX2E-B05E (3×) TX2E+B05E (3×) TX3A-B05E (3×) TX3A+B05E (3×) TX3B-B05E (3×) TX3B+B05E (3×) TX3C-B05E (3×) TX3C+B05E (3×) TX3CLK-B05E (3×) TX3CLK+B05E (3×) TX3D-B05E (3×) TX3D+B05E (3×) TX3E-B05E (3×) TX3E+B05E (3×) TX4A-B05E (3×) TX4A+B05E (3×) TX4B-B05E (3×) TX4B+B05E (3×) TX4C-B05E (3×) TX4C+B05E (3×) TX4CLK-B05E (3×) TX4CLK+B05E (3×) TX4D-B05E (3×) TX4D+B05E (3×) TX4E-B05E (3×) TX4E+B04O (1×) TX851A-B06D (1×) TX851A-B06G (1×) TX851A-B04O (1×) TX851A+B06D (1×) TX851A+B06G (1×) TX851A+B04O (1×) TX851B-B06D (1×) TX851B-B06G (1×) TX851B-B04O (1×) TX851B+B06D (1×) TX851B+B06G (2×) TX851B+B04O (1×) TX851C-B06D (1×) TX851C-B06G (1×) TX851C-B04O (1×) TX851C+B06D (1×) TX851C+B06G (1×) TX851C+B04O (1×) TX851CLK-B06D (1×) TX851CLK-B06G (1×) TX851CLK-B04O (1×) TX851CLK+B06D (1×) TX851CLK+B06G (1×) TX851CLK+B04O (1×) TX851D-B06D (1×) TX851D-B06G (1×) TX851D-B04O (1×) TX851D+B06D (1×) TX851D+B06G (1×) TX851D+B04O (1×) TX851E-B06D (1×) TX851E-B06G (1×) TX851E-B04O (1×) TX851E+B06D (1×) TX851E+B06G (1×) TX851E+B04O (1×) TX852A-B06D (1×) TX852A-B06G (1×) TX852A-B04O (1×) TX852A+B06D (1×) TX852A+B06G (1×) TX852A+B04O (1×) TX852B-B06D (1×) TX852B-B06G (1×) TX852B-B04O (1×) TX852B+B06D (1×) TX852B+B06G (1×) TX852B+B04O (1×) TX852C-B06D (1×) TX852C-B06G (1×) TX852C-B04O (1×) TX852C+B06D (1×) TX852C+B06G (1×) TX852C+B04O (1×) TX852CLK-B06D (1×) TX852CLK-B06G (1×) TX852CLK-B04O (1×) TX852CLK+B06D (1×) TX852CLK+B06G (1×) TX852CLK+B04O (1×) TX852D-B06D (1×) TX852D-B06G (1×) TX852D-B04O (1×) TX852D+B06D (1×) TX852D+B06G (1×) TX852D+B04O (1×) TX852E-B06D (1×) TX852E-B06G (1×) TX852E-B04O (1×) TX852E+B06D (1×) TX852E+B06G (1×) TX852E+B05E (1×) TXCLK-B06A (1×) TXCLK-B05E (1×) TXCLK+B06A (1×) TXCLK+B08D (3×) TXDB05E (1×) TXDAT-B06A (1×) TXDAT-

B05E (1×) TXDAT+B06A (1×) TXDAT+B04E (2×) TXD-MIPSB08D (3×) TXD-MIPSB04E (2×) TXD-MIPS2B06B (1×) TXD-MIPS2B04A (2×) TXD-UPB08D (4×) TXD-UPB06D (1×) TXF1A-B06G (1×) TXF1A-B06D (1×) TXF1A+B06G (1×) TXF1A+B06D (1×) TXF1B-B06G (1×) TXF1B-B06D (1×) TXF1B+B06G (1×) TXF1B+B06D (1×) TXF1C-B06G (1×) TXF1C-B06D (1×) TXF1C+B06G (1×) TXF1C+B06D (1×) TXF1CLK-B06G (1×) TXF1CLK-B06D (1×) TXF1CLK+B06G (1×) TXF1CLK+B06D (1×) TXF1D-B06G (1×) TXF1D-B06D (1×) TXF1D+B06G (1×) TXF1D+B06D (1×) TXF1E-B06G (1×) TXF1E-B06D (1×) TXF1E+B06G (1×) TXF1E+B06D (1×) TXF2A-B06G (1×) TXF2A-B06D (1×) TXF2A+B06G (1×) TXF2A+B06D (1×) TXF2B-B06G (1×) TXF2B-B06D (1×) TXF2B+B06G (1×) TXF2B+B06D (1×) TXF2C-B06G (1×) TXF2C-B06D (1×) TXF2C+B06G (1×) TXF2C+B06D (1×) TXF2CLK-B06G (1×) TXF2CLK-B06D (1×) TXF2CLK+B06G (1×) TXF2CLK+B06D (1×) TXF2D-B06G (1×) TXF2D-B06D (1×) TXF2D+B06G (1×) TXF2D+B06D (1×) TXF2E-B06G (1×) TXF2E-B06D (1×) TXF2E+B06G (1×) TXF2E+B04A (2×) UART-SWITCHB08D (2×) UART-SWITCHB08D (2×) UART-SWITCHnB04E (2×) USB20-DMB07C (1×) USB20-DMB04E (2×) USB20-DPB07C (1×) USB20-DPB04E (1×) USB-OCB07C (1×) USB-OCB04P (2×) VDDA-ADCB04L (4×) VDDA-AUDIOB04P (2×) VDDA-AUDIOB04L (1×) VDDA-DACB04P (2×) VDDA-DACB04O (1×) VDDA-LVDSB04P (1×) VDDA-LVDSB06F (2×) VREF-DDR1B06F (1×) VREF-FPGA1B06G (16×) VREF-FPGA1B01A (1×) VSWB01B (1×) VSWB04K (1×) V-SYNC-VGAB08B (1×) V-SYNC-VGAB04E (1×) WC-EEPROM-PNX5100B05F (2×) WC-EEPROM-PNX5100B07D (1×) WC-EEPROM-PNX5100B04A (2×) WP-NANDFLASHB07F (2×) WP-NANDFLASHB07D (1×) WRITE-PROTB07E (1×) WRITE-PROTB08B (1×) WRITE-PROTB04F (1×) XIO-ACKB07F (2×) XIO-ACKB04F (1×) XIO-SEL-NANDB07F (2×) XIO-SEL-NANDB04K (1×) Y_CVBS-MON-OUTB08B (1×) Y_CVBS-MON-OUTB08A (1×) Y_CVBS-MON-OUT-SCB08B (1×) Y_CVBS-MON-OUT-SC

Page 137: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 137Q549.2E LA 10.

2009-May-08

Layout Small Signal Board (Top Side)

3104 313 6343.2 18310_554_0900309.eps090309

1000

1001

1002

1003

1004

1005

1006

1007

1008

1009

1010

1011

1012

1013

1014

1015

1016

1022

1023

1024

1025

1026

1027

1028

1029

1235

1240 1241

1242

1246

1250

1255

1735

1A01

1C00

1D381D50

1D51 1D521D

53

1D54

1E00

1E01

1E02

1E03

1E04

1E05

1E06

1E07

1E10

1E11

1E12

1E13

1E14

1E15

1E16

1E18

1E19

1E22

1E231E24

1E25

1E26

1E27

1E31

1E501E511F00

1F01

1F02

1F05

1F10

1F29

1F51

1F531FA01FA1

1G50

1G51

1H11

1HF0

1HP

0

1HV9

1M01

1M20

1M36

1M591M71

1M95

1M96 1M97

1M99

1N00

1P001P

02

1P03

1P04

1P05

1P06

1P07

1P0A 1P0B

1P10

1P9A

1P9B

1R07

1R08

1R121R20

1T011T111T21 1T

25

1U01

1U03

2AC0

2C03 2C452CBK

2CBL2CBM

2CB

N2C

BP

2CB

R

2CBS

2CB

Y

2CG

2

2CH1

2D02

2D05

2D06

2D07 2D08

2D09 2D10

2D11

2D12

2D13

2D14

2D15

2D16

2D17

2D18

2D19

2D20

2D23

2D24

2D30

2D31

2E01

2E03

2E04

2E05

2E06

2E07

2E08

2E09

2E10

2E11

2E12

2E13

2E14

2E152E16

2E17

2E18

2E19

2E20

2E21

2E22

2E24

2E25

2E26

2E27

2E28

2E29

2E30

2E312E32

2E33

2E34

2E35

2E36

2E37

2E38

2E39

2E40

2E41

2E42

2E44

2E45

2E46

2E49

2E50

2E51

2E52

2E53

2E54

2E55

2E56

2E57

2E58

2E64 2E65

2E67

2E68

2E70

2E71

2E72

2E73

2E74

2E80

2E82

2E87

2E88

2E90

2E91

2E92

2E93

2E95

2E96

2E97

2E98

2E99

2EA

1

2EA

2

2EA

3

2EA

4

2EA

5

2EA

9

2EAA

2EAB

2EA

E

2EA

F2E

AK

2EA

L

2EA

M

2EA

N

2EA

P

2EB3

2EB4

2EB

6

2EC

B

2EC

C

2EC

D

2EC

E

2ECH

2F00

2F01

2F02

2F06

2F07

2F08

2F09

2F10

2F28

2F29

2F342F35

2F40

2F41

2F42

2F43

2F46 2F47

2F48

2F49

2F50 2F512F52

2F53

2F54

2F55

2F572F602F

61

2F74

2FHA

2FHL

2FJ3

2FJ4

2FJ5

2FJ6

2FJ7

2FJD

2FL1

2FL2

2FL62FL7

2FLD

2FLE

2FLF

2FLH2FLP

2FN

9

2FNA

2FND2FNE

2H02

2H06

2H08

2H09

2H25

2H26

2H44

2H80

2H81

2H82

2H83

2H84

2H85

2H86

2H87

2H88

2H89

2H90

2H91

2H92

2H93

2H942H95

2H96

2H972H98

2H99

2HF

02HF

1

2HM

1

2HM

2

2HM

3

2HM

4

2HM5

2HM

8

2HMJ

2HM

P

2HM

T

2HM

Y

2HN

1

2HR

0

2HR

1

2HR

2

2HR

3

2HR

42H

R5

2HR

62H

R7

2HR

8

2HR

9

2HR

A

2HR

B

2HR

C

2HR

D

2HR

E

2HR

F

2HR

G

2HR

H

2HR

J

2HR

K

2HRZ

2HS1

2HS2

2HS3

2HS4

2HS72HS8 2HS9

2HSA2HSB

2HSC

2HSD 2HSE2HSF

2HSJ

2HSK2HSM

2HSN2HSP

2HSR

2HSS

2HS

U

2HT8

2HTB

2HTC 2HTD

2HTE

2HTF

2HTG

2HTL

2HTP 2HTR

2HTU

2HTV

2HTZ

2HU0

2HUB

2HUC

2HV

A2HV

B

2HVC

2HV

D

2HVE

2HYC

2N0M

2N13

2N1C

2P03

2P05

2P12

2P13

2P14

2P15

2P17

2P24

2P26

2P27

2P28

2P31

2P472P49

2P56

2P57

2P58

2P59

2P60

2P61

2P62

2T10

2T112T

122T

14

2T222T23 2T25

2T262T27

2T282T29 2T

35 2T36

2T37

2T39

2T60

2T61

2T62

2T63

2T65

2U00

2U01

2U06

2U0F

2U0J

2U0K

2U0R

2U0W

2U0Y

2U0Z

2U10

2U11 2U14

2U15

2U19

2U1B

2U21

2U22

2U23

2U24

2U25

2U26

2U2C

2U30

2U31

2U32

2U33

2U34

2U35

2U36

2U40

2U41

2U42

2U43

2U44

2U45

2U46

2U47

2U48

2U49

2U51

2U52

2U53

2U8A

2U8C

2U8D

2U8E

2U8F

2U8G

2U8H

2U8K

2U8M

2U90

3AC0

3C03

3C05

3C06 3C07

3C08 3C093C11

3C12

3C13

3C14

3C15

3C16

3C17

3C18

3C19

3C24

3C25

3C263C27

3C28

3C29

3C30 3C31

3C32

3C33

3C34

3C35

3C36

3C41

3C42

3C95

3CA2

3CA3

3CA93CAA

3CA

B

3CA

C3C

AD

3CAE

3CD0

3CFK 3CFL

3CH8

3CH

9

3CHA

3CHB

3CHF

3CH

G

3D06

3D11

3E00

3E01

3E02

3E03

3E04

3E05

3E06

3E07

3E08

3E09

3E10

3E11

3E12

3E13

3E14

3E15

3E16

3E17

3E18

3E19

3E20

3E21

3E22

3E23

3E24

3E25

3E26

3E27

3E28

3E29

3E30

3E31

3E32

3E33

3E34

3E35

3E36

3E37

3E38

3E39

3E40

3E41

3E42

3E433E44

3E45

3E463E47

3E48

3E50

3E51

3E52

3E53

3E543E55

3E56

3E57

3E58

3E59

3E60

3E61

3E62

3E63

3E64

3E65

3E67

3E68

3E69

3E70

3E71

3E72

3E73

3E74

3E75

3E76

3E77

3E78

3E79

3E80

3E81

3E82

3E85

3E86

3E87 3E88

3E893E90

3E92

3E93

3E953E96

3E97

3E98

3EA7

3EA8

3EA9

3EA

T

3EA

Y

3EA

Z

3EB0

3EB

3

3EB6 3EB7

3EB8

3EB9

3EC

0

3EC

1

3EC

2

3EC

3

3EC

4

3EC

5

3EC

9

3EC

E

3EC

F

3EC

G

3EC

H

3ECK

3EC

L

3ECM

3ECN

3EC

P

3ECS

3ED

1

3ED3

3F00

3F01

3F02

3F06

3F11

3F17

3F18

3F19

3F20

3F213F

24

3F29

3F30

3F31

3F363F37

3F383F39

3F40

3F51

3F563F57

3F59

3F68

3F693F71 3F72

3F73

3F793F80

3FE

0

3FE

33F

E6

3FF

4

3FF

5

3FF

63F

F7

3FF

8

3FF

93F

FA

3FF

B

3FF

C

3FF

E

3FF

H

3FF

L

3FF

P

3FF

T

3FF

W

3FG13FG2

3FG33FG4

3FG5

3FG6

3FG

8

3FG

93F

GA

3FG

B3F

GC

3FG

E

3FH

4

3FH5

3FH

8

3FH

9

3FH

B

3FL0

3FL1

3FL2

3FL3

3FL4

3FL5

3FL6

3FL7

3FL8

3FL9

3FLA

3FLB

3FLC

3FLD

3FLE

3FLF

3FLG

3FLH

3FLJ

3FLK

3FLL

3H00

3H04

3H05

3H12

3H18

3H22

3H24

3H253H29

3H34

3H36

3H40

3H47

3H58

3H64

3H67

3H68

3H71

3H72

3H73

3H79

3H80

3H81

3H82

3H83

3H84

3H85

3H87

3H88

3H893H903H91

3H92

3H93

3H95

3H96

3H97

3H98

3H99

3HB

1

3HB

2

3HB

3

3HB

43H

B5

3HB6

3HB7

3HF

3

3HF5

3HF

D

3HFE

3HMA

3HM

B

3HM

C

3HM

D

3HME

3HML

3HMU

3HM

V

3HM

Z

3HP

0

3HP

1

3HP5

3HPN

3HR0

3HR3

3HR8

3HRC 3HRJ

3HRP

3HRR

3HRS

3HR

T

3HRU

3HRV

3HRW

3HRY3HRZ 3HS0

3HS1

3HS2

3HS33HS4

3HS83HS9

3HSA

3HSB

3HSD

3HS

E

3HSF

3HSH

3HSJ

3HS

M

3HSN

3HSQ

3HSR

3HST

3HSU

3HSV

3HT3

3HT4

3HT8

3HV

3

3HWN

3HWR

3HWV

3N0G

3N0Y

3P15

3P16

3P18

3P21

3P22

3P28

3P29

3P303P31

3P32

3P34

3P35

3P36

3P37

3P39

3P40

3P42

3P44

3P48

3P57

3P59

3P60

3P62

3P633P64 3P76

3P77

3P80

3P81

3P82

3P83

3P87

3T10

3T11

3T12

3T13 3T14 3T15

3T16

3T22

3T56

3T60

3T62

3T63

3T64

3T653T70

3T71

3T72

3T73

3T74

3T75

3T76

3T77

3T78

3T79

3T95

3U0K

3U1J

3U3V

3U3W

3U41

3U46

3U4A

3U4B

3U55

3U56

3U57

3U58

3U60

3U61

3U62 3U

63

3U64

3U65

3U66

3U67

3U74

3U76

3U80

3U81

3U82

3U83

3U84

3U85

3U86

3U88

3U89

3U90

3U91

3U92

3U93

3U94

3U95

3U96

3U97

3U98

5AC1

5AC2

5AC4

5D01

5D02

5D04

5D05

5E00

5E01

5E03

5E05

5E06

5EA1

5F02

5F03

5FC

5

5FC

6

5FC

7

5FC

8

5FC

9

5FH0

5FL0

5FL1

5H80

5H81

5H82

5H85

5H865H87

5HR0

5HR2

5HR3

5HR5

5HR9

5HRA

5HRC

5HRG

5HRL

5P06

5P07

5P09

5P135P14

5T105T11

5T55

5U00

5U01

5U02

5U03

5U04

5U05

5U06

5U07

5U08

5U09

5U10

5U11

5U12

5U13

5U14

5U15

5U16

5U17

5U18

5U19

5U20

5U21

5U30

5U31

5U32

5U33

6CG2

6E01

6E02

6E03

6E04

6E05

6E06

6E07

6E08

6E09

6E10

6E11

6E12

6E13

6E14

6E15

6E16

6E176E18

6E20

6E21

6E22

6E23

6E24

6E25

6E26

6E286E29

6E30

6E31

6E32

6E34

6E35 6E36

6E37

6E38

6E40

6E41

6E43

6E44

6E45

6E46

6E47

6E48

6E51

6E52

6E53

6F13

6F51

6F82

6F83

6F84

6F85

6FH0

6FH1

6FH2

6FH3

6FH66FH7

6HF

0

6T10

6T11

6U09

6U40

7C00

7C01

7C02

7CH

07C

H1

7E01

7E03

7E04

7E05

7E09

7E10

7E14

7E18

7E197E20

7EA

17E

A3

7F00

7F01

7F08

7F51

7F52

7F54

7F55

7F56

7FL07FN0

7H00

7H01

7H03

7H04

7H05

7HD

0

7HF2

7HG0

7HG1

7HM17HM2

7HV0

7N04

7P02

7P07

7P10

7P15

7P16

7P17

7T51

7T52

7T53

7U02

7U057U06

7U08

7U0D

7U0H

7U0M

7U0N

7U10

7U11

7U40

7U41

7U50

9CG9

9CH

0

9E00

9E01

9E02

9E04

9E06

9E10

9E11

9E12

9E13

9E14

9E15

9E169E17

9E189E19

9E20

9E22

9E23

9E24

9E25

9E269E27

9E29

9E30

9E31

9E32

9E33

9E34

9E35

9E37

9EA1

9EA3

9EA

4

9EA5

9F04

9F05

9F07

9F09

9F10

9F11

9F12

9F13

9F14

9F15

9F16

9F17

9F18

9F19 9F209FA1 9FA2

9FH0

9H05

9H069H07 9H08

9H11

9H12

9H13

9H25

9H26

9H27

9H28

9HK0

9P19

9P20

9P21

9P22

9P29

9P30

9P31

9P33

9T10

9T11

9T12 9T13

9T15

9T16 9T18

9T20

9T21

9T23

9T24

9T25

9T27

9T29 9T30

9T409T41

9T63

9U06

9U07

9U08

BCG0

BCG1

BCG2

BCG3

BN0A

BN0B

BN0C

BN0D

BP

1A

BP1B

BP1C

BP1D

BP

1E

BP1F

BP1G

BP1H

BP1J

BP1K

BP1L

BP1M

BP1N

BP1P

BP1R

BP1S

BP1T BP1U BP1V

BP

1W

BP50

BP51

BP52

BP53

BP54

BP55

BP56

BP57

BP5A

BP5B

BP5C

BP5D

BP5E

BP5F

BP

5G

BP5H

BP5J

BP5K

BP5L

BP

5M

BP

5N

BP5P

BP5RBP5S

BP5Z

CC60

CU

70

CU

71

IF32 IF33

IF34

IF35

IF36

IF37

IF38

IF39

IH93

IH94

IH95

IN0K

IN0N

IN0TIN0V

IP0J

IP16

IP68

TH01TH02

TH03TH04TH05

TH

06

TH07TH08

TH

09T

H10

TH

11T

H12

TH

13T

H14

TH

15T

H16

Page 138: Q549---32pfl9604ser

EN 138Q549.2E LA 10.Circuit Diagrams and PWB Layouts

2009-May-08

Layout Small Signal Board (Bottom Side)

3104 313 6343.2 18310_555_090309.eps090309

1C01

1C02

1CD

0

1F03

1F50

1N02

1T50

2A00

2A01

2A02

2A03

2A04

2A05

2A06

2A07

2A08

2A09

2A10

2A11

2A12

2A132A14

2A15

2A16

2A19

2A20

2A21

2A22

2A23

2A24

2A25

2A262A27

2A28

2A29

2A30

2A50

2A51

2A52

2C00

2C01

2C02

2C04

2C13

2C14

2C15

2C16

2C17

2C182C19

2C29

2C30

2C322C33

2C34

2C35

2C36

2C38

2C39

2C40

2C41 2C42

2C43

2C44

2C55

2C56

2C57

2C58

2C59

2C60

2C61

2C62

2C63

2C64

2C65

2C66

2C67

2C68

2C69

2C70

2C71

2C72

2C73

2C74

2C75

2C76

2C77

2C78

2C79

2C80

2C81

2C82

2C83

2C84

2C85 2C86

2C87

2C88

2C89

2C90

2C912C92

2C94

2C95

2C96

2C972CA0

2CA1

2CA

22CA

3

2CA4

2CA52CA6

2CA7

2CA8

2CA9

2CAA

2CAB

2CAC

2CAD

2CAE

2CAF

2CAG

2CAH

2CAJ

2CAK

2CAM

2CAN

2CAP

2CAR

2CA

S

2CA

T

2CAV

2CAW

2CAY

2CAZ

2CB0

2CB1

2CB2

2CB3

2CB4

2CB5

2CB6

2CB7

2CB8

2CB9

2CBA

2CBB

2CBC

2CB

D2C

BE

2CBF

2CB

G 2CB

H

2CB

J

2CBZ

2CD0

2CD1

2CG

0

2CG1

2CG

3

2CG4

2CG5

2CG6

2CG7

2CG8

2CG

B2C

GC

2CG

D

2CH0

2CH

4

2CH

5

2CH

6

2CH7

2D01

2D21

2D22

2D25

2D26

2D27

2E60

2E61

2E62

2E63

2E75

2E76

2E77

2E78

2E79

2E81

2EA

6

2EAC2EAD

2EA

Q

2EB1

2EC

F

2F03

2F04

2F05

2F11

2F12

2F13

2F14

2F15

2F16

2F17

2F18

2F19

2F20

2F21

2F22

2F23

2F24

2F25

2F262F27

2F30

2F31

2F32

2F33

2F36

2F37

2F38

2F39

2F56

2F58

2F59 2F622F63 2F64

2F652F662F67 2F68

2F692F702F71 2F72

2F73

2F752F76

2F772F782F79

2F802F812F822F832F84

2F85

2FA

6

2FA7

2FH

02F

H1

2FH2

2FH3

2FH4

2FH

5

2FH6 2FH7

2FH8

2FH9

2FH

B

2FH

C2F

HD

2FH

E

2FH

F

2FHG

2FHH

2FH

J

2FH

K

2FHM

2FH

N

2FH

P

2FHR

2FH

S

2FHT

2FH

V

2FHW

2FHZ

2FJ0

2FJ1

2FJ2

2FJ8

2FJ9

2FJA

2FJB

2FJC

2FJJ

2FJK

2FJP

2FL0

2FL3

2FL4

2FL5

2FL9

2FLA

2FLB

2FLC

2FLJ

2FLK

2FLL

2FLM

2FLN

2FLR

2FLS

2FN0

2FN12FN2

2FN3

2FN

5

2FN6

2FN

7

2FN8

2H00

2H01

2H03

2H04

2H05

2H07

2H10

2H11

2H12

2H13

2H14

2H15

2H16

2H17

2H18

2H19

2H202H21

2H22

2H23

2H24

2H27

2H28

2H29

2H30

2H31

2H32

2H33

2H34

2H35

2H36

2H37

2H38

2H39

2H40

2H41

2H42

2H43

2H50

2H512H

52

2HA3

2HA4

2HA5

2HC0

2HD

0

2HF5

2HF6

2HF

7

2HG

0

2HG1

2HG2

2HG3

2HG

4

2HG5

2HG

6

2HG

7

2HG8

2HG

9

2HG

A

2HG

B

2HG

C

2HGD

2HG

E

2HG

F

2HG

G

2HG

H

2HGJ

2HGK

2HG

M

2HGN

2HG

P

2HG

R

2HG

S

2HG

T

2HG

U

2HGV

2HG

W

2HGY

2HG

Z

2HH

0

2HH1

2HH

2

2HH

3

2HH4

2HH

5

2HH6

2HH9

2HHA

2HH

B

2HH

K2H

HM

2HH

N2H

HP

2HK

L

2HMG

2HMW

2HM

Z

2HP4

2HP

5

2HP

6

2HP7

2HP

8

2HP

A

2HPB

2HRM

2HR

N

2HR

P

2HR

S

2HR

T

2HR

U

2HRV

2HRW

2HRY

2HS0

2HST

2HSV

2HSW

2HSY

2HT1

2HT5

2HT6

2HT7

2HTH

2HTK

2HU

1

2HU

2

2HU

3

2HU4

2HU5

2HU6

2HU

7

2HU8

2HU9

2HU

A

2HUK

2HUN

2HUP

2HV0

2HV

1

2HV2

2HV

32HV

4

2HV5

2HV6

2HV7

2HV8

2HV9

2HVF

2HV

G

2HV

H2HV

J

2HV

K

2HV

L

2HVM

2HV

N

2HV

P

2HVR

2HV

S

2HVT

2HV

U

2HV

V

2HVW

2HVY 2HV

Z

2HY2

2HY3

2HY

4

2HY

5

2HY

6

2HY

7

2HY

8

2HY9

2HY

A

2HYB

2HYD

2HYE

2HY

F

2HZB

2HZC

2HZD

2HZ

E

2HZF

2HZG

2HZ

H

2HZ

K

2HZ

L

2HZM

2HZ

V

2HZY

2N0K

2N0L2N

0N

2N0P

2N0Q

2N0R2N

0S

2N0T

2N0U

2N0V

2N0W

2N0Y

2N0Z

2N10

2N11

2N122N14

2N15

2N16

2N17

2N30

2N31

2N32

2N33

2P04

2P062P

07

2P08

2P092P

10

2P11

2P16

2P18

2P19

2P20

2P21

2P22

2P23

2P252P30

2P32

2P33

2P34

2P35

2P36

2P37

2P382P39

2P40

2P41

2P42

2P432P44

2P45

2P46

2P48

2P502P51

2P52

2P53

2P54

2P55

2T13

2T15

2T16

2T17

2T18

2T19

2T20

2T212T

24

2T50

2T51

2T522T

53

2T54

2T552T56

2T572T58

2T59

2T64

2T66

2T67

2T68

2T69

2T70

2T71

2T72

2T73

2T74

2T75

2T76

2T77

2T78

2T79

2T80

2T812T82

2T83

2T84

2T85

2U02

2U03

2U04

2U05

2U07

2U08

2U09

2U0B

2U0D

2U0H

2U0S

2U0T

2U0U

2U0V

2U12

2U13

2U16

2U17

2U18

2U20

2U27

2U28

2U29

2U2A

2U2B

2U37

2U38

2U39

2U50

2U54

2U55

2U56

2U57

2U58

2U59

2U60

2U61

2U62

2U63

2U64

2U65

2U66

2U67

2U80

2U81

2U83

2U8Q

2U8R

2U8T

2U8U

2U8V 2U

8Y

3A00

3A01

3A02

3A033A04

3A05

3A06

3A07

3A08

3A09

3A10

3A11

3A12

3A13 3A14

3A15

3A16

3A17

3A18

3A19

3A20 3A21

3A223A

233A

243A

253A26

3A27

3C00

3C01

3C02

3C04

3C10 3C20

3C21

3C22

3C23

3C37

3C38

3C39

3C40

3C43

3C44

3C50

3C51

3CA

43C

A5

3CA6

3CA

7

3CD1 3CD

2

3CD

3

3CD

73C

D8

3CD

9

3CD

A

3CDB3CD

C

3CD

D

3CF1

3CFN

3CG

0

3CG

1

3CG5

3CG6

3CG7

3CG8

3CG9

3CGA

3CGF

3CGG

3CGH

3CGJ

3CG

N

3CG

P

3CG

R

3CGS

3CGT

3CG

V

3CG

Z

3CH0

3CH

1

3CH

2

3CH3

3CH4

3CH

5

3CH

7

3CHC

3CHD

3CHE

3CJ0

3CJ1

3D03

3D09

3D10

3D14

3D16

3D17

3E83

3E84

3E91

3E99

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Circuit Diagrams and PWB Layouts EN 139Q549.2E LA 10.

2009-May-08

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Page 141: Q549---32pfl9604ser

Circuit Diagrams and PWB Layouts EN 141Q549.2E LA 10.

2009-May-08

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