project report on lcd based wireless open gps tracker
TRANSCRIPT
P.D.M.COLLEGE OF ENGINEERING, BAHADURGARH
(An ISO 9001:2000 Certified Institution)
Approved by A.I.C.T.E. New Delhi and Affiliated to M.D.U. Rohtak
A
PROJECT REPORT
ON
LCD BASED WIRELESS OPEN GPS
Submitted in the partial fulfillment of the requirement for the award of degree
Of
Bachelor of Electronics & Communication Engineering
Submitted to:- Submitted by:-
Prof. R.K. Khola (HOD) Laxmikant Sharma (1646/2K5)
(E. C. E. Deptt.) Hasrat Ali Khan (1726/2K6)
Deepak Dua (1727/2K6)
Rohit Goel (1732/2K6)
Department of Electronics & Communication Engineering
(Session: 2008-2009)1
CERTIFICATE
This is to certify that project entitled…LCD Based Wireless Open GPS….has been duly completed by the student of final year……Laxmikant Sharma(1646/2k5), Hasrat Ali Khan(1726/2k6), Deepak Dua(1727/2k6), Rohit Goel(1732/2k6) ……in a satisfactory manner towards the partial fulfillment of the Bachelor Degree in Electronics & Communication Engineering during the academic year 2008-2009.
We wish bright future for them.
Lect. Sumit Sangwan Prof. R. K. Yadav Prof. R. K. Khola(HOD)
(Project Guide) (Project Coordinator) (Project In-charge)
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ACKNOWLEDGEMENT
This project in itself is a vehemence, coerce and technical proficiency of many experts who have contributed to it.
Prior to we get into subterranean of the stuff, we would like to put in a few solemn words for the people who bestowed unending support right from the stage the project idea was conceived.
We would like to express deep gratitude and sincere thanks to Mr. R.K KHOLA (Head of Electronics & Communication Department) for his proficient knowledge and support our personality. Mr. R.K.YADAV (Project coordinator ECE Department) stands apart from all other contributors to our project.
We are thankful to MR. SUMIT SANGWAN (Project Guide) for his support and valuable suggestions. Lastly we thank all faculty member and countless people who made us to develop the project to an extent that now we firmly believe that is an attitude a philosophy of life.
We regret any inadvertent omissions.
LAXMIKANT SHARMA (1646/2K5) HASRAT ALI KHAN (1726/2K6) DEEPAK DUA (1727/2K6) ROHIT GOEL (1732/2K6)
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ABSTRACT
The given project aims to display the working of a magnetic reed actuated position encoder employing a DTMF circuit. The magnetic reed are placed in a radial arrangement with an extremely small separation between the reed switches, on passage of any magnetic body over these switches the reeds come into contact thus actuating. the closure of a circuit.
Each reed switch is designed to correspond to a different set of DTMF frequencies. Thus a Large number of tones each of them corresponding to a different switch position can be generated. Each of these switch actuations corresponds to a different Set frequencies generated through linear addition of two frequencies levels or tones which is extremely similar to the DTMF system used in telephones.
These tones are then modulated in FM transmitted over a wireless network received, decoded and converted back into corresponding switch positions to indicate the particular positions of tracked vehicle on LCD display unit.
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CONTENTS
CHAPTER 1
1.1 Introduction Page 1.1.1 Objective 09 1.1.2 Requirements 09 1.1.3 Rf based GPS on LCD 10 1.1.4 RF based tracker transmitter side 11 1.1.5 RF based tracker receiver ckt 12
1.1.6 Description 13 1.1.7 GPS an Introduction 13 1.1.8 Principle of GPS 14
CHAPTER 2
2.1 Working of LCD Based Wireless Open GPS 162.2 Subcomponents of Wireless GPS 17 2.2.1 Magnetic Reed Switch 18 2.2.2 DTMF Encoder 19 2.2.3 FM Transmitter 20 2.2.4 FM Receiver 26 2.2.5 DTMF Decoder 28 2.2.6 Introduction to Microcontroller 29 2.2.7 Pin function of IC 89c51 39 2.2.8 Instructions 43 2.2.9 Pin diagram of IC 89c51 58 2.2.10 8051 Instruction set 59 2.2.11 Program of RF Based Tracker Receiver Ckt 68 2.2.12 LCD Detail 81
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CHAPTER 3
3.1 Appendix 3.3.1 IN 4001-IN4007 98 3.3.2 IC AT89C2052 100 3.3.3 L7800 AB/AC Series 105 3.3.4 MC78XX/LM78XX/MC78XXA 111 3.3.5 IC XR-2206 113 3.3.6 IC XR-2211 116 3.3.7 Resistance color codes 123
3.2 Conclusion 124
3.3 Future Enhancements 125
3.4 Bibliography 126
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CHAPTER-1
INTRODUCTION
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1.1 INTRODUCTION
The given project aims to display the working of a magnetic reed actuated position encoder employing a DTMF circuit. The magnetic reed are placed In a radial arrangement with an extremely small separation between the reed switches or passage of any magnetic body over these switches the reeds come into contact thus actuating the closure of a circuit.
Each reed switch is designed to correspond to a different set of DTMF frequencies. Each of these switch actuations corresponds to a different Set of frequencies generated through linear addition of two frequencies levels or tones. These tones are then modulated in FM transmitted over a wireless network received decoded and converted back into corresponding switch positions to indicate the particular position tracked vehicle on LED display unit.
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1.1.1OBJECTIVE
To construct an encoder and decoder with FM transmitter and receiver respectively connected.
To interfaced the FM receiver with decoder circuit.
To identify the position of object placed in a remote area A,B,C,D, and E by RF control signal.
1.1.2 REQUIREMENTS
Magnetic pass switch
DTMF Encoder
FM transmitter
FM receiver
DTMF decoder
LCD
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1.1.3 RF BASED GPS ON LCD
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1.1.4 RF BASED TRACKER TRANSMITTER SIDE
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1.1.5Rf based tracker receiver ckt
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1.1.6 DESCRIPTION
LCD based wireless global positing system is used to track the position of any moving vehicle with in a particular region. This is done by placing a magnet inside vehicle, which when passed over the magnetic pass switch at the place where the tracking is to be done generates a control signal that passes through the DTMF encoder. Further this encoded signal is transmitted through FM transmitter.
Now the receiving unit comprising of FM receiver and DTMF decoder placed at a distance receives signal to process it to give the location of the moving vehicle displayed on LCD.
1.1.7 GPS - AN INTRODUCTION
GPS is an acronym meaning global position system . Also known as Navstar, it is a precise satellite navigation system developed by the US Department of Defense.
GPS is a satellite-based service available for position location and velocity determination of surface boats, cargo ships and aircrafts worldwide. This service can also be useful for civil construction companies involved in tunnel digging, laying of railway tracks, oil exploration and services where precise position location and velocity are required for land air as well.
When full global coverage becomes available, a constellation of 21 satellites (including 3 extra) placed in nearly 20,000km high circular orbit will provide highly precise, continuous, worldwide, all weather position plus time and velocity information to user-equipped band vehicles, marine vessels and aircrafts.
As GPS offers three dimensional position fixing (chief advantage of GPS), it can be utilized not only on surface boats and vehicles but also on aircraft. Three dimensional position fixing requires four satellites within line of sight while two-dimensional position fixing requires only three.
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1.1.8 PRINCIPLE OF GPS
In August 1974, after many years of development and refinement, a project by the name GPS/Navstar was announced by the US Air force. Under this program, a total of 24 satellites have been placed in a six-plane, 12-hour orbit. Each satellite transmits a number of signals that can be used for position and time measurement.
Two L-band carrier frequencies LI and L2 are modulated by accurately timed pseudo-random binary sequences. This sequence includes navigational message, which includes information used to determine accurately the time these signals were transmitted, satellite clock correction and where the satellite was located as that time. The GPS receiver using advanced mathematical techniques (Triangulation techniques) measures the distance of at least four satellites from the user point. The receiver measures the time of arrival of each signal.
This determines the range of each satellite based on the speed of radio wave. Knowing the range and the number of satellites and the satellite positions determines its own end users position. By this user’s position in terms of longitude, latitude and altitude are determined.
The global positioning system is the most versatile satellite based navigator and positioning system. It is not practically possible to hire the services of a satellite to identify the position. We have developed a home made FM transmitter and Receiver circuit connected to an encoder and decoder circuit that gives different frequency levels for each positions
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CHAPTER-2
•WORKING OF LCDBASED WIRELESS GPS
• SUBCOMPONENTS OF WIRELESS GPS
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2.1WORKING OF LCD BASED WIRELESS GPS
The LCD based wireless GPS display the working of a magnetic reed actuated position encoder employing a DTMF circuit. The magnetic reed are placed in a radial arrangement with an extremely small separation between the reed switches, on passage of any magnetic body over these switches the reeds Come into contact thus actuating the closure of a circuit.
Each reed switch is designed to correspond to a different set of DTMF frequencies. Thus a Large number of tones each of them corresponding to a different switch position can be generated. Each of these switch actuations corresponds to a different Set of frequencies generated through linear addition of two frequencies levels or tones which is extremely similar to the DTMF system used in telephones.
These tones are then modulated in FM transmitted over a wireless network received decoded and converted back into corresponding switch positions to indicate the particular position of tracked vehicle on LCD display unit.
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2.2 SUBCOMPONENTS OF WIRELESS GPS
The LCD based wireless global positioning system mainly consists of six subcomponents which are as under
Reed switch
DTMF encoder
FM transmitter
FM receiver
DTMF decoder
Microcontroller program
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2.2.1 MAGNETIC REED SWITCH
REED SWITCH is a device, which allows the current to flow while placed near a magnet. A reed switch contains two pieces of a soft magnetic reed, as small as matchstick. These two pieces of iron are held fixed inside a thin glass tube. The ends of these reeds are coming out of the glass tube for connections. If a small magnetic field is applied, either by a magnet brought near or by a current surrounding coil, the reed are held attracted, thereby closing the contact. As the contact is very small, only 200mA current will flow through this.
REED RELAYS use switches of the reed type. A reed switch contains two pieces of a soft magnetic reed, as small as a thin matchstick. These two pieces of iron are held fixed inside a thin tube of glass and the anchor for each reed is at the glass at either end.
The switch contact is at the centre of the glass tube. If a magnetic field is applied, either by a magnet brought near or by a current in a surrounding coil, the reeds are held attracted, thereby closing the contact.
The contact is very small only and such switches handle only 200mA of current, DC/AC. The currents in DC must by non-inductive, as the reed- switch cannot break inductive loads. The coil and the reed-switch in glass enclosure are both encased in sizes looking like an IC package with 2 pins on either end, one pair for the coil and another for the reed contacts. Multiple reeds can also be encapsulated in one coil with leads brought out, if several contacts are required.
Reed relays are small and fast acting 1-2 m/s low bounce and contact resistance. Precious metal contacts give a life of 108 operations. All types usually have n/o contacts. But special types with changeover contacts are also made. Coils for reed relays take very low power and are rated at 12 V, 15mA or less. Coil resistance is of the order of 1 kilo-ohm.
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2.2.2 DTMF ENCODER
The DTMF encoder IC UM91214B is commonly used as a dialer IC in telephones. Its function is to generate the DTMF tones corresponding to the depressed key.
For its time base the UM91214B requires a quartz crystal of 3.58 MHz, which is connected between pin 3 and 4 of the IC to form part of an internal oscillator. The oscillator output is converted into appropriate DTMF signals through frequency division and mixing by control logic.
The keyboard interfacing section interfaces the matrix type keyboard with the control logic. Pins 15 through 18 are row pins and pins 12 through 14 are column pins. Up to 12 switches are possible with this key array. They represent digits 1 through 9, 0, and symbols * and # (used for special functions). To find out the dual tones associated with each digit, you can easily read the low and high group tones associated with each key. The fourth column corresponding to 1633Hz frequency is not applicable to IC UM91214B.
IC UM91214B also incorporates a 20-digit dialed number memory. This feature of the IC is not used in the present remote control system. The memory unit and read/write pointer logic is controlled by the control logic. The DTMF tones are obtained from pin 7 of the IC. The IC also has some control inputs that are not used in its present application.
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2.2.3 FM TRANSMITTER
INTRODUCTION It is not practicable to send electronic signals over wire to distant places. They are sent by radio. Low frequency signals, as in the audio range, cannot be frequency signals. as in the audio range, cannot be transmitted efficiently, so they are converted to higher frequency called radio frequencies, which can be transmitted effectively over long distance.
The electronic equipment used to produce radio frequency (RF) signals for radio transmission is called a transmitter. The function of the transmitter is to generate RF carrier of proper frequency and sufficient power. The output of a transmitter is applied to an antenna, which radiates the signal into space. A base transmitter consists of an oscillator and an RF amplifier. The oscillator generates a continuous sinusoidal output that serves as the carrier frequency. The carrier is amplified to the required power level by the RF amplifier as shown in figure. An antenna connected to the output of RF amplifier radiates the signal into space.
SIGNAL TYPE R.F. TRANSMISSiON TYPICAL CARRIER
Telegraphy 8OHZ-2KHZ 18KHZ-3OMNZ
Telephony 10KHZ 500KHZ-30MHZ
Telephony 150KHZ 88MHZ-I 08MHZ
Facsimile 6KHZ 500MHZ-3OMHZ
Television 6MHZ 54MHZ-21MHZ
Radar 2-10MHZ 200MHZ-30000MHZ
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We shall discuss only radio telephone transmitters. A transmitter is essentially a device for producing radio frequency energy that is controlled by the intelligence to be transmitted.
According to methods of modulation Radio telephone transmitters can be classified as follows:-
1. Amplitude modulated transmitters
2. Frequency modulated transmitters
3. Phase modulated transmitters
MODULATION
The process which carrier changes wave so that it can carry a message is called modulation. Every communication transmitter needs modulation, because the carrier by itself (i.e. unmodulated) cannot convey intelligence. It can be defined as a process in which some characteristics, usually amplitude, frequency, or phase of a sinusoidal. Voltage is varied in accordance with the instantaneous value of some other voltage called the modulating voltage. The reverse process, the extraction of this information from the radio wave at a receiver is called demodulation.
NECESSITY OF MODULATION
The transmission of audio signals, the electrical equivalent of sound waves directly from a transmitter is not only impossible but is impracticable. The audio frequencies corresponding to sound waves range from about 15 hertz to 20 thousand hertz. The waves lengths of the frequencies range from 20 thousand to 15 KM (wave length = velocity X frequency) the velocity of radio waves is about 300 X 10 meter per second.
To transmit a radio wave the antenna of the transmitter must be approximately of the same size as the waves to be radiated. It is clearly impossible to construct antenna thousands of kilometers long. On the other hand the wave length of a 1000 Kilo hertz radio wave is 300 Meter and antenna of this order of size can be easily constructed. The only practical solution, therefore, to modulate a radio frequency carrier with audio (sound) or video (picture) signals.
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FREQUENCY MODULATION
Amplitude modulation suffers from two defects one is noise. Almost all the natural and man-made noise such as atmospheric lighting, thunderstorms and electrical machines, etc., consists of electrical amplitude disturbances. The receiver cannot distinguish between amplitude variations that represent noise and these that contain the desired sound (i.e. the modulation). AM reception is, therefore, generally noisy.
The second defect of AM is the lack of fidelity or audio quality. For high quality it is necessary that all audio frequencies up to about 15 KHz to accommodate both sidebands. On the other hand, AM broadcasting stations are assigned channels only 20 KHz wide and most of them use only 15 KHZ to avoid interference with adjacent channels. In this way the highest audio modulating frequency is restricted to 7.5 KHz, which is not enough to reproduce music.
This is arbitrary restriction, while AM can reproduce speech and music of high fidelity, in the beginning at the time of construction of broadcast stations it was amplitude modulation and range from 500 KHz to 1600 KHz was used. To accommodate a larger number of broadcast stations within this narrow band of 1100 KHz. the width of each channel was intentionally restricted. So there is nothing wrong technically in A.M Frequency modulation removes both these defects of amplitude modulation. In FM, the frequency of the r.f. carrier signal as shifted or deviated, to a higher or lower number of cycles per second at a rate dependent on the frequency of the audio signal. The extent of the deviation depends on the amplitude of the audio signal. The process of FM can be best understood from Fig.
The amplitude of the carrier remains constant, but its frequency is varied continuously in accordance with the amplitude of the audio signal. During the instants when AF is zero, the carrier frequency is not modulated and hence remains the same as in (a). When audio signal approaches its positive peaks, the frequency of the carrier is increased toward its maximum value as shown by the closely spaced cycles in (c). When AF approaches its negative peaks, the carrier frequency is deviated toward its minimum frequency, as shown by the wider than normal spacing of the cycles in (c). Suppose that the carrier frequency, called the center frequency is 100 MHz and the audio modulating frequency is 10 KHz. Say, that the frequency deviation of the carrier is 50 KHz during the peaks of the audio signal. The carrier is then deviated to 100.05 MHz during the positive peaks of the audio signal and to 99.95 MHz during the negative peaks of the audio signal. The frequency swing is then 100 KHz (from 99.95 to 100.05 MHz) or twice the deviation in either direction.
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ADVANTAGES OF FM
The outstanding advantage of FM is that it permits reception free from interferences and noise. It, therefore, feeds wide application in inter- communication between moving vehicles (especially tanks), in the high-speed high quality facsimile, transmission of detailed maps, photographs and printed information of all kinds.
Used in the high fidelity radio receiver to provide excellent noise free reception of voice and music.
It permits the use of a wider range of modulating frequencies and so provides high fidelity.
CIRCUIT DESCRIPTION
The circuit is basically a radio frequency (Rf) oscillator that operates around 100 MHz (100 million cycles per second). Audio picked up and amplified by the electrets microphone is fed into the audio amplifier stage built around the first transistor. Output from the collector is fed into the base of the second transistor where it modulates (the resonant frequency of the tank circuit the 5 turn coil and the trim cap) by varying the junction capacitance of the transistor. Junction capacitance is a function of the potential difference applied to the base of the transistor. The tank circuit is connected in a Hartley oscillator circuit. Let us look at the individual blocks of the circuit more closely.
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The electrets microphone is a permanently charged dielectric. It is made by beating a ceramic material, placing it in a magnetic field then allowing it to cool while still in the magnetic field. It is the electrostatic equivalent of a permanent magnet. In the electrets microphone a slice of this material is used as a part of the dielectric of a capacitor in which the diaphragm of the microphone forms one plate. Sound pressure moves one of its plates. The movement of the plate changes the capacitance. The electrets capacitor is connected to an FET amplifier. These microphones are small, have excellent sensitivity, a wide frequency response and a very low cost.
First amplification stage is a standard self biasing common emitter amplifier. The 22nF capacitor isolates the microphone from the base voltage of the transistor and only allows alternating current (AC) signals to pass. The tank (LC) circuit every TX needs an oscillator to generate the radio frequency (RF) carrier waves. The tank (LC) circuit and the feedback capacitor are the (Hartley) oscillator in the Cadre. An input signal is not needed to sustain the oscillation. The feedback signal makes the base- emitter current of the transistor vary at the resonant frequency. This causes the emitter collector current to vary at the same frequency. This signal fed to the aerial and radiated as radio waves. The 27pF coupling capacitor on the aerial is to minimize the effect of the aerial capacitance on the L.C circuit.
The name ‘tank’ circuit comes from the ability of the LC circuit to store energy for oscillations in a pure LC circuit (one with no resistance) energy cannot be lost. (In an AC network only the resistive elements will dissipate electrical energy. The purely reactive elements, the C and the L simply store energy to be returned to the system later.
Note that the tank circuit does not oscillate just by having a DC potential put across it. Positive feedback must be provided.
COMPONENTS REQUIRED
TRANSISTOR
1. TI ………………… 194B
RESISTOR
1. R1……………… 10K 2. R2……………… 470 ohm
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CAPACITOR
1. Cl…………………. luF 2. C2………………… 0.1F 3. C3………………… 10PF 4. C4………………… 10PF 5. C5………………… 10PF 6. C6………………… .0luF 7. C7………………… .00luF 8. C8………………… .0luf
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2.2.4 FM RECEIVER
INTRODUCTION
FM broadcast in India has gained much popularity and AIR (All India Radio) is now using FM channels for Vividh Bharti programmes also. Although the quality of FM transmission is quite good and stereophonic, several listeners often complain that their receiver, including imported ones, produce quite a bit of noise. Indian market is flooded with such FM receivers which though labeled as stereos are not really so. Their output power is so low that the stereophonic effect cannot be produced so we use amplification.
Amplification is the process whereby small amount of voltage, current or power at the input side of a circuit is increased so that larger amount of voltage, current or power available at the output side of the circuit. This process is achieved by uses of an active circuit element such as Transistor or vacuum tube or integrated circuit. This circuit is based on the power amplification achieved by integrated Circuit.
CIRCUIT DESCRIPTION
The circuit diagram of the FM receiver using CXA1OI9S is shown in Fig. 8. In the circuit, L1 and C1 form the tank circuit for producing oscillations for the RF stage. L3. C7 and variable capacitor (VC1) form the tank circuit for the local oscillator. A 10.7MHz ceramic filter (CF2) is used to separate the intermediate frequency of about 200 kHz bandwidth. The audio output is available from pin 24 of the IC through coupling capacitor C12. LED1 is used for fine-tuning indication. A +5V is applied to pin 27 of the IC through current-limiting resistor RI.
The given amplifier circuit is 7 watt audio power amplifier can be used as amplify speaker with any device. The heart of this circuit is an IC-810. The audio signal is fed at C1 capacitor to at terminal 10 of IC with R3 connected between pin-10 and ground. C5 acts as ripple fitter (between pin9 & grounds). R-7 connected with pin-8 sets the negative feedback and gain to the circuit. Whereas the C-9 blocks the DC voltage. DC supply is fed through pin-1 and output is taken off to speaker through 1000 capacitor (pin- 16 of IC). A 1 ohm resistor and l uf ceramic capacitor between pin-16 and ground provide high frequency roll off along with the feed back to terminal 7 of IC through 680 Pf and 3.3nf ceramic capacitors. The 1000uf cap. From the output terminal 16 to
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pin-6 of the IC along with 100 ohm resistor from the supply terminal provide the boot strapping for the supply. For safe separation of IC. The supply should be 12-0.12 transformers 1 Amp. This nominal voltage should not be exceeded. Full wave rectification is adequate with a single 1000 uf capacitor for filtration for proper DC Supply. IC-810 is basically an automotive IC for operation with 12 volt supply at 14.4 volt float charge.
COMPONENTS USED
1. IC-1 ………………………. CXA1019S 2. IC-2 ………………………. 810 TBA
RESISTOR1. R-1 ………………………… 55ohm2. R-1 ………………………… 880ohm 3. R-1 …………………………. l50ohm 4. R-1 ………………………….. 100K 5. R-7 …………………………… 68K 6. R-8 …………………………… 330K 7. R-9 …………………………... 39ohm 8. R-10 …………………………. l00 ohm 9. R-12 …………………………. lohm
CAPACITORS1. C-1 …………………………... 22P 2. C2-C3, C9-C10 ……………… 0.02uF 3. C-4 …………………………… l00uf/16V 4. C-5 …………………………… 4.7uf/l6V 5. C-6 …………………………… 3PF 6. C7- C-8 ………………………. 33PF 7. C-12 ……………………….. 0.005uF 8. C-12 ……………………….. 0.22uF 9. C-13 ………………………… 10uF/6.4V 10. C-14 ………………………... 100uF/25V 11. C-15 ……………………… l000uF/6.4V 12. C-16………………………… 100uF/16V 15. C17 ……………………….. 1000uF/16V 16. C-18 ………………………. 680pF 17. C-19 ………………………. 3.3nF 18. VC-LVC-2…………………. 50PF
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2.2.5 DTMF DECODER
The MT8870 is a single-chip DTMF receiver incorporating switched capacitor filter technology and an advanced digital counting averaging algorithm for period measurement.
The DTMF signal is first buffered by an input op-amp that allows adjustment of gain and choice of input configuration. The input stage is followed by a low-pass RC active filter, which performs anti-aliasing function. A third-order switched capacitor notch filter then rejects dial tone at 350 and 440 Hz. The signal is still in its composite form and is split into its individual components by two 6th -order switched capacitor band-pass filters. Each component is smoothed by an output filter and squared by a hard limiting comparator. The two resulting rectangular waveforms are then applied to a digital circuit. Where a counting algorithm measures and averages their periods. An accurate reference clock is derived from an inexpensive external 3.5 8MHz crystal.
The time required to detect a valid tone pair, tDP is.a function of decode algorithm, tone frequency and the previous state of the decode logic. Est(early steering output) indicates that two tones of valid frequency have been detected and initiates an RC timing circuit. If both tones are present for a minimum guard time, determined by an external RC network. the DTMF signal is decoded and resulting data is latched on the output register. The delayed steering output (StD) is raised to indicate that new data is available. The output corresponding to each key pressed is shown in the truth table.
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2.2.6 INTRODUCTION TO MICROCONTROLLERS
WELCOME TO THE WORLD OF THE MICROCONTROLLERS.
Look around. Notice the smart “intelligent” systems? Be it the T.V, washing
machines, video games, telephones, automobiles, aero planes, power systems,
or any application having a LED or a LCD as a user interface, the control is
likely to be in the hands of a micro controller!
Measure and control, that’s where the micro controller is at its best.
Micro controllers are here to stay. Going by the current trend, it is obvious that
micro controllers will be playing bigger and bigger roles in the different
activities of our lives.
So where does this scenario leave us? Think about it……
The world of Micro controllers
What is the primary difference between a microprocessor and a micro
controller? Unlike the microprocessor, the micro controller can be considered to
be a true “Computer on a chip”.
In addition to the various features like the ALU, PC, SP and registers found on a
microprocessor, the micro controller also incorporates features like the ROM,
RAM, Ports, timers, clock circuits, counters, reset functions etc.
While the microprocessor is more a general-purpose device, used for read, write
and calculations on data, the micro controller, in addition to the above functions
also controls the environment.
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We have used a whole lot of technical terms already! Don’t get worried about
the meanings at this point. We shall understand these terms as we proceed
further
For now just be aware of the fact, that all these terms literally mean what they
say.
Bits and Bytes
Before starting on the 8051, here is a quick run through on the bits and bytes.
The basic unit of data for a computer is a bit. Four bits make a nibble. Eight bits
or two nibbles make a byte. Sixteen bits or four nibbles or two bytes make a
word.
1024 bytes make a kilobyte or 1KB, and 1024 KB make a Mega Byte or 1MB.
Thus when we talk of an 8-bit register, we mean the register is capable of
holding data of 8 bits only.
The 8051
The 8051 developed and launched in the early 80`s, is one of the most popular
micro controller in use today. It has a reasonably large amount of built in ROM
and RAM. In addition it has the ability to access external memory.
The generic term `8x51` is used to define the device. The value of x defining the
kind of ROM, i.e. x=0, indicates none, x=3, indicates mask ROM, x=7,
indicates EPROM and x=9 indicates EEPROM or Flash.
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A note on ROM
The early 8051, namely the 8031 was designed without any ROM. This device
could run only with external memory connected to it. Subsequent developments
lead to the development of the PROM or the programmable ROM. This type
had the disadvantage of being highly unreliable.
The next in line, was the EPROM or Erasable Programmable ROM. These
devices used ultraviolet light erasable memory cells. Thus a program could be
loaded, tested and erased using ultra violet rays. A new program could then be
loaded again.
An improved EPROM was the EEPROM or the electrically erasable PROM.
This does not require ultra violet rays, and memory can be cleared using circuits
within the chip itself.
Finally there is the FLASH, which is an improvement over the EEPROM.
While the terms EEPROM and flash are sometimes used interchangeably, the
difference lies in the fact that flash erases the complete memory at one stroke,
and not act on the individual cells. This results in reducing the time for erasure.
Understanding the basic features of the 8051 core
Let’s now move on to a practical example. We shall work on a simple practical
application and using the example as a base, shall explore the various features
of the 8051 microcontroller.
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Consider an electric circuit as follows,
The positive side (+ve) of the battery is connected to one side of a switch. The
other side of the switch is connected to a bulb or LED (Light Emitting Diode).
The bulb is then connected to a resistor, and the other end of the resistor is
connected to the negative (-ve) side of the battery.
When the switch is closed or ‘switched on’ the bulb glows. When the switch is
open or ‘switched off’ the bulb goes off
If you are instructed to put the switch on and off every 30 seconds, how would
you do it? Obviously you would keep looking at your watch and every time the
second hand crosses 30 seconds you would keep turning the switch on and off.
Imagine if you had to do this action consistently for a full day. Do you think
you would be able to do it? Now if you had to do this for a month, a year??
No way, you would say!
The next step would be, then to make it automatic. This is where we use the
Microcontroller.
But if the action has to take place every 30 seconds, how will the
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microcontroller keep track of time?
Execution time
Look at the following instruction,
clr p1.0
This is an assembly language instruction. It means we are instructing the
microcontroller to put a value of ‘zero’ in bit zero of port one. This instruction
is equivalent to telling the microcontroller to switch on the bulb. The instruction
then to instruct the microcontroller to switch off the bulb is,
Setb p1.0
This instructs the microcontroller to put a value of ‘one’ in bit zero of port one.
Don’t worry about what bit zero and port one means. We shall learn it in more
detail as we proceed.
There are a set of well defined instructions, which are used while
communicating with the microcontroller. Each of these instructions requires a
standard number of cycles to execute. The cycle could be one or more in
number.
How is this time then calculated?
The speed with which a microcontroller executes instructions is determined by
what is known as the crystal speed. A crystal is a component connected
externally to the microcontroller. The crystal has different values, and some of
the used values are 6MHZ, 10MHZ, and 11.059 MHz etc.
Thus a 10MHZ crystal would pulse at the rate of 10,000,000 times per second.
34
The time is calculated using the formula
No of cycles per second = Crystal frequency in HZ / 12.
For a 10MHZ crystal the number of cycles would be,
10,000,000/12=833333.33333 cycles.
This means that in one second, the microcontroller would execute
833333.33333 cycles.
Therefore for one cycle, what would be the time? Try it out.
The instruction clr p1.0 would use one cycle to execute. Similarly, the
instruction setb p1.0 also uses one cycle.
So go ahead and calculate what would be the number of cycles required to be
executed to get a time of 30 seconds!
Getting back to our bulb example, all we would need to do is to instruct the
microcontroller to carry out some instructions equivalent to a period of 30
seconds, like counting from zero upwards, then switch on the bulb, carry out
instructions equivalent to 30 seconds and switch off the bulb.
Just put the whole thing in a loop, and you have a never ending on-off sequence.
Simple isn’t it?
Let us now have a look at the features of the 8051 core , keeping the above
35
example as a reference,
1. 8-bit CPU.( Consisting of the ‘A’ and ‘B’ registers)
Most of the transactions within the microcontroller are carried out through the
‘A’ register, also known as the Accumulator. In addition all arithmetic functions
are carried out generally in the ‘A’ register. There is another register known as
the ‘B’ register, which is used exclusively for multiplication and division.
Thus an 8-bit notation would indicate that the maximum value that can be input
into these registers is ‘11111111’. Puzzled?
The value is not decimal 111, 11,111! It represents a binary number, having an
equivalent value of ‘FF’ in Hexadecimal and a value of 255 in decimal.
We shall read in more detail on the different numbering systems namely the
Binary and Hexadecimal system in our next module.
2. 4K on-chip ROM
Once you have written out the instructions for the microcontroller, where do
you put these instructions?
Obviously you would like these instructions to be safe, and not get deleted or
changed during execution. Hence you would load it into the ‘ROM’
The size of the program you write is bound to vary depending on the
application, and the number of lines. The 8051 microcontroller gives you space
to load up to 4K of program size into the internal ROM.
36
4K, that’s all? Well just wait. You would be surprised at the amount of stuff you
can load in this 4K of space.
Of course you could always extend the space by connecting to 64K of external
ROM if required.
3. 128 bytes on-chip RAM
This is the space provided for executing the program in terms of moving data,
storing data etc.
4. 32 I/O lines. (Four- 8 bit ports, labeled P0, P1, P2, P3)
In our bulb example, we used the notation p1.0. This means bit zero of port one.
One bit controls one bulb.
Thus port one would have 8 bits. There are a total of four ports named p0, p1,
p2, p3, giving a total of 32 lines. These lines can be used both as input or
output.
5. Two 16 bit timers / counters.
A microcontroller normally executes one instruction at a time. However certain
applications would require that some event has to be tracked independent of the
main program.
The manufacturers have provided a solution, by providing two timers. These
timers execute in the background independent of the main program. Once the
37
required time has been reached, (remember the time calculations described
above?), they can trigger a branch in the main program.
These timers can also be used as counters, so that they can count the number of
events, and on reaching the required count, can cause a branch in the main
program.
6. Full Duplex serial data receiver / transmitter.
The 8051 microcontroller is capable of communicating with external devices
like the PC etc. Here data is sent in the form of bytes, at predefined speeds, also
known as baud rates.
The transmission is serial, in the sense, one bit at a time
7. 5- interrupt sources with two priority levels (Two external and three
internal)
During the discussion on the timers, we had indicated that the timers can trigger
a branch in the main program. However, what would we do in case we would
like the microcontroller to take the branch, and then return back to the main
program, without having to constantly check whether the required time / count
has been reached?
This is where the interrupts come into play. These can be set to either the
timers, or to some external events. Whenever the background program has
reached the required criteria in terms of time or count or an external event, the
branch is taken, and on completion of the branch, the control returns to the main
program.
38
Priority levels indicate which interrupt is more important, and needs to be
executed first in case two interrupts occur at the same time.
8. On-chip clock oscillator.
This represents the oscillator circuits within the microcontroller. Thus the
hardware is reduced to just simply connecting an external crystal, to achieve the
required pulsing rate.
39
2.2.7PIN FUNCTION OF IC 89C51
1 Supply pin of this ic is pin no 40. Normally we apply a 5 volt regulated dc
power supply to this pin. For this purpose either we use step down transformer
power supply or we use 9 volt battery with 7805 regulator.
2 Ground pin of this ic is pin no 20. Pin no 20 is normally connected to the
ground pin ( normally negative point of the power supply
3 XTAL is connected to the pin no 18 and pin no 19 of this ic. The quartz
crystal oscillator connected to XTAL1 and XTAL2 PIN. These pins also needs
two capacitors of 30 pf value. One side of each capacitor is connected to crystal
and other pis is connected to the ground point. Normally we connect a 12 MHz or
11.0592 MHz crystal with this ic.. But we use crystal upto 20 MHz to this pins
4 RESET PIN.. Pin no 9 is the reset pin of this ic.. It is an active high pin. On
applying a high pulse to this pin, the micro controller will reset and terminate all
activities. This is often referred to as a power on reset. The high pulse must
be high for a minimum of 2 machine cycles before it is allowed to go low.
5. PORT0 Port 0 occupies a total of 8 pins. Pin no 32 to pin no 39. It can be
used for input or output. We connect all the pins of the port 0 with the pullup
resistor (10 k ohm) externally. This is due to fact that port 0 is an open drain
mode. It is just like a open collector transistor.
6. PORT1. ALL the ports in micrcontroller is 8 bit wide pin no 1 to pin no 8
because it is a 8 bit controller. All the main register and sfr all is mainly 8 bit
wide. Port 1 is also occupies a 8 pins. But there is no need of pull up resistor in
this port. Upon reset port 1 act as a input port. Upon reset all the ports act as a
input port
7. PORT2. port 2 also have a 8 pins. It can be used as a input or output.
There is no need of any pull up resistor to this pin.
40
8. PORT 3. Port3 occupies a total 8 pins from pin no 10 to pin no 17. It can be used
as input or output. Port 3 does not require any pull up resistor. The same as port 1 and
port2. Port 3 is configured as an output port on reset. Port 3 has the additional function of
providing some important signals such as interrupts. Port 3 also use for serial
communication.ALE ALE is an output pin and is active high. When connecting an
8031 to external memory, port 0 provides both address and data. In other words, the 8031
multiplexes address and data through port 0 to save pins. The ALE pin is used for
demultiplexing the address and data by connecting to the ic 74ls373 chip
9. PSEN. PSEN stands for program store eneable. In an 8031 based system in which
external rom holds the program code, this pin is connected to the OE pin of the rom .
10. EA. EA. In 89c51 8751 or any other family member of the ateml 89c51 series all come
with on chip rom to store programs, in such cases the EA pin is connected to the Vcc. For
family member 8031 and 8032 is which there is no on chip rom, code is stored in external
memory and this is fetched by 8031. In that case EA pin must be connected to GND pin to
indicate that the code is stored externally.
41
SPECIAL FUNCTION REGISTER ( SFR) ADDRESSES
ACC ACCUMULATOR 0E0H
B B REGISTER 0F0H
PSW PROGRAM STATUS WORD 0D0H
SP STACK POINTER 81H
DPTR DATA POINTER 2 BYTES
DPL LOW BYTE OF DPTR 82H
DPH HIGH BYTE OF DPTR 83H
P0 PORT0 80H
P1 PORT1 90H
P2 PORT2 0A0H
P3 PORT3 0B0H
TMOD TIMER/COUNTER MODE CONTROL 89H
TCON TIMER COUNTER CONTROL 88H
TH0 TIMER 0 HIGH BYTE 8CH
42
TLO TIMER 0 LOW BYTE 8AH
TH1 TIMER 1 HIGH BYTE 8DH
TL1 TIMER 1 LOW BYTE 8BH
SCON SERIAL CONTROL 98H
SBUF SERIAL DATA BUFFER 99H
PCON POWER CONTROL 87H
43
2.2.8 INSTRUCTIONS:-
SINGLE BIT INSTRUCTIONS.:-
SETB BIT SET THE BIT =1
CLR BIT CLEAR THE BIT =0
CPL BIT COMPLIMENT THE BIT 0 =1, 1=0
JB BIT,TARGET JUMP TO TARGET IF BIT =1
JNB BIT, TARGET JUMP TO TARGET IF BIT =0
JBC BIT,TARGET JUMP TO TARGET IF BIT =1 &THEN CLEAR THE BIT
MOV INSTRUCTIONS
MOV instruction simply copy the data from one location to another location
MOV D,S
Copy the data from(S) source to D(destination)
MOV R0,A ; Copy contents of A into Register R0
MOV R1,A ; Copy contents of A into register R1
44
MOV A,R3 ; copy contents of Register R3 into Accnmulator.
DIRECT LOADING THROUGH MOV
MOV A,#23H ; Direct load the value of 23h in A
MOV R0,#12h ; direct load the value of 12h in R0
MOV R5,#0F9H ; Load the F9 value in the Register R5
ADD INSTRUCTIONS .
ADD instructions adds the source byte to the accumulator ( A) and place the result in the Accumulator.
MOV A, #25H
ADD A,#42H ; BY this instructions we add the value 42h in Accumulator ( 42H+ 25H)
ADDA,R3 ;By this instructions we move the data from register r3 to accumulator and then add the contents of the register into accumulator .
45
SUBROUTINE CALL FUNCTION.
ACALL,TARGET ADDRESS
By this instructions we call subroutines with a target address within 2k bytes from the current program counter.
LCALL, TARGET ADDRESS.
ACALL is a limit for the 2 k byte program counter, but for upto 64k byte we use LCALL instructions.. Note that LCALL is a 3 byte instructions. ACALL is a two byte instructions.
AJMP TARGET ADDRESS .
This is for absolute jump
AJMP stand for absolute jump. It transfers program execution to the target address unconditionally. The target address for this instruction must be withib 2 k byte of program memory.
LJMP is also for absoltute jump. It tranfer program execution to the target addres unconditionally. This is a 3 byte instructions LJMP jump to any address within 64 k byte location.
46
47
INSTRUCTIONS RELATED TO THE CARRY
JC TARGET
JUMP TO THE TARGET IF CY FLAG =1
JNC TARGET
JUMP TO THE TARGET ADDRESS IF CY FLAG IS = 0
INSTRUCTIONS RELASTED TO JUMP WITH ACCUMULATOR
JZ TARGET
JUMP TO TARGET IF A = 0
JNZ TARGET
JUMP IF ACCUMULATOR IS NOT ZERO
This instructions jumps if registe A has a value other than zero
48
INSTRUCTIONS RELATED TO THE ROTATE
RL A
ROTATE LEFT THE ACCUMULATOR
BY this instructions we rotate the bits of A left. The bits rotated out of A are rotated back into A at the opposite end
RR A
By this instruction we rotate the contents of the accumulator from right to left from LSB to MSB
RRC A
This is same as RR A but difference is that the bit rotated out of register first enter in to carry and then enter into MSB
RLC A
ROTATE A LEFT THROUGH CARRY
Same as above but but shift the data from MSB to carry and carry to LSB
RET
This is return from subroutine. This instructions is used to return from a subroutine previously entered by instructions LCALL and ACALL.
49
RET1
THIS is used at the end of an interrupt service routine. We use this instructions after intruupt routine,
PUSH.
This copies the indicated byte onto the stack and increments SP by . This instructions supports only direct addressing mode.
POP.
POP FROM STACK.
This copies the byte pointed to be SP to the location whose direct address is indicated, and decrements SP by 1. Notice that this instructions supports only direct addressing mode.
50
DPTR INSTRUCTIONS.
MOV DPTR,#16 BIT VALUE
LOAD DATA POINTER
This instructions load the 16 bit dptr register with a 16 bit immediate value
MOV C A,@A+DPTRThis instructions moves a byte of data located in program ROM into register A. This allows us to put strings of data, such as look up table elements.
MOVC A,@A+PC
This instructions moves a byte of data located in the program area to A. the address of the desired byte of data is formed by adding the program counter ( PC) register to the original value of the accumulator.
INC BYTE
This instructions add 1 to the register or memory location specified by the operand.
INC A
INC Rn
INC DIRECT
DEC BYTE
This instructions subtracts 1 from the byte operand. Note that CY is unchanged
DEC A
DEC Rn
DEC DIRECT
51
ARITHMATIC INSTRUCTIONS.
ANL dest-byte, source-byte
This perform a logical AND operation
This performs a logical AND on the operands, bit by bit, storing the result in the destination. Notice that both the source and destination values are byte –size only
DIV AB
This instructions divides a byte accumulator by the byte in register B. It is assumed that both register A and B contain an unsigned byte. After the division the quotient will be in register A and the remainder in register B.
TMOD ( TIMER MODE ) REGISTER
Both timer is the 89c51 share the one register TMOD. 4 LSB bit for the timer 0 and 4 MSB for the timer 1.
52
In each case lower 2 bits set the mode of the timer
Upper two bits set the operations.
GATE: Gating control when set. Timer/counter is enabled only while the INTX pin is high and the TRx control pin is set. When cleared, the timer is enabled whenever the TRx control bit is set
C/T : Timer or counter selected cleared for timer operation ( input from internal system clock)
M1 Mode bit 1
M0 Mode bit 0
M1 M0 MODE OPERATING MODE
0 0 0 13 BIT TIMER/MODE
0 1 1 16 BIT TIMER MODE
1 0 2 8 BIT AUTO RELOAD
1 1 3 SPLIT TIMER MODE
53
PSW ( PROGRAM STATUS WORD)
CY PSW.7 CARRY FLAG
AC PSW.6 AUXILIARY CARRY
F0 PSW.5 AVAILABLE FOR THE USER FRO GENERAL PURPOSE
RS1 PSW.4 REGISTER BANK SELECTOR BIT 1
RS0 PSW.3 REGISTER BANK SELECTOR BIT 0
0V PSW.2 OVERFLOW FLAG
-- PSW.1 USER DEFINABLE BIT
P PSW.0 PARITY FLAG SET/CLEARED BY HARDWARE
54
PCON REGISATER ( NON BIT ADDRESSABLE)
If the SMOD = 0 ( DEFAULT ON RESET)
TH1 = CRYSTAL FREQUENCY
256----___________________
384 X BAUD RATE
If the SMOD IS = 1
CRYSTAL FREQUENCY
TH1 = 256--------------------------------------192 X BAUD RATE
There are two ways to increase the baud rate of data transfer in the 8051
1. To use a higher frequency crystal2. To change a bit in the PCON register
PCON register is an 8 bit register . Of the 8 bits, some are unused, and some are used for the power control capability of the 8051. the bit which is used for the serial communication is D7, the SMOD bit. When the 8051 is powered up,
55
D7 ( SMOD BIT) OF PCON register is zero. We can set it to high by software and thereby double the baud rate
BAUD RATE COMPARISION FOR SMOD = 0 AND SMOD =1
TH1 ( DECIMAL) HEX SMOD =0 SMOD =1
-3 FD 9600 19200
-6 FA 4800 9600
-12 F4 2400 4800
-24 E8 1200 2400
XTAL = 11.0592 MHZ
IE ( INTERRUPT ENABLE REGISTOR)
EA IE.7 Disable all interrupts if EA = 0, no interrupts is acknowledged
If EA is 1, each interrupt source is individually enabled or disbaled
By sending or clearing its enable bit.
IE.6 NOT implemented
ET2 IE.5 enables or disables timer 2 overflag in 89c52 only
56
ES IE.4 Enables or disables all serial interrupt
ET1 IE.3 Enables or Disables timer 1 overflow interrupt
EX1 IE.2 Enables or disables external interrupt
ET0 IE.1 Enables or Disbales timer 0 interrupt.
EX0 IE.0 Enables or Disables external interrupt 0
INTERRUPT PRIORITY REGISTER
If the bit is 0, the corresponding interrupt has a lower priority and if the bit is 1 the corresponding interrupt has a higher priority
IP.7 NOT IMPLEMENTED, RESERVED FOR FUTURE USE.
IP.6 NOT IMPLEMENTED, RESERVED FOR FUTURE USE
PT2 IP.5 DEFINE THE TIMER 2 INTERRUPT PRIORITY LELVEL
PS IP.4 DEFINES THE SERIAL PORT INTERRUPT PRIORITY LEVEL
57
PT1 IP.3 DEFINES THE TIMER 1 INTERRUPT PRIORITY LEVEL
PX1 IP.2 DEFINES EXTERNAL INTERRUPT 1 PRIORITY LEVEL
PT0 IP.1 DEFINES THE TIMER 0 INTERRUPT PRIORITY LEVEL
PX0 IP.0 DEFINES THE EXTERNAL INTERRUPT 0 PRIORITY LEVEL
SCON: SERIAL PORT CONTROL REGISTER , BIT ADDRESSABLE
SCON
SM0 : SCON.7 Serial Port mode specifier
SM1 : SCON.6 Serial Port mode specifier
SM2 : SCON.5
REN : SCON.4 Set/cleared by the software to Enable/disable reception
TB8 : SCON.3 The 9th bit that will be transmitted in modes 2 and 3, Set/cleared
By software
RB8 : SCON.2 In modes 2 &3, is the 9th data bit that was received. In mode 1,
If SM2 = 0, RB8 is the stop bit that was received. In mode 0
RB8 is not used
T1 : SCON.1 Transmit interrupt flag. Set by hardware at the end of the 8th bit
58
Time in mode 0, or at the beginning of the stop bit in the other
Modes. Must be cleared by software
R1 SCON.0 Receive interrupt flag. Set by hardware at the end of the 8th bit
Time in mode 0, or halfway through the stop bit time in the other
Modes. Must be cleared by the software.
TCON TIMER COUNTER CONTROL REGISTER
This is a bit addressable
TF1 TCON.7 Timer 1 overflow flag. Set by hardware when the Timer/Counter 1
Overflows. Cleared by hardware as processor
TR1 TCON.6 Timer 1 run control bit. Set/cleared by software to turn Timer
Counter 1 On/off
TF0 TCON.5 Timer 0 overflow flag. Set by hardware when the timer/counter 0
Overflows. Cleared by hardware as processor
TR0 TCON.4 Timer 0 run control bit. Set/cleared by software to turn timer
Counter 0 on/off.
IE1 TCON.3 External interrupt 1 edge flag
ITI TCON.2 Interrupt 1 type control bit
IE0 TCON.1 External interrupt 0 edge
59
IT0 TCON.0 Interrupt 0 type control bit.
2.2.9 PIN DIAGRAM OF 89c51
60
2.2.10 8051 Instruction Set:-
Arithmetic Operations
Mnemonic Description Size Cycles
ADD A,Rn Add register to Accumulator (ACC). 1 1
ADD A,direct Add direct byte to ACC. 2 1
ADD A,@Ri Add indirect RAM to ACC . 1 1
ADD A,#data Add immediate data to ACC . 2 1
ADDC A,Rn Add register to ACC with carry . 1 1
ADDC A,direct Add direct byte to ACC with carry. 2 1
ADDC A,@Ri Add indirect RAM to ACC with carry. 1 1
ADDC A,#data Add immediate data to ACC with carry. 2 1
SUBB A,Rn Subtract register from ACC with borrow. 1 1
SUBB A,direct Subtract direct byte from ACC with borrow 2 1
SUBB A,@Ri Subtract indirect RAM from ACC with borrow. 1 1
61
SUBB A,#data Subtract immediate data from ACC with borrow. 2 1
INC A Increment ACC. 1 1
INC Rn Increment register. 1 1
INC direct Increment direct byte. 2 1
INC @Ri Increment indirect RAM. 1 1
DEC A Decrement ACC. 1 1
DEC Rn Decrement register. 1 1
DEC direct Decrement direct byte. 2 1
DEC @Ri Decrement indirect RAM. 1 1
INC DPTR Increment data pointer. 1 2
MUL AB Multiply A and B Result: A <- low byte, B <- high byte. 1 4
DIV AB Divide A by B Result: A <- whole part, B <- remainder. 1 4
DA A Decimal adjust ACC. 1 1
62
Logical Operations
Mnemonic Description Size Cycles
ANL A,Rn AND Register to ACC. 1 1
ANL A,direct AND direct byte to ACC. 2 1
ANL A,@Ri AND indirect RAM to ACC. 1 1
ANL A,#data AND immediate data to ACC. 2 1
ANL direct,A AND ACC to direct byte. 2 1
ANL direct,#data AND immediate data to direct byte. 3 2
ORL A,Rn OR Register to ACC. 1 1
ORL A,direct OR direct byte to ACC. 2 1
ORL A,@Ri OR indirect RAM to ACC. 1 1
ORL A,#data OR immediate data to ACC. 2 1
ORL direct,A OR ACC to direct byte. 2 1
ORL direct,#data OR immediate data to direct byte. 3 2
63
XRL A,Rn Exclusive OR Register to ACC. 1 1
XRL A,direct Exclusive OR direct byte to ACC. 2 1
XRL A,@Ri Exclusive OR indirect RAM to ACC. 1 1
XRL A,#data Exclusive OR immediate data to ACC. 2 1
XRL direct,A Exclusive OR ACC to direct byte. 2 1
XRL direct,#data XOR immediate data to direct byte. 3 2
CLR A Clear ACC (set all bits to zero). 1 1
CPL A Compliment ACC. 1 1
RL A Rotate ACC left. 1 1
RLC A Rotate ACC left through carry. 1 1
RR A Rotate ACC right. 1 1
RRC A Rotate ACC right through carry. 1 1
SWAP A Swap nibbles within ACC. 1 1
64
Data Transfer
Mnemonic Description Size Cycles
MOV A,Rn Move register to ACC. 1 1
MOV A,direct Move direct byte to ACC. 2 1
MOV A,@Ri Move indirect RAM to ACC. 1 1
MOV A,#data Move immediate data to ACC. 2 1
MOV Rn,A Move ACC to register. 1 1
MOV Rn,direct Move direct byte to register. 2 2
MOV Rn,#data Move immediate data to register. 2 1
MOV direct,A Move ACC to direct byte. 2 1
MOV direct,Rn Move register to direct byte. 2 2
MOV direct,direct Move direct byte to direct byte. 3 2
MOV direct,@Ri Move indirect RAM to direct byte. 2 2
MOV direct,#data Move immediate data to direct byte. 3 2
65
MOV @Ri,A Move ACC to indirect RAM. 1 1
MOV @Ri,direct Move direct byte to indirect RAM. 2 2
MOV @Ri,#data Move immediate data to indirect RAM. 2 1
MOV DPTR,#data16 Move immediate 16 bit data to data pointer register. 3 2
MOVC A,@A+DPTR Move code byte relative to DPTR to ACC (16 bit address).1 2
MOVC A,@A+PC Move code byte relative to PC to ACC (16 bit address). 1 2
MOVX A,@Ri Move external RAM to ACC (8 bit address). 1 2
MOVX A,@DPTR Move external RAM to ACC (16 bit address). 1 2
MOVX @Ri,A Move ACC to external RAM (8 bit address). 1 2
MOVX @DPTR,A Move ACC to external RAM (16 bit address). 1 2
PUSH direct Push direct byte onto stack. 2 2
POP direct Pop direct byte from stack. 2 2
XCH A,Rn Exchange register with ACC. 1 1
XCH A,direct Exchange direct byte with ACC. 2 1
XCH A,@Ri Exchange indirect RAM with ACC. 1 1
XCHD A,@Ri Exchange low order nibble of indirect
66
RAM with low order nibble of ACC 1 1
Boolean Variable Manipulation
Mnemonic Description Size Cycles
CLR C Clear carry flag. 1 1
CLR bit Clear direct bit. 2 1
SETB C Set carry flag. 1 1
SETB bitSet direct bit 2 1
CPL C Compliment carry flag. 1 1
CPL bit Compliment direct bit. 2 1
ANL C,bit AND direct bit to carry flag. 2 2
ANL C,/bit AND compliment of direct bit to carry. 2 2
ORL C,bit OR direct bit to carry flag. 2 2
ORL C,/bit OR compliment of direct bit to carry. 2 2
MOV C,bit Move direct bit to carry flag. 2 1
MOV bit,C Move carry to direct bit. 2 2
67
JC rel Jump if carry is set. 2 2
JNC rel Jump if carry is not set. 2 2
JB bit,rel Jump if direct bit is set. 3 2
JNB bit,rel Jump if direct bit is not set. 3 2
JBC bit,rel Jump if direct bit is set & clear bit. 3 2
Program Branching
Mnemonic Description Size Cycles
ACALL addr11 Absolute subroutine call. 2 2
LCALL addr16 Long subroutine call. 3 2
RET Return from subroutine. 1 2
RETI Return from interrupt. 1 2
AJMP addr11 Absolute jump. 2 2
LJMP addr16 Long jump. 3 2
SJMP rel Short jump (relative address). 2 2
68
JMP @A+DPTR Jump indirect relative to the DPTR. 1 2
JZ rel Jump relative if ACC is zero. 2 2
JNZ rel Jump relative if ACC is not zero. 2 2
CJNE A,direct,rel Compare direct byte to ACC and jump if not equal. 3 2
CJNE A,#data,rel Compare immediate byte to ACC and jump if not equal. 3 2
CJNE Rn,#data,rel Compare immediate byte to register and jump if 3 2
not equal.
CJNE @Ri,#data,rel Compare immediate byte to indirect and jump if 3 2
not equal.
DJNZ Rn,rel Decrement register and jump if not zero. 2 2
DJNZ direct,rel Decrement direct byte and jump if not zero. 3 2
Other Instructions
Mnemonic Description Size Cycles
NOP No operation. 1 1
69
2.2.11 PROGRAM OF RF BASED TRACKER RECEIVER CKT
org 0
ljmp main
org 11
ljmp timer0isr
initlcd:
mov p0,#56
clr p2.5
clr p2.6
setb p2.7
clr p2.7
mov p0,#56
clr p2.5
clr p2.6
setb p2.7
clr p2.7
mov p0,#56
clr p2.5
clr p2.6
setb p2.7
clr p2.7
70
mov r5,#56
lcall wrlcdcmd
mov r5,#8
lcall wrlcdcmd
mov r5,#12
lcall wrlcdcmd
mov r5,#6
lcall wrlcdcmd
mov r5,#1
lcall wrlcdcmd
ret
wrlcdcmd:
inc sp
inc sp
mov r1,sp
mov @r1,5
l12:
clr p2.5
setb p2.6
setb p2.7
mov r5,p0
anl 5,#128
mov r1,sp
dec r1
mov @r1,5
71
clr p2.7
mov a,sp
dec a
mov r1,a
cjne @r1,#128,l13
jmp l12
l13:
mov r1,sp
mov a,@r1
mov p0,a
clr p2.5
clr p2.6
setb p2.7
clr p2.7
dec sp
dec sp
ret
wrlcddata:
inc sp
inc sp
mov r1,sp
mov @r1,5
l15:
clr p2.5
setb p2.6
72
setb p2.7
mov r5,p0
anl 5,#128
mov r1,sp
dec r1
mov @r1,5
clr p2.7
mov a,sp
dec a
mov r1,a
cjne @r1,#128,l16
jmp l15
l16:
mov r1,sp
mov a,@r1
mov p0,a
setb p2.5
clr p2.6
setb p2.7
clr p2.7
dec sp
dec sp
ret
msg1:
db 84
73
db 82
db 65
db 67
db 75
db 69
db 82
db 32
db 83
db 89
db 83
db 84
db 69
db 77
db 83
db 32
db 0
msg2:
db 32
db 79
db 66
db 74
db 69
db 67
db 84
db 32
74
db 80
db 82
db 69
db 83
db 69
db 78
db 84
db 32
db 0
msg3:
db 32
db 79
db 66
db 74
db 69
db 67
db 84
db 32
db 65
db 66
db 83
db 69
db 78
db 84
db 32
75
db 32
db 0
msg4:
db 78
db 111
db 32
db 83
db 105
db 103
db 110
db 97
db 108
db 46
db 46
db 46
db 46
db 46
db 46
db 46
db 0
main:
anl pcon,#127
mov tmod,#33
mov scon,#80
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mov tl0,#176
mov th0,#60
mov tl1,#232
mov th1,#232
setb ie.1
setb tcon.4
setb tcon.6
setb ie.7
lcall initlcd
mov r5,#128
lcall wrlcdcmd
mov i,#0
jmp l21
u15212:
jc l19
mov a,i
mov dptr,#msg1
movc a,@a+dptr
mov r5,a
lcall wrlcddata
inc i
l21:
mov a,#16
cjne a,i,u15212
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l19:
mov r5,#192
lcall wrlcdcmd
mov i,#0
jmp l25
u15882:
jc l23
mov a,i
mov dptr,#msg4
movc a,@a+dptr
mov r5,a
lcall wrlcddata
inc i
l25:
mov a,#16
cjne a,i,u15882
l23:
mov Data,#0
mov WaitTimer,#100
jmp l27
u17222:
jc l32
mov a,i
mov dptr,#msg2
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movc a,@a+dptr
mov r5,a
lcall wrlcddata
inc i
l34:
mov a,#16
cjne a,i,u17222
l32:
mov WaitTimer,#100
jmp A1
l30:
mov r5,#192
lcall wrlcdcmd
mov i,#0
jmp l39
u18042:
jc l37
mov a,i
mov dptr,#msg3
movc a,@a+dptr
mov r5,a
lcall wrlcddata
inc i
l39:
mov a,#16
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cjne a,i,u18042
l37:
setb p1.0
A1:
clr ri
l29:
mov a,WaitTimer
bnz l27
mov r5,#192
lcall wrlcdcmd
mov i,#0
jmp l44
u19122:
jc l42
mov a,i
mov dptr,#msg3
movc a,@a+dptr
mov r5,a
lcall wrlcddata
inc i
l44:
mov a,#16
cjne a,i,u19122
l42:
setb p1.0
80
l27:
jnb ri,l29
mov a,sbuf
mov Data,a
mov r5,Data
cjne r5,#42,l30
clr p1.0
mov r5,#192
lcall wrlcdcmd
mov i,#0
jmp l34
timer0isr:
push psw
push acc
clr tcon.4
mov tl0,#176
mov th0,#60
setb tcon.4
mov a,WaitTimer
jz l45
dec WaitTimer
l45:
pop acc
pop psw
reti
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WaitTimer:
ds 1
Data:
ds 1
i:
ds 1
end
main:
anl pcon,#127
mov tmod,#33
mov scon,#64
mov tl1,#232
mov th1,#232
setb tcon.6
setb ie.7
clr ti
A1:
mov sbuf,#42
l15:
jnb ti,l15
clr ti
jmp A1
end
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2.2.12 LCD DETAIL
Frequently, an 8051 program must interact with the outside world using input
and output devices that communicate directly with a human being. One of the
most common devices attached to an 8051 is an LCD display. Some of the most
common LCDs connected to the 8051 are 16x2 and 20x2 displays. This means
16 characters per line by 2 lines and 20 characters per line by 2 lines,
respectively.
Fortunately, a very popular standard exists which allows us to communicate
with the vast majority of LCDs regardless of their manufacturer. The standard is
referred to as HD44780U, which refers to the controller chip which receives
data from an external source (in this case, the 8051) and communicates directly
with the LCD.
44780 BACKGROUND
The 44780 standard requires 3 control lines as well as either 4 or 8 I/O lines for
the data bus. The user may select whether the LCD is to operate with a 4-bit
data bus or an 8-bit data bus. If a 4-bit data bus is used, the LCD will require a
total of 7 data lines (3 control lines plus the 4 lines for the data bus). If an 8-bit
data bus is used, the LCD will require a total of 11 data lines (3 control lines
plus the 8 lines for the data bus).
The three control lines are referred to as EN, RS, and RW.
The EN line is called "Enable." This control line is used to tell the LCD that you
are sending it data. To send data to the LCD, your program should first set this
line high (1) and then set the other two control lines and/or put data on the data
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bus. When the other lines are completely ready, bring EN low (0) again. The 1-
0 transition tells the 44780 to take the data currently found on the other control
lines and on the data bus and to treat it as a command.
The RS line is the "Register Select" line. When RS is low (0), the data is to be
treated as a command or special instruction (such as clear screen, position
cursor, etc.). When RS is high (1), the data being sent is text data which should
be displayed on the screen. For example, to display the letter "T" on the screen
you would set RS high.
The RW line is the "Read/Write" control line. When RW is low (0), the
information on the data bus is being written to the LCD. When RW is high (1),
the program is effectively querying (or reading) the LCD. Only one instruction
("Get LCD status") is a read command. All others are write commands--so RW
will almost always be low.
Finally, the data bus consists of 4 or 8 lines (depending on the mode of
operation selected by the user). In the case of an 8-bit data bus, the lines are
referred to as DB0, DB1, DB2, DB3, DB4, DB5, DB6, and DB7.
AN EXAMPLE HARDWARE CONFIGURATION
As we've mentioned, the LCD requires either 8 or 11 I/O lines to communicate
with. For the sake of this tutorial, we are going to use an 8-bit data bus--so we'll
be using 11 of the 8051's I/O pins to interface with the LCD.
Let's draw a sample psuedo-schematic of how the LCD will be connected to the
8051.
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As you can see, we've established a 1-to-1 relation between a pin on the 8051
and a line on the 44780 LCD. Thus as we write our assembly program to access
the LCD, we are going to equate constants to the 8051 ports so that we can refer
to the lines by their 44780 name as opposed to P0.1, P0.2, etc. Let's go ahead
and write our initial equates:
DB0 EQU P1.0
DB1 EQU P1.1
DB2 EQU P1.2
DB3 EQU P1.3
DB4 EQU P1.4
DB5 EQU P1.5
DB6 EQU P1.6
DB7 EQU P1.7
EN EQU P3.7
RS EQU P3.6
RW EQU P3.5
DATA EQU P1
Having established the above equates, we may now refer to our I/O lines by
their 44780 name. For example, to set the RW line high (1), we can execute the
following insutrction: SETB RW
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HANDLING THE EN CONTROL LINE
As we mentioned above, the EN line is used to tell the LCD that you are ready
for it to execute an instruction that you've prepared on the data bus and on the
other control lines. Note that the EN line must be raised/lowered before/after
each instruction sent to the LCD regardless of whether that instruction is read or
write, text or instruction. In short, you must always manipulate EN when
communicating with the LCD. EN is the LCD's way of knowing that you are
talking to it. If you don't raise/lower EN, the LCD doesn't know you're talking
to it on the other lines.
Thus, before we interact in any way with the LCD we will always bring the EN
line high with the following instruction:
SETB EN
And once we've finished setting up our instruction with the other control lines
and data bus lines, we'll always bring this line back low:
CLR EN
Programming Tip: The LCD interprets and executes our command at the
instant the EN line is brought low. If you never bring EN low, your instruction
will never be executed. Additionally, when you bring EN low and the LCD
executes your instruction, it requires a certain amount of time to execute the
command. The time it requires to execute an instruction depends on the
instruction and the speed of the crystal which is attached to the 44780's
oscillator input.
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CHECKING THE BUSY STATUS OF THE LCD
As previously mentioned, it takes a certain amount of time for each instruction
to be executed by the LCD. The delay varies depending on the frequency of the
crystal attached to the oscillator input of the 44780 as well as the instruction
which is being executed.
While it is possible to write code that waits for a specific amount of time to
allow the LCD to execute instructions, this method of "waiting" is not very
flexible. If the crystal frequency is changed, the software will need to be
modified. Additionally, if the LCD itself is changed for another LCD which,
although 44780 compatible, requires more time to perform its operations, the
program will not work until it is properly modified.
A more robust method of programming is to use the "Get LCD Status"
command to determine whether the LCD is still busy executing the last
instruction received.
The "Get LCD Status" command will return to us two tidbits of information; the
information that is useful to us right now is found in DB7. In summary, when
we issue the "Get LCD Status" command the LCD will immediately raise DB7
if it's still busy executing a command or lower DB7 to indicate that the LCD is
no longer occupied. Thus our program can query the LCD until DB7 goes low,
indicating the LCD is no longer busy. At that point we are free to continue and
send the next command.
Since we will use this code every time we send an instruction to the LCD, it is
useful to make it a subroutine. Let's write the code:
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WAIT_LCD:
SETB EN ;Start LCD command
CLR RS ;It's a command
SETB RW ;It's a read command
MOV DATA,#0FFh ;Set all pins to FF initially
MOV A,DATA ;Read the return value
JB ACC.7,WAIT_LCD ;If bit 7 high, LCD still busy
CLR EN ;Finish the command
CLR RW ;Turn off RW for future commands
RET
Thus, our standard practice will be to send an instruction to the LCD and then
call our WAIT_LCD routine to wait until the instruction is completely
executed by the LCD. This will assure that our program gives the LCD the time
it needs to execute instructions and also makes our program compatible with
any LCD, regardless of how fast or slow it is.
Programming Tip: The above routine does the job of waiting for the LCD, but were it to be
used in a real application a very definite improvement would need to be made: as written, if
the LCD never becomes "not busy" the program will effectively "hang," waiting for DB7 to
go low. If this never happens, the program will freeze. Of course, this should never happen
and won't happen when the hardware is working properly. But in a real application it would
be wise to put some kind of time limit on the delay--for example, a maximum of 256 attempts
to wait for the busy signal to go low. This would guarantee that even if the LCD hardware
fails, the program would not lock up.
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89
INITIALIZING THE LCD
Before you may really use the LCD, you must initialize and configure it. This is
accomplished by sending a number of initialization instructions to the LCD.
The first instruction we send must tell the LCD whether we'll be communicating
with it with an 8-bit or 4-bit data bus. We also select a 5x8 dot character font.
These two options are selected by sending the command 38h to the LCD as a
command. As you will recall from the last section, we mentioned that the RS
line must be low if we are sending a command to the LCD. Thus, to send this
38h command to the LCD we must execute the following 8051 instructions:
SETB ENCLR RSMOV DATA,#38hCLR ENLCALL WAIT_LCD
Programming Tip: The LCD command 38h is really the sum of a number of
option bits. The instruction itself is the instruction 20h ("Function set").
However, to this we add the values 10h to indicate an 8-bit data bus plus 08h to
indicate that the display is a two-line display.
We've now sent the first byte of the initialization sequence. The second byte of
the initialization sequence is the instruction 0Eh. Thus we must repeat the
initialization code from above, but now with the instruction. Thus the next code
segment is:
SETB EN
CLR RS
MOV DATA,#0Eh
CLR EN
LCALL WAIT_LCD
Programming Tip: The command 0Eh is really the instruction 08h plus 04h to
turn the LCD on. To that an additional 02h is added in order to turn the cursor
on. 90
The last byte we need to send is used to configure additional operational
parameters of the LCD. We must send the value 06h.
SETB EN
CLR RS
MOV DATA,#06h
CLR EN
LCALL WAIT_LCD
Programming Tip: The command 06h is really the instruction 04h plus 02h to
configure the LCD such that every time we send it a character, the cursor
position automatically moves to the right.
So, in all, our initialization code is as follows:
INIT_LCD:
SETB EN
CLR RS
MOV DATA,#38h
CLR EN
LCALL WAIT_LCD
SETB EN
CLR RS
MOV DATA,#0Eh
CLR EN
LCALL WAIT_LCD
SETB EN
CLR RS
MOV DATA,#06h
CLR EN
LCALL WAIT_LCD
RET
Having executed this code the LCD will be fully initialized and ready for us to send display data to it.
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CLEARING THE DISPLAY
When the LCD is first initialized, the screen should automatically be cleared by
the 44780 controller. However, it's always a good idea to do things yourself so
that you can be completely sure that the display is the way you want it. Thus, it's
not a bad idea to clear the screen as the very first opreation after the LCD has
been initialiezd.
An LCD command exists to accomplish this function. Not suprisingly, it is the
command 01h. Since clearing the screen is a function we very likely will wish
to call more than once, it's a good idea to make it a subroutine:
CLEAR_LCD:
SETB EN
CLR RS
MOV DATA,#01h
CLR EN
LCALL WAIT_LCD
RET
How that we've written a "Clear Screen" routine, we may clear the LCD at any
time by simply executing an LCALL CLEAR_LCD.
Programming Tip: Executing the "Clear Screen" instruction on the LCD also
positions the cursor in the upper left-hand corner as we would expect.
WRITING TEXT TO THE LCD
Now we get to the real meat of what we're trying to do: All this effort
is really so we can display text on the LCD. Really, we're pretty much
done.
Once again, writing text to the LCD is something we'll almost
certainly want to do over and over--so let's make it a subroutine.
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WRITE_TEXT:
SETB EN
SETB RS
MOV DATA,A
CLR EN
LCALL WAIT_LCD
RET
The WRITE_TEXT routine that we just wrote will send the character in the
accumulator to the LCD which will, in turn, display it. Thus to display text on
the LCD all we need to do is load the accumulator with the byte to display and
make a call to this routine. Pretty easy, huh?
A "HELLO WORLD" PROGRAM
Now that we have all the component subroutines written, writing the classic
"Hello World" program--which displays the text "Hello World" on the LCD is a
relatively trivial matter. Consider:
LCALL INIT_LCD
LCALL CLEAR_LCD
MOV A,#'H'
LCALL WRITE_TEXT
MOV A,#'E'
LCALL WRITE_TEXT
MOV A,#'L'
LCALL WRITE_TEXT
MOV A,#'L'
LCALL WRITE_TEXT
MOV A,#'O'
LCALL WRITE_TEXT
MOV A,#' '
LCALL WRITE_TEXT
MOV A,#'W'
LCALL WRITE_TEXT
MOV A,#'O'
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LCALL WRITE_TEXT
MOV A,#'R'
LCALL WRITE_TEXT
MOV A,#'L'
LCALL WRITE_TEXT
MOV A,#'D'
LCALL WRITE_TEXT
The above "Hello World" program should, when executed, initialize the LCD,
clear the LCD screen, and display "Hello World" in the upper left-hand corner
of the display.
CURSOR POSITIONING
The above "Hello World" program is simplistic in the sense that it prints its text
in the upper left-hand corner of the screen. However, what if we wanted to
display the word "Hello" in the upper left-hand corner but wanted to display the
word "World" on the second line at the tenth character? This sounds simple--
and actually, it is simple. However, it requires a little more understanding of the
design of the LCD.
The 44780 contains a certain amount of memory which is assigned to the
display. All the text we write to the 44780 is stored in this memory, and the
44780 subsequently reads this memory to display the text on the LCD itself.
This memory can be represented with the following "memory map":
Thus, the first character in the upper left-hand corner is at address 00h. The
following character position (character #2 on the first line) is address 01h, etc.
This continues until we reach the 16th character of the first line which is at
address 0Fh.
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However, the first character of line 2, as shown in the memory map, is at
address 40h. This means if we write a character to the last position of the first
line and then write a second character, the second character will not appear on
the second line. That is because the second character will effectively be written
to address 10h--but the second line begins at address 40h.
Thus we need to send a command to the LCD that tells it to position the cursor
on the second line. The "Set Cursor Position" instruction is 80h. To this we
must add the address of the location where we wish to position the cursor. In
our example, we said we wanted to display "World" on the second line on the
tenth character position.
Referring again to the memory map, we see that the tenth character position of
the second line is address 4Ah. Thus, before writing the word "World" to the
LCD, we must send a "Set Cursor Position" instruction--the value of this
command will be 80h (the instruction code to position the cursor) plus the
address 4Ah. 80h + 4Ah = C4h. Thus sending the command C4h to the LCD
will position the cursor on the second line at the tenth character position:
SETB EN
CLR RS
MOV DATA,#0C4h
CLR EN
LCALL WAIT_LCD
The above code will position the cursor on line 2, character 10. To display
"Hello" in the upper left-hand corner with the word "World" on the second line
at character position 10 just requires us to insert the above code into our existing
"Hello World" program. This results in the following:
LCALL INIT_LCD
LCALL CLEAR_LCD
MOV A,#'H'
LCALL WRITE_TEXT
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MOV A,#'E'
LCALL WRITE_TEXT
MOV A,#'L'
LCALL WRITE_TEXT
MOV A,#'L'
LCALL WRITE_TEXT
MOV A,#'O'
LCALL WRITE_TEXT
SETB EN
CLR RS
MOV DATA,#0C4h
CLR EN
LCALL WAIT_LCD
MOV A,#'W'
LCALL WRITE_TEXT
MOV A,#'O'
LCALL WRITE_TEXT
MOV A,#'R'
LCALL WRITE_TEXT
MOV A,#'L'
LCALL WRITE_TEXT
MOV A,#'D'
LCALL WRITE_TEXT
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PIN WISE DETAIL OF LCD
1. Vss GROUND
2. Vcc +5VOLT SUPPLY
3 Vee POWER SUPPLY TO CONTROL CONTRAST
4. RS RS = 0 TO SELECT COMMAND REGISTER
RS = 1 TO SELECT DATA REGISTER
5. R/W R/W = 0 FOR WRITE
R/W = 1 FOR READ
6 E ENABLE
7 DB0
8 DB1
9. DB2
10. DB3
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11. DB4
12. DB5
13. DB6
14. DB7
15 ,16 FOR BACK LIGHT DISPLAY
LCD COMMAND CODES
1. CLEAR DISPLAY SCREEN
2. RETURN HOME
4 DECREMENT CURSOR ( SHIFT CURSOR TO LEFT)
5 SHIFT DISPLAY RIGHT.
6. INCREMENT CURSOR ( SHIFT CURSOR TO RIGHT)
7. SHIFT DISPLAY LEFT
8. DISPLAY OFF, CURSOR OFF
98
A DISPLAY OFF CURSOR ON
C DISPLAY ON CURSOR OFF
E DISPLAY ON CURSOR BLINKING
F. DISPLAY ON CURSOR BLINKING.
10. SHIFT CURSOR POSITION TO LEFT
14. SHIFT CURSOR POSITION TO RIGHT
18. SHIFT THE ENTIRE DISPLAY TO THE LEFT
1C SHIFT THE ENTIRE DISPLAY TO THE RIGHT
80 FORCE CURSOR TO BEGINNING OF IST LINE
C0 FORCE CURSOR TO BEGINNING OF 2ND LINE
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CHAPTER-3
• APPENDIX
• CONCLUSION
•FUTURE ENHANCEMENTS
• BIBLIOGRAPHY
100
3.3.1 IN4001-IN4007
101
102
3.3.2 IC AT89C2052
8-bit Microcontroller with 2K Bytes FlashAT89C2051
Features
• Compatible with MCS-51™ Products• 2K Bytes of Reprogrammable Flash Memory– Endurance: 1,000 Write/Erase Cycles• 2.7V to 6V Operating Range• Fully Static Operation: 0 Hz to 24 MHz• Two-level Program Memory Lock• 128 x 8-bit Internal RAM• 15 Programmable I/O Lines• Two 16-bit Timer/Counters• Six Interrupt Sources• Programmable Serial UART Channel• Direct LED Drive Outputs• On-chip Analog Comparator• Low-power Idle and Power-down Modes
Description
The AT89C2051 is a low-voltage, high-performance CMOS 8-bit microcomputer with 2K bytes of flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C2051 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications.The AT89C2051 provides the following standard features: 2K bytes of Flash, 128 bytes of RAM, 15 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full duplex serial port, a precision analog comparator, on-chip oscillator and clock circuitry. In addition, the AT89C2051 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The power-down mode saves the RAM contents but
103
freezes the oscillator disabling all other chip functions until the next hardware reset.
Pin Configuration
104
Pin Description
VCCSupply voltage.
GNDGround.
Port 1Port 1 is an 8-bit bi-irectional I/O port. Port pins P1.2 to P1.7 provide internal pullups. P1.0 and P1.1 require external pullups. P1.0 and P1.1 also serve as the
105
positive input (AIN0) and the negative input (AIN1), respectively, of the on-chip precision analog comparator. The Port 1 output buffers can sink 20 mA and can drive LED displays directly.When 1s are written to Port 1 pins, they can be used asinputs. When pins P1.2 to P1.7 are used as inputs and are externally pulled low, they will source current (IIL) because of the internal pullups. Port 1 also receives code data during Flash programmingand verification.
Port 3Port 3 pins P3.0 to P3.5, P3.7 are seven bi-irectional I/O pins with internal pullups. P3.6 is hard-wired as an input to the output of the on-chip comparator and is not accessible as a general purpose I/O pin. The Port 3 output buffers can sink 20 mA. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups. Port 3 also serves the functions of various special features of the AT89C2051 as listed below:
Port 3 also receives some control signals for Flash programming and verification.
RSTReset input. All I/O pins are reset to 1s as soon as RST goes high. Holding the RST pin high for two machine cycles while the oscillator is running resets the device.Each machine cycle takes 12 oscillator or clock cycles.
XTAL1Input to the inverting oscillator amplifier and input to theinternal clock operating circuit.
XTAL2Output from the inverting oscillator amplifier.
106
Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be leftunconnected while XTAL1 is driven as shown in Figure 2. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.
Figure 1. Oscillator Connections
Note: C1, C2 = 30 pF 10 pF for Crystals = 40 pF 10 pF for Ceramic Resonators
Figure 2. External Clock Drive Configuration
107
3.3.3 L7800AB/AC SERIES
PRECISION 1A REGULATORS
OUTPUT CURRENT IN EXCESS OF 1A OUTPUT VOLTAGES OF 5; 6; 8; 9; 12; 15; 18; 20; 24V THERMAL OVERLOAD PROTECTION OUTPUT TRANSITION SOA PROTECTION 2% OUTPUT VOLTAGE TOLERANCE GUARANTEED IN EXTENDEDTEMPERATURE RANGE
DESCRIPTION
The L7800A series of three terminal positive regulators is available in TO-220, TO-220FP, TO-220FM and D2PAK packages and several fixed output voltages, making it useful in a wide range of applications. These regulators can provide local on-card regulation, eliminating the distribution problem associated with single point regulation. Each type employs internal current limiting, thermal shut-down and safe area protection, making it essentially indestructible. If adequate heat sinking is provided, they can deliver over 1A output current, Although designed primarily as fixed voltage regulators, these devices can be used with external components to obtain adjustable voltage and currents.
108
109
110
L7800AB/AC SERIES
APPLICATION INFORMATION
DESIGN CONSIDERATION
111
The L7800A Series of fixed voltage regulators are designed with Thermal Overload Protection that shuts down the circuit when subjected to an excessive power overload condition, Internal Short-circuit Protection that limits the maximum current the circuit will pass, and Output transistor Safe-Area Compensation that reduces the output short-circuit current as the voltage across the pass transistor is increased. In many low current applications, compensation capacitors are not required. However, it is recommended that the regulator input be bypassed with capacitor if the regulator is connected to the power supply filter with long lengths, or if the output load capacitance is large. An input bypass capacitor should be selected to provide good high frequency characteristics to insure stable operation under all load conditions. A 0.33mF or larger tantalum, or other capacitor having low internal impedance at high frequencies should be chosen. The bypass capacitor should be mounted with theshortest possible leads directly across the regulators input terminals. Normally good construction techniques should be used to minimize ground loops and lead resistance drops since the regulator has no external sense lead. The addition of an operational amplifier allows adjustment to higher or intermediate values while retaining regulation characteristics. The minimum voltage obtained with the arrangement is 2V greater than the regulator voltage. The circuit of figure 6 can be modified to providesupply protection against short circuit by adding a short circuit sense resistor, RSC, and an additional PNP transistor. The current sensing PNP must be able to handle the short circuit current of the three terminal regulator Therefore a four ampere plastic power transistor is specified.
112
113
3.3.4 MC78XX/LM78XX/MC78XXA
3-Terminal 1A Positive Voltage Regulator
Features• Output Current up to 1A• Output Voltages of 5, 6, 8, 9, 10, 12, 15, 18, 24V• Thermal Overload Protection• Short Circuit Protection• Output Transistor Safe Operating Area Protection
DescriptionThe MC78XX/LM78XX/MC78XXA series of three terminal positive regulators are available in theTO-220/D-PAK package and with several fixed output voltages, making them useful in a wide range of applications. Each type employs internal current limiting, thermal shut down and safe operating area protection, making it essentially indestructible. If adequate heat sinking is provided, they can deliver over 1A output current. Although designed primarily as fixed voltage regulators, these devices can be used with external components to obtain adjustable voltages and currents.
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Typical Perfomance Characteristics
115
3.3.5 XR-2206
Monolithic Function Generator
FEATURES
Low-Sine Wave Distortion, 0.5%, Typical Excellent temperature stability, 20ppm/C Wide Sweep Range, 2000:1, Typical Low-Supply Sensitivity, 0.01%V, Linear Amplitude Modulation TTL Compatible FSK Controls Wide Supply Range, 10V to 26V Adjustable Duty Cycle, 1% TO 99%
APPLICATIONS Waveform Generation Sweep Generation AM/FM Generation V/F Conversion FSK Generation Phase-Locked Loops (VCO)
GENERAL DESCRIPTION
The XR-2206 is a monolithic function generator integrated circuit capable of producing high quality sine, square, triangle, ramp, and pulse waveforms of high-stability and accuracy. The output waveforms can be both amplitude and frequency modulated by an external voltage. Frequency of operation can be selected externally over a range of 0.01Hz to more than 1MHz. The circuit is ideally suited for communications, instrumentation, and function generator applications requiring sinusoidal tone, AM, FM, or FSK generation. It has a typical drift specification of 20ppm/C. The oscillatorfrequency can be linearly swept over a 2000:1 frequency range with an external control voltage, while maintaining low distortion.
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117
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3.3.6 XR-2211FSK Demodulator/Tone Decoder
FEATURES Wide Frequency Range, 0.01Hz to 300kHz Wide Supply Voltage Range, 4.5V to 20V HCMOS/TTL/Logic Compatibility FSK Demodulation, with Carrier Detection Wide Dynamic Range, 10mV to 3V rms Adjustable Tracking Range, +1% to 80% Excellent Temp. Stability, +50ppm/C, max.
APPLICATIONS Caller Identification Delivery FSK Demodulation Data Synchronization Tone Decoding FM Detection Carrier Detection
GENERAL DESCRIPTION
The XR-2211 is a monolithic phase-locked loop (PLL) system especially designed for data communications applications. It is particularly suited for FSK modem applications. It operates over a wide supply voltage range of 4.5 to 20V and a wide frequency range of 0.01Hz to 300kHz. It can accommodate analog signals between 10mV and 3V, and can interface with conventional DTL, TTL, and ECL logic families. The circuit consists of a basic PLL for tracking an input signal within the pass band, a quadrature phase detector which provides carrier detection, and an FSK voltage comparator which provides FSK demodulation. External components are used to independently set center frequency, bandwidth, and output delay. An internal voltage reference proportional to the power supply is provided at an output pin. The XR-2211 is available in 14 pin packages specified formilitary and industrial temperature ranges.
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PRINCIPLES OF OPERATION
Signal Input (Pin 2): Signal is AC coupled to this terminal. The internal impedance at pin 2 is 20K.Recommended input signal level is in the range of 10mV rms to 3V rms.
Quadrature Phase Detector Output (Pin 3): This is the high impedance output of quadrature phase detector and is internally connected to the input of lock detect voltage comparator. In tone detection applications, pin 3 is connected to ground through a parallel combination of RD and CD to eliminate the chatter at lock detect outputs. If the tone detect section is not used, pin 3 can be left open.
Lock Detect Output, Q (Pin 6): The output at pin 6 is at “low” state when the PLL is out of lock and goes to “high” state when the PLL is locked. It is an open collector type output and requires a pull-up resistor, RL, to VCC for proper operation. At “low” state, it can sink up to 5mA of load current.
Lock Detect Complement, (Pin 5): The output at pin 5 is the logic complement of the lock detect output at pin 6. This output is also an open collector type stage which can sink 5mA of load current at low or “on” state.
FSK Data Output (Pin 7): This output is an open collector logic stage which requires a pull-up resistor, RL, to VCC for proper operation. It can sink 5mA of load current. When decoding FSK signals, FSK data output is at “high” or “off” state for low input frequency, and at “low” or “on” state for high input frequency. If no input signal is present, the logic state at pin 7 is indeterminate.
FSK Comparator Input (Pin 8): This is the high impedance input to the FSK voltage comparator.Normally, an FSK post-detection or data filter is connected between this terminal and the PLL phasedetector output (pin 11). This data filter is formed by RF and CF. The threshold voltage of the comparator is set by the internal reference voltage, VREF, available at pin 10.
Reference Voltage, VREF (Pin 10): This pin is internally biased at the reference voltage level, VREF: VREF = VCC /2 - 650mV. The DC voltage level at this pin forms an internal reference for the voltage levels at pins 5, 8, 11 and 12. Pin 10 must be bypassed to ground with a 0.1pF capacitor for proper operation of the circuit.
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Loop Phase Detector Output (Pin 11): This terminal provides a high impedance output for the loop phase detector. The PLL loop filter is formed by R1 and C1 connected to pin 11. With no input signal, or with no phase error within the PLL, the DC level at pin 11 is very nearly equal to VREF. The peak to peak voltage swing available at the phase detector output is equal to 2 x VREF.
VCO Control Input (Pin 12): VCO free-running frequency is determined by external timing resistor, R0, connected from this terminal to ground. The VCO free-running frequency, fO, is:
where C0 is the timing capacitor across pins 13 and 14. For optimum temperature stability, R0 must be in the range of 10K to 100K. This terminal is a low impedance point, and is internally biased at a DC level equal to VREF. The maximum timing current drawn from pin 12 must be limited to < 3mA for proper operation of the circuit.
VCO Timing Capacitor (Pins 13 and 14): VCO frequency is inversely proportional to the external timing capacitor, C0, connected across these terminals C0 must be non-polar, and in the range of 200pF to 10F.
VCO Frequency Adjustment: VCO can be fine-tuned by connecting a potentiometer, RX, in series with R0 at pin 12.
VCO Free-Running Frequency, fo: XR-2211 does not have a separate VCO output terminal. Instead, the VCO outputs are internally connected to the phase detector sections of the circuit. For set-up or adjustment purposes, the VCO free-running frequency can be tuned by using the generalized circuit in, and applying an alternating bit pattern of O’s and 1’s at the known mark and space frequencies. By adjusting R0, the VCO can then be tuned to obtain a 50% duty cycle on the FSK output (pin 7). This will ensure that the VCO fO value is accurately referenced to the mark and space frequencies.
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Linear FM DetectionXR-2211 can be used as a linear FM detector for a wide range of analog communications and telemetry applications. The recommended circuit connection for this application is shown in Figure. The demodulated output is taken from the loop phase detector output (pin 11), through a post-detection filter made up of RF and CF, and an external buffer amplifier. This buffer amplifier isnecessary because of the high impedance output at pin 11. Normally, a non-inverting unity gain op amp can be used as a buffer amplifier, as shown in Figure. The FM detector gain, i.e., the output voltage change per unit of FM deviation can be given as:
where VR is the internal reference voltage (VREF = VCC /2 - 650mV). For the choice of external components R1, R0, CD, C1 and CF, see the section on design equations.
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3.3.7 Resistance Color Code Chart
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3.2 CONCLUSION
Hence it is seen that the given project demonstrates the straight forward devising of a position encoder which offers robust implementation and reasonably good response time also this is less prompt to false alarms and spurious signals which are common in electro-optical position sensors also the given system is highly adaptable to various applications requiring position control such as traffic management assembly line systems etc.
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3.3 FUTURE ENHANCEMENTS
The primary region amenable to further improvements is the quality of the reed switches used in this applications high permeability and creep resistant metal technology is necessary to achieve this goal. Also faster response time can be achieved if the reed switches are hermetically sealed and evacuated containers. In order to improve remote tracking faction’s newer network topologies and better modulation schemes such as CDMA in conjunction with satellites networks would be ideal. Since the hardware is only compatible with LCD display, by implementing better device driver can be made compatible with windows 98,2000 & XP.
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3.4 BIBLIOGRAPHY
REFERENCE BOOKS
Simon haykins--------------------------------Communication system B.P.Lathi---------------------------------------Analog & digital
communication Tyagragan Vishwnathan-------------------Telecommuniction switching Robert L. Boylstad--------------------------Semiconductor devices and
circuits Kennedy--------------------------------------Electronic Communiction
systems
WEB SOURCES
http://www.google.comhttp://www.discovercircuits.comhttp://www.radionics.comhttp://www.alldatasheets.comhttp://www.aaroncake.com
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