primetime px brief

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Synopsys PrimeTime ® P X Sol ution Expanding the PrimeT ime solution with power analysis Overview Design closure in today’s advanced designs requires a delicate balance of many complex issues. Timing remains critical, but power has become important toward achieving design success. Today , with soaring gate counts and increasing design complexities, power management is a mainstream design challenge and a key concern for chip designers. Power consumption is a critical design delimiter . It affects packaging decisions, form-factors cooling requirements, battery life, design performance, and chip reliability. More than ever, accurate power analysis is required towards achieving design success. A failure to analyze power can lead to chip failure. Power, timing, and signal integrity (SI) effects are all interdependent at 90-nanometers (nm) and below. To achieve the highest accuracy power analysis, an accurate timing engine is required to perform accurate timing and slew calculations. Prior solutions that included separate, standalone timing, signal integrity, and power analysis tools failed to take advantage of the interdependencies between timing, signal integrity, and power. Furthermore, these solutions are not integrated, leading to cumbersome, non-convergent flows that do not achieve design closure. PrimeTime PX Power Analysis Synopsys PrimeTime PX, the power analysis extension to the PrimeTime solution, enables full-chip, concurrent timing, signal integrity, and power analysis in a single, easy-to-use environment. Built on the industry’s de-facto golden timing standard, PrimeTime PX delivers high accura cy dynamic and leakage power analysis concurren tly with timing and signal integrity analysis while also improving Time-To-Results (TTR) and productivity over s eparate, standa lone timing and power an alysis tools. Galaxy Design Platform 2006 Galaxy RTL Galaxy Physical    G   a    l   a   x   y    S    i   g   n     o    f    f Milkyway

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Page 1: Primetime Px Brief

8/3/2019 Primetime Px Brief

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Page 2: Primetime Px Brief

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PrimeTime PX Solution Features

• Enabling Full-Chip Concurrent Timing,

SI, and Power Analysis

The unified analysis environment enables

designers to perform accurate leakage anddynamic power analysis along with timing

and SI analysis. Additionally, the concurrent

analysis in a single tool enables faster results

and improves designer productivity. With an

easy-to-use methodology for timing, signal

integrity, and power analysis, designers can

now better understand the trade-offs and

effects on these three critical design

parameters.

• Vector-Free Dynamic Power AnalysisThe vector-free dynamic power analysis

enables power analysis to be performed

without waiting for switching data from

simulation. By using the PrimeTime solution’s

accurate timing windows, vector-free

analysis allows accurate power analysis

to be done early in the design flow and

to identify blocks with the highest power

consumption earlier.

• PrimeTime Flow and Features

As an extension of PrimeTime, PrimeTime PXis easy to use and adopt. It uses the familiar

PrimeTime flow, with the same commands,

user interface, reports, attributes, and

capabilities.

By combining timing, signal integrity and

power analysis into a single tool and

environment, identical operations are not

repeated. For example, timing and slew

calculations are not repeated. Netlist, para-sitic and constraint file reads

are not repeated, and tool

setup steps are not repeated.

As a result, the PrimeTime

PX solution delivers up to

two times (2x) faster TTR

over separate, standalone

solutions. Furthermore, as

an integral part of the

PrimeTime environment,

power analysis can beperformed using the same

PrimeTime commands,

reports, attributes, and

multiple debugging features.

With PrimeTime PX power analysis, the

Synopsys Galaxy™ Design Platform offers

designers a unified analysis environment

for timing, signal integrity, and power that

is anchored by the PrimeTime solution and

provides designers with the highest pro-

ductivity and a predictable path to silicon

for their most complex designs.

• Additional Features

- VCD-based or SAIF-based dynamic

power analysis

- RTL or gate-level VCD and SAIF

support

- Peak or average power analysis

- Clock tree power estimation

- Analysis of advanced low power design

techniques: multi-voltage, MTCMOS

- What-if analysis

- Save and restore

- Mode/case analysis

- Supports industry-standard NLPM and

CCS Power libraries

- Power analysis driver GUI window

PrimeTime

Timing SignalIntegrity

Power

he PrimeTime Solution - Concurrent timing, SI and power analysis

700 East Middlefield Road, Mountain View, CA 94043 T 650 962 5000 www.synopsys.com

Synopsys, the Synopsys logo, PrimeTime are registered trademarks and Galaxy are trademarks of Synopsys, Inc.

All other products or service names mentioned herein are trademarks of their respective holde rs and should be treated as such. Printed in the U.S.A.

©2006 Synopsys, Inc. 05/06.CEF.CPR.06-14504