Preliminary Design of FONT4Digital ILC Feedback System

Hamid Dabiri khah

Queen Mary, University of London

30/05/2005

Digital Feedback SystemAD-DA processor module

Power Amplifier module

BPM KickerDown converter & filters

Analog signals

Digital signals

AD-DA Processor Module

DACAnalog Out

ADC

Analog In

Analog In

Filtering

Recording

Analysing

FPGA

Clocking System

RAM & ROM

ADCBus System

Digital I/O

Digital I/O

Digital I/O

Power Supply

ADC AD6645 (Analog Devices)

14 bit, 105 Msps, Latency = 3.5 clk cycle

DAC AD9744 (Analog Devices)

14 bit, 210 Msps, Output Settling Time tST =11ns,

Output Propagation delay tPD =1ns,

Output Rise Time tR =2.5ns, Input Setup Time tS =2ns,

Input Hold Time tH = 1.5ns, Latch Pulse Width tLPW = 1.5 ns

FPGA

Xilinx Virtex-4 XC4LX25-11FF6688C

Design tools

• ISE Foundation (Xilinx)

• CORE Generator (Xilinx)

• ChipScope Pro (xilinx)

• PCB design tools (Mentor graphics)

• MATLAB & Simulink

Timetable Required Tasks Estimated

required time (weeks)

Time taken Comments

1 Components 20 The first prototype is intended to be ready by March 2006

Some tasks should be carried out sequentially and some can be done in parallel with others.

2 Circuit Schematic design 4

3 PCB layout design 8

4 PCB realisation 4

5 Components mounting 4

6 Circuit and PCB testing 4

7 FPGA application development 20

8 Simulation and testing the FPGA application

4

9 Testing the whole circuit and application together

4