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CMOS COMPATIBLE MEMS STRUCTURES FOR

PRESSURE SENSING APPLICATIONS

PRADEEP KUMAR RATHORE

CENTRE FOR APPLIED RESEARCH IN ELECTRONICS

INDIAN INSTITUTE OF TECHNOLOGY DELHI

JULY 2015

CMOS COMPATIBLE MEMS STRUCTURES FOR

PRESSURE SENSING APPLICATIONS

by

PRADEEP KUMAR RATHORE

CENTRE FOR APPLIED RESEARCH IN ELECTRONICS

Submitted

in fulfillment of the requirements of the degree of Doctor of Philosophy

to the

INDIAN INSTITUTE OF TECHNOLOGY DELHI

JULY 2015

iii

Certificate

This is to certify that the thesis entitled, “CMOS compatible MEMS structures for

pressure sensing applications”, being submitted by Mr. Pradeep Kumar Rathore for

the award of the degree of Doctor of Philosophy to the Indian Institute of Technology

Delhi, New Delhi, is a record of bonafide research work carried out by him under my

guidance and supervision. This thesis to the best of our knowledge does not contain any

results which have been submitted in part or full for a degree or diploma at any other

University or Institute.

Prof. B.S. Panwar

Centre for Applied Research in Electronics

Indian Institute of Technology Delhi

Hauz Khas, New Delhi – 110016, India

v

Acknowledgements

First of all I would like to cordially acknowledge my thesis supervisor Prof. B.S. Panwar

from the Centre of Applied Research in Electronics (CARE), Indian Institute of

Technology Delhi for giving me an opportunity to work as a full-time Ph.D. student

under his guidance. I wish to extend my immense gratitude to him for his assistance and

constant support throughout the course of this work. I would like to thank my student

research committee (SRC) members Prof. R. Bahl, Prof. S.D. Joshi and Prof. S. Chandra

for their helpful suggestions related to this work.

I am very grateful to Dr. Chandra Shekhar, Director, Central Electronics Engineering and

Research Institute (CEERI) for allowing us to use their device fabrication facilities for

carrying out the experimental part of the thesis work. I thank Dr. Jamil Akhtar and all the

members of Sensors and Nanotechnology Group at CEERI for their constant support in

the fabrication processes.

I would like to thank the Department of Science and Technology, India and IEEE Control

System Society for providing me partial financial support for attending 2012

International Conference on Biomaterials and Bioengineering, and 2013 IEEE Multi-

Conference on Systems and Control, respectively.

I would also pay my heartiest thanks to Prof. M.C. Mahato from North Eastern Hill

University for his moral support and encouragement though out the course of my thesis

work. It is also a pleasure to express my thanks to my colleagues Dr. Uday Dadwal, Dr.

P. Rangababu and Dr. C. Ramarao for their kind cooperation in various matters. I would

also like to thank Mr. Gyanendra Singh, Mr. Bhagaban Behera, and Mr. Vishal Gupta for

vi

their encouragement and support at different levels of my work. I would also like to thank

Miss Priyanka for being a constant source of encouragement.

A special thanks to my friends Sudhakar, Komal, Rajeev, Dhyani, Piyush, Madhusudan,

Ram, Devendra, Gagan, Satyam and Manoj without whom the stay at IIT would have not

been pleasant and joyful. I would also want to express my utmost gratitude to mess staff

for their care and extra pain to prepare my food during the bad times of my health.

Finally, I am obliged to my parents, Mr. Anil Kumar Rathore and Mrs. Rammurti Devi

Rathore, and my brothers Sudeep, Puneet and Rajat, whose constant support,

encouragement and love enabled me to complete this work.

Pradeep Kumar Rathore

vii

Abstract

It has long been felt a need for a suitable complete system on a chip (SoC) that will be

used as a convenient intelligent pressure sensor for various purposes. The present thesis is

motivated by a desire to fulfil the need of overcoming various difficulties and challenges.

MEMS structures with CMOS circuitry on a single silicon chip have the potential to

achieve the expected goal. In this thesis, we move in small steps towards the final goal of

fabrication of a novel NMOS-MEMS integrated current mirror sensing MOSFET

embedded pressure sensor.

This thesis, as a first exercise, describes the design, simulation and fabrication of a newly

developed double cavity vacuum sealed piezoresistive pressure sensor. This sensor was

fabricated using front-side lateral etching technique in which two microcavities were

formed under the pressure sensing diaphragms by etching silicon from the front side of

the wafer. This front-side etching process is compatible with the CMOS processes which

are performed on the front side of the wafer for the development of integrated circuits.

The sensor’s electrical readout circuitry consists of boron diffused polysilicon resistors

arranged in the half Wheatstone bridge configuration. The average measured pressure

sensitivity of the tested pressure sensor is found to be approximately 12.5 mV/MPa. The

sensing structure is simulated and optimized using COMSOL Multiphysics. A good

agreement with the fabricated device for the chosen location of the piezoresistors through

simulation has been predicted. The sensitivity of the optimized pressure sensing structure

was found to be 92 mV/MPa. The experience gained in this exercise sets the stage for the

design and analysis of current mirror sensing based MOSFET embedded pressure sensor.

viii

This study then conceptualizes a novel NMOS-MEMS integrated current mirror sensing

based MOSFET embedded pressure sensor using the piezoresistive effect in MOSFET.

Based on this concept of current mirror pressure sensing circuitry, eight different NMOS-

MEMS integrated pressure sensing structures consisting of square, rectangular and ring

channel shaped MOSFET embedded on silicon diaphragm and bridge structures are

designed using standard 5 µm CMOS technology. COMSOL Multiphysics and Tanner’s

TSpice simulators are used for simulating the structural and electrical behavior of the

integrated sensor. The simulation results show that the best sensitivities obtained for the

NMOS-MEMS integrated sensor with diaphragm and bridge structures are found to be

approx. 782 and 1614 mV/MPa, respectively. The results of this study indicate that

improvements in the MOSFET embedded sensing structure can enhance the sensitivity of

the integrated pressure sensor. One of the eight NMOS-MEMS integrated pressure

sensing structures is chosen for fabrication for the proof of concept. The process flow and

the mask layout for the fabrication of the proposed sensor are designed based on the

aluminium gate MOS process on silicon-on-insulator (SOI) wafers. Silvaco TCAD

software has been used for the extraction of process parameters that are required for the

fabrication of n-channel MOS transistor. In addition, individual processes for making

NMOS have also been carried out on normal silicon wafers. However, we have deferred

the actual fabrication of proposed device due to the unavailability of needed materials

and device fabrication facilities at our disposal in the departmental laboratory. In

summary, the results of the comparative study indicate that the proposed current mirror

pressure sensing circuit can be an alternative to the traditional Wheatstone bridge circuit

for the development of microsensors.

ix

Table of Contents

Certificate iii

Acknowledgements v

Abstract vii

Table of contents ix

List of figures xv

List of tables xxvii

List of symbols and abbreviations xxxi

Chapter

1 Introduction 1

1.1 Overview 1

1.2 Motivation 5

1.3 Objectives of the thesis 6

1.4 Thesis outline 7

1.5 References 11

2 Design principles and analysis of piezoresistive pressure sensor 17

2.1 Introduction 17

2.2 Review of basic mechanics 18

x

2.2.1 Elastic property 18

2.2.2 Stress 18

2.2.3 Strain 20

2.2.4 Hooke’s law 21

2.2.5 Poisson’s ratio 21

2.3 Static bending of thin plates under externally applied pressure 22

2.4 Piezoresistance effect 24

2.4.1 Piezoresistivity in silicon 26

2.4.2 Piezoresistivity in metal oxide semiconductor field effect

transistors (MOSFETs)

29

2.5 Summary 30

2.6 References 31

3 Double cavity vacuum sealed piezoresistive pressure sensor using

Wheatstone bridge sensing circuit

35

3.1 Introduction 35

3.2 Double cavity vacuum sealed piezoresistive absolute pressure sensor 36

3.3 Sensor working principle and theoretical model 38

3.3.1 Mechanical sensing structure: Rectangular diaphragm 38

3.3.2 Electrical transduction mechanism: Piezoresistivity 39

3.3.3 Pressure sensing readout circuitry: Half Wheatstone bridge 40

3.4 Fabrication and testing of double cavity vacuum sealed piezoresistive

pressure sensor

40

xi

3.5 Finite element method simulations of double cavity pressure sensor 47

3.6 Results and discussion 52

3.7 Summary 57

3.8 References 58

4 NMOS-MEMS integrated current mirror sensing based MOSFET

embedded pressure sensor

61

4.1 Introduction 61

4.2 Basics of n-channel enhancement-type MOSFET (NMOS) 62

4.2.1 Physical structure of NMOS 62

4.2.2 Basic operation of NMOS 63

4.2.3 Output current-voltage characteristics of NMOS 64

4.3 Basics of MOSFET current mirror circuit 65

4.3.1 Schematic structure of a basic MOSFET current mirror circuit 65

4.3.2 Output current-voltage characteristics of current mirror circuit 67

4.4 NMOS-MEMS integrated current mirror sensing based MOSFET

embedded pressure sensor

68

4.5 Sensor working principle and theoretical model 69

4.5.1 Mechanical sensing structure: Diaphragm and bridge

structures

70

4.5.2 Electrical sensing: Piezoresistive effect in n-channel

MOSFET

70

4.5.3 Pressure sensing circuit: Resistive loaded NMOS based 72

xii

current mirror circuit

4.6 NMOS-MEMS integrated current mirror sensing based pressure

sensor: Simulation procedure

74

4.7 Determining appropriate thickness of n-channel MOSFET equivalent

piezoresistor

76

4.8 NMOS-MEMS integrated current mirror sensing based MOSFET

embedded pressure sensing structures and their simulations

80

4.8.1 Structure I: Square shaped n-channel MOSFET embedded on

a square shaped silicon diaphragm

80

4.8.2 Structure II: Rectangular shaped n-channel MOSFETs

embedded on a square shaped silicon diaphragms

87

4.8.3 Structure III: Rectangular shaped n-channel MOSFETs

embedded on a single square shaped silicon diaphragm

96

4.8.4 Structure IV: Square ring channel shaped MOSFET

embedded on a square shaped silicon diaphragm

101

4.8.5 Structure V: Circular ring channel shaped MOSFET

embedded on a circular shaped silicon diaphragm

106

4.8.6 Structure VI: Square shaped n-channel MOSFET embedded

on a square shaped silicon bridge

111

4.8.7 Structure VII: Rectangular shaped n-channel MOSFETs

embedded on a square shaped silicon bridges

115

4.8.8 Structure VIII: Rectangular shaped n-channel MOSFETs

embedded on a single square shaped silicon bridge

119

xiii

4.9 Comparison of current mirror pressure sensing circuit with traditional

Wheatstone bridge circuit

124

4.10 Linearity error in the deflection and output voltage of various NMOS-

MEMS integrated current mirror sensing based pressure sensors

126

4.11 Summary 129

4.12 References 130

5 Processs flow, mask layout and characterization of NMOS-MEMS

integrated pressure sensor

133

5.1 Introduction 133

5.2 Process flow for the fabrication of NMOS-MEMS integrated current

mirror sensing based MOSFET embedded pressure sensor

134

5.3 Mask layout for the fabrication of proposed pressure sensor 138

5.4 Fabrication and characterization of aluminum gate n-channel

MOSFET using Silvaco TCAD software

141

5.5 Choice of wafers and individual processes performed 144

5.5.1 Choice of wafers: Silicon and silicon-on-insulator (SOI)

wafers

144

5.5.2 Chemical cleaning of silicon wafers 145

5.5.3 Thermal oxidation for growing thick field oxide and thin gate

oxide layers

146

5.5.4 Phosphorus doping using thermal diffusion process 148

5.5.5 Aluminium deposition and etching 149

xiv

5.5.6 Photolithography 150

5.6 Fabrication and testing of aluminum gate metal-oxide-semiconductor

(MOS) capacitor

151

5.7 Mismatch effects in the circuit elements of the current mirror pressure

sensing circuit

153

5.8 Effect of variations in the supply voltage and operating temperature on

the current mirror transistors

159

5.9 Summary 162

5.10 References 162

6 Conclusion and future outlook 165

List of publications 169

Biographical sketch 171

xv

List of figures

Figure no. Figure caption Page no.

Figure 2.1 Block diagram of pressure sensor describing its working principle. 17

Figure 2.2 Various stress components acting on a differential volume of a

solid body that is subjected to a set of external forces P1, P2, R1

and R2.

19

Figure 2.3 Bending of a rectangular plate under uniformly distributed applied

pressure.

22

Figure 2.4 Piezoresistors integrated in pressure sensing diaphragm and used

as strain gauge for measuring the diaphragm deflection under

applied pressure load.

25

Figure 3.1 Schematic structure of double cavity vacuum sealed piezoresistive

pressure sensor.

37

Figure 3.2 Layout of the double cavity vacuum sealed piezoresistive pressure

sensor with piezoresistors arranged in Wheatstone half bridge

configuration.

37

Figure 3.3 Complete process flow for the fabrication of the double cavity

vacuum sealed piezoresistive pressure sensor, (a) chemically

cleaned (100) silicon wafer, (b) thermal oxidation of SiO2, (c)

LPCVD of Si3N4, (d) photolithography-I (PLG-I) and reactive ion

etching (RIE) of Si3N4 and SiO2, (e) LPCVD of polysilicon, (f)

41

xvi

PLG-II and RIE of polysilicon, (g) PECVD of Si3N4-SiO2-Si3N4,

(h) PLG-III and RIE of Si3N4-SiO2-Si3N4 for side channels, (i)

KOH anisotropic etching, (j) PECVD of SiO2 for sealing the

channels, (k) LPCVD of polysilicon and boron doping, (l) PLG-IV

and wet etching of polysilicon and SiO2 for grid formation, (m)

PLG-V and wet etching of polysilicon for resistors, (n)

metallization of titanium and gold (Ti-Au), and (o) PLG-VI and

wet etching of Au-Ti for connecting lines and pads.

Figure 3.4 Photographs of the processed wafer after each photolithography

step (a) PLG-I: 100 × 100 µm window opening, (b) PLG-II: 180 ×

100 µm polysilicon sacrificial layer, (c) PLG-III: 80 × 20 µm etch

hole/channel opening, (d) PLG-IV: 50 µm wide grid formation, (e)

PLG-V: 60 × 5 µm polysilicon resistor formation, (f) PLG-VI: 200

× 200 µm contact pads and 10 µm wide contact lines.

42

Figure 3.5 Photographs of a processed wafer showing (a) to (f) the etching

profile of Si (100) in KOH solution after 15, 30, 45, 60 and 75

minutes of exposure for the formation of double cavities. (g)

Bright field image and (h) dark field image of processed wafer

showing the rectangular diaphragm, polysilicon resistors and the

rectangular cavity or V-groove under the broken diaphragm.

44

Figure 3.6 Photograph of (a) manually diced sensor chip mounted bonded on

TO8 header, (b) magnified image of 1 × 1 mm pressure sensor

chip, and (c) magnified image of a pressure sensing structure

46

xvii

consisting of two diaphragms and four resistors arranged in

Wheatstone half bridge configuration.

Figure 3.7 Output voltage vs. input applied pressure for two different

pressure sensors.

46

Figure 3.8 Screenshots of the FEM simulated structure (a) Pressure sensing

diaphragm before meshing, (b) Pressure sensing diaphragm after

meshing, (c) Deflection profile, and (d) Distribution of x-direction

normal stress component developed in the diaphragm under an

applied pressure of 500 KPa.

49

Figure 3.9 Screenshots of the FEM simulated structure (a) Deflection profile

of the diaphragm with polysilicon piezoresistor integrated on its

surface under applied pressure, (b) Enlarged view of the deformed

polysilicon piezoresistor under applied pressure, (c) Electric

conductivity profile of the polysilicon piezoresistor under (c) zero

applied pressure, and (d) 500 KPa of applied pressure.

50

Figure 3.10 (a) Plot of maximum deflection as a function of applied pressure,

(b) Plot of maximum Von-misses stress as a function of applied

pressure, (c) Plot resistance as function of applied pressure, and

(d) Plot of output voltage as a function of applied pressure. The

pressure sensing diaphragm has a polysilicon piezoresistor placed

at a distance of 5 µm from the fixed edge on the surface of the

diaphragm.

51

Figure 3.11 Simulation results of normal stress components (Txx and Tyy) at the 54

xviii

top surface of the diaphragm under 0.5 MPa applied pressure as a

function of position (a) along the width of the diaphragm in x-

direction at y = 50 µm, and (b) along the length of the diaphragm

in y-direction at x = 0.

Figure 3.12 Graph showing the change in resistance value of the resistor as a

function of its distance from the fixed edge of the 30 µm wide

diaphragm under 0.5 MPa applied pressure.

54

Figure 3.13 Simulation results of (a) resistance change, and (b) output voltage

as a function of applied pressure, for a piezoresistor placed at 0.5

µm from the fixed edge on the surface of the diaphragm.

55

Figure 4.1 (a) The physical structure of an n-channel enhancement-type

MOSFET, (b) Basic operation of NMOS transistor with a positive

gate voltage. An n-channel is induced at the top of the substrate

beneath the gate, and (c) current voltage characteristics of NMOS.

63

Figure 4.2 (a) Schematic circuit diagram of a current mirror circuit, and (b)

output current-voltage characteristics of the current mirror circuit.

66

Figure 4.3 Schematic circuit diagram of a resistive loaded n-channel

MOSFET based current mirror circuit with a constant current

source MOSFET M1, acting as a reference transistor, and the

output MOSFET M2 acting as a pressure sensing transistor, (b)

Cross-sectional view of a MOSFET embedded pressure sensing

structure with the channel region of the MOSFET M2 forming the

pressure sensing flexible diaphragm, and (c) Cross-sectional view

69

xix

of the pressure sensing structure consisting of pressure sensing

MOSFET M2 integrated on a particular region of the silicon

diaphragm.

Figure 4.4 MOSFET operating in saturation region represented by an

equivalent resistor.

71

Figure 4.5 Pressure sensing structure consisting of an n-channel MOSFET

equivalent piezoresistor integrated on a silicon diaphragm used for

COMSOL Multiphysics simulations.

74

Figure 4.6 Screenshots of the FEM simulated structure (a) Deflection profile

and (b) Stress profile of diaphragm integrated with NMOS

equivalent piezoresistor, for an applied pressure of 1 MPa. Plots of

(c) Channel resistance, and (d) Equivalent channel mobility as a

function of resistor thickness for an applied pressure of 1 MPa.

79

Figure 4.7 Structure I: (a) Cross-sectional view of current mirror sensing

based MOSFET embedded pressure sensor with reference and

pressure sensing transistors (M1 and M2), (b) Layout view of the

current mirror sensing based pressure sensor. D, G, and S

represent the drain, gate and source terminals of the MOSFETs

M1 and M2.

81

Figure 4.8 Simulation results of structure I. Screenshots of the FEM

simulated structure (a) Deflection profile, and (b) Stress profile

developed in the diaphragm under an applied pressure of 1 MPa.

Electric conductivity profile of the NMOS equivalent piezoresistor

85

xx

under (c) zero applied pressure, and (d) 1 MPa of applied pressure.

Figure 4.9 Simulation results of structure I. Plots of (a) Channel resistance,

(b) Channel mobility, (c) Drain current of current mirror

transistors, and (d) Output voltage as a function of applied

pressure.

86

Figure 4.10 Structure II: (a) Pressure sensing MOSFET integrated at fixed

edge of the diaphragm to sense positive tensile stress, (b)

MOSFET integrated at the centre of the diaphragm to sense

negative compressive stress, (c) Modified current mirror pressure

sensing circuit with reference MOSFET (M1) and pressure sensing

MOSFETs (M2 and M3 placed at the fixed edge and at the centre

of the diaphragm, respectively), and (d) Layout view of the

modified current mirror based pressure sensor. D, G, and S

represent the drain, gate and source terminals of the MOSFETs

M1, M2 and M3.

88

Figure 4.11 Simulation results of structure II. Plots of normal x-direction stress

developed in the diaphragm with NMOS equivalent piezoresistor

integrated (a) At the fixed edge of the diaphragm, and (b) At the

centre of the diaphragm. Electric conductivity profile of the

NMOS equivalent piezoresistor integrated (a) At the fixed edge of

the diaphragm, and (b) At the centre of the diaphragm. (Applied

pressure = 1 MPa).

94

Figure 4.12 Simulation results of structure II. Plots of (a) Channel resistance, 95

xxi



pressure.

Figure 4.13 Structure III: Cross-sectional view of current mirror sensing based

MOSFET embedded pressure sensor with reference and pressure

sensing transistors (M1, M2 and M3).

96

Figure 4.14 Layout view of the current mirror sensing based pressure sensor.

MOSFET M2 is placed near the fixed edge of the diaphragm and

M3 is placed at the centre.

97

Figure 4.15 Simulation results of structure III. Screenshots of the FEM





99

Figure 4.16 Simulation results of structure III. Plots of (a) Channel resistance,



pressure.

100

Figure 4.17 Structure IV: (a) Schematic structure and (b) Cross-sectional view

of a ring channel shaped MOSFET embedded pressure sensing

structure.

101

Figure 4.18 Layout view of square ring channel shaped MOSFET embedded

pressure sensing structure.

102

xxii

Figure 4.19 Simulation results of structure IV. Screenshots of the FEM

simulated structure (a) Displacement profile of the diaphragm, (b)

Stress profile of a diaphragm under 1 MPa of applied pressure, (c)

Electric potential of 200 V applied across the NMOS equivalent

resistor, and (d) Electrical conductivity profile of the square ring

channel shaped NMOS equivalent piezoresistor under 1 MPa of

applied pressure.

104

Figure 4.20 Simulation results of structure IV. Plots of (a) Channel resistance,



pressure.

105

Figure 4.21 Structure V: (a) Cross-sectional view of the circular ring channel

shaped MOSFET pressure sensor, and (b) Layout view of ring

channel shaped MOSFET embedded pressure sensing structure.

106

Figure 4.22 Simulation results of structure V. Screenshots of the FEM

simulated structure (a) Displacement profile of the diaphragm, (b)

Stress profile of a diaphragm under 1 MPa of applied pressure, (c)

Electric potential of 200 V applied across the NMOS equivalent

resistor, and (d) Electrical conductivity profile of the circular ring

channel shaped NMOS equivalent piezoresistor under 1 MPa of

applied pressure.

109

Figure 4.23 Simulation results of structure V. Plots of (a) Channel resistance,


110

xxiii


pressure.

Figure 4.24 Structure VI: Cross-sectional view of current mirror sensing based

MOSFET embedded pressure sensor with reference MOSFET M1

placed on the silicon substrate and the pressure sensing transistor

M2 integrated on a silicon bridge structure.

111

Figure 4.25 Simulation results of structure VI. Screenshots of the FEM

simulated structure (a) Displacement profile, and (b) Normal x-

direction stress profile of a silicon bridge structure under 1 MPa of

applied pressure, (c) Electric potential applied across the NMOS

equivalent resistor, and (d) Electrical conductivity profile of the

NMOS equivalent piezoresistor integrated in the silicon bridge

under 1 MPa of applied pressure.

113

Figure 4.26 Simulation results of structure VI. Plots of (a) Channel resistance,



pressure.

114

Figure 4.27 Structure VII: (a) MOSFET M2 integrated near the fixed edge of a

silicon bridge to sense positive tensile stress, and (b) MOSFET

M3 integrated at the centre of the silicon bridge to sense negative

compressive stress.

115

Figure 4.28 Simulation results of structure VII. Plots of normal x-direction

stress developed in the diaphragm with NMOS equivalent

117

xxiv

piezoresistor integrated (a) At the fixed edge of the diaphragm,

and (b) At the centre of the diaphragm. Electric conductivity

profile of the NMOS equivalent piezoresistor integrated (a) At the

fixed edge of the diaphragm, and (b) At the centre of the

diaphragm. (Applied pressure = 1 MPa).

Figure 4.29 Simulation results of structure VII. Plots of (a) Channel resistance,



pressure.

118

Figure 4.30 Structure VIII: Cross-sectional view of current mirror sensing

based MOSFET embedded pressure sensor with reference and

pressure sensing transistors (M1, M2 and M3).

119

Figure 4.31 Simulation results of structure VIII. Screenshots of the FEM





121

Figure 4.32 Simulation results of structure VIII. Plots of (a) Channel

resistance, (b) Channel mobility, (c) Drain current of current

mirror transistors, and (d) Output voltage as a function of applied

pressure.

122

Figure 4.33 Schematic circuit diagram of a Wheatstone bridge circuit. An

input voltage Vin = 10 V (DC) is applied at the input terminals A

124

xxv

and B, and output voltage Vout is obtained across of C and D

terminals.

Figure 4.34 Plot of deflection error as a function of diaphragm deflection

(2500 nm thick square and circular diaphragms have been used in

the present work), (b) Plot of maximum deflection as a function of

applied pressure for square and circular shaped silicon

diaphragms, and square shaped silicon bridge, (c) Plot of linearity

error (%) in the deflection of diaphragm and bridge structures as a

function of applied pressure, (d) Plot of linearity error (nm) in the

deflection of diaphragm and bridge structures.

127

Figure 4.35 Plot of linearity error in the output voltage over the entire range of

applied pressure from 0 to 1 MPa for various NMOS-MEMS

integrated pressure sensing structures

128

Figure 5.1 Mask layout of a single pressure sensor chip. 139

Figure 5.2 Snapshot of aluminum gate n-channel MOSFET fabricated using

Silvaco’s Athena process simulator.

142

Figure 5.3 Input current-voltage characteristics of aluminum gate n-channel

MOSFET.

143

Figure 5.4 Output current-voltage characteristics of aluminum gate n-channel

MOSFET.

143

Figure 5.5 Photographs of bare silicon wafer (grey colour) and oxidized

silicon wafer (greenish colour).

148

Figure 5.6 Photographs of aluminium deposited on silicon wafers. 150

xxvi

Figure 5.7 Photograph of the photoresist coated wafer after exposure and

development.

151

Figure 5.8 (a) Cross-sectional view of the fabricated aluminum gate MOS

capacitor, and (b) Photograph of the processed wafer showing an

array of aluminum gate MOS capacitors.

152

Figure 5.9 High frequency CV characteristics of the fabricated aluminum

gate MOS capacitor at 1 MHz frequency.

153

Figure 5.10 Schematic circuit diagram of a current mirror circuit with non-

identical circuit elements.

154

Figure 5.11 Plots of drain currents of current mirror transistors M1 and M2 as

a function of mobility µn2, aspect ratio (W/L)2, threshold voltage

Vtn2 and drain resistance RD2 of transistor M2.

157

Figure 5.12 Plots of output offset voltage, obtained across the drain terminals

of current mirror transistors M1 and M2, as a function of mobility

µn2, aspect ratio (W/L)2, threshold voltage Vtn2 and drain resistance

RD2 of transistor M2.

158

Figure 5.13 Plots of drain current and drain voltage of current mirror

transistors M1 and M2 as a function of supply voltage.

160

Figure 5.14 Plots of (a) Mobility and (b) Threshold voltage of the n-channel

MOSFET as a function of temperature. Plots of (c) Drain current

and (d) Drain to source voltage of current mirror transistors M1

and M2 as a function of operating temperature.

161

xxvii

List of tables

Table no. Table caption Page no.

Table 2.1 Expressions for maximum deflection and maximum stress

developed in various mechanical pressure sensing elements.

24

Table 2.2 Typical values of piezoresistance coefficients for bulk silicon 29

Table 2.3 Typical values of piezoresistance coefficients for MOSFET 30

Table 3.1 Design parameters used in the fabrication of double cavity vacuum

sealed piezoresistive absolute pressure sensor

38

Table 3.2 Comparison of various pressure sensing diaphragms integrated

with polysilicon piezoresistor placed at a distance of 5 µm from

the fixed edge of the diaphragm

52

Table 3.3 Comparison of various pressure sensing diaphragms integrated

with polysilicon piezoresistor placed at a distance of 0.5 µm from

the fixed edge on the surface of the diaphragm

55

Table 3.4 Comparative table for various parameters of the pressure sensor

extracted through FEM simulation before and after optimization of

the sensing structure

56

Table 4.1 Typical values of n-channel MOSFET parameters used in the 76

xxviii

design of current mirror sensing based pressure sensor

Table 4.2 Various parameters used for determining an appropriate thickness

of nMOS equivalent piezoresistor

78

Table 4.3 List of parameters used for design and simulation of structure I 82

Table 4.4 List of parameters used for design and simulation of structure II 92

Table 4.5 List of parameters used for design and simulation of structure III 97

Table 4.6 List of parameters used for design and simulation of structure IV 102

Table 4.7

List of parameters used for design and simulation of structure V 107

Table 4.8

Comparison table of eight different NMOS-MEMS integrated

pressure sensing structures for 1 MPa of applied pressure

123

Table 4.9

Comparison of output voltages obtained using quarter, half and

full Wheatstone bridge circuits with current mirror pressure

sensing circuit

125

Table 4.10

Approximate linearity error in the diaphragm deflection related to

its thickness

126

Table 4.11

Linearity error in the output voltages of all the eight structures for

an applied pressure of 1 MPa

128

Table 5.1 Description of masks for making current mirror sensing based

pressure sensor

140

xxix

Table 5.2 Details of the mask layout designed for the proposed pressure

sensor

140

Table 5.3 SOI and silicon wafer specifications 145

Table 5.4 Measurement of oxide thickness at two different locations of

silicon wafer

147

Table 5.5 Measurement of oxide thickness at two different locations of

silicon wafer

148

Table 5.6 Measurement of sheet resistivity of phosphorus doped silicon

wafer three different locations on the wafer surface

149

xxxi

List of symbols and abbreviations

A. List of symbols

Name SI unit Meaning

∆ Differential change

x, y, z m Axes of rectangular coordinate system

T Pa Stress tensor and its components

e Strain tensor and its components

E Pa Young’s modulus of elasticity

Poisson’s ratio ߥ

a, b, h m Length, width and thickness of the diaphragm

w m Deflection of a diaphragm

D Flexure rigidity of diaphragm

P Pa Pressure

M Bending moment and its components

l, w, t m Length, width and thickness of a piezoresistor

R Ω Resistance

ρ Ω.m Resistivity and its components

A m2 Cross-sectional area

GF Gauge factor

V V Voltage

I A Current

xxxii

E V/m Electric field vector and its components

J A/m2 Current density vector and its components

π Pa-1 Piezoresistivity tensor and its components

µ m2/Vs Carrier mobility

L m Channel length

W m Channel width

ID A Drain current

µn m2/Vs Electron mobility

Cox F/m2 Oxide capacitance per unit area

Vtn V Threshold voltage of n-channel MOSFET

λ V−1 Channel length modulation

VA A Early voltage

VDS V Drain to source voltage

VGS V Gate to source voltage

VDD, VSS V Supply voltage

rDS Ω Resistance of MOSFET in linear region

ro Ω Resistance of MOSFET in saturation region

IRef A Reference current of current mirror circuit

Io A Output current of current mirror circuit

Rch Ω Channel resistance

IDp A Drain current of MOSFET under applied pressure

β Transconductance parameter of MOSFET

xxxiii

B. List of abbreviations

MEMS Micro-electro-mechanical systems

CMOS Complementary metal oxide semiconductor

IC Integrated circuit

MOS Metal oxide semiconductor

MOSFET Metal oxide semiconductor field effect transistor

FEM Finite element method

EDA Electronic design automation

NMOS n-channel MOSFET

PECVD Plasma enhanced chemical vapor deposition

LPCVD Low pressure chemical vapor deposition

CVD Chemical vapor deposition

KOH Potassium hydroxide

TMAH Tetramethyl ammonium hydroxide

RIE Reactive-Ion-Etching

3D Three dimensional

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