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Design and Implementation of High PerformancePPSK demodulator in Biomedical ImplantHima Bindu Katikala  ( katikala.himabindu@gmail.com )

Vignan's Foundation for Science Technology and Research https://orcid.org/0000-0002-4442-074XG.Ramana Murthy 

Vignan's Foundation for Science Technology and ResearchYatavakilla Amarendra Nath 

Vignan's Foundation for Science Technology and Research

Research Article

Keywords: Cochlear Implant (CI), Fin Field Effect Transistor (FINFET),Electrode Array, Back Telemetry

Posted Date: April 2nd, 2021

DOI: https://doi.org/10.21203/rs.3.rs-370782/v1

License: This work is licensed under a Creative Commons Attribution 4.0 International License.  Read Full License

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AbstractThe important challenge for the realization of hearing aids is small size, low cost, low powerconsumption and better performance, etc. Keeping these requirements in view this work concentrates onthe VLSI (Very Large Scale Integrated) implementation of analog circuit that mimic the PPSK (PassivePhase Shift Keying) demodulator with low pass �lter. This research deals with RF Cochlear implantcircuits and their data transmission. A PPSK modulator is used for uplink data transmission inbiomedical implants with simultaneous power, data transmission This paper deals about theimplementation of PPSK demodulator with related circuits and low pass �lter which are used in cochlearimplants consumes low power and operates at 14MHz frequency. These circuits are designed usingFINFET 20nm technology with 0.4v DC supply voltage. The performance of proposed design over theprevious design is operating at low threshold voltage, reduces static leakage currents and often observedgreater than 30 times of improvement in speed performance

1. IntroductionMany wireless medical implants [1] are speci�cally used for prosthesis and diagnosis, functioned tomimic as regular body parts. In the �eld of Pharmacy, designing of these implants requiresminiaturization of technology & also component scaling. In general, implants are contrived from the skin,bone, tissues &materials-metal/plastic/ceramic, insertion of nanometer scaled (nm)   implant andgeneration of ionic potential stimulus from injected electrode array inside the human body through thesekinds of the implant is challenging task. The best HYPACUSIS treatment implant is COCHLEAR IMPLANT(CI) [2] helps to impetus the auditory nerve directly by stimulating hair cells of the EAR. However, VLSIadvanced technologies like CNTFET,  FINFET, TFET makes the scaling of channel width rather thanCMOS, leading to certain parametric variations (Power, Delay & Area) accordingly. Designing of implantsby incorporating mentioned technologies may enhance the productivity & performance. This researchwork deals with exploitation of COCHLEAR implant

circuit designing in advanced VLSI technologies. Moore's law [3] sates for every couple of years, there is adoubling of transistor count on an integrated chip by scaling the technology as in Fig.1. Progressiveefforts of researchers work from past decades originated a nanometer (nm) technology transistor knownas FINFET; shorten the cons of CMOS technology. With FINFET [4] narrow channel dual gate structure ofFig.2. leakage current are lessen & deepen carrier mobility: without increasing doping concentration &require low operating voltage(~0.4v) subsequently condense power dissipation.

In evidence to WHO recent proclamation [5] 488 million people complain of hearing disabilities for >40dBecho auditory signals, may affects more than 900 million people  by 2025 because of  environmentconditions, noise pollution, etc., Settling to above strategy research inventors proposing certainmedication facilities like arti�cial implantation (CI) from early 1800 to till date by accommodatingelectrodes for designing purpose. CI uses 22 active platinum electrodes providing 11 channels as an

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array, with length of 17mm, each electrode isolation of <0.1mm & facilitates the biphasic electric stimulusto auditory nerve[6]and spiral ganglion nerve in Fig.3.

Conventional CI contains internal parts: electrode array, transmitter & receiver /Stimulator (9.5 gm)enclosed with external parts: microphone and speech processor. Highly designed CI requires 5-6 hours ofsurgery for stabilizing hearing sense & placing of Implant inside the ear. Fig.4 describes the signalprocessing of CI from internal to external parts perfectly. As table.1 discusses contribution of inventor,especially for auditory neuro-stimulus and their functionalities[7].

1. Speech Processor-receives acoustic signals via microphone

2. Transmitter-transmits the encoded audio signals to the internal receiver

3. Electrode array-receives transmitted impulses.

4. Auditory nerve-The Electrode array electrically stimulates the auditory nerve.

Table 1. Invention Route-map of CI.

Year Inventor Device Application

1800 Alexandra Volta Metal rod insertion Auditory Sensation

1930 Waver- Bray Auditory nerve connected withelectrode

Sound Processing.

1950 Lundeberg Stimulate Auditory nerve usingelectricity

Anticipate Processing

1957 Djourna andEyeries

Stimulate Auditory with current Perfect Auditory Purpose

1961 House- Doyle Electrodes insertion for profoundlydeaf adults

Clear Auditory Response

1972 CochlearCorporation

1stsingle channel cochlear implantdevelopment

Stimulus functionality

1984 CochlearCorporation FDA

Wearable Speech Processor"NUCLEUS"

Speech Coding Strategy

1989 Cochlearcorporation

Mini Speech Processor (MSP) Small size made it suitablefor children

2006 Ronald Advanced Electrolyte Stylet (AOS) Multi-channel SpeechProcessor.

2. Finfet Trends In Cochlear ImplantThe scope of the electronics in CI, is to design the functioning circuits like speech processor, transmitter,etc., by using VLSI technology. The signal processing from the external source to the internal part of ear isperfectly prototype in Fig.5 [8].

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Modern CI can be successfully progressed by applying a proper synchronized clock implemented inFINFET topology [9] that is in Radio Frequency (RF) range. All the medical devices are driven mostly in RFrange for ensuring safety interconnect between internal and external parts, to transmit both power anddata. Major sub block is Back telemetry pretend to monitor the internal unit, electrode unit conditions &neural responses. An ASIC chip with power ampli�er [10], error frees decoder/demodulator [11] andAnalog to Digital Converter (ADC) is integrated for internal feedback purpose. However, propagating thesignal impulse in mv range into the body is crucial task.

From the Era of Telephone by Graham Bell in the 18th century, Electrophonic Perception of Stevens withhis colleagues in the 19th century, William's Gold Electrode implantable chip in the mid of 19th centuryproven the audio-signal stimulates in deaf patient & prearranged the trail invention of hearing-aidimplantable devices. Various implantable integrated analog circuits have been designed for numerousclinical applications such as cardiac pacemakers, cochlear implants , retinal prostheses, and functionalneuromuscular stimulation (FNS) systems. These devices are active implants that require energy sourceslike solar, infrared & wireless energy transfer for functioning [12]. In implanted system, the power [13] isthe major concern in the system design. Due to the lifetime limitation, the battery is not the optimalchoice in the implanted device. In recent years, electromagnetic propagation through inductive couplinglinks is widely used to deliver power and information to these implantable systems.

These approaches can avoid the risk of causing infection and battery life problem. In general,implantable systems must satisfy the following requirements: 1) long-life time, 2) high reliability and 3)small size.The implanted device (bio-devices) senses the internal data (body) and converse with theexternal world by means of power and telemetry [15-16] Hence biotelemetry link is used as thebidirectional transmission between bio-device and external tool.

The process of data transmission between the bio-device and the tool is in the form of uplink and down-link. Sending of data from the implant to the external world is known as DOWNLINK and its inverse istermed as UPLINK. Bio-device consists of a sensor and a stimulator. The bio-signals are sensed by thesensor and the sensed data is transmitted to the doctors for diagnosis. Multi Stimulator [14] acts as afeedback element which tracks the status of the nerves and the implant. Taking it as a challenge theparts of implantable devices are designed the CMOS technology by considering all technical parametricissues [17].

The main characteristic of an implant is, to modulate the data within the load impedance[18-19] of theinductive link otherwise the increased modulation index decreases the data rate hence the transfer powere�ciency decreases[20]. For better modulation a PPSK demodulator is designed in FINFET technologyand compared with existing technology. Based on the considerations, an analog PPSK demodulatorcommunication module circuit is proposed in FINFET technology, because of its low dopingconcentration with good matching & better performance through proper voltage biasing.

2.1. Conventional PPSK Demodulator

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The telemetry circuit implemented in CMOS technology for cochlear implant [15] is shown in Fig.6. It is asurgical device, which senses audio signals from a hearing-impaired person. The device consists of amicrophone placed outside the ear and an electrode array in the inner ear and skin act as an inductive linkbetween the external and internal parts of the ear. Injecting the device in the exact position of the bodytakes 6 hours of surgery; however, it should be miniaturized and consume less power.

2.2. Proposed Telemetry Circuit for a Cochlear Implant

To achieve the desired characteristics of low cost, small size, low power implants, conventional CMOSimplants are implemented with 20nm FINFET Technology [21-23]. In this regard respect RF clockgenerator, Monostable multi-vibrator, PPSK demodulator are designed and implemented to meet therequirement of proposed model.

2.2.1.Monostable Multi-vibrator:

In the implant design, Monostable multi-vibrator is used as the timer to produce the data rate in userspeci�ed time. The proposed circuit is designed for driving large capacitive loads which are implementedusing NMOS technology with less delay, number of stages, and the width value as shown in Fig 7. NMOSinverters are used to amplify the speed and also reduce the transistor count. The two circuits (M1 andM2) parametric values are same, but the difference in capacitance C1 (1:5) and the chirality value ofwidth (2).Transistor level implementation of Monostable Circuit is shown in Fig 8. 

2.2.2.PPSK Demodulator:

At the external transmitter side the PPSK demodulator is considered. Comparing with the othermodulation techniques the e�cient way for authorizing data is done by using PSK [24], [20]. In theproposed circuit an active low pass �lter in place of comparator is used to achieve good modulation bydragging su�cient power to amplify the output signal with low noise as shown in Fig 9.

The �rst order low pass �lter is driven by resistor R and Capacitor C it only allows low frequency signalsbut attenuates the signals beyond the cut-off range. As the sine wave response is applied and itgenerates the triangular wave output by varying C either by charging or by discharging, hence it acts asan integrator. Chosen R, C (τ) values which are greater than the input time period.

2.2.3. Calculation for Bit Error Rate (BER) of Monostable Circuit:

For example from the generated output of Monostable circuit the change of number of bits fromtransmitted input (IN) 12Kbits to received output bits with error of 4 bits (VOUT) is de�ned as BER. So errorbits are four divided by 12K transmitted bits. The error rate is 0.0000333.

3. Simulation Results3.1.Monostable Circuits.

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The simulated waveform for M1 and M2 circuits is generated by FINFET 20 nm technology using thecadence tool by applying 0.4v. As per the transient analysis the settling time considered as 7ns for datatransmission, consequently the frequency range is of 14MHz Table.1. The delay, dynamic powerdissipation is calculated is shown in Table.2. From the waveform the capacitor C1 alters when FF-resetchanges from 1 to 0 and Width from 0 to1, with reference to the time axis the generated output isampli�ed in accordance with the width and C1, and it is evident for the less propagation delay in signaltransmission from the obtained results of Fig.10.

3.2. PPSK Demodulator:

PPSK demodulator is implemented with 0.4v supply voltage in 20 nm FINFET technology here VIN, VAMP,a low pass �lter capacitor C are the inputs and VOUT is the output. The simulation results are shownbelow. It is observed in Fig 11. VOUT is dependent on the C which remains constant until capacitor chargesand discharges and changes its phase for next cycle (VIN).

Table.2 & table.3 Represents the features summary & comparison analysis.

Table 2 Features Summary.

Technology FINFET 20nm

Design tool CADENCE VIRTUOSO

Supply voltage 0.4v

Telemetry speci�cations UPLINK

Monostable frequency range 14MHz

Programmable monostable circuits(M1,M2) Designed using Driving large capacitive loads

Monostable BER 0.0000333

Uplink modulation PPSK using low pass �lter

Table 3 Parameters Comparison.

Design Delay(ns) Power dissipation(µW)

CMOS Monostable Circuit 116.3 8.29

FINFET Monostable Circuit 3.3825 5.38

ConclusionIn this paper Monostable and RF Clock Generator are implemented for cochlear implant application in20nm FINFET Technology. The existing comparator is replaced by an Active Low pass �lter to achieve

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high accuracy. Conventional monostable circuit is reinstated with driving large capacitive loads to reducecomplexity. It is observed that performance of the proposed design  is improved to the larger extent, withreduced delay to 34.38% and power dissipation to 1.54% with respect to conventional method in CMOS.Hence, by using this advanced FINFET technology the performance is increased by 30%.

DeclarationsAuthor Contributions Yatavakilla Amarendra Nath prepared the  research methodology and idea forcomparative study. All the simulations design, study and manuscript preparation is done by Hima BinduKatikala who was assisted by both G.Ramana Murthy and Yatavakilla Amarendra Nath. Result analysisand manuscript proof reading are veri�ed by Professor G.Ramana Murthy.

Funding The authors did not receive support from any organization for the submitted work.

Data Availability The data that support the �ndings of this study are available on request from thecorresponding author,[Hima Bindu Katikala]

Compliance with ethical standards

NA as the research involved no humans or trails

Declarations This article does not contain any studies involving animals or human participantsperformed by any of the authors.

Con�ict of Interest The authors declare that we have no con�ict of interest.

Consent to Participate Not Applicable

Consent for Publication Not Applicable

Acknowledgements The authors sincerely thank the Department of Electronics and CommunicationEngineering, VFSTR, Andhra Pradesh, India for providing the support to conduct the experimental work

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[2].Haumann S, Bauernfeind G, Teschner MJ, Schierholz I, Bleichner MG, Büchner A, Lenarz T, "Epiduralrecordings in cochlear implant users", Journal of neural engineering, Vol no 16, Iss no 5,2019.https://doi.org/10.1088/1741-2552/ab1e80

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Figures

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Figure 1

Transistor scaling technology[3].

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Figure 2

FINFET Planar Structure [4].

Figure 3

CI Platinum Electrode Array[6].

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Figure 4

CI Signal Processing[6,7].

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Figure 5

Modern CI Functional Block Diagram[8].

Figure 6

Telemetry Circuit for a Cochlear Implant[15].

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Figure 7

Block Diagram of monostable circuits M1 and M2.

Figure 8

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Realization of monostable circuit using FINFET Technology

Figure 9

Architecture of Active Low Pass Filter PPSK Demodulator.

Figure 10

Transient response of monostable (m1,m2) circuits

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Figure 11

Transient Analysis of PPSK Demodulator.