power system protective relaying-part four
TRANSCRIPT
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Part Four – Protection Part Four – Protection Fundamentals and Basic Design Fundamentals and Basic Design PrinciplePrinciple
Wei-Jen Lee, Ph.D., PE
Professor of Electrical Engineering Dept.The Univ. of Texas at Arlington
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IntroductionIntroduction
• The best protection technique now and for more than 50 years is that known as differential protection.
• Differential protection is universally applicable to all parts of the power system.
• Other protections, such as overcurrent, over/under frequency, and over/under voltage protections, are also use among utility industry.
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The Differential PrincipleThe Differential Principle
• For normal operation and all external faults, the Iop of the relay is very small.
• During external faults, the transient of the CTs can produce rather large currents. Therefore, it is difficult and impractical to apply an instantaneous relay. Time delay relay can be used with care.
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The Differential PrincipleThe Differential Principle
• For internal faults, the differential relay operating current is the sum of the input currents feeding the faults.
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The Differential PrincipleThe Differential Principle
• To provide high sensitivity to light internal faults with high security for external faults, most the relays are of the percentage differential type. The secondary of the CT is connected to restraint coil.
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The Differential PrincipleThe Differential Principle
• For the circuit with 50% characteristics, an external or through current of 10A would require a difference or operating current of 5 A or more for the relay to operate.
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The Differential PrincipleThe Differential Principle
• The through current characteristics apply only for external fault.
• Differential relays are very sensitive to the internal faults.
• Typical pick-up currents for differential relays are on the order of 0.14 – 3.0 A
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Overcurrent and Distance Overcurrent and Distance ProtectionProtection• Where differential is not utilized, overcurrent and
distance relays are the major protection schemes.• The minimum operating criteria for overcurrent
relays is shown below:
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Overcurrent and Distance Overcurrent and Distance ProtectionProtection• Relay coordination
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Basic Design PrinciplesBasic Design Principles
• Electromechanical• Solid State• Hybrid• Numerical (Microprocessor)
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Basic Design PrinciplesBasic Design Principles
• Time-Overcurrent Relays
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Basic Design PrinciplesBasic Design Principles
• Time-Overcurrent Relays• Definite minimum time (CO-6)
• Inverse (CO7 or CO-8)
• Very inverse (CO-9)
• Extremely inverse (CO-11)
• Tap setting and time dial setting
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Basic Design PrinciplesBasic Design Principles
• Example: Time-overcurrent relays for radial system protection
System diagram
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Basic Design PrinciplesBasic Design Principles
• Example: Time-overcurrent relays for radial system protection• Arrangement of breaker, CT, and relay
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Basic Design PrinciplesBasic Design Principles
• Example: Time-overcurrent relays for radial system protection• Arrangement of breaker, CT, and relay
BREAKER BREAKER OPERATING TIME
CT RATIO
RELAY TYPE
B1 5 Cycles 400:5 CO-8
B2 5 Cycles 200:5 CO-8
B3 5 Cycles 200:5 CO-8
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Basic Design PrinciplesBasic Design Principles
• Example: Time-overcurrent relays for radial system protection• System loading and fault current
Bus Load (MVA) PF (Lagging)
1 11.0 0.95
2 4.0 0.95
3 6.0 0.95
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Basic Design PrinciplesBasic Design Principles
• Example: Time-overcurrent relays for radial system protection• I-T curve of Co-8 relay
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Basic Design PrinciplesBasic Design Principles
• Example: Time-overcurrent relays for radial system protection• System loading and fault current
Bus Max. fault current Min. fault current
1 3000 2200
2 2000 1500
3 1000 700
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Basic Design PrinciplesBasic Design Principles
• Example: Time-overcurrent relays for radial system protection• Calculation and coordination
• Select Tap setting that the relay will not operate for maximum load current.
• For CT at B3, the maximum CT current for maximum load L3 is:
• For this example, 3-A TS was selected for B3 relay.
AI
AI
CT
load
51.2)5/200(
4.100
4.10010*5.34*3
10*63
6
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Basic Design PrinciplesBasic Design Principles
• Example: Time-overcurrent relays for radial system protection• Calculation and coordination
• For CT at B2, the maximum CT secondary current for maximum load is:
• For this example, 5-A TS was selected for B2 relay.
AI
AI
CT
load
18.4)5/200(
35.167
35.16710*5.34*3
10*)46(3
6
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Basic Design PrinciplesBasic Design Principles
• Example: Time-overcurrent relays for radial system protection• Calculation and coordination
• For CT at B1, the maximum CT secondary current for maximum load is:
• For this example, 5-A TS was selected for B1 relay.
AI
AI
CT
load
39.4)5/400(
43.351
43.35110*5.34*3
10*)1146(3
6
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Basic Design PrinciplesBasic Design Principles
• Example: Time-overcurrent relays for radial system protection• Calculation and coordination
• The largest fault current through B3 is 2000A. (Fault at right of B3)
• Ignore CT saturation, the fault-to-pickup current ratio at B3 is 2000/(40*3)=16.67
• Since the speed of operation is the main concern, 0.5 Time-Dial setting (TDS) is selected.
• Under this fault current, the operating time of B3 is 0.05 second
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Basic Design PrinciplesBasic Design Principles
• Example: Time-overcurrent relays for radial system protection• Calculation and coordination
• Adding the breaker operating time (0.083 second), primary protection needs 0.113 second (0.05 + 0.083) to clear this fault.
• For the same fault, the fault-to-pickup current ratio at B2 is 10.0. (2000/40*5)
• Adding the B3 relay operating time, breaker operating time, and 0.3 second coordination time interval, the B2 relay’s operating time should be 0.43 seconds.
• Select TDS=2 for the B2 relay.
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Basic Design PrinciplesBasic Design Principles
• Example: Time-overcurrent relays for radial system protection• Calculation and coordination
• The largest fault current through B2 is 3000A. The fault-to-pickup ratio for B2 is 15.
• The operating time of B2 relay under this fault current is 0.38 seconds.
• For the same fault, the fault-to-pickup ratio of B1 relay is 7.5.• Adding the B2 relay operating time, breaker operating time,
and 0.3 second coordination time interval, the B1 relay’s operating time should be 0.76 seconds (0.38+0.3+0.083).
• Select TDS=3 for B1 relay. [Confirm this results with Min. fault current]
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Basic Design PrinciplesBasic Design Principles
• Instantaneous current-voltage relays
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Basic Design PrinciplesBasic Design Principles
• Directional sensing power relay
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Basic Design PrinciplesBasic Design Principles
• Polar unit
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Basic Design PrinciplesBasic Design Principles
• Phase distance relay• Balance beam type
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Basic Design PrinciplesBasic Design Principles
• Phase distance relay• Distance relay characteristics on the R-X diagram
Impedance mho Offset mho
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Basic Design PrinciplesBasic Design Principles
• Phase distance relay• Distance relay characteristics on the R-X diagram
lens Simple blinder reactance
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Basic Design PrinciplesBasic Design Principles
• Phase distance relay• Figures (b) through (e) can operate on a fault current
less than the load current.
• A load of 5 A (secondary CT) and 120 V line to line appear to the relay as
86.135*3
120loadZ
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Basic Design PrinciplesBasic Design Principles
• Phase distance relay• The equation of the mho circle through the origin is
where
is the offset from the origin
is the radius from the offset point
• When the mho circle is tilted, is the angle of R of the offset
22
RR ZZ
Z
2RZ
2
RZ
(Typo in the book)
(Typo in the book)
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Basic Design PrinciplesBasic Design Principles
• Phase distance relay• Various operating point of the mho circle characteristic
are determined by the following equation:
where
ZX is the impedance from the origin to any point on the circle at angle X.
)cos( XRRX ZZ
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Basic Design PrinciplesBasic Design Principles
• Phase distance relay• For example, determine the reach of a mho relay unit
along a 75o angle line if the maximum load into the line is 5 A secondary at 30o lagging. From previous calculation, the load impedance is 13.86 secondary. 13.86 = ZR*cos(75o-30o)=19.6.(secondary)
• This can be translated into primary line ohms by considering the CT and VT ratio.
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Basic Design PrinciplesBasic Design Principles
• Zone protection of phase distance relay
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Basic Design PrinciplesBasic Design Principles
• Single phase MHO unit• Three MHO units are required for a protective zone.
All three units operate for three-phase fault, but for phase-to-phase and double-phase-to-ground faults, only one unit operates. Thus,
• The A unit, energized by Iab, and Vab, operates for ab and ab-gnd faults.
• The B unit, energized by Ibc, and Vbc, operates for bc and bc-gnd faults.
• The C unit, energized by Ica, and Vca, operates for ca and ca-gnd faults.
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Basic Design PrinciplesBasic Design Principles
• Single phase MHO unit• Single phase MHO unit (shown for the A unit)
• An air-gap transformer provides a secondary voltage IabZc for the A unit. Leading the primary current for lee than 90o.
• The combined output voltage is equal to IabZc – Vab. This voltage with a polarizing voltage is compared to provide the mho circle.
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Basic Design PrinciplesBasic Design Principles
• Poly-phase MHO unit• This type of MHO unit has two units for a zone
protection:• An mho circle through the origin for three-phase faults.
• A phase-to-phase unit, with a large operating circle
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Basic Design PrinciplesBasic Design Principles
• Poly-phase MHO unit• This type of MHO unit has two units for a zone
protection:• Three-phase faults unit
• The cylinder unit is like a two phase motor operating negative sequence xzy is applied and retrains on positive sequence xyz.
• When a solid comparator is used, Vxy = Vab – (Ia –Ib)Zc and Vzy = -jkVab are compared.
cnz
bny
caanx
VV
VV
ZIIVV
)3(5.1 0
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Basic Design PrinciplesBasic Design Principles
• Poly-phase MHO unit• This type of MHO unit has two units for a zone
protection:• Phase-to-phase fault unit
• For a phase-to-phase faults at the balance or decision point, VxVyVz provides a zero-area triangle (Vzy and Vxy in phase for solid state comparator)
• Any fault inside the triple-zone negative sequence xzy, or when Vzy lags Vxy cause operation.
cbccnz
bny
cbaanx
ZIIVV
VV
ZIIVV
)(
)(
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Basic Design PrinciplesBasic Design Principles
• Poly-phase MHO unit• This type of MHO unit has two units for a zone protection:
• Phase-to-phase fault unit
Vzy
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Basic Design PrinciplesBasic Design Principles
• Ground distance relays• Consider a phase-a-to-ground fault on a line with Z1L and
Z0L as the positive and zero sequence line impedance and n is the location of the fault from the relay. The fault currents through the relay are I0, I1, and I2. Then for a fault at nZ1L with a single-phase unit:
• For voltage compensation, subtract out nZ1L(I1+I2) and use I0 (not Ia), then:
021
00211 )(
III
InZIInZ
I
VLL
a
ag
(typo)
LLLag
R nZI
InZ
I
IInZVZ 0
0
00
0
211 )(
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Basic Design PrinciplesBasic Design Principles
• Ground distance relays• For current compensation, let nZ0L=pnZ1L (p=Z0L/Z1L). Then
L
LL
La
agR
aLLLL
a
agR
Z
ZZmwhere
nZmII
VZ
III
IpInZ
III
pIIInZ
III
IpnZIInZ
I
VZ
1
10
10
021
01
021
0211
021
01211' ))1(()()(
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Basic Design PrinciplesBasic Design Principles
• Ground distance relays• Considering fault resistance and mutual coupling from an
adjacent parallel line, the complete formula for current compensated single-phase ground distance relay is:
where I0E is the zero sequence current in the parallel line and Z0M is the mutual coupling impedance between two lines.
L
ME
L
LLa
relay
relayfaultL
relay
agR
ZI
ZIZ
ZZII
I
I
IRnZ
I
VZ
10
00
1
100
01
1
)(
3
(typo)
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Microprocessor Based System Microprocessor Based System ProtectionProtection
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Introduction
In the Utility Industry, Regardless Their Operation Mechanisms, the Protective Relays are Categorized and Evaluated by Their Functions.
Same Test Procedures are Applied to a Group of Relays With the Same Protective Function.
The Performance of a Microcomputer Based Relay Depends on the Hardware Design, the Accuracy of the Input Signals, and the Algorithms Embedded Inside the Unit
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Introduction
Each Vendor Has Its Own Hardware Selection and Software Design Preference. Therefore, the Physical Capability and Constraints of a Microcomputer Based Relay Are Different from Vendor to Vendor Even with Similar Protective Functions
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General Structure of a Microcomputer Based Relay
SUBSTATION & SWITCH YARDCurrent & Voltage Contacts I/P Contacts O/P
SurgeSupressor
SignalConditioning
Sample/HoldA/D Conversion & Multiplexer
CentralProcessor
Unit
SurgeSupressor
CommunicationModule
SurgeSupressor
SurgeSupressor
Memory Sub-SystemRAM, EPROM, EEPROM
SignalConditioning
OutputDriver
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Hardware Design Consideration
Central Processing Unit (CPU) Word Length Clock Speed Floating Point Calculation Single or Multiple Processor Technical Support
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Hardware Design Consideration
Memory Subsystem Memory Types
– Read Only Memory (ROM): It is designed to permanently store a fixed program which is not alterable. It can only be programmed once and requires special equipment to program the chips (Most of them are pre-programmed by manufacturers). The information is preserved even without power.
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Hardware Design Consideration
Memory Subsystem Memory Types
– Random Access Memory (RAM): It is designed so that information can be written into or read from any unique location. There are two types of RAM: Static RAM and Dynamic RAM. RAM does not retain its contents if power is lost.
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Hardware Design Consideration
Memory Subsystem Memory Types
– Programmable Read Only Memory (PROM): The characteristics of PROM is similar to ROM except that it is user programmable.
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Hardware Design Consideration
Memory SubsystemMemory Types
– Erasable Programmable Read Only Memory (EPROM): The EPROM is a specially designed PROM that can be reprogrammed after being entirely erased with the use of ultra-violet (UV) light source. The EPROM can be considered as a semi-permanent data storage device.
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Hardware Design Consideration
Memory SubsystemMemory Types
– Non-Volatile Random Access Memory (NOVRAM): Combination of RAM and EEPROM on a single chip. This chip can protect data against power failure.
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Hardware Design Consideration
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Hardware Design Consideration
Usage of Memory Real-Time Data and Pre/Post-Fault Recorder:
RAM Program Memory: ROM, PROM, EPROM, or
Combination of RAM and EPROM Settings: Flash Memory or EEPROM
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Hardware Design Consideration
Signal Conditioning The Outputs of the PT and CT Require Auxiliary
Transformers or Divider Circuits to Convert Current and Voltage Signals Into Low Level Voltage Signals Before They Can be Processed
Note: Some relay manufacturers are pushing the possibility of low
level input signals
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Hardware Design Consideration
Signal Conditioning (Conti.) Since the Signals Are Highly Distorted During a
Disturbance and the Relay Operation is Mainly Based on the Magnitude of Some Specific Signals, an Analog Filter Circuit is Generally Used to Perform First Stage Signal Screening. Later, it Relies on the Digital Filter to Perform Further Clean Up
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Hardware Design Consideration
Signal Conditioning (Conti..) Anti-Alaising Filter Design
– Band-Pass Filter
– Low-Pass Filter
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Hardware Design Consideration
Frequency Response of a Band-Pass Filter
-100
-50
0
Frequency (rad/sec)
Gain dB
o
Q=1Q=5
Q=10
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Hardware Design Consideration
Phase Shift of a Band-Pass Filter
-90
0
90
Phase deg
Frequency (rad/sec)o
Q=5
Q=10Q=1
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Hardware Design Consideration
Frequency Response of a Low-Pass Filter
-100
-50
0Gain dB
Frequency (rad/sec)
1st Order
2nd Order
3rd Order
c
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Hardware Design Consideration
Phase Shift of a Low-Pass Filter
-
-90
-180
270-
0Phase deg
Frequency (rad/sec)c
1st Order
2nd Order
3rd Order
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Hardware Design Consideration
Data Sampling Circuit Designs
A/D
M
U
XA/D
M
U
X
S/H
A/D
M
U
X
S/H
S/H
S/H
S/H
S/H
A/D
A/D
A/D
BUFFER
(a) (b)
(c) (d)
S/H
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Hardware Design Consideration
A/D Conversion Techniques– Dual Slope Tracking A/D Converter
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Hardware Design Consideration
A/D Conversion Techniques– Dual Slope Successive-Approximation A/D
Converter
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Hardware Design Consideration
A/D Conversion Techniques– Flash or Parallel Conversion
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Hardware Design Consideration
Sampling Algorithms of A/D Converter– Sampling speed and available calculation time
– Constant time interval sampling or constant samples per cycle
– Frequency calculation technique
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Hardware Design Consideration
Errors Associated with A/D Conversion– Word Length
– Quantization Error of a N-bit A/D Converter is Equal to 2-N
– Gain, and Offset Errors
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Hardware Design Consideration
Errors Associated with A/D Conversion
OffsetError
QuantizationError
Output
Input
x
x
x
10% 50% 90%
Desired Output
ActualOutput
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Hardware Design Consideration
Errors Associated with A/D Conversion– Sampling Speed and Alaising Errors
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Hardware Design Consideration
Errors Associated with A/D Conversion– Reconstruction Errors (Original Signal)
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Hardware Design Consideration
Errors Associated with A/D Conversion– Reconstruction Errors (Sampled Data)
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Hardware Design Consideration
Errors Associated with A/D Conversion– Reconstruction Errors (Reconstructed Waveform)
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Hardware Design Consideration
Errors Reduction Techniques for A/D Conversion– Word Length Selection of A/D Converter
– Full Scale Value Selection
– Coordination Between Anti-Alaising Filter and Sampling Speed
– Compensation of Gain and Offset Errors
– Programmable Gain Control
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Hardware Design Consideration
Data Communication Subsystem Isolation of Communication Network
– Isolation of Power Supply
– Isolation of Signal Inputs (RJ-11 and RS232)
– Isolation of Grounding
– Survivability of Protection Function After Communication Failure
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Hardware Design Consideration
Data Communication Subsystem External or Internal Modem
– Baud Rate– Future Upgrade– Compatibility– Power Supply– Automatic Answer
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Hardware Design Consideration
Data Communication Subsystem More Than One Units Share One Phone Line
– Mini Switch Board
– Local Area Network
– Communication Software Compatibility of Different Relays From Different Venders
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Hardware Design Consideration
Data Communication Subsystem Surge Withstand Capability and Walkie Talkie Test
– All the Open Connectors Should Comply With Surge Withstand Capability and Radiated Electromagnetic Interference Specified in IEEE Std. C-37.90.1 and C-37.90.2.
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Software Implementation Considerations
Programming Languages Execution Speed Portability Upgrade Graphical User Interface (GUI)
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Software Implementation Considerations
Computation Algorithms Digital Filtering
– Non-Recursive Filter
Y X X
Y X X
Y X X X
m m m
m m m
m m m m
2
2
1 23
3, 9, …
DC, 6, 12, …
5, 7, ...
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Software Implementation Considerations
Computation Algorithms Digital Filtering
– Recursive Filter• Kalman Filter
• Fast Fourier Transform
• Curve Fitting
• Walsh Filter
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Software Implementation Considerations
Computation Algorithms Convergence of a Recursive Filter
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Software Implementation Considerations
Computation Algorithms Convergence of a Recursive Filter
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Software Implementation Considerations
Computation Algorithms Magnitude Calculation
| |
| | ( cos ) / sin
V v v
V v v v v T T
m m
m m m m
2 23
2
2 21
21
22
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Software Implementation Considerations
Computation Algorithms Phase Calculation
| |*| |*cos * *
| |*| |*sin * *
V I v i v i
V I v i v im m m m
m m m m
3 3
3 3
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Software Implementation Considerations
Moving Windows for Magnitude Estimation
Moving Data Window
W1
W2
W3
W4
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Software Implementation Considerations
Computation Algorithms
Calculation Algorithms
– Fault Detection Algorithm
– Fault Classification Algorithms
– Calculate Between Samples or Calculate After Several Samples
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Software Implementation Considerations
Computation Algorithms
Decision Making Process
– Trip After One Violation
– Trip After Several Consecutive Violations
– Trip After Majority Violation of N Consecutive Samples
– Similar Conditions Also Apply to Reset Procedure
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Software Implementation Considerations
Computation Algorithms
Auto Execution, Watch Dog Timer, and Self Diagnostic – Auto Execution After Power Failure
– Watch Dog Timer to Protect Against Software Failure
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Software Implementation Considerations
Computation Algorithms
Auto Execution, Watch Dog Timer, and Self Diagnostic – Self Diagnostic to Protect Against Hardware Failure.
• Frequency of Self Diagnostic Function
• Completeness of the Diagnostic Function
• Failure Isolation and Indication
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Software Implementation Considerations
Data Communication Algorithm
Communication Protocol
– Compatibility and Security
– EPRI’s UCA
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Software Implementation Considerations
Error Checking– General properties of error detection and correction
• If the distance between any two code words of a code C is >dmin, the code is said to have minimum distance of dmin
• In general, a code provides t error correction plus detection of s additional errors if and only if the following inequality is satisfied:
2t + s + 1 < dmin
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Software Implementation Considerations
Error Checking– Definition of the distance
• The distance between I and J, d(I, J), is equal to the number of bit position in which I and J differ.
• For example: I = 01101100 and J = 11000100
I = 0 1 1 0 1 1 0 0
J = 1 1 0 0 0 1 0 0
d(I, J) = 3
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Software Implementation Considerations
Error Checking– Distance and error detection/correction
valid code word
dmin=2 dmin=4
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Software Implementation Considerations
Error Detection Algorithms– Parity Check
• Even parity
• Odd parity
– Check Sum• CRC
• LRC
• CX-ORC
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Software Implementation Considerations
Error Correction Algorithm– Hamming code
i3 i2 i1 i0 c2c1c0
1 0 0 0 1 1 1 1 1 1 0 1 0 0
G= 0 1 0 0 1 1 0 H= 1 1 0 1 0 1 0
0 0 1 0 1 0 1 1 0 1 1 0 0 1
0 0 0 1 0 1 1
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Software Implementation Considerations
Error Correction Algorithm– Hamming code
• c2: even parity check of i3, i2, i1
• c1: even parity check of i3, i2, i0
• c0: even parity check of i3, i1, i0
• Transmit code word, c = iG• HcT = 0• If the receiving code, d, with error
d = c + e• Syndrome, s = HdT = HeT
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Software Implementation Considerations
Error Correction Algorithm– Syndrome table
Syndrome Meaning0 0 0 No error0 0 1 Error in c0
0 1 0 Error in c1
1 0 0 Error in c2
0 1 1 Error in i0
1 0 1 Error in 11
1 1 0 Error in i2
1 1 1 Error in i3
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Software Implementation Considerations
Error Correction Algorithm– H matrix for (15, 11) hamming code
1 1 1 1 0 1 1 1 0 0 0 1 0 0 0
H = 1 1 1 0 1 1 0 0 1 1 0 0 1 0 0
1 1 0 1 1 0 1 0 0 1 1 0 0 1 0
1 0 1 1 1 0 0 1 1 0 1 0 0 0 1
• Code length: n = 2m - l -1
• Number of information bits: k = 2 m - m - l -1
• Number of check bits m = n - k
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Software Implementation Considerations
Example: Design a Hamming code for encoding five (k =5) information bits
• Four check bit, m = 4, is required
• Delete six (6) columns from previous H matrix 1 1 1 1 0 1 0 0 0 1 0 0 0 0 1 1 1 1
H = 1 1 1 0 1 0 1 0 0 0 1 0 0 0 1 1 1 0
1 1 0 1 1 0 0 1 0 G = 0 0 1 0 0 1 1 0 1
1 0 1 1 1 0 0 0 1 0 0 0 1 0 1 0 1 1
0 0 0 0 1 0 1 1 1
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Software Implementation Considerations
Unauthorized Access Prevention and Security Operation
Levels of Password Master Password Operation Reconfirmation Background Operation Settings Update Algorithm
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Future Development of Microcomputer Based Relay Systems
Artificial Intelligence Multiple Function Relays Common Hardware Configuration Software (Firmware) Driven Protective
Function(s) Stronger Communication Capability Serve as Pre-/Post-Fault Recorder