plas programmable logic arrays
DESCRIPTION
PLAs Programmable Logic Arrays. PLAs Objectives. Explain the operation of a PLA Use a PLA to implement a logic network Given a PLA design, determine the logic functions implemented. Programmable Logic Array (PLA). n Input Lines. AND Array. OR Array. k Word Lines. m Outputs Lines. - PowerPoint PPT PresentationTRANSCRIPT
PLA Page 1
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PLAs
Programmable Logic Arrays
PLA Page 2
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PLAs Objectives
• Explain the operation of a PLA
• Use a PLA to implement a logic network
• Given a PLA design, determine the logic functions implemented
PLA Page 3
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Programmable Logic Array (PLA)
...
n Input Lines
ANDArray
...
m Outputs Lines
.
.
.OR
Array
k Word Lines
PLA Page 4
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PLA AND-OR Equivalent
F1 = AB’+ C
F2 = A’C’ + BC
F3 = AB’ + A’C’
F4 = A’C’ + BC + AB’C
ANDArray
ORArray
AB'
C
A'C'
BC
AB'C
CBA
F1
F2
F3
F4
Note: Not every minterm is available
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ProductI nput
(Actual)I nput
(Specified) OutputsTerm A A' B B' C C' A B C F1 F2 F3 F4
AB' 1 0 0 1 0 0 1 0 - 1 0 1 0C 0 0 0 0 1 0 - - 1 1 0 0 0
A'C' 0 1 0 0 0 1 0 - 0 0 1 1 1BC 0 0 1 0 1 0 - 1 1 0 1 0 1
AB'C 1 0 0 1 1 0 1 0 1 0 0 0 1
PLA Table Generation
F1 = AB’+ C
F2 = A’C’ + BC
F3 = AB’ + A’C’
F4 = A’C’ + BC + AB’C
PLA Page 6
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+ V
+ V + V
+ V
+ V
A B C
A' B' C'
F1
F2
F3
F4
AB'
CA'C'
BC
AB'C
Internal PLA Structure
Outputs
Inputs
+ V
+ V + V
+ V
+ V
A B C
A' B' C'
F1
F2
F3
F4
AB'
CA'C'
BC
AB'C
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Internal PLA Structure
Outputs
Inputs
The AND plane lines get pulled up to +V
PLA Page 8
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+ V
+ V + V
+ V
+ V
A B C
A' B' C'
F1
F2
F3
F4
AB'
CA'C'
BC
AB'C
Internal PLA Structure
The AND plane lines stay at +V unless oneof the connected inputs pulls it low.
0
Outputs
Inputs
PLA Page 9
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+ V
+ V + V
+ V
+ V
A B C
A' B' C'
F1
F2
F3
F4
AB'
CA'C'
BC
AB'C
Internal PLA Structure
The AND plane lines stay at +V unless oneof the connected inputs pulls it low.
1
Outputs
Inputs
PLA Page 10
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+ V
+ V + V
+ V
+ V
A B C
A' B' C'
F1
F2
F3
F4
AB'
CA'C'
BC
AB'C
Internal PLA Structure
The OR plane lines get pulled down to Ground
Outputs
Inputs
PLA Page 11
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+ V
+ V + V
+ V
+ V
A B C
A' B' C'
F1
F2
F3
F4
AB'
CA'C'
BC
AB'C
Internal PLA Structure
The OR plane lines get pulled down to Ground
Outputs
Inputs
PLA Page 12
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+ V
+ V + V
+ V
+ V
A B C
A' B' C'
F1
F2
F3
F4
AB'
CA'C'
BC
AB'C
Internal PLA Structure
The OR plane lines stay at GND unless oneof the AND plane lines pulls it high.
Outputs
Inputs
PLA Page 13
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+ V
+ V + V
+ V
+ V
A B C
A' B' C'
F1
F2
F3
F4
AB'
CA'C'
BC
AB'C
Internal PLA Structure
The OR plane lines stay at GND unless oneof the AND plane lines pulls it high.
Outputs
Inputs
PLA Page 14
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+ V
+ V + V
+ V
+ V
A B C
A' B' C'
F1
F2
F3
F4
AB'
CA'C'
BC
AB'C
Internal PLA Structure
The OR plane lines stay at GND unless oneof the AND plane lines pulls it high.
Outputs
Inputs
PLA Page 15
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+ V
+ V + V
+ V
+ V
A B C
A' B' C'
F1
F2
F3
F4
AB'
CA'C'
BC
AB'C
Internal PLA Structure
The OR plane lines stay at GND unless oneof the AND plane lines pulls it high.
Outputs
Inputs
PLA Page 16
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Another PLA Representation
Outputs
Inputs
AB'
C
A'C'
BC
AB'C
CBA
F1
F2
F3
F4
PLA Page 17
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Programmable Logic Array (PLA)
• All inputs and inverted inputs available• Limited number of AND functions
– This is the biggest difference between a ROM and a PLA
• Complete choice of inputs and inverted inputs for each AND function
• OR function for each output• Complete choice of AND functions for
each OR function (output)
PLA Page 18
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PLA Example
Implement these equations:X = ABC + B’D’ + AB’D + C’D’Y = BC + D’Z = CD + B’D’ + A’BC
in this PLA:CBA D
X Y Z
6 terms or ANDplane lines
8 terms
1 2 3 4
5 6
7 2 8
How can we implement 8 product terms with 6 AND plane lines?
PLA Page 19
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PLA Example
Implement these equations:X = ABC + B’D’ + AB’D + C’D’Y = BC + D’Z = CD + B’D’ + A’BC
A B X A B Y A B Z
C D 00 01 11 10 C D 00 01 11 10 C D 00 01 11 10
00 00 00
01 01 01
11 11 11
10 10 10
PLA Page 20
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PLA Example
Implement these equations:X = ABC + B’D’ + AB’D + C’D’Y = BC + D’Z = CD + B’D’ + A’BC
A B X A B Y A B Z
C D 00 01 11 10 C D 00 01 11 10 C D 00 01 11 10
00 1 1 1 1 00 00
01 1 01 01
11 1 1 11 11
10 1 1 1 10 10
PLA Page 21
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PLA Example
Implement these equations:X = ABC + B’D’ + AB’D + C’D’Y = BC + D’Z = CD + B’D’ + A’BC
A B X A B Y A B Z
C D 00 01 11 10 C D 00 01 11 10 C D 00 01 11 10
00 1 1 1 1 00 1 1 1 1 00
01 1 01 01
11 1 1 11 1 1 11
10 1 1 1 10 1 1 1 1 10
PLA Page 22
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PLA Example
Implement these equations:X = ABC + B’D’ + AB’D + C’D’Y = BC + D’Z = CD + B’D’ + A’BC
A B X A B Y A B Z
C D 00 01 11 10 C D 00 01 11 10 C D 00 01 11 10
00 1 1 1 1 00 1 1 1 1 00 1 1
01 1 01 01
11 1 1 11 1 1 11 1 1 1 1
10 1 1 1 10 1 1 1 1 10 1 1 1
A B X A B Y A B Z
C D 00 01 11 10 C D 00 01 11 10 C D 00 01 11 10
00 1 1 1 1 00 1 1 1 1 00 1 1
01 1 01 01
11 1 1 11 1 1 11 1 1 1 1
10 1 1 1 10 1 1 1 1 10 1 1 1
PLA Page 23
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PLA Example
C’D’ is in X and Y and looks useful
B’D’ is in all three functions
PLA Page 24
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PLA Example
C’D’ is in X and Y and looks useful
A B X A B Y A B Z
C D 00 01 11 10 C D 00 01 11 10 C D 00 01 11 10
00 1 1 1 1 00 1 1 1 1 00 1 1
01 1 01 01
11 1 1 11 1 1 11 1 1 1 1
10 1 1 1 10 1 1 1 1 10 1 1 1
PLA Page 25
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PLA Example
C’D’ is in X and Y and looks useful
B’D’ is in all three functions
A’BC and ABC cover a lot of minterms
A B X A B Y A B Z
C D 00 01 11 10 C D 00 01 11 10 C D 00 01 11 10
00 1 1 1 1 00 1 1 1 1 00 1 1
01 1 01 01
11 1 1 11 1 1 11 1 1 1 1
10 1 1 1 10 1 1 1 1 10 1 1 1
B’D’ is in all three functions
PLA Page 26
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PLA Example
C’D’ is in X and Y and looks useful
The only ones left are AB’ and CD
A’BC and ABC cover a lot of minterms
A B X A B Y A B Z
C D 00 01 11 10 C D 00 01 11 10 C D 00 01 11 10
00 1 1 1 1 00 1 1 1 1 00 1 1
01 1 01 01
11 1 1 11 1 1 11 1 1 1 1
10 1 1 1 10 1 1 1 1 10 1 1 1
PLA Page 27
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PLA Example
X = C’D’ + B’D’ + AB’ + ABCY = C’D’ + B’D’ + ABC + A’BCZ = B’D’ + CD + A’BC
A B X A B Y A B Z
C D 00 01 11 10 C D 00 01 11 10 C D 00 01 11 10
00 1 1 1 1 00 1 1 1 1 00 1 1
01 1 01 01
11 1 1 11 1 1 11 1 1 1 1
10 1 1 1 10 1 1 1 1 10 1 1 1
All of the functions are covered using only 6 product terms
How is this possible?
PLA Page 28
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PLA Example
X = C’D’ + B’D’ + AB’ + ABCY = C’D’ + B’D’ + ABC + A’BCZ = B’D’ + CD + A’BC
Product I nput OutputTerm A B C D X Y Z
C'D'B'D'AB'ABCA'BCCD
PLA Page 29
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PLA Example
X = C’D’ + B’D’ + AB’ + ABCY = C’D’ + B’D’ + ABC + A’BCZ = B’D’ + CD + A’BC
Product I nput OutputTerm A B C D X Y Z
C'D' - - 0 0B'D' - 0 - 0AB' 1 0 - -ABC 1 1 1 -A'BC 0 1 1 -CD - - 1 1
PLA Page 30
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PLA Example
X = C’D’ + B’D’ + AB’ + ABCY = C’D’ + B’D’ + ABC + A’BCZ = B’D’ + CD + A’BC
Product I nput OutputTerm A B C D X Y Z
C'D' - - 0 0 1 1 0B'D' - 0 - 0 1 1 1AB' 1 0 - - 1 0 0ABC 1 1 1 - 1 1 0A'BC 0 1 1 - 0 1 1CD - - 1 1 0 0 1
PLA Page 31
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PLA ExampleX = C’D’ + B’D’ + AB’ + ABC
Y = C’D’ + B’D’ + ABC + A’BC
Z = B’D’ + CD + A’BC
Product I nput OutputTerm A B C D X Y Z
C'D' - - 0 0 1 1 0B'D' - 0 - 0 1 1 1AB' 1 0 - - 1 0 0ABC 1 1 1 - 1 1 0A'BC 0 1 1 - 0 1 1CD - - 1 1 0 0 1
CBA D
X Y Z
PLA Page 32
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Summary
• Explain the operation of a ROM
• Use a ROM to implement a logic network
• Explain the operation of a PLA
• Use a PLA to implement a logic network
• Given a PLA design, determine the logic functions implemented