the controller –features. - '+domain name+' board layout. ac-input j1 j21 j4 jp3 +15 ,...
TRANSCRIPT
The controller – Features.
� 400 KW Power system configuration� Can power AC – DC – AC resonant series high power inverters up to 450 KW.
� An AC – DC conversion in the front end is suggested to be designed with a AC 6
pulse static thyristorized switch with 6 thyristors and free wheeling diode adequately
cooled.
� For thyristor based front end units use high speed sub-cycle interrupting MCCBS
( Merlin Gerin type ) of KA rating above 40 KA when semi-fuses are not feasible.
� Controller Card features
� Basic resonant inverter control circuitry.
�Build around an ASIC chip to vary resonant inverter frequency from 200 Hz to
1250 Hz.( Change Inverter control crystal U17 to 44 Mhz to get 2500 Hz )
�Basic power electronic system protection interface with LCD display module.
� AC-Static switch – controls the six front end thyristors
� For these power units , control card comes with an additional ASIC chip one
controlling the AC thyristorized static switch with 6 pulse firing with ramp up from
maximum phase angle to minimum angle near 6 degree ( margin )
� Maximum DC bus voltage adjustable to a fixed value and needs to be positioned so
that system power factor is greater than 0.90 – 0.92.
450 KW Power circuit configuration – overall view
STATIC 6 PL
RECTIFIER
MCCB
Choose Sub-cycle
instantaneous trip
Choose Sub-cycle
instantaneous trip
Semi – fuse
Semi-fuses
adequately rated
Semi-fuses
adequately rated
AC – DC rectifier
Choose 6 pulse
Thyristorized stack All
rated 1600 V , 750 A and ITSM > 20KA
Choose 6 pulse
Thyristorized stack All
rated 1600 V , 750 A and ITSM > 20KA
Free wheel diode
1600 V PIV
freewheeling
rectifier
1600 V PIV
freewheeling
rectifier
1600 uF DC
rated for 1200 V
1600 uF DC
rated for 1200 V
DCCT
rated 600A
Filter reactor
Iron cored 2 – 4 mHIron cored 2 – 4 mH
DC filter Cap
130 uF- 200 uF
rated 3000V
and 700 Hz per
leg
130 uF- 200 uF
rated 3000V
and 700 Hz per
leg
Resonant Cap
Inverter
Stack
MFCT
2 Thyristor + 2
Diodes for with
PIV rating
3000V and ITRMScurrent 4000 A
for thyristors
and 2000 A for
Diode
2 Thyristor + 2
Diodes for with
PIV rating
3000V and ITRMScurrent 4000 A
for thyristors
and 2000 A for
Diode
Inv stack
V- line
525 - 575 V AC 50
Hz - 3 phase
525 - 575 V AC 50
Hz - 3 phase
Load Coil Load Coil
Recommended design approach – 1
� AC static switch section :
� Use 0.22 uF capacitors and 25 Ohm 100 W non-inductive resistors as sunubber
circuits.
� Use MCCB with one Normally open aux contacts to sense MCCB on which will auto
turn on the AC switch and soft start the DC bus to the allowed maximum voltage.
� DC reactor to be water cooled .
� Inverter section
� 0.47 uF capacitor with 10 Ohm 750 W water cooled resistor as snubber components
on each thyristor( Can alternatively choose the diode based snubber )
� MF CT to be rated as 5000 A / 1 A for inverter current sensing.
� Locate DI / DT coils adequately far away from MS metal components of the panel.
� DI / DT coil section to be water cooled and capable of carrying the full rated 4000 A of
the inverter current.
Series capacitor per leg : 130-150 uF rated 3000 V rated 700 Hz.
Cap 4250 KVAR / 700 Hz / 3000 V YEsha or
5450 KVAR / 700 Hz / 3000 V GE.
DC bus capacitor : 1600 uF rated 1200 V
Incoming AC voltage : 415 - 525 V ac three phase with Converter 6 pulse
soft start with free wheeling diode .
Furnace coil : 27 turns , Diameter 650 mm , Height 785 mm
Coil measure inductance ( 320 uH ) D2/L = 0.0.538
Expected operating freq at peak power 550 Hz.
Actual measured oper. Char : 3000 V on inverter. (600) A on lines = 450 KW.
Operating frequency at peak power 600 Hz.
Jumbo C770 inverter SCR and matching diode
DI/DT coil : 12 uH per leg
Recommended design approach – contd
� Inverter Design philosophy
The controller wiring scheme
AC INPUT JACK
415 V
AC - 1
Ph 10 lines
18 V AC
8 lines
2 lines
Power Supply
Transformer
Power Supply
Transformer
Panel
lamps
10 lines
+15 V com
GLD-SW
RW-PR-SW
DMW-PR-SW
DMW-TP-SW
Push button /
switch
inputs
Push button /
switch
inputs
Power Supply
for pulse
Trigger boards
Power Supply
for pulse
Trigger boards
JACK J11
3 lines
7 lines
JACK JP2
+15
GND -15 MFCT GND
GND PT
JACK JP4
GND -SCR +SCR
Pulse amplifier
signal drive for
inverter
Pulse amplifier
signal drive for
inverter
JACK JP7 JACK JP3
Panel meters
JACK
J12
DC Bus
Feedback
After choke
CONTROL BOARDCONTROL BOARD
Controller Box
2 lines
2 lines
LCD CON JP 11
LCD
DCCT
GND Gnd CT
P1
2 lines
To AC static
switch pulse
trigger board
To AC static
switch pulse
trigger board
+ -
JACK JP1
Remote /
Local
switch
Remote /
Local
switch
Remote oper
R
B
JACK
J13
CONV DC
Feedback
before choke+ -
Control board layout.
J1AC-INPUT
J21 J4 JP3
+15 , -15 , +5 , +15
regulator sections
OPTO ISOLATED INPUT
SECTION
ASIC_INV22 Mhz Xtal
10 Mhz Xtal
uC
rst
uC
JTAG
DC BUS
MONITOR
ANALOG ELECTRONICS
Calb F-mtr
Calb WIN
Calb C-flt
Calb MFCT
Calb I-flt
Calb I-hold
Calb PT-gain
Calb V-lmt
Calb Pwr_mtr
Calb G- mtr
Calb Span
J12
1
DC flt LED
1
P1
J7
LCD COM JP11
JP 20
JP 21
ASIC_INV
JTAG
1
JP10
JP15
Calb C-FB
Calb C-PW
Calb Max-V
Calb ACCR
CONV_ASICDC BUS CONTROL
SYSTEM
FOR 450 KW power
units
AC switch
trigger
uC
11.0592 Mhz
Inverter
Freq
control
Calb C_MT
ASIC_CON
JTAG
1JP16
St.switch
control clock
Sync on LED
Freq down LED
Freq up LED
J13
D46
D31
D30
D1 D3 D5 D7+5v LED +15v LED -15v LED E +15v LED
D33
D33
3.3v LED
Jack AC-INPUT for ac voltages input for regulator.
18 V input
from control
trafo - one
sec . winding
18 V input
from control
trafo - one
sec . winding
18 V input
from control
trafo - one
sec . winding
18 V input
from control
trafo - one
sec . winding
+ 15 V regulation Circuit
-15 V regulation Circuit
7.5 V input
from control
trafo - one
sec . winding
7.5 V input
from control
trafo - one
sec . winding
+ 5 V regulation Circuit
18 V input
from control
trafo - one
sec . winding
18 V input
from control
trafo - one
sec . winding
+ 15 V regulation Circuit
Used for Opto primary circuit
drive from external switches.
Used for Opto primary circuit
drive from external switches.
AC INPUT JACK
JP 1
18 V input
from control
trafo - one
sec . winding
18 V input
from control
trafo - one
sec . winding
Line synchronizingLine synchronizing
Using R – B phase
voltage waveform
reference for
synchronizing AC
static switch
Gnd
Jack JP2 for CT inputs and control connections.
JACK JP2
+ 15 V
-15 V
GND
DCCT
External DCCT
GND
MFCT
Inverter Coil current
S1
S2
Burden to suit
max inverter RMS
MF current is
equal to 5 V .
Burden to suit
max inverter RMS
MF current is
equal to 5 V .
Locate burden near CT with
1 MF non-polar capacitor as
filter
Locate burden near CT with
1 MF non-polar capacitor as
filter
LEM H600AS
I to V transducer
Red
Black
White
DC Current
Current direction to ensure +ve
voltage on DCCT pin
Rb
Rb = 10 K for minimal load on DCCT
Voltage output
proportional to current
and 4.5 V at 600 A DC
Jack JP4 , JP2 , JP7 , JP12 & JP3 connections.
From MF bus
through fuse
1500 V / 5V
MF trafo
Jack JP4 Jack JP7
SCR-pos
GND
SCR-neg
Firing Amplifier board
+p -p gnd
G +scr
K +scr
G -scr
K -scr
18 V ac
GND
F-mtr
G-mtr
P-mtr
Freq-Mtr
GLD meter
P-mtr
Jack JP3
No
connections
Jack JP12
From DC bus through
Attenuation resistor divider
+ -
GND
PT
GND
G-CT
No
Connections
GND CT
Suitable burden
Jack JP2 - D25 pin_outs for Lamp drives & inputs
Pin : 13 ………… + 5 V ( ASIC supply) .
Pin : 12 ………… OC- FLT lamp. ………….
Pin : 11 ………… INV_ON lamp. ………….
Pin : 10 ………… RDY lamp. ………….
Pin : 09 ………… DMW-PR lamp. …………
Pin : 08 ………… Pot Wiper ………… .Internal point PW (sht 4 of 4).
Pin : 07, 06 & 05 No connection.
Pin : 04 ………… OFF push button ………….Drives OFF-PB opto ( sht 4 of 4).
Pin : 03 ………… GDL-trip input …………. Drives GLD opto ( sht 4 of 4).
Pin : 02 ………… DMW-temp input ………… Drives DM-TMP opto ( sht 4 of 4).
Pin : 01 ………… Gnd ( Electronics inputs +15 V gnd ) (opto primary circuit).
Pin : 25 ………… DMW-TEMP lamp. ……….
Pin : 24 ………… DC_FLT lamp. ………….
Pin : 23 ………… HOLD lamp …………….
Pin : 22 ………… RW-PR lamp …………….
Pin : 21 ………… POT HI-END ……………. Internal point PH (sht 4 of 4).
Pin : 20 ………… POT LO-END ……………... Internal point PL (sht 4 of 4).
Pin : 19 & 18 No connection.
Pin : 17 ………… ON push button ……………. Drives ON-PB opto ( sht 4 of 4).
Pin : 16 ………… RW-PR input …………….. Drives RAWPRIP opto(sht 4 of 4).
Pin : 15 ………… DMW_PR input ……………. Drives DMPRIP opto (sht 4 of 4).
Pin : 14 ………… +15 - Electronics input -OPTO primary side use & PWR_ON lamp.
Jack JP2 Male
View
Pin 13Pin 1
Pin 25
From ASIC
Through
Buffers
From ASIC
Through
Buffers
View of wired control card on typical 100 KW unit
� Illustration for card with AC static switch control
Inverter
control
ASIC
Inverter
control
ASICASIC for
Static
switch
control
ASIC for
Static
switch
control
Opto
isolated
Interface
Opto
isolated
Interface Onboard
Power
Supply
Onboard
Power
Supply
Power circuit response to the control system.
1000 Kg
LOAD
COIL
Ld
Ld
LVdc
pos_pls
neg_pls
I inv
Cs
Cs
Inverter power circuit
For 450 KW power
+ SCR & + Diode
-SCR & -Diode
130 uf
3000 V
700 Hz
130 uf
3000 V
700 Hz
10uh
2 layer
4 T /lyr
200 ID
10uh
2 layer
4 T /lyr
200 ID
750 V DC
LOW FREQ operation without overlap
HIGHFREQ operation with overlap
pos_pls
neg_pls
pos_pls pos_pls
neg_pls neg_pls
+SCR
Current
+ Diode
Current
-SCR
Current
-Diode Current
+ SCR
Current + Diode Current
- SCR
Current
-Diode Current
+ SCR
Current
- Diode
Current
MF CT
DC bus feed back for Inverter protection
2 - 4 mH reactor
1600 uF DC
filter Cap.
DCCT
400 Ohms 5 W
13.6 K 150 W
13.6 K 150 W
DC bus
feedback
From Front
end Rectifier
From Front
end Rectifier
To Resonant
inverter
stack
To Resonant
inverter
stack
Choose 2 x 6.8 K for
DC bus voltages near
750 V for 450 KW power
+
-
Choose to get about 17
– 28 V across when DC
bus at nominal 750 V DC
Connection scheme – rear of controller
Connect
DCCT and
MFCT here
Warning :
Burden MF
CT to make
current into
voltage.
Else
damage can
occur
Connect
DCCT and
MFCT here
Warning :
Burden MF
CT to make
current into
voltage.
Else
damage can
occur
415 control power415 control power
CONV
output
feedback
before DC
choke
Connect GND CT with
burden to convert to
voltage.
Warning : Usage without
burden will damage unit
Connect GND CT with
burden to convert to
voltage.
Warning : Usage without
burden will damage unit
External interlock
& protection . Use NC
contacts
Connect MF
feedback
transformer
here
Use shielded cable to connect
Inverter thyristor firing board here
18 V AC Power supply for Inverter
firing board unit comes from here .
Note : This
scheme does not
show the wiring
for the AC static
switch firing and
remote on / off
unit
18 V AC
Power
supply for
conv
firing
board
DC bus
feedback
after choke
NO
contact
from
incomer
MCCB to
auto
start DC
bus
Remote
on/off
pendant
STATIC
SWITCH
trigger
Front facia of controller
Blinking light when
system ready.
During fault
condition shuts off
Blinking light when
system ready.
During fault
condition shuts off
Turns on when
inverter turned on
Turns on when
inverter turned on
Max Voltage or
power lamp
Max Voltage or
power lamp
Illuminates when
DC bus collapses.
Illuminates when
DC bus collapses.
External power
applied lamp
External power
applied lamp
Inverter Over
current or ground
fault
Inverter Over
current or ground
fault
Raw water pressure
interlock ( use NC )
Raw water pressure
interlock ( use NC )
DM water pressure
interlock ( use NC )
DM water pressure
interlock ( use NC )
DM water
temperature
interlock ( use NC )
DM water
temperature
interlock ( use NC )
Inverter ON PBInverter ON PBInverter OFF PBInverter OFF PB
Ground leakage
meter
Operating Inverter
Frequency
Operating power
Power set
potentiometer
LCD digital display and settings – 1
� Displays running parameters in percentage from 0 to 100 %
� Fault indications & display controlled from micro controller. Use uC rst switch for
resetting micro controller is case of corrupted display. Resetting micro controllr has no
effect on inverter / static switch control systems.
� Card adjustment potentiometer settings using JP20 and JP21
� Normal operation : JP20 is in place.
� Calibration of card setting : JP21 - Page 1 of setting .
JP21 & JP 20 - Page 2 setting .
� LCD display conditions
SYSTEM READY
System ready for switch on Fault in system
PSF COI GNF RPF
DPF DTF IOC DCF
PSF : Phase sequence Fail – ( units with AC switch control )
COI : Converter over current - ( units with AC switch control )
GNF : Ground fault. Sensing from external Ground leakage detector.
RPF : Raw water Pressure Fault from external NC interlock.
DPF : DM water pressure –ext interlock
DTF : DW water temp – ext interlock.
IOC : Inverter over current
RPF : DC bus fault
Fault reset is by pressing the OFF PB.
LCD digital display and settings – 2
� Displays calibration settings of potentiometers on card.
� All settings as nominal 100 % maximum.
� Display organized as two pages .
� Page 1 display when JP21 is shorted.
� Page 2 display when JP21 and JP 20 are shorted .
� Normal running condition is when JP 20 is shorted.
Page 1
IFLT_S : XX PWS_S : XX
CPW_S : XX
IFLT_S : R15 IFLT ( TP 10 ) CW increase ( refer DWG sheet 2 of 9)
CPW_S : R170 MAX V CW increase ( refer DWG sheet 9 of 9)
PWS_S : R59 SPAN CW increase ( refer DWG sheet 3 of 9)
Page 2
IH_S : XX VL_S : XX
CIFLT_S : XX
IH_S : R22 IHLD ( TP 11 ) CW increase ( refer DWG sheet 2 of 9)
VL_S : R41 VLMT ( TP13 ) CW increase ( refer DWG sheet 2 of 9)
CIFLT_S : R123 CFLT CW increase ( refer DWG sheet 3 of 9)
WIN_S : XX
WIN_S : R63 WIND CW increase ( refer DWG sheet 3 of 9)
LCD digital display and settings – 3
� Display when system in operation
Fault in operation
CV : XXX GL : XXX PW : XXX
IV : XXX IC : XXX F : XXX
CV : Converter voltage in 0 to 100 %
GL : Ground leakage current in 0 to 100 %
PW : Power level 0 to 100 %
IV : Inverter voltage 0 to 100 %
IC : Inverter current 0 to 100 %
F : Frequency 0 to 100 %
Trigger signals STATIC SWITCH CONNECTION
� The firing signals for Static switch SCRs from Trigger board
R-P SCR
GK
Y-P SCR
GK
B-P SCR
GK
R-N SCR
GK
Y-N SCR
GK
B-N SCR
GK
R-P SCR : R phase positive SCR
Y-P SCR : Y phase positive SCR
B-P SCR : B phase positive SCR
R-N SCR : R phase negativeSCR
Y-N SCR : Y phase negative SCR
B-N SCR : B phase negative SCR
G : gate
K : Kathode
Synchronizing the STATIC SWITCH
� The procedure
� Uses the AC 18 V synchronizing waveform in JP1 jack ( refer page 8 )
� This synchronizing voltage should be VRB ( R phase to B phase 415 volts )
� Illustration for the R + SCR ( similar for the other five SCRs )
RB Y B
Range of useful firing angle movement for
the R + SCR
Range of useful firing angle movement for
the R + SCR
Max voltage position
adjust with R170
Max voltage position
adjust with R170
System uses one line to
line reference between VR
and VB and internally
digitally locks to the line
frequency and generates
the other references
needed for all the other five
SCRs.
Circuit design notes – 1
� Synchronizing input from transformer RC smoothening , filtering & clamping
� RC time constant of 2 ms
� Zeners clamp to + / - 10 V
� RC time constant of 2 ms
� Zeners clamp to + / - 10 V
� Second level active RC filter
� Square waved to 5 V peak
and ground reference
� Second level active RC filter
� Square waved to 5 V peak
and ground reference
From
trafo
To converter phase control
ASIC chip as synchronizing
reference buffered . Monitor
test point TP25
To converter phase control
ASIC chip as synchronizing
reference buffered . Monitor
test point TP25
� AC5-18 ���� SYNCP ���� SYNRY ���� RYSYNC
Circuit design notes – 2
� Converter Thyristor Gate trigger outputs - six signals generated by ASIC
� RP , BN , YP , RN , BP , YN is the sequence when RYP is the line sequence
� All six pulses buffered.
� CONV_ON signal from Inverter ASIC
which senses Breaker_on signal .
� All six pulses buffered.
� CONV_ON signal from Inverter ASIC
which senses Breaker_on signal .
� All six pulses brought
out to connector
� All six pulses brought
out to connector
� Test point TP 24 for RP pulse
� Test point TP26 for 60 deg
pulse train
� Test point TP 24 for RP pulse
� Test point TP26 for 60 deg
pulse train
� Six firing pulse signals from
the ASIC – Pins 81 � 87
� Six firing pulse signals from
the ASIC – Pins 81 � 87
� Sync signal at pin 117
� ASIC produces sync capture
signal at pin 124 tied to LED 46
indicator
� Pulse signals enabled by
CONV_EN signal
� Sync signal at pin 117
� ASIC produces sync capture
signal at pin 124 tied to LED 46
indicator
� Pulse signals enabled by
CONV_EN signal TP26
60deg
Notes on synchronizing
� Reversal of the VRB in synchronizing will prevent the DC bus from turning on.� This can be identified that the DC bus will not soft start to the maximum DC voltage
adjusted with R 170 potentiometer.
� Best way to check synchronization is to use two 100 W lamp loads in series across the
DC bus and see soft start. If VRB is not correct soft start wont happen and the lamps
will momentarily blink and disappear. If no lamp load is available this can be identified
that the DC voltmeter in the panel will not rise slowly but momentarily the DC cap bank
will charge up and hold max voltage.
� DC bus soft starting and under control of R170 potentiometer is conclusive in showing
that synchronizing is perfect.
� Ensure that there is a small bleed in the DC bus ( The DC bus monitor resistances of
6.8 K used normally will be sufficient - page 14 )
� Unit has over-current trip on the AC static switch. Hence any very high starting surge
current during start up ( or failed DC bus capacitor ) will cause Converter Over Current
fault in controller and indicated by bthe OC-FLT fault lamp coming on and COI fault in
display
� Static switch will auto start when Line breaker is closed and detected by the auxiliary
NO connection at “BRK ON“ connected to +15 V ( see page 15 )
� The Phase fail connection ( page 15 ) can be used for interlock if external Phase
reversal / fail detector circuit / instrument is used externally . This controller has no
facility to detect phase fail or reversal.
Circuit design notes – 3
� Notes on Converter Thyristor Gate trigger ASIC .
� Power supply +5 v and GND through jumpers JP18 & JP19.
� ASIC control program connector JP18 for program download .
� U16 Converter control Crystal ( 10 Mhz ) controls all internal control processes .
� ADC chip U34 provides analog interface for converter phase angle control analog
signal conversion to digital reference ( 12 bit ) . ADC control is through converter ASIC
( pin 17 : ADCTR signal )
� ADC converts max 10 V-in CONV_POWER
analog signal to 12 bit digital signal A0����A11
� ADC converts max 10 V-in CONV_POWER
analog signal to 12 bit digital signal A0����A11
� Converter ASIC
enabled by CONV_EN
signal fro Inverter
ASIC and ADCTR
signal controls ADC
chip
� Converter ASIC
enabled by CONV_EN
signal fro Inverter
ASIC and ADCTR
signal controls ADC
chip
� JP16 for program
download
� JP16 for program
download
� JP18 & JP 19 for ASIC +5 V and GND � JP18 & JP 19 for ASIC +5 V and GND
Circuit design notes – 4
� Notes on Converter min and max phase angle setting and metering and ASIC
program downloading
� Downloading connector JP16.
� Maximum Converter Voltage controlled by pot set R170
� U21D OpAmp circuit controls Converter phase angle ramp up speed and drop out .
Ramp up adjustable ( soft start ) with R196 ( ACCR pot )
� R170 – Max Conv Volt � R170 – Max Conv Volt
� To Pin 13 of ADC chip for converter phase angle control
analog voltage for Digital conversion
� To Pin 13 of ADC chip for converter phase angle control
analog voltage for Digital conversion
Circuit design notes – 5
� Converter over-current fault circuit and Converter volt metering circuit
� Feed back of converter DC bus . Use 200 K 5 W drop resistor on each leg
� DC meter calibration ( 1 mA fsd) with pot R195 ( C_MTR ) and or R157 ( C_FB)
� DC current DCCT sense compared for setting converter fault ( R123 – CFLT pot )
� Connect to DC bus through 200 K ,
5 W resistor
� Connect to DC bus through 200 K ,
5 W resistor
� U18A comparator for CFLT – Converter over current
trip setting .
� Trip output CONV_IFLT 5 V clamped signal goes to
Inverter Control ASIC for pull out of CONV_ON signal
that comes back through a buffer as CONV_EN signal
to Converter control ASIC
� U18A comparator for CFLT – Converter over current
trip setting .
� Trip output CONV_IFLT 5 V clamped signal goes to
Inverter Control ASIC for pull out of CONV_ON signal
that comes back through a buffer as CONV_EN signal
to Converter control ASIC
Circuit design notes – 6
� Inverter On signal and Power Control Pot supply
� Feed back of actual power level from DC current through DCCT .
� Inverter On signal allows Power pot reference – PH pin of Power set Pot .
� PH ( Pot HI pin ) setting maximum adjusted with SPAN pot (R59) to adjust
maximum power level depending on DCCT calibration .
SPAN
� Connect to DC bus through 200 K ,
5 W resistor for Pos and Neg
� Connect to DC bus through 200 K ,
5 W resistor for Pos and Neg
� Min Power setting
fixed by R58 resistor
� Min Power setting
fixed by R58 resistor
Circuit design notes – 7
� Inverter Power Control using Frequency
UP and DWN SIGNAL .
� Feed back of actual power
level IREF.
� Power set voltage PW from
Power pot wiper .
� WIND setting ( R63) sets a
small window above IREF (
IREF plus delta )
� PW within Window locks
frequency
PW set
IREF
IREF+ delta
WINDOW
DWM signal ( LED 31 ) goes
high and Inverter reduces
frequency (DWM)
DWM signal ( LED 30 ) goes
high and Inverter increases
frequency (UP)
� PW is the Power pot set wiper.
� IREF is the gain adjusted
DCCT signal proportional to
power
� PW is the Power pot set wiper.
� IREF is the gain adjusted
DCCT signal proportional to
power
Circuit design notes – 8
� Inverter Trip setting ( IFLT )
� Feed back of Inverter current from medium Frequency CT – ACCT.
� TP9 is full wave precession full wave rectified MF current waveform .
� Compared at Comparator U6A for IFLT setting ( R15 ) . Unit trips on Inverter Overcurrent
when this IFLT is sensed.
Circuit design notes – 9
� Inverter Limit setting ( VLMT )
� Actuated by Volt limit ( VLMT ) pot R41.
� PT feedback for Inverter Volt sensing . Precession rectifier for full wave rectification .
� PT gain adjustment ( PT_G ) R38.
� Inverter frequency control overrides Power pot setting and goes to HOLD state .
Circuit design notes – 10
� External Power hold facility ( HOLD )
� Used when Dual track configuration is used . Two Inverters working on common DC bus and
each inverter power under hold limit when other inverter is in high power ( Needs auxiliary
Current summation card linked to DCCTs in both inverter DC use bus bar )
� Signal C1 compared with HOLD pot ( R22 ) and IHOLD signal is produced.
� C1 attenuated signal ( 10 % attenuation ) is compared with HOLD set IHLD and IDEC
actuated . This is a feature when the second unit in dual track can be auto reduced in power ..
Circuit design notes – 11
� Frequency meter calibration
� Inverter ASIC provides a pulse train of double the inverter frequency with fixed on time and
variable off time . As frequency goes up , off time drops and so duty cycle effectively
increases. This is Buffered and a adjustment pot ( R75 ) FMTR is provided to directly link to a 1
mA fsd frequency meter .
Circuit design notes – 12
� External interlocks for water system and control
� Breaker on sense - To allow converter to be turned on sensing MCCB on . (LED D42)
� Phase sequence sense – IF activated , unit will not start ( wrong phase sequence ) . Need to
use external Phase sequence relay . By pass if not used. (LED D47)
� ON sense - connected to Power ON push button to start inverter . (LED D29)
� OFF sense – Connected to Power OFF push button which is also fault reset . (LED D28)
� RAWPR sense – Raw water pressure low sensing . High when Pressure is normal (LED D27)
� GLD sense - Ground detector – High when Ground detector senses earth fault from an
external ground detector. (LED D28)
� DMPR – DM water pressure low sensing . High when Pressure is normal . (LED D25)
� DMTMP – DM water temperature sensing . High when temperature is normal. (LED D24)
� All external interlocks and
actuations through Opto
couplers
To Inverter ASIC
input
Power up sequence .
� Power up sequence
� Breaker on - ( when Units have Thyristors front end converters ) .
� Checks if phase sequence is alright and no water fault ( Interlock lamps
D42,47,227,26,25,24 will glow ).
� DC fault may light up . Press RESET ( OFF PB ) to reset DC fault .
� Ready lamp blink will indicate that inverter is ready for start up.
� Press Power ON ( ON PB )
� Inverter should start up at lowest frequency ( approx 300 Hz )
� At lowest pot setting , Inverter would continue running at lowest power setting . ( D31 LED in
control card would glow if DCCT calibration is correct . Else Unit will go up gradually in
frequency and power till actual power sensed through DCCT is near Pot setting .
� Increase POWER POT to raise frequency and power . When Power raises LED D30 in
control board will light up momentarily as the frequency rises.
� When Power reaches pot setting , frequency will lock .
�Power OFF will stop the Unit.
�In case of any fault , the appropriate fault lamp will go on and inverter stop.
� During a fault indication the REDY lamp on front facia will glow permanently . Will go back to
normal blink state when fault is reset .
� Note that in case of GLD ( Ground fault ) I-over current indication and DCFLT indicator could
also turn on depending on nature of GND fault.