BASICSofPCBs Design

A Supplement to Electronic Design/January 19, 2004 Sponsored by Mentor Graphics

rinted-circuitboards (PCBs)are at the heart

of the modernelectronic packagingfound in almost every

consumer electronics product.In essence, a PCB creates theconnections betweencomponents within asystem.

Mass reproducibili-ty for circuits witheven a modicum ofcomplexity and/orspeed requires a PCB-based packagingscheme. Whendesigned correctly,PCBs bring predictability. A correct design mini-mizes wiring lengths and lays out the board so sig-nal-integrity issues are controlled. It also makes itmuch easier to find components during trou-bleshooting and repair. Even high-pin-count ICscan be removed, if necessary, and replaced.

Up to about 10 years ago,advanced PCB design technologieslike microvias, high-density inter-connects (HDIs), embedded pas-sives, and high-pin-count FPGAswere available primarily to powerusers in global organizationsdesigning bleeding-edge products.But these design technologies are

rapidly entering the mainstream, making themchallenges for a broader spectrum of PCB design-ers than ever before.

Today’s PCB Design EnvironmentMost of today’s PCBs are pushing if not exceed-

David Maliniak, Electronic Design Automation Editor

The printed-circuit-boarddesign infrastructure hasgrown, and PCBs themselveswill face future challenges.

PCBs Are Not SoSimple Anymore

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Sponsored by Mentor Graphics

ing the limits of classic board design(Fig. 1). In mobile telecom, intercon-nect and board dimensions areshrinking rapidly, while designs areusing fewer but more complex com-ponents with higher pin counts. Atthe same time, boards for network-ing and computer applications aregrowing, with more interconnect andground plane layers.

Data rates of up to 10 Gbits/s areresetting frequency standards forICs. As IC vendors replace parallelbus architectures with serial asyn-chronous architectures (Third Gen-eration I/O or “3GIO”), challengessuch as jitter, lossy lines, and biterror rates are replacing delay, timing, crosstalk,overshoot, and other traditional high-speeddesign challenges. In other words, it’s no longerreliable or viable to follow “rules ofthumb” in today’s high-speed rout-ing and verification.

The relatively new 3GIO technol-ogy uses standards for encoding anddecoding electrical signals in serialasynchronous architectures. Already,Intel Corp. has incorporated 3GIOtechnology into its PCI Express stan-dardization environment. A signifi-cant percentage of today’s PCBs arecurrently operating in a frequencyrange of 1 to 10 GHz.

From a PCB design perspective,most of today’s high-speed designtools lack the advanced modelingand verification requirements uti-lized by 3GIO technology. With theonset of serial asynchronous archi-tectures, these tools must furtheraccommodate new design conceptsfor routing highly constrained dif-ferential pairs (Fig. 2).

Understanding current and future PCB designchallenges in all areas of PCB design (from high-

speed design, FPGA-on-board integration, teamdesign, and PCB fabrication, design, and inter-connect to library, constraint, and data manage-ment) is a critical aspect of a company’s invest-

ment in a PCB design solution. This pulloutlooks at each of these challenges.

1. PCB design complexity is increasing at an accelerated rate with the addition of high-density interconnects, embedded components, gigabit data rates, and other technologies.

2. Connections between ICs using the 3GIO architecture are routed using carefully matched differential pairs.

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Basic PCBs comprise a rigid sheet ofepoxy-impregnated fiberglass materialwith thin copper sheets affixed to oneor both sides. This is known as copper-

clad. In multilayer boards (those with more thantwo copper layers), a piece of material called pre-preg is placed between core layers.

The outer copper surface of the PCB must beprocessed to form circuit paths, or traces, thatmake the connections between components. Anal-ogous to wires, the traces are formed using a pho-tolithographic process (Fig. 1). In that process, thecopper layers are treated with chemical etchingthat removes unneeded portions of the copper,leaving only the traces and pads required for com-ponent soldering.

Pads can be fabricated in many shapes and for-mats. Components are typically attached toboards in one of two fashions: surface mountingor through hole, in which case the board must bedrilled after photolithography is completed.Through holes can be plated in cases where con-nections are required between the surface copperand either internal copper layers or the reverseside of the board (Fig. 2).

Stripphotoresist

Result

Copper wires

Core material

Photoresist filmCopper film

Core material

Expose photoresist

UV light

Mask

Developphotoresist

Etchcopper

Component lead

Solder mask

Solder flowCopper plating

Coppercladding/foil

Goodsolder flow

Adequate spacing

BASICSofDesignPCBs

What Goes Into A PCB

THE PHOTOLITHOGRAPHIC PROCESS1. The most common process for creating the circuit traces on a PCB issubtractive. A mask, or photoplot of the circuit-trace artwork, is placedover the photoresist after a photoresist film is applied to the coppercladding. The photoresist is then exposed and developed, and thesuperfluous copper is chemically etched from the board. The remainingphotoresist is stripped from the surface of the traces, leaving a fin-ished board.

ANATOMY OF A PLATED-THROUGH HOLE2. Many boards still carry through-hole components,as distinguished from surface-mount types, andrequire plated-through holes. Plated holes arerequired when connections must be made either tointernal copper layers or to the opposite side of theboard, or to both.

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Until recently, most design teams used traditional laminate structures and vias (both through and blind, or interlayer, vias) during PCBfabrication, packaging, and interconnect. But IC packages such as ball-grid arrays (BGAs), chip-on-board (COB), and chip-scale pack-ages (CSPs) are driving the need for build-up structures and microvia technology (see the figure). Such packages enable designers to

produce smaller PCBs.The advances in build-up material and microvia technology also permit designers to build passive components into the boards. These resistors,

capacitors, and inductors are embedded within laminate layers as opposed tobeing mounted on either surface of the PCB. The use of embedded passivesfurther reduces the overall size of the board, saving additional laminate mate-rial costs.

To successfully reap these benefits, PCB design tools must use true 45°routing, localized rule definition, complex rules for microvia routing, advancedinterconnect, and the automation of large device geometry/footprint creation.This includes accounting for fine-pitch parts, mixed routing rules, specializedalgorithms, and place and route inside the laminate material.

PCB Fabrication, Packaging, And Interconnect

High-density, high-pin-count IC packages are driving the need forhigh-density interconnect (HDI) layers.

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Every PCB is unique in its size, function, and usage and iscustom designed and fabricated (see the figure). The fol-lowing steps explain the basic process for creating a PCB.

Step 1: System designThe system-design phase of PCB design involves creatinga schematic diagram. This includes collecting the symbolsfor all of the off-the-shelf and custom components thatare needed for the PCB to function as designed. Theschematic must also represent the interconnects betweenthe components.

Step 2: Functional verificationDesigners must ensure that the PCB will function asdesigned before it is fabricated. The functional verifica-tion step confirms the original schematic by using soft-ware models for each component and interconnect to sim-ulate the board’s functionality.

Step 3: Physical designAfter schematic creation and verification, it’s time to create a repre-sentation of the physical PCB. To do so, the designer places theschematic’s parts on the board and connects them as defined by theschematic. Routing is accomplished with conductive paths calledtraces, which may run along and between multiple layers of a board.Traces transition from one layer to the next through via holes.

Step 4: Final verificationOnce the board has been created, three different verification stepsensure that the board can be manufactured as designed.

Design for manufacture:This step verifies whether or not the physical design of the PCB canbe manufactured the way it is designed. The design is checkedagainst its specific design rules. If violations of these rules areuncovered, the board must be revised and resimulated.

Signal integrity and timing verification:While designing the PCB, engineers determine the board’s function-ality as well as its speed. Signal-integrity checks ensure that signals

traversing the board’s traces aren’t degraded by effects such ascrosstalk, overshoot, and undershoot that can result in logic errors.Designers must also ensure that all transmitted signals arrive attheir destinations at the proper time.

Electromagnetic verification:This process determines whether the PCB works within any applica-ble health standards. For example, if the PCB is designed for amobile phone, this step will determine the level of radiation emittedand whether it falls within the required guidelines.

Putting It All TogetherThe steps outlined above are only a framework for PCB design. Ide-ally, one should embark on the verification process as early as pos-sible so errors can be caught when they are much easier to correct.There are tools that allow designers to verify designs as they arecreating the board. Pre-defined rules that encapsulate the manu-facturing, timing, and radiation requirements are incorporated withthese tools, such as autorouters, to warn designers when a part isnot placed properly or when an interconnect will cause a timing orsignal problem.

Logical design • Design capture • FPGA design integration

Physical design • Component placement • Interconnect routing

Verification • Functional verification • Signal-integrity analysis • Timing analysis

• Electromagnetic interference• Manufacturability• Testability

Library and design data managementPart selection/creation

The PCB Design Flow

The PCB design process contains three primary elements: logical design, physicaldesign, and verification.

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As ASIC design costs rise and the price/perform-ance ratio of FPGAs improves, PCB design teamsare turning to FPGAs more often. In fact, boards

often contain one or more FPGAs with over 1500 pins.PCB and FPGA design occurs concurrently yet independent-

ly. Tight links between the two design processes can shorten aproduct’s overall time-to-market. Alliances between PCBdesign tool vendors and FPGA vendors have aided advancedFPGA device modeling and high-pin-count symbol and partcreation.

It is now possible to create and fracture PCB schematicsymbols and geometries directly from the FPGA design tool.It’s also possible to manage design constraints and pinoutassignments between the PCB and the FPGA for any number ofFPGAs (see the figure). This integration automates tediousmanual design processes as well as reduces routing and timingproblems once associated with traditional FPGA-on-boardintegration.

Vendor alliances also have yielded FPGA design kits to drive PCB layout andhigh-speed verification and analysis. Kits typically include buffer models, com-ponent footprints, constraint rules, and reference designs.

FPGA-On-Board Integration

With time-to-market so critical a driver, companies are usingconcurrent/parallel design techniques during multiplestages of the PCB design process.

Worldwide, 24/7 design schedules are traditional concurrent design meth-ods. In reality, however, these approaches are more serial than parallel. There-fore, the schedule breaks down if the design engineer isn’t available.

A more modern team design methodology lets multiple designers worksimultaneously on the same layout (see the figure). Reserved areas are drawn ona board, which is then split into partitions that are assigned to various teammembers. Team members can view and respond to the work their peers are con-tributing to their respective partitioned areas and the overall master design.

This method greatly reduces design-cycle time through parallel designprocesses. It also facilitates design-team collaboration, effective resourcemanagement, and shorter layout cycles.

The PCB and the FPGA design solutions require tight bidirectional integration.

Team design methodologies enableconcurrent, parallel PCB design aswell as enabling specialists (e.g., RF,analog, and digital) to design on thesame PCB in parallel instead of seri-ally.

With team approaches to PCB design on the rise, effectivelibrary, constraint, and design data management is a must. Acompany with far-flung design centers will have a central

library that contains all of its fully qualified/preferred parts. The local designsites must have access to this central library to build and update their locallibrary but may only want those parts from the central library that apply to theirtypes of products (commercial, military, consumer, and so on). This requires asophisticated global library management system.

Another example of the need for data and infrastructure management is that

many companies use several different design tools, all of which require thesame design rules, or constraints, in different formats. Manual entry of con-straints into each tool is time consuming and error-prone.

Toss in high-pin-count devices with even more complex constraints and wefind design librarians stretched very thin. Thus, management of work-in-process (WIP) design data and release management is suffering.

In response to these challenges, many companies are rushing to implementconstraint managementsystems.

Library, Constraint, And Data Management

Team Design

BASICSofDesignPCBs

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