paulo moreiratransistors1 outline introduction – “is there a limit ?” transistors – “cmos...
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![Page 1: Paulo MoreiraTransistors1 Outline Introduction – “Is there a limit ?” Transistors – “CMOS building blocks” Parasitics I – “The [un]desirables” Parasitics](https://reader030.vdocuments.us/reader030/viewer/2022032704/56649d575503460f94a3550a/html5/thumbnails/1.jpg)
Paulo Moreira Transistors 1
Outline• Introduction – “Is there a limit?”• Transistors – “CMOS building blocks”• Parasitics I – “The [un]desirables”• Parasitics II – “Building a full MOS model”• The CMOS inverter – “A masterpiece”• Technology scaling – “Smaller, Faster and Cooler”• Technology – “Building an inverter”• Gates I – “Just like LEGO”• The pass gate – “An useful complement”• Gates II – “A portfolio”• Sequential circuits – “Time also counts!”• DLLs and PLLs – “ A brief introduction”• Storage elements – “A bit in memory”
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Paulo Moreira Transistors 2
“CMOS building blocks”
• “Making Logic”• Silicon switches:
– The NMOS– Its mirror image, the PMOS
• Electrical behavior:– Strong inversion
• Model• How good is the approximation?
– Weak inversion– Gain and inversion
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Paulo Moreira Transistors 3
“Making Logic”• Logic circuit “ingredients”:
– Power source
– Switches
– Power gain
– Inversion
• Power always comes from some form of external EMF generator.
• NMOS and PMOS transistors:– Can perform the last three
functions
– They are the building blocks of CMOS technologies!
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Paulo Moreira Transistors 4
Silicon switches: the NMOS
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Paulo Moreira Transistors 5
Silicon switches: the NMOSAbove silicon:
• Thin oxide (SiO2) under the gate areas;• Thick oxide everywhere else;
Above silicon:• Thin oxide (SiO2) under the gate areas;• Thick oxide everywhere else;
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Paulo Moreira Transistors 6
Silicon switches: the PMOS
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Paulo Moreira Transistors 7
MOSFET equations• Cut-off region
• Linear region
• Saturation
• Oxide capacitance
• Process “transconductance”
Ids Vgs VT 0 0 for
Ids CoxW
LVgs VT Vds
Vds Vds Vds Vgs VT
2
21 0 for
IdsCox W
LVgs VT Vds Vds Vgs VT
2
21 for
Coxox
tox
F / m2
Coxox
tox A / V2
0.24m process
tox = 5nm (~10 atomic layers)
Cox = 5.6fF/m2
0.24m process
tox = 5nm (~10 atomic layers)
Cox = 5.6fF/m2
![Page 8: Paulo MoreiraTransistors1 Outline Introduction – “Is there a limit ?” Transistors – “CMOS building blocks” Parasitics I – “The [un]desirables” Parasitics](https://reader030.vdocuments.us/reader030/viewer/2022032704/56649d575503460f94a3550a/html5/thumbnails/8.jpg)
Paulo Moreira Transistors 8
MOS output characteristics• Linear region:
Vds<Vgs-VT
– Voltage controlled resistor
• Saturation region:Vds>Vgs-VT
– Voltage controlled current source
• Curves deviate from the ideal current source behavior due to:– Channel modulation
effects
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Paulo Moreira Transistors 9
MOS output characteristicsL = 240nm, W = 480nm
0
50
100
150
200
250
0 0.5 1 1.5 2 2.5
Vds [V]
Ids
[uA
]
Vgs = 0.7V (< Vt)
Vgs = 1.3V
Vgs = 1.9V
Vgs = 2.5V
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Paulo Moreira Transistors 10
MOS output characteristicsL = 24um, W = 48um
0
50
100
150
200
250
300
350
400
0 0.5 1 1.5 2 2.5
Vds [V]
Ids
[uA
]
Vgs = 0.7V (<Vt)
Vgs = 1.3V
Vgs = 1.9V
Vgs = 2.5V
![Page 11: Paulo MoreiraTransistors1 Outline Introduction – “Is there a limit ?” Transistors – “CMOS building blocks” Parasitics I – “The [un]desirables” Parasitics](https://reader030.vdocuments.us/reader030/viewer/2022032704/56649d575503460f94a3550a/html5/thumbnails/11.jpg)
Paulo Moreira Transistors 11
Bulk effect• The threshold depends on:
– Gate oxide thickness– Doping levels– Source-to-bulk voltage
• When the semiconductor surface inverts to n-type the channel is in “strong inversion”
• Vsb = 0 strong inversion for:– surface potential > -2F
• Vsb > 0 strong inversion for:– surface potential > -2F + Vsb
n+ n+p+
V>0 V>VT0
n+ n+p+
V=0 V=VT0
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Paulo Moreira Transistors 12
Bulk effect
0
100
200
300
400
500
600
0 0.5 1 1.5 2 2.5
Vgs [V]
Ids
[uA
]
L = 24um, W = 48um, Vbs = 1
L = 24um, W = 48um, Vbs = -1V
W = 24m
L = 48m
Vsb = 0V
Vsb = 1 V
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Paulo Moreira Transistors 13
Mobility
Coxox
tox A / V2
Cox
ox
tox A / V2
The current driving capabilitycan be improved by using materialswith higher electron mobility
The current driving capabilitycan be improved by using materialswith higher electron mobility
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Paulo Moreira Transistors 14
Is the quadratic law valid?Ids - Vgs (Vds = 2.5V, Vbs = 0V)
0
100
200
300
400
500
600
0 0.5 1 1.5 2 2.5
Vgs [V]
Ids
[u
A]
L = 24um, W = 48um
L = 2.4um, W = 4.8um
L = 240nm, W = 480nm
Quadratic “law” valid for long channel devices only!
Quadratic “law” valid for long channel devices only!
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Paulo Moreira Transistors 15
Weak inversion• Is Id=0 when Vgs<VT?
• For Vgs<VT the drain current depends exponentially on Vgs
• In weak inversion and saturation (Vds > ~150mV):
where
• Used in very low power designs
• Slow operation
IW
LI ed do
qV
n k Tgs
Tkn
Vq
do
T
eI
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Paulo Moreira Transistors 16
Gain & Inversion• Gain:
– Signal regeneration at every logic operation
– “Static” flip-flops– “Static” RW memory cells
• Inversion:– Intrinsic to the common-
source configuration
• The gain cell load can be:– Resistor– Current source– Another gain device
(PMOS)