papers on dc to dc converter
TRANSCRIPT
-
8/13/2019 papers on dc to dc converter
1/16
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013 3363
Analysis, Design, and Performance Evaluations ofan Edge-Resonant Switched Capacitor Cell-AssistedSoft-Switching PWM Boost DCDC Converter and
Its Interleaved TopologyTomokazu Mishima, Member, IEEE, Yujiro Takeuchi, and Mutsuo Nakaoka, Member, IEEE
AbstractThis paper presents a soft-switching pulsewidth mod-ulation (PWM) nonisolated boost dcdc converter embeddingan edge-resonant switched capacitor (ER-SWC) cell and itsinterleaved circuit topology. The conceptual boost dcdc con-verter treated herein can achieve high-frequency zero-currentsoft-switching turn-on and zero-voltage soft-switching turn-offoperations in the active switches and minimization of a reverse
recovering current in the freewheeling diode under discontinuousconduction mode partially including critical conduction mode inthe input current. Those advantageous properties enable a widerange of soft-switching operations together with a high-voltagestep-up conversion ratio with a reduced current stress. Circuitdesign guideline based on the soft-switching range is introduced;then, a theoretical analysis is carried out for investigating the step-up voltage conversion ratio. For demonstrating the effectiveness ofthe ER-SWC soft-switching PWM boost dcdc converter and itsnewly developed interleaved topology, laboratory prototypes areevaluated in experiments; then, their performances are discussedfrom a practical point of view.
Index TermsBoost dcdc converter, discontinuous con-duction mode (DCM), edge resonance, pulsewidth modula-tion (PWM), soft-switching, switched capacitor, zero-currentsoft-switching (ZCS), zero-voltage soft-switching (ZVS).
I. INTRODUCTION
PULSEWIDTH modulation (PWM) boost dcdc convert-
ers have been gathering much attention in a variety of
practical power conditioning systems for telecommunication,
renewable energy, and distributed power generations as well as
switching-mode rectifiers [1][16]. For minimizing the size and
weight as well as the power dissipation, the substantial reduc-
tion of switchinglossesis required in a conventional PWMboost
dcdc converter.
Manuscript received June 13, 2012; revised September 3, 2012; acceptedOctober 13, 2012. Date of current version December 24, 2012. Recommendedfor publication by Associate Editor J. A. Cobos.
T. Mishima and Y. Takeuchi are with the Mechatronics Engineering Division,Graduate School of MaritimeScience, Kobe University, Hyogo 658-0022, Japan(e-mail: [email protected]).
M. Nakaoka is with the Electric Energy Saving Research Center, KyungnamUniversity, Masan 630-701, Republic of Korea.
Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2012.2227504
By adopting a discontinuous conduction mode (DCM)
scheme, the conventional PWM boost dcdc converter can at-
tain the soft commutation naturally at the turn-on of the active
switch and zero-current soft-switching (ZCS) turn-off of the
freewheeling diode in the wide range of load variation without
any additional circuit component. Those advantages lead to the
simplicity in the main circuit configuration and the control sys-tems because there is no need to detect the dc input current for
maintaining the continuous current. In addition, the dc voltage
conversion ratio of the conventional PWM boost dcdc con-
verter in DCM is higher than in continuous conduction mode
(CCM) [1], [17].
However, there exists an inherent technical issue in the DCM
scheme: the current stress in the power devices and components
as well as in the input smoothing capacitor is larger than that
of the PWM boost dcdc converter in CCM; consequently, the
conduction losses significantly affect the conversion efficiency.
Hence, the applicability of the PWM boost dcdc converter in
DCM is currently limited to 100300 W class switching powerconverters such as power factor correction converters [14], [18],
[19].
As a solution to overcoming the drawbacks of the PWM boost
dcdc converter in DCM, employment of the edge-resonant
switched capacitor (ER-SWC) cell as shown in Fig. 1 is one of
the effective techniques due to its high efficiency and high scal-
ability characteristics. In the soft-switching PWM boost dcdc
converter with the ER-SWC cell, a wide range of soft-switching
operations can be achieved under the condition of DCM/critical
conduction mode (CRM) in the input dc current without any
circulating current, while the current stresses in the power de-
vices and the passive components can also be mitigated owing
to the edge resonance within the switching cell. In addition,the ER-SWC soft-switching PWM boost dcdc converter can
be usefully extended for the interleaved circuit topology, effec-
tively canceling the input current ripple and reducing the size of
the input inductor and the output capacitor as well as increasing
the power rating. Actually, the validity of the interleaved boost
dcdc converter in DCM has been stated by evaluating a 20-kW
boost dcdc converter prototype in [20].
A similar type of the switching cell has been developed as
the turn-off commutation circuit for GTO in a high-power con-
verter applied for a high-voltage dc transmission [21]. Besides
that, the several applications of the ER-SWC cell into the PWM
0885-8993/$31.00 2012 IEEE
-
8/13/2019 papers on dc to dc converter
2/16
3364 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013
rCrC
Cr
Cr
S1 S1
S2
S2
D1
D2
S2
S2
S1
S1
D2
D2
D2
D1
D1
D1
rLrL
rLrL
]2epyT[]1epyT[
]4epyT[]3epyT[
Fig. 1. Circuit topological family of ER-SWC cells.
converters have been reported in the relevant previous stud-
ies [22], [23]. However, no previous work reports the detailed
discussion on performances of the ER-SWC cell in the PWM
boost dcdc converter from the viewpoints of a soft-switching
operation and a voltage conversion ratio.
The main objective of this paper is to practically evaluate
the effectiveness of the ER-SWC soft-switching PWM boost
dcdc converter in DCM and its interleaved circuit topology by
demonstrating the switching performances, voltage conversion
ratio, steady-state output power regulation characteristics, and
conversion efficiency as well as the soft-switching achievable
range in experiments. Moreover, the design procedure for the
circuit parameters in the ER-SWC cell is originally introduced
and its validity is actually proven by the experiment results.
This paper is organized as follows. In the first place, the
circuit configuration and operation principle of the ER-SWC
soft-switching PWM boost dcdc converter are described in
Section II. Then, the converter steady-state characteristics re-
garding the step-up voltage conversion ratio are demonstrated
by a theoretical analysis in Section III. The circuit design guide-
line of the ER-SWC soft-switching PWM boost dcdc con-
verter is described in Section IV, and the wide-range soft-switching operations attained in the ER-SWC soft-switching
PWM boost dcdc converter are explained in Section V. Fur-
thermore, its practical effectiveness and feasibility are evalu-
ated and discussed in experiments with the laboratory proto-
types both of the single- and two-phase (interleaved) circuits in
Section VI.
II. CIRCUITCONFIGURATION ANDOPERATIONPRINCIPLE
A. Circuit Description
The circuit configuration of the ER-SWC soft-switching
PWM boost dcdc converter in DCM is illustrated in Fig. 2.
+
Lr
VinD1
D2
S1 S2Cr Ro
Co
Do
Vo
Fig. 2. ER-SWC cell-assisted soft-switching PWM boost dcdc converteroperating under DCM/CRM condition.
The ER-SWC cell consists of two active switches S1 , S2 , twodiodesD1 ,D2 , a resonant capacitor Cr , and a resonant inductorLr .
The key advantages of the ER-SWC soft-switching PWM
boost dcdc converter are summarized as follows:
1) the ER-SWC cell has high scalability and extensibilitydue to its simple and flexible circuit configuration (con-
figurable by a CMOS structure as well as an H-bridge
module);
2) a current-sharing technique for the input dc current is
available by S1 andS2 , which is effective especially forpower conversions with a large input current;
3) the peak current in the input inductor can be reduced by
the effect of edge resonance ofLr Cr as compared withthe conventional PWM boost dcdc converter in DCM;
4) no idlingandcirculating current inherent to soft-switching
power converters appears in the ER-SWC cell;
5) higherstep-up voltageconversionratio with a smaller peakcurrent can be attained than the conventional boost dcdc
converter;
6) characteristics on the voltage conversion ratio are linear
with respect to the duty cycle of PWM, so the output volt-
age controller can be implemented by a simple schematic
configuration;
7) the gate signal forS1and S2can be common, so the gatedrive circuits are simple and low power consuming.
In contrast, there are some drawbacks recognizable in the
family of ER-SWC cell:
1) the voltage stress in the output freewheeling diode Dois theoretically twice as large as the conventional PWM
boost dcdc converter;2) conduction losses increase in the auxiliary diodesD1for
Type 2, D2 for Type 3, and D1 and D2 for Type 4 ofFig. 1, while ZCS turn-off commutations are achievable
inD1and D2for all the types.It should be noted that the ER-SWC soft-switching PWM
boost dcdc converter with the DCM scheme can be extended
for its CCM circuit, as shown in Fig. 5.
Another type of an H-bridge-based soft-switching cell that
has duality for the ER-SWC cell as shown in Fig. 6 has been
proposed in [8]. This cell contains a circulating current with
the cell; thereby, the relevant power losses under the heavy-load
condition would affect the conversion efficiency. In contrast, the
-
8/13/2019 papers on dc to dc converter
3/16
MISHIMAet al.: ANALYSIS, DESIGN, AND PERFORMANCE EVALUATIONS 3365
0
0
0
0
0
0
0
1 2 3 4 5
t0 t1 t2 t3 t4 t5
S1, S2TOFF
iS1, iS2
vS1, vS2
Vo(Vo+Vin)/2
vD1, vD2 iD1, iD2
Vo
(Vo-Vin)/2
vCr iCrVo
vLr iLrVin+Vo
Vin
Vin-Vo
vDo iDo
2Vo
Vo Vo-Vin
iab
vab
-Vo
VoVin
T0
ONT (=DT )
Mode
Fig. 3. Relevant voltage and current waveforms of ER-SWC soft-switchingPWM boost dcdc converter in DCM/CRM.
ER-SWC cell discussed herein has no operating mode for the
circulating current; therefore, a higher efficiency power conver-
sion can be expected under the heavy-load condition.
B. Operation Principle
The theoretical operating waveforms of the ER-SWC soft-
switching PWM boost dcdc converter are provided in Fig. 3,
and the corresponding mode transitions with the simplified
equivalent circuits are shown in Fig. 4. The circuit operation
during one switching cycle is divided into the five submodes, as
described in the following.
1) Mode 1 [t0 t < t1 ],S1, S2 ZCS turn-on mode: Theinductor current iL r is zero, and the active switches S1andS2are simultaneously turned ON att0 . Then,iLr andthe switch currents is1 and is2 rise gradually from the
zero initial value with the edge resonance byLr andCr .
+
+
+
+
+
[Mode 1]
[Mode 2] [Mode 3] [Mode 4]
[Mode 5]
DCM
CRM
Fig. 4. Mode transitions and equivalent circuits during one switching cycle inDCM/CRM.
Lr
S1
S2
D1
D2
Cr
Do
Co
Ld
Ro
+
-
Vin Vo
Fig. 5. ER-SWC soft-switching PWM boost dcdc converter operating inCCM.
Lr
D2
Cr
Do
Co
Ld
S1
S2
D1
+
-
Ro
VinVo
Fig. 6. Soft-switching PWM boost dcdc converter in the topological dualityfor ER-SWC [8].
Thereby, ZCS turn-on commutation can be achieved inS1andS2 .During this mode,iLr is written as
iL r(t) =Vin + Vo
Z sin(r t t0 ) (1)
whereZ=
Lr /Crand r = 1 /
Lr Cr .The resonant capacitor Cr is discharged by iL r in this
interval.
-
8/13/2019 papers on dc to dc converter
4/16
3366 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013
TABLE IVOLTAGESTRESSES ANDSWITCHINGTRANSITIONS INPOWERDEVICES FOREACHER-SWC CELL
Switch S1(turn-on / off) S2(turn-on / off) D1(turn-on) D2(turn-on) Do(turn-on&off)
Type 1 Vo(ZCS / ZVS) Vo (ZCS / ZVS) Vo Vo 2Vo(ZCS)Type 2 Vo(ZCS / ZVS) Vo(ZCS/ ZVS) Vo(ZCS) Vo 2Vo(ZCS)Type 3 Vo(ZCS / ZVS) Vo(ZCS/ ZVS) Vo Vo(ZCS) 2Vo(ZCS)Type 4 Vo(ZCS / ZVS) Vo(ZCS/ ZVS) Vo(ZCS) Vo(ZCS) 2Vo(ZCS)
2) Mode 2 [t1 t < t2 ],inductive energy storing mode:The resonant capacitor Cr is completely discharged att1 ; then, the diodes D1 and D2 are forward-biased. Thebeginning time t1of this submode and its inductor currentILr 1can be determined from (1) as
t1 =t0 + 1
r cos1
VinVin + Vo
(2)
IL r1 =iL r(t1 ) =
Vo (2Vin + Vo )
Z . (3)
During this interval,iLr rises linearly as expressed by
iL r(t) = VinLr
(t t1 ) + IL r1 . (4)
The inductor current iLr is equally shared by the twobranchesS1 D1and S2 D2 .
3) Mode 3 [t2 t < t3 ],S1, S2 ZVS turn-off mode: Thetwo active switches S1 and S2 are turned OFF simulta-neously at t2 . Then, the edge resonance begins again inthe ER-SWC cell, and the voltages across S1andS2in-creasegradually by theeffect ofCr . Thereby, ZVSturn-offcommutation can be achieved inS1and S2 . The inductor
currentILr 2at t2can be defined from (4) as
IL r2 =iL r(t2 ) = VinLr
(t2 t1 ) + IL r1 (5)
wheret2 =t0 + DTandDdenotes the duty cycle ofS1andS2as defined by
D TonT
. (6)
During this mode,iLr is defined by
iL r(t) =Im ax sinr (t t2 ) + tan1
ZIL r2
Vin (7)where Ima xrepresents the peak value ofiL r , as expressedby
Ima x =
IL r2
2 +Vin
Z
2. (8)
This operation mode continues until the capacitor voltage
vcr equals the output voltageVoat t3 .4) Mode 4 [t3 t < t4 ], inductor energy releasing mode:
The resonant capacitor voltagevcr rises up to the outputvoltage at t3 ; then, the conduction interval ofD1and D2isterminated.The beginning time t3of this submode and the
corresponding inductor currentIL r3 can be defined from
(7) as
t3 =t2 + 1
r
sin1
Vo VinZIm ax
+ tan1
VinZIL r2
(9)
IL r3 =iL r(t3 ) =
Ima x
2 Vo Vin
Z
2. (10)
The inductor current iL r is forward to the load via Do ,and thereby, the input voltageVinis boosted to the outputvoltageVo . During this interval,iL ris expressed by
iL r(t) =Vin Vo
Lr(t t3 ) + IL r3 . (11)
The inductor current iL rgradually decreasesand naturallyreaches to the zero level att4 . Accordingly, occurrence ofthe reverse recovering current in the output freewheeling
diodeDocan be mitigated.5) Mode 5 [t4 t < t5 ],inductor current discontinuous
mode: Inductor current iL r reduces to zero level aftert4 , which is determined from (11) by
t4 =t3 + Lr IL r3Vo
Vin. (12)
The load current flows through the output capacitorCoin this submode; then, the inductor current keeps the zero
level until the next switching cycle starts att5 .According to the circuit topologies in Fig. 1, the theoreti-
cal voltage stresses and commutations of the switching power
devices in the ER-SWC soft-switching PWM boost dcdc con-
verters are summarized in Table I. The two diodes D1andD2can be turned OFF under ZCS conditions when they are inserted
in series with the positive and negative dc bus lines as depicted
in Type 2-4, by paying for increase of the conduction power
losses.
All of the topological family of the ER-SWC cells in Fig. 1
can be applied to the six nonisolated PWM dcdc converters
(Buck, Boost, BuckBoost, Cuk, SEPIC, and Zeta), as shown
in Fig. 7.
III. ANALYSIS OFVOLTAGECONVERSIONRATIO
A. Derivation of Voltage Conversion Ratio
The inductor current and voltage waveforms of the ER-SWC
soft-switching PWM boost dcdc converter are illustrated and
compared with those of the conventional hard-switching PWM
boost dcdc converter in DCM under the condition of the same
duty cycle in Fig. 8. The positive voltagesecond area SA in
-
8/13/2019 papers on dc to dc converter
5/16
MISHIMAet al.: ANALYSIS, DESIGN, AND PERFORMANCE EVALUATIONS 3367
(a) (b)
(c) (d)
(e) (f)
Fig. 7. Six nonisolated ZCS-PWM dcdc converters with ER-SWC cell:(a) Buck. (b) Boost. (c) Buckboost. (d) Cuk. (e) SEPIC. (f) Zeta.
0
t3
Vin-Vo
0
Vin
Vin+Vo
t1
ER-SWC
Conventional type
Tr1
Tr2SA
SB
ER-SWC
Conventional type
vLr
iLr
ILr1
ILr2 ILr3
= 0t0 = DTt2 = D'Tt4 = Tt5
I II III IV
Fig. 8. Current and voltage waveforms of input inductor Lr in DCM ofconventional and ER-SWC boost dcdc converters under the same duty cyclecondition.
Fig. 8, which derives from the edge resonance in the ER-SWC
cell, produces the negative voltagesecond area SB in Fig. 8.As a result, the negative amplitude ofvL rin Fig. 8 is extendedmuch more than that of the conventional type, then a larger
output voltageVO , i.e., higher voltage conversion ratio can beobtained in the ER-SWC boost dcdc converter.
The voltage conversion ratio (M=Vo /Vin ) of the ER-SWCboost dcdc converter in DCMcanbe determined from the input
and output power balance [24].
By assuming the time origin to = 0 in Fig. 8 for simplicity,
the time integrations of the inductor current iLr in each submode
are defined by
I : S1 =
t10
iL r dt= Cr Vo (13)
II : S2 =
t2t1
iL r dt
= V
in2Lr (DT t1 )2 + ILr 1 (DT t1 ) (14)
III: S3 =
t3t2
iL r dt= Cr Vo (15)
IV : S4 =
t4t3
iL r dt= Lr IL r 3
2
2(Vo Vin ) (16)
V : S5 =
Tt4
iLr dt= 0. (17)
Therefore, the average input currentiLr can be obtained by
iL r = 1
T T
0iL r dt=
1
T
5k =1
Sk . (18)
Neglecting the power losses in the ER-SWC boost dcdc con-
verter, the power balances between the dc power source Vinandthe loadRocan be established as
Vin iL r =Vo
2
Ro. (19)
The input powerVin iLr can be expressed from (13)(18) as
Vin iLr = Vin Vo
T(Vo Vin )
Vin2Lr
(D2 T)2 + IL r1 D2 T+ 2Cr Vo
(20)
whereD2 T =t2 t1 . Furthermore, deformation of (19) with(20) yields the equation regarding the voltage conversion ratioMas
M2 (1 + 2Cr Ro fs )M
Ro fsZr
D2 T
M2 + 2Mr2
D2 T
= 0. (21)
Equation (21) is the implicit function for Vin and Vo , so thatit is reasonable to analyze the voltage conversion ratio Mbycomputer-aided calculations.
Comparisons of the voltage conversion ratios between the
conventional and ER-SWC boost dcdc converters are depicted
by means of the computer calculations in Fig. 9. It can be un-
derstood from Fig. 9 that the higher step-up voltage conversionratio can be attained in the ER-SWC boost dcdc converter than
the conventional one. Note here that the two crossing points
between the CCM and DCM curves of the conventional boost
dcdc converter indicate its CRM points.
The simplified dc voltage transfer functions based on a linear
approximation of the voltage waveform across Lr in the con-ventional and ER-SWC boost dcdc converters are indicated in
Table II.
B. Duty Cycle and Current Stress Reductions
Fig. 10(a) depicts the calculation values of the normal-
ized input inductor currents in DCM for the conventional and
-
8/13/2019 papers on dc to dc converter
6/16
3368 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013
0
1
2
3
4
5
6
7
8
9
10
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
VoltageCo
nversionRatio
M
Duty Cycle D
ER-SWC: Cr= 100 [nF]
ER-SWC: Cr= 56 [nF]ER-SWC: Cr= 15 [nF]
Conventional type in DCM
Conventional type in CCM
DCM
CCM
Fig. 9. Calculated voltage conversion ratios of the conventional andER-SWC boost dcdc convertersexample circuit parameters: L r = 20 H,Ro = 80 , and switching frequencyfs = 40 kHz.
TABLE IIDC VOLTAGETRANSFERFUNCTIONS OFCONVENTIONAL ANDER-SWC BOOST
DCDCCONVERTERS
Conventional Circuit
CCM 11D
DCM 12
1 + 1 + 2D2RoT
Ld
ERSWC Circuit (linear approximation)
DCM/CRM 1 1D
{D + Tr1+Tr22T
}1
ER-SWC boost dcdc converters under the identical conditions
of Po =1 kW, M =Vo /Vin = 200/100 = 2, Cr =100 nF,Lr =47 H, input inductor of the conventional boost dcdc converter Ld =47 H, switching frequency fs = 1/T =40 kHz, and the peak inductor current ILp =23A. The dutycycleDconvof the conventional boost dcdc converter in DCMcan be obtained by
Dconv = Lr IL p
Vin T = 0.43 . (22)
The duty cycle DERSWCof the ER-SWC boost dcdc convertercan be determined from (3) and (5) as
DERSWC = LrVin T
ILp
Vo (2Vin + Vo )Cr
Lr
= 0.29 (23)
where one sets the origin to = 0for simplicity. As a result, itcan be understood here that the duty cycle of the active switches
S1 andS2 shifts into the smaller range in the ER-SWC boostdcdc converter than the conventional one, which is beneficial
for further reductionof conduction lossesin theswitchingpower
devices.
The normalized input inductor currents in DCM are com-
pared between the conventional and ER-SWC boost dcdc
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Normalized
InductorCurren
Duty Cycle D
ER-SWCConventional type (DCM)
D ERSWC D conv
Lr = 47 HLd= 47 H
(a)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
NormalizedInductorCurrent
Duty Cycle D
ER-SWCConventional type (DCM)
Lr = 47 H
Ld= 22 H
ILpERSWC
ILpconv
(b)
Fig. 10. Comparison of input inductor currents between conventional andER-SWC boost dcdc converters in DCM (a) under the same condition ofPo ,M, andLr , and (b) under the same condition ofPo ,M, andD .
converters in Fig. 10(b) under the identical conditions of
Po =1 kW,M=Vo /Vin = 200/100 = 2,Cr =100 nF,fs =1/T =40kHz, and D= 0.29. The input inductor Ld of theconventional boost dcdc converter in DCM can be calculated
from the dc voltage transfer function in Table II as
Ld = 2Ro D
2 T
(2M 1)2 1 = 22 H (24)
whileLr in the ER-SWC boost dcdc converter remains to be47 H. Accordingly, the inductor peak current ILp c o n v of theconventional boost dcdc converter in DCM is determined by
ILp c o n v = Vin DT
Ld= 33 A . (25)
On the other hand, the inductor peak current ILp E R SW C of the
ER-SWC boost dcdc converter is determined from (2), (3), and
-
8/13/2019 papers on dc to dc converter
7/16
MISHIMAet al.: ANALYSIS, DESIGN, AND PERFORMANCE EVALUATIONS 3369
GatePulse
CurrentoftheInductoriLr
0 DminT DmaxT T
CurrentoftheSwitchesS1,S2
Time t
Terminal curve B: Complete S-SW limitingpoint
B A
A
B
ONON
AB
(Po,min)
(Po,max)
Terminal curve A: CRM point
Fig. 11. Variations of inductor currentiL r with duty cycle control.
0
00 DT T
vCr
vS1, vS2
iS1, iS2
Residual Voltage
Semi-ZVS
(a)
0
00 DT T
iLr
vS1, vS2
iS1, iS2
Imin
Semi-ZCS
(b)
Fig. 12. Voltage and current waveforms for semi-soft-switching inS1andS2 .(a) Semi-ZVS turn-off inS1and S2 . (b) Semi-ZCS turn-on inS1and S2 .
(5) by
ILp E R SW C =VinLr
DT 1
r cos1
VinVin + Vo
+Vo (2Vin + Vo )CrLr
= 23 A (26)
dv/dt
[kV/s]
OutputPo
werPo
[kW]
Resonant Capacitor Cr[nF]
dv/dt
Po,maxPo,min
0
0.5
1
1.5
2
100 200 3000
0.5
1
1.5
Output power range
Fig.13. Output power andvoltage rising ratesdependingon resonantcapacitorCr :Po =1 kW.
0
5
10
15
20
25
0 5 10 15 20 25
InductorCurrentiLr
[A]
Time t[s]
Po= 200 [W]Vo= 200 [V]Cr= 62.5 [nF]
Lr= 10, 15, 22, 33, 47, 68,H]
Lr,max= 445 [H]
10 [H]
330 [H] 445 [H]
(a)
0
10
20
30
40
50
60
0 5 10 15 20 25
InductorCurrentiLr
[A]
Time t[s]
Po= 1 [kW]Vo= 200 [V]Cr= 62.5 [nF]
Lr= 10, 15, 22, 33, 47, 68,H]
100 [H]
68 [H]
10 [H]
(b)
Fig. 14. Variationsof inductorcurrent iL rfor minimumandmaximumoutputpower settings: (a)Po =Po ,m in = 200 W, and (b)Po =Po ,m ax = 1 kW.
-
8/13/2019 papers on dc to dc converter
8/16
3370 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013
Isolation amplifier and voltage limiter
Micro computer-based digital PI controller
Gate Drivers
Fig. 15. Schematic diagram of experimental circuit with output voltage regulation closed-loop control.
TABLE IIICIRCUITPARAMETERS ANDSPECIFICATION OFPROTOTYPE
Parameter Value [unit]
Power rating,Po 1 [kW]Input voltage,Vin 18 150 [V]Output voltage, Vo 200 [V]
Resonant inductor,Lr 74 [H]Resonant capacitor,Cr 56 [nF]
Variable load resistor,Ro 80 400 []Output side smoothing capacitor, Co 1000 [F]
Switching frequency, fs 40 [kHz]
where one sets the origin to = 0 for simplicity. This compari-son shows that the peak current can be effectively reduced in the
ER-SWC boost dcdc converter as compared with the conven-tional one.
IV. DESIGNGUIDELINE OFCIRCUITPARAMETERS
The circuit parameters ofLr and Cr in the ER-SWC cellshould be based on both of the maximum output powerPo, m axwith the maximum duty cycle Dm ax and the minimum outputpowerPo, mi nwith the minimum duty cycleDm in[25].
Fig. 11 illustrates the variations of the inductor current iL rand the switching currents iS1 andiS2 in accordance with theoutput power, where the terminal curve A corresponds with
Po =Po, ma x , while the terminal curve B is in the case of
Po =Po, mi n . Note here that the complete soft-switching area is
defined in the output power range between Po, mi nand Po, m ax .In addition to the determination of the zero crossing time ofiL r , t4 =Dma x T, the maximum output power Po, ma x can beexpressed as
Po, ma x =Vin iL r, m ax (27)
whereiLr represents the average current ofiL rat Po =Po, m axand this value can be obtained from (1), (4), (7), and (11); then,
iL r, m ax means its maximum value.On the other hand, the zero crossing time t4,mi nofiL rin the
case ofPo =Po, mi ncan be described as
t4,m in = 1r
sin1
M 1M+ 1
+ 2M
M 1+2
. (28)
Then, the minimum output powerPo, m incan be given by
Po, mi n =Vin iLr ,mi n = 2Cr Vin Vo
T
1 +
VinVo Vin
(29)
whereiLr ,mi n denotes the minimum value of the resonant in-ductor average currentiL r .
Equation (29) indicates thatPo, m in is independent of the pa-rameterLr ; accordingly, the parameterCrcan be derived from
(29). Deformation of (29) yields the parameter of the resonant
-
8/13/2019 papers on dc to dc converter
9/16
MISHIMAet al.: ANALYSIS, DESIGN, AND PERFORMANCE EVALUATIONS 3371
Fig. 16. Measured voltage and current waveforms: (a) resonant inductorLr (100V/div ,10 A/div), (b) active switchS1 (100V/div ,10 A/div), (c) auxiliarydiodeD1 (100V/div ,10 A/div), and (d) freewheeling diodeDo (200V/div ,10 A/div).
capacitorCras expressed by
Cr =
(Vo /Vin
1)Po, m in2fs V2o . (30)
The capacitanceCris related to a voltage rising rate (dv/dt)of S1 and S2 at the turn-off transitions, and this index be-comes maximum atPo =Po, m ax . The tradeoff relationship ex-ists between the controllable output power area and the soft-
switching range. Lowering the setting value ofPo, m inby select-ing a smaller capacitance for Cryields the wider output powerrange under the soft-switching condition. In contrast to that, the
smaller the capacitance ofCr , the larger thedv/dtrate, whichresults in increase of the turn-off transitional power losses inS1andS2 .
In order to achieve the soft-switching commutation, t4 ,m inshould be smaller than the one switching intervalT. Therefore,the parameter of Lr should meet the condition indicated asfollows:
Lr Dma x , and then gets into CCM. In the CCMoperation, no zero current transition appears in the inductor
current iL r through the one switching cycle. A small currentpasses through Lr at the turn-on transition of S1 and S2 (att= t0 ); then, the currents ofS1andS2instantaneously leap up.This operationmay bring about increaseof theturn-on switching
-
8/13/2019 papers on dc to dc converter
10/16
3372 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013
Fig. 17. Currentvoltage traces for switching transitions: (a) active switchesS1 and S2 (100 V/div, 5 A/div), (b) diodes D 1and D2 (100 V/div, 5 A/div),and (c) freewheeling diodeDo(200 V/div, 2 A/div).
power losses inS1and S2 , but they are not significant becausethe leaping current derives from the minimum level of the ripple
current inLr . Thus, this switching commutation can be defined
as semi-ZCS, as illustrated in Fig. 12 (b) [26].
Fig. 18. Semi-soft-switching waveforms in active switches: semi-ZVS turn-off in S 1 and S 2 (50 V/div, 2.5 A/div) and (b) semi-ZCS turn-on inS 1 andS2(50 V/div, 2.5 A/div).
0
1
2
3
4
5
6
7
8
9
10
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
VoltageConversionRatioM
Duty Cycle D
Theoritical curves (ER-SWC)Experimental values: Cr= 15 [nF]
Cr= 56 [nF]Cr= 100 [nF]
Theoritical curve (Conventional)
Fig. 19. Experimental characteristics of voltage conversion ratios with reso-nant capacitorC
r.
The complete soft-switching range is defined in the output
power region between Po, m in and Po, m ax as explained in theprevious sections. Thus, a wide range of soft-switching opera-
tion can be expected in the ER-SWC boost dcdc converter by
utilizing the semi-soft-switching areas.
VI. EXPERIMENTALRESULTS ANDEVALUATIONS
A. Numerical Design Example
The essential specifications of the laboratory prototype are
as follows: Po, m ax =1 kW, Po, m in =200 W, switching fre-
quencyfs =40 kHz, input voltage Vin =100 V, and output
-
8/13/2019 papers on dc to dc converter
11/16
MISHIMAet al.: ANALYSIS, DESIGN, AND PERFORMANCE EVALUATIONS 3373
0
2
4
6
8
10
12
14
16
18
20
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1
InputC
urrentIin
[A]
Output Power Po[kW]
D = 0.1D = 0.2D = 0.3D = 0.4D = 0.5
(a)
0
20
40
60
80
100
120
140
160
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1
InputVoltageVin[V]
Output Power Po[kW]
D = 0.1D = 0.2D = 0.3D = 0.4D = 0.5
(b)
78
80
82
84
86
88
90
92
94
96
98
100
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1
Efficiency[
%]
Output Power Po[kW]
D = 0.1D = 0.2D = 0.3D = 0.4D = 0.5
(c)
Fig. 20. Power regulation characteristics with open-loop control (Cr =15 F): (a) input currentIin =iL r versus output powerPo , (b) average inputvoltage Vin versus output powerPo , and (c) actual efficiency versus outputpowerPo .
voltageVo =200 V. Note here that thePo, m injust denotes theminimum output power under the complete soft-switching con-
ditions, which implies that the prototype can actually deliver the
output power less than 200 W.
A parameter of the resonant capacitor Cr can be calculatedin accordance with (30), as given by
Cr = (Vo /Vin 1)Po, m in
2fs V2o=62.5 nF. (33)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
OutputPo
werPo
[kW]
Duty Cycle D
Vin= 80 [V]
Vin= 100 [V]
Vin= 133 [V]
Conventional
H-SW
converteroperatingarea
(a)
0
2
4
6
8
10
12
14
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
InputCurrentIin
[A]
Duty Cycle D
Vin= 80 [V]Vin= 100 [V]Vin= 133 [V]
(b)
90
91
92
93
94
95
96
97
98
99
100
0 0.1 0.2 0 .3 0.4 0.5 0.6 0 .7 0.8 0.9 1 1.1
Efficiency[
%]
Output Power Po[kW]
Vin= 133 [V]Vin= 100 [V]
Vin= 80 [V]
(c)
Fig. 21. Steady-state output power regulation characteristics with a voltage-modeclosed-loop control: (a) output power Poversusdutycycle D , (b)averageinput currentIin =iL r versus duty cycleD , and (c) actual efficiencyversusoutput powerPo .
Fig. 13 illustrates theoutputpowerandthe dv/dt ratedepend-ing on the resonant capacitorCrin the numerical design exam-ple. When the maximumdv/dtrate is decided to be 300 V/sin Fig. 13, the actual capacitanceCris determined to be56 H.
Equation (31) provides the maximum value of the resonant
inductorLras follows:
-
8/13/2019 papers on dc to dc converter
12/16
3374 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013
0
10
20
30
40
0 5 10 15 20 25
InductorCurrentiLr
[A]
Time t[s]
Parameter B
Parameter A
(a)
0
0.2
0.4
0.6
0.8
1
0 0.1 0.2 0.3 0.4 0.5
OutputPo
werPo
[kW]
Duty Cycle D
Parameter A:Lr= 74 [H]Cr= 56 [nF]
Parameter B:Lr= 20 [H]Cr= 15 [nF]
(b)
0
5
10
15
20
0.2 [kW] 0.5 [kW] 1 [kW]
RMSValueofiLr[A]
Parameter AParameter B
(c)
90
92
94
96
98
100
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1
Efficiency[
%]
Output Power Po
[kW]
Soft Switching
Parameter A:Lr= 74 [H]Cr= 56 [nF]
Parameter B:Lr= 20 [H]Cr= 15 [nF]
(d)
Fig. 22. Actual efficiencies and soft-switching range with parameters A and B: (a) resonant inductor currentsiL r , (b)Po Dcharacteristics, (c) RMS values ofiL r , and (d) actual efficiencies and soft-switching range.
Lr
-
8/13/2019 papers on dc to dc converter
13/16
MISHIMAet al.: ANALYSIS, DESIGN, AND PERFORMANCE EVALUATIONS 3375
0
5
10
15
20
25
30
35
40
0.15 0.5 1.1
PowerLosses[W]
Output Power Po[kW]
S1, S2switchinglosses (turn-on)S1, S2switchinglosses (turn-off)
S1, S2conduction lossesD1, D2conduction losses
Doconduction lossDorecovery loss
Lrcupper loss Other losses
Fig. 24. Power loss analysis.
iin
Fig. 25. Schematic diagram of two-phase ER-SWC soft-switching PWMboost dcdc converter.
while fast recovery diodes (FRD, DSEI2x30-10C) are applied
for the diodes D1 and D2 , and the output freewheeling diode
Do .The experimental operating waveforms are indicated inFig. 16. Thesoft-switching commutations of the active switches
and diodes in the ER-SWC soft-switching PWM boost dcdc
converter prototype can be confirmed as well as the resonant
inductor current in CRM. Note in Fig. 16(b) that the turn-off
voltages across D1 and D2 are clamped to the value far lessthan the output voltage Vo (=200V) by the effect of the res-onant capacitorCr . Thereby, occurrence of voltage surges canbe avoided at the turn-off transitions ofD1 andD2 . The cur-rent ringings that appear in the experimental waveforms during
Mode 2 are caused by the parasitic inductances around the res-
onant capacitorCr . Those ringing currents can be alleviated to
some extent by improving the hardware implementation.The currentvoltage (IV) traces of the turn-on/off transi-
tions in each switching power device are shown in Fig. 17.
ZCS turn-on of the active switchesS1and S2can be confirmedin Fig. 17(a). It should be remarked herein that the tail cur-
rent inherent to the MOS-gate controlled bipolar power de-
vice IGBT appears in the ZVS turn-off transition of the active
switches [11]. ZVS turn-on of the diodes D1 and D2 can beobserved in Fig. 17(b). Furthermore, ZCS turn-on and turn-off
transitions of the freewheeling diodeDoare clearly observed inFig. 17(c).
Theswitching waveforms ofS1and S2are depicted in Fig. 18
for the semi-ZVS and semi-ZCS areas. Thus, it can be proven
herein that no surge voltage and current appear in the ER-SWC
boostdcdcconverter underthe semi-soft-switching conditions.
C. Steady-State Characteristics
Fig. 19 depicts the converter characteristics on the voltage
conversion ratio in relation with theresonant capacitor Cr .Itcanbe understood from the result that the larger theCr , the smallerthe range of operating duty cycleD. This is due to reduction ofthe resonant characteristics impedance Z(=
Lr /Cr ), which
contributes to the increase of thevoltage conversion ratio as well
as decrease of the duty cycle range. It should also be remarked
in Fig. 19 that the voltage conversion ratio linearly changes
with respect to the duty cycle; hence, the voltage-mode control
scheme can be constructed in a simple configuration. The con-
version efficiencies of the ER-SWC soft-switching PWM boost
dcdc converteraredemonstrated in Fig. 20 under theopen-loop
control condition (Vo =200 V constant), apart from the closed-loop control scheme in Fig. 15. The high conversion efficiency
is attained in the range of middle to rated output power, wherethe maximum efficiency 97.1%can be confirmed at the dutycycleD = 0.1with the voltage conversion ratio M = 1.5.
Fig. 21 depicts the converter characteristics with the voltage-
mode closed-loop control for input voltage variations,where the
voltage conversion ratio is set to three patterns: M= 2.5 (Vin =80 V),2.0(Vin = 100 V), and1.5(Vin = 133 V) with the con-stant output voltage Vo = 200 V. Due to the property of theER-SWC cell as mentioned previously, the variable range of
duty cycle is shifted into the smaller region as compared to
that of the conventional boost dcdc converter. As a result, the
average input currents are relatively reduced; then, the high
conversion efficiency can be actually obtained. It can be ob-served in Fig. 21(c) that the maximum efficiency attains96.4%atM= 1.5
D. Verification for Effectiveness of Parameter Design
Guideline
The output power regulation and the actual conversion effi-
ciencyare investigated with the twosets ofLr Crparameters A(Lr = 74 H, Cr = 56 nF) and B (Lr = 20 H,Cr = 15 nF).Note herein that parameter A is selected according to (33) and
(35) together with the design method explained in Section IV,
while parameter B is one of the examples for the undesigned pa-
rameters. Therefore, the peak value of inductor current iLr withparameter A is well reduced as compared to that of parameter
B, as shown in Fig. 22(a).
The steady-state output power regulation characteristics of
the ER-SWC soft-switching PWM boost dcdc converter for
parameters A and B are shown in Fig. 22(b) when the voltage
conversion ratioM= 2. It can be understood from Fig. 22(b)that the circuit operates in the wider range of the duty cycle in
the case of parameter A than parameter B. On the other hand, the
measured RMS values ofiLr are compared between parametersA and B in Fig. 22(c). It can be known herein that the RMS
values are reduced with parameter A rather than parameter B.
Those results indicate that there is a tradeoff between extension
-
8/13/2019 papers on dc to dc converter
14/16
3376 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013
iLr1 iLr2
iLr1 iLr2
iLr1 iLr2
75 % Load
50 % Load
25 % Load
75 % Load
50 % Load
25 % Load
iin
iin
iin
Current[A]
Current[A]
Current[A]
0
5
10
15
20
0
5
10
15
20
0
5
10
15
20 75 % Load
50 % Load
25 % Load
0 10 20 30 40 50 60
t [s]
(a) (b) (c)
iLr1 iLr2
iin
iin
iin
iLr1 iLr2
iLr2iLr1
Fig. 26. Simulated and experimental waveforms of two-phase interleaved ER-SWC soft-switching PWM boost dcdc converter: (a) simulation waveforms,(b) measured input inductor currents (2 A/div, 2 s/div), and (c) measured dc input current (2 A/div, 2 s/div).
of the current conduction time in the power devices/components
and reduction of the peak current.
The actual conversion efficiencies with parameters A and B
are shown in Fig. 22(d). It can be understood that the efficiency
is improved almost2%by means of parameter A as comparedto parameter B. This efficiency improvement is considered due
to the effective reduction of the peak current in the resonant
inductor Lr by setting the circuit parameters with the design
guideline.
E. Soft-Switching Range and Power Loss Analysis
Theactual power conversionefficiency and the relevant power
loss analysis of the ER-SWC soft-switching PWM boost dcdc
converter with consideration for the semi-soft-switching opera-
tions aredemonstrated in Figs. 23 and24, respectively. Thehigh
andflatcurve regardingtheconversion efficiency canbe attained
in the complete soft-switching range of 200 W Po 1kW.Thesmallamountof the turn-on powerloss emerges in theactive
switches for the power range ofPo >1 kW which correspondsto the semi-ZCS turn-on region; thereby, the conversion effi-
ciency slightly decreases. On the other hand, the turn-off powerloss becomes outstanding in the case of Po
-
8/13/2019 papers on dc to dc converter
15/16
MISHIMAet al.: ANALYSIS, DESIGN, AND PERFORMANCE EVALUATIONS 3377
92
93
94
95
96
97
98
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Efficiency[
%]
Output Power Po[kW]
Single Phase (1 [kW] Design)Single Phase (500 [W] Design)
2-Phase Interleaved
Fig. 28. Actual efficiencies of single and two-phase ER-SWC soft-switchingPWM boost dcdc converters.
The actual efficiencies of the single- and two-phase proto-
types are shown in Fig. 28. In the light-load range 200500 W,
the500-Wsingle-phase prototypeproduces thehigher efficiency
curve since its circuit parameters are designed suitable for the
power range. From the middle to heavy load 500 W1 kW, the
two-phase prototype attains the higher efficiency curve, exceed-
ing that of the 1-kW single-phase prototype. Those results indi-
cate that the unit control of the operating single-phase circuits
according to the load power is quite effective for the interleaved
ER-SWC soft-switching PWM boost dcdc converter.
VII. CONCLUSION
The practical performance of a newly developed soft-
switchingPWMboost dcdc converter with ER-SWCcell under
DCM/CRM conditions and its evaluations have been presented
in this paper.
Thehigh-efficiency and wide-rangesoft-switchingoperations
attained by the ER-SWC soft-switching PWM boost dcdc con-
verter have been described in detail. The design guideline that is
based on the soft-switching operation has been explained, and
its design procedure has been actually demonstrated by using a
numerical example of the converter power ratings. By design-
ing the circuit parameters according to the guideline, the current
stresses in the input inductor and the power devices can be ef-fectively reduced in DCM; then, the high conversion efficiency
over 96% can be attained in a 1-kW laboratory prototype. The
power loss analysis based on the prototype has been depicted,
and it has been confirmed that no significant conduction loss
exists in the additional power devices of the ER-SWC cell and
affects the conversion efficiency. It is verified from the theoret-
ical and experimental results that the ER-SWC soft-switching
PWM boost dcdc converter in DCM can be one of the effec-
tive solutions for overcoming the drawbacks of the conventional
PWM boost dcdc converters in DCM and, then, is suitable for
high-efficiency and high-frequency power conversion circuits
and systems.
Furthermore, the two-phase interleaved soft-switching PWM
boost dcdc converter with the ER-SWC cells has been newly
developed, and its performance and practical effectiveness have
been originally clarified in theexperiment in terms of conversion
efficiency and ripple factor.
REFERENCES
[1] Y. P. Hsieh, J. F. Chen, T. J. Liang, and L. S. Yang, A novel high step-upDC-DC converter for a microgrid system,IEEE Trans. Power Electron.,vol. 26, no. 4, pp. 11271136, Apr. 2011.
[2] D. Y. Jung, Y. H. Ji, S. H. Park, Y. C. Jung, and C. Y. Won, Interleavedsoft-switchingboost converter for photovoltaic power-generation system,IEEE Trans. Power. Electron., vol. 26, no. 4, pp. 11371145, Apr. 2011.
[3] I. Aksoy, H. Bodur, and A. F. Bakan, A new ZVT-ZCS-PWM dc-dcconverter, IEEE Trans. Power Electron., vol. 25, no. 8, pp. 20932105,Aug. 2010.
[4] S. V. Araujo, R. P. Torrico-Bascope, and G. V. Torrico-Bascope, Highlyefficient high step-up converter for fuel cell power processing based onthree-sate communication cell,IEEE Trans. Ind. Electron., vol. 57, no. 6,pp. 19871997, Jun. 2010.
[5] H.-L. Do, A soft-switching DC/DC converter with high voltage gain,IEEE Trans. Power Electron., vol. 25, no. 5, pp. 11931200, May 2010.
[6] E. C. Dias, L. C. G. Freitas, E. A. A. Coelho, J. B. Vieira, Jr., and L. C. deFreitas, Novel true zero current turn-on and turn-off converters family:Analysis and experimental results, IET Power Electron., vol. 3, no. 1,pp. 3342, 2010.
[7] K. B. Park, G. W. Moon, and M. J. Youn, Nonisolated high step-up boostconverter integrated with Sepic converter,IEEE Trans. Power Electron.,vol. 25, no. 9, pp. 22662275, Sep. 2010.
[8] S. H. Park, G. R. Cha, Y. C. Jung, and C. Y. Won, Design and applicationfor PV generation system using a soft-switching boost converter withSARC,IEEE Trans. Ind. Electron., vol. 57, no. 2, pp. 515522, Feb.2010.
[9] R. J. Wai andR. Y. Duan,High step-up converter withcoupled-inductor,IEEE Trans. Power Electron., vol. 20, no. 5, pp. 10251035, Sep. 2005.
[10] P. Das and G. Moschopoulos, A comparative study of zero-current-transition PWM converters,IEEE Trans. Ind. Electron., vol. 54, no. 3,pp. 13191328, Jun. 2007.
[11] T. Mishimaand M.Nakaoka,A newfamilyof ZCS-PWMdc-dc converterwith clamping diodes-assisted active edge-resonant cell, in Proc. Int.Conf. Electr. Mach. Syst., Oct. 2010, pp. 168173.
[12] Y. S. Roh, Y. J. Moon, J. C. Gong, and C. Yoo, Active power factorcorrection (PFC) circuit with resistor-free zero-current detection,IEEETrans. Power Electron., vol. 26, no. 2, pp. 630637, Feb. 2011.
[13] K.-H. Liu and F. C. Lee, Zero-voltage switching technique in DC/DCconverters, IEEE Trans. Power Electron., vol. 5, no. 3, pp. 293304, Jul.1990.
[14] B. Su, J. Zhang, and Z. Lu, Totem-pole boost bridgeless PFC rectifierwith simple zero-current detection and full-range ZVS operating at theboundary of DCM/CCM,IEEE Trans. Power Electron., vol. 26, no. 2,pp. 427435, Feb. 2011.
[15] C. M. Stein, J. Pinheiro, and H. L. Hey, A ZCT auxiliary commutationcircuit for interleaved boost converters operating in critical conductionmode,IEEE Trans. Power Electron., vol. 17, no. 6, pp. 954961, Nov.2002.
[16] S. Y. Hui, K. W. Cheng, and S. R. Prakash, A fully soft-switchedextended-period quasi-resonant power-factor-correction circuit, IEEETrans. Power. Electron., vol. 12, no. 5, pp. 922930, Sep. 1997.
[17] M. K. Kazimierczuk,Pulse-width Modulated dc-dc Power Converters.New York: Wiley, 2008.
[18] K. Yao, X. Ruan, X. Mao, and Z. Ye, Reducing storage capacitor of aDCM boost PFC converter,IEEE Trans. Power. Electron., vol. 27, no. 1,pp. 151160, Jan. 2012.
[19] K. Yao, X. Ruan, X. Mao, and Z. Ye, Variable-duty-cycle control toachieve high input power factor for DCM boost PFC converter, IEEETrans. Ind. Electron., vol. 58, no. 5, pp. 18561865, May 2011.
[20] X. Huang, X. Wang, T. Nergaard, J. S. Lai, X. Xu, and L. Zhu, Parasiticringing and design issues of digitally controlled high power interleavedboost converters,IEEE Trans. Power Electron., vol. 19, no. 5, pp. 13411352, Sep. 2004.
[21] M. Aredes, R. Dias, A. Aquino, C. Portela, and E. Watanabe, Going the
distancePower-electronics-based solutions for long-range bulk power
-
8/13/2019 papers on dc to dc converter
16/16
3378 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 7, JULY 2013
transmission,IEEE Ind. Electron. Mag., vol. 5, no. 1, pp. 3648, Mar.2011.
[22] K. Konishi, M. Ishibashi, and M. Nakaoka, Three-phase current-fed soft-switching PWM converter with switched capacitor type resonance DClink, inProc. 30th IEEE Power Electron. Spec. Conf. , Jul. 1997, vol. 2,pp. 653658.
[23] S. Chandhaket, K. Ogura, M. Nakaoka, and Y. Konishi, High-frequencyflyback transformer linked utility-connected sinewave soft-switchingpower conditioner using a switched capacitorsnubber, in Proc. 4th PowerElectron. Motion Control Conf., Aug. 2004, vol. 3, pp. 12421247.
[24] T. Mishima, Y. Takeuchi, and M. Nakaoka, A new high step-up soft-switching PWM boost dc-dc converter with edge-resonant switched ca-pacitor cell, inProc. 8th Int. Conf. Power Electron., Jun. 2011, pp. 846853.
[25] T. Mishima, Y. Takeuchi, and M. Nakaoka, Practical performance eval-uations of a soft-switching PWM boost DC-DC converter with high effi-ciency and high scalability edge resonant switched capacitor modular, inProc. 3rdIEEE Energy Convers.Congr. Expo., Sep. 2011, pp.30883095.
[26] Y. Takeuchi, T. Mishima, and M. Nakaoka, New evaluations on softcommutation range of a soft-switching PWM boost DC-DC converterwith edge-resonant switched capacitor modular, inProc. 9th IEEE Int.Conf. Power Electron. Drive Syst., Dec. 2011, pp. 11721177.
Tomokazu Mishima (S00M04) received the B.S.,M.S., and Ph.D. degrees all in electrical engineeringfromthe University ofTokushima, Tokushima, Japan,in 1999, 2001, and 2004, respectively.
Since 2010, he has been with Kobe University,Hyogo, Japan, as an Associate Professor, and in-volved in the research and development of powerelectronics circuits and systems. His research in-terests include soft-switching dcdc converters, res-onant converters, and high-frequency inverters forindustrial, automotive, renewable, and sustainable
energy applications.Dr. Mishima received the Best Paper Award in the 8th IEEE International
Conference on Power Electronics and Drive Systems (IEEE-PEDS 2009), andthe Best Paper Presentation Award in the 38th Annual Conference of the IEEEIndustrial Electronics Society (IEEE-IECON 2012). He serves as an AssociateEditor for the Special Issue on Transportation Electrification and Vehicle Sys-tems 2013 in IEEE TRANSACTION ONPOWERELECTRONICS. He is a memberof the Institute of Electrical Engineering of Japan, the Institute of Electronics,Information and Communication Engineers, the Institute of Electrical Installa-tion of Japan, the Japan Institute of Power Electronics, and the Japan Instituteof Marine Engineering.
Yujiro Takeuchireceived the B.S. and M.S. degreesin marine engineering from Kobe University, Hyogo,Japan, in 2010 and 2012, respectively, where he wasinvolved on the research of the soft-switching dcdcpower converters suitable for renewable and sustain-able energy applications.
Since 2012, he has been with the Departmentof Power Electronics Systems Research, Hitachi Re-search Laboratory, Hitachi, Ltd., Hitachi, Japan, andinvolved in the research and development of powersemiconductor devices.
Mr. Takeuchi is a Member of the Institute of Electrical Engineering of Japan(IEEJ). He received the IEEJ Young Engineers Paper Presentation Award in2011 and 2013, respectively.
Mutsuo Nakaoka (M83) received the Ph.D. de-gree in electrical engineering from Osaka University,
Osaka, Japan, in 1981.From 1995 to 2004, he was a Professor with
the Graduate School of Science and Engineering,Yamaguchi University, Yamaguchi, Japan, and iscurrently a Professor Emeritus. Since 2004, he hasbeen a Visiting Professor with Kyungnam Univer-sity, Masan, Korea, and the University of Malaya,Kuala Lumpur, Malaysia, since 2012. His researchinterests include applications and developments of
power electronics circuits and systems for industrial electronics and home ap-pliances. From 2001 to 2006, he served as the Chairman of the IEEE IndustrialElectronics Society Japan Chapter.
Dr. Nakaoka is a Member of the Institute of Electrical Engineering of Japan,the Institute of Electronics, Information and Communication Engineers, theInstitute of Electrical Installation of Japan, and the Japan Institute of PowerElectronics. He received many distinguished paper awards on power electronicssuch as the 2001 Premium Prize Paper Award from the Institution of ElectricalEngineer (U.K.), the 2001/2003 IEEE IECON Best Paper Award, the ThirdPaper Award in the 2000 IEEE International Conference on Power Electron-ics and Drive Systems (PEDS), the 2003 IEEE Industrial Applications SocietyJames Melcher Prize Paper Award, and the Best Paper Award of IATC06, IEEEPEDS 2009 Best Paper Awards, and the Best Paper Award in the 2009 IEEEInternational Symposium on Industrial Electronics.