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    RF INDUCTOR/TRANSFORMER

    Enrollment No.: 10305179

    Name: PALLAVIE TYAGI

    Project Supervisor: PROF. A. B. BHATTACHARYYA

    May 2012

    Thesis submitted in partial fulfillment

    of the requirements for the degree of 

    Master of Technology

    DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

    JAYPEE INSTITUTE OF INFORMATION TECHNOLOGY

    (Deemed to be University)

    NOIDA

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    CERTIFICATE

    This is to certify that the work titled “RF INDUCTOR/TRANSFORMER”

    submitted by   “Pallavie Tyagi”   in partial fulfillment for the award of degree of 

    Master of Technology   (Microelectronics and Embedded Technology) of Jaypee

    Institute of Information Technology, Noida has been carried out under my supervi-

    sion. This work has not been submitted partially or wholly to any other Universityor Institute for the award of this or any other degree or diploma.

    Signature of Supervisor:

    Name of supervisor:

    Designation:

    Date:

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    ACKNOWLEDGMENT

    I would like to express my deepest gratitude and appreciation for my supervisor

    “Prof. A. B. Bhattacharyya”, without whose faith, continued interest, dedica-

    tion and support, this work would not have been possible. Additionally, he deserves

    my accolades for his patience and fairness during tough moments in my work. I

    thank him for encouraging me at times when I needed it most. His energy and

    enthusiasm for knowledge are boundless.

    I would also like to thank “Mr. Kirmender Singh” for sharing his passion and

    love for circuit design and device modeling. He encouraged me to work on a variety

    of projects and thereby provided me with a well rounded perspective in engineering.

    Above all, I thank him for his friendship, his natural charisma and great sense of 

    humour.

    This project is a part of   “NPMASS program”  supported by Government of 

    India at MEMS Design Center at JIIT.

    Signature of Student:

    Name of Student:

    Date:

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    ABSTRACT

    High performance Inductors and Transformers are playing an increasing role

    in modern communication systems. Despite the superior performance offered by

    discrete components, parasitic capacitances from bond pads, board traces and pack-

    aging leads reduce the high frequency performance and contribute to the urgency

    of an integrated solution. Embedded Inductors have the potential for significant

    increase in reliability and performance of the IC. Due to the driving force of CMOS

    integration and low costs of silicon-based IC fabrication, these Inductors and Trans-

    formers lie on a low resistivity silicon substrate, which is a major source of energy

    loss and limits the frequency response. Therefore, the quality factor of Inductors

    and Transformers fabricated on silicon continues to be low.

    In this thesis to improve the performance of the Inductors and Transformers

    various approaches have been used. One approach is to fabricate the transformer

    on a certain distance from the silicon substrate and then within this distance use

    Air, High resistive silicon or Silicon nitride as a cavity. By doing so improvement

    in quality factor is observed. Another approach is to increase the thickness of the

    silicon dioxide. Fabrication of inductors or transformers on such a thick  SiO2   layer

    can be a good solution to achieve better performance. However, the thickness of such  S iO2 layer is still limited by the process for further performance improvement.

    One another approach is to use glass as a substrate and RF performance of the

    glass-based transformer is improved compared to that of silicon-based transformer

    highlighting a good prospect for the future 3-dimensional RF device application.

    Meander structure is also investigated in this project. Perform the modeling

    of meander inductor by decomposing it into individual straight segments and then

    compute the self and mutual inductance. The obtained results are compared with

    FASTHENRY.

    Signature of Student: Signature of Supervisor:

    Name: Name:

    Date: Date:

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    Contents

    CERTIFICATE ii

    ACKNOWLEDGEMENT iii

    ABSTRACT iv

    LIST OF TABLES vii

    LIST OF FIGURES 1

    1 INTRODUCTION 1

    1.1 INTRODUCTION:- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

    1.2 MOTIVATION:- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

    1.3 THESIS OUTLINE:- . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

    2 LITERATURE REVIEW OF INDUCTOR AND TRANSFORMER 4

    2.1 WHAT IS A INDUCTOR:- . . . . . . . . . . . . . . . . . . . . . . . 4

    2.2 CIRCUIT MODEL OF INDUCTOR:- . . . . . . . . . . . . . . . . . 4

    2.3 WHAT IS A TRANSFORMER:- . . . . . . . . . . . . . . . . . . . . 4

    2.4 TRANSFORMER APPLICATIONS:- . . . . . . . . . . . . . . . . . . 5

    2.5 ELECTRICAL CHARACTERISTICS:- . . . . . . . . . . . . . . . . . 5

    2.6 TRANSFORMER TOPOLOGIES:- . . . . . . . . . . . . . . . . . . . 7

    2.6.1 ADVANTAGES OF INTEGRATED PASSIVE COMPONENTS:-

    82.7 LOSS MECHANISMS IN TRANSFORMERS ON SILICON SUBSTRATES:-

    9

    2.7.1 CONDUCTOR LOSSES:- . . . . . . . . . . . . . . . . . . . . 9

    2.7.2 SUBSTRATE LOSSES:- . . . . . . . . . . . . . . . . . . . . . 11

    2.8 CIRCUIT MODEL OF THE TRANSFORMER:- . . . . . . . . . . . 11

    3 QUALITY FACTOR ENHANCEMENT TECHNIQUES FOR IN-

    DUCTOR AND TRANSFORMER 14

    3.1 INTRODUCTION:- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

    3.2 PARASITIC EFFECTS IN THE SUBSTRATES:- . . . . . . . . . . . 14

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    3.2.1 MAGNETICALLY INDUCED PARASITIC EFFECTS IN THE

    SUBSTRATE:- . . . . . . . . . . . . . . . . . . . . . . . . . . 15

    3.2.2 ELECTRICALLY INDUCED PARASITIC EFFECTS IN THE

    SUBSTRATE:- . . . . . . . . . . . . . . . . . . . . . . . . . . 15

    3.3 QUALITY FACTOR:- . . . . . . . . . . . . . . . . . . . . . . . . . . 16

    3.4 SELF RESONANCE FREQUENCY:- . . . . . . . . . . . . . . . . . . 16

    3.5 PROCESS PARAMETERS AND DIMENSIONS:- . . . . . . . . . . . 17

    3.6 Q-FACTOR ENHANCEMENT USING CAVITY:- . . . . . . . . . . 17

    3.7 Q-FACTOR ENHANCEMENT USING COPPER:- . . . . . . . . . . 21

    3.8 Q-FACTOR ENHANCEMENT USING HIGH RESISTIVE SUBSTRATES:-

    22

    3.9 LAYOUT OF INDUCTOR:- . . . . . . . . . . . . . . . . . . . . . . . 24

    3.10 LAYOUT OF TRANSFORMER:- . . . . . . . . . . . . . . . . . . . . 25

    3.11 EXPERIMENTAL RESULTS:- . . . . . . . . . . . . . . . . . . . . . 25

    4 VERIFICATION OF SELF AND MUTUAL INDUCTANCE THROUGH

    FASTHENRY 27

    4.1 PARTIAL INDUCTANCE APPROACH:- . . . . . . . . . . . . . . . 27

    4.2 FASTHENRY:- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

    4.3 VERIFICATION OF PARTIAL INDUCTANCE APPROACH ON

    MEANDER:- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

    4.4 CIRCUIT DIAGRAM OF MEANDER ON SILICON SUBSTRATE:- 32

    4.5 MODELING OF INDUCTANCE:- . . . . . . . . . . . . . . . . . . . 33

    4.6 SELF INDUCTANCE:- . . . . . . . . . . . . . . . . . . . . . . . . . . 36

    4.7 MUTUAL INDUCTANCE:- . . . . . . . . . . . . . . . . . . . . . . . 40

    4.8 EXPERIMENTAL RESULTS:- . . . . . . . . . . . . . . . . . . . . . 43

    5 CONCLUSIONS 44

    APPENDIX 44

    A FASTHENRY CODING OF SPIRAL INDUCTOR:- 45

    B FASTHENRY CODING OF TRANSFORMER:- 47

    C DIMENSIONS OF INDUCTOR LAYOUT:- 51

    REFERENCES 51

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    List of Tables

    1.1 Effect of Q on typical RF circuits . . . . . . . . . . . . . . . . . . . . 2

    3.1 Process Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

    3.2 Aluminium with Cavity . . . . . . . . . . . . . . . . . . . . . . . . . 21

    3.3 Copper with Cavity . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

    3.4 Copper without Cavity . . . . . . . . . . . . . . . . . . . . . . . . . . 213.5 Aluminium without Cavity . . . . . . . . . . . . . . . . . . . . . . . . 22

    4.1 Parameters of Ground Signal Ground structure . . . . . . . . . . . . 29

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    List of Figures

    2.1 Circuit diagram of Inductor . . . . . . . . . . . . . . . . . . . . . . . 5

    2.2 Monolithic Transformer- Physical Layout . . . . . . . . . . . . . . . . 7

    2.3 Illustration of magnetic fields in a Transformer . . . . . . . . . . . . . 10

    2.4 Induced Eddy currents in a Transformer . . . . . . . . . . . . . . . . 11

    2.5 Circuit diagram of Transformer by O.El.Gharniti[16] . . . . . . . . . 12

    3.1 Magnetically induced substrate losses in a Transformer . . . . . . . . 15

    3.2 Electrically Induced losses in a Transformer . . . . . . . . . . . . . . 16

    3.3 Cavity(Air) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

    3.4 Cavity(Air) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

    3.5 Cavity(oxide) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

    3.6 Cavity(Oxide) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

    3.7 Cavity(Silicon Nitride) . . . . . . . . . . . . . . . . . . . . . . . . . . 20

    3.8 No Cavity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

    3.9 Layout of Inductor and Transformer in ADS . . . . . . . . . . . . . . 22

    3.10 High Resistive Si Substrate . . . . . . . . . . . . . . . . . . . . . . . . 23

    3.11 Inductor on Glass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

    3.12 Transformer on Glass . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

    3.13 Layout of Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

    3.14 Layout of Transformer . . . . . . . . . . . . . . . . . . . . . . . . . . 25

    4.1 Layout of Meander structure surrounded with Ground . . . . . . . . 28

    4.2 Ground Signal Ground structure . . . . . . . . . . . . . . . . . . . . . 294.3 Ground Signal Structure . . . . . . . . . . . . . . . . . . . . . . . . . 30

    4.4 Plot of self inductance by varying the dg   . . . . . . . . . . . . . . . . 30

    4.5 Plot of self inductance by Varying the length  lw   of the conductor . . . 30

    4.6 Ground Signal Ground- Symmetric Structure . . . . . . . . . . . . . . 31

    4.7 Ground Signal Ground- Asymmetric Structure . . . . . . . . . . . . . 31

    4.8 Circuit diagram of meander . . . . . . . . . . . . . . . . . . . . . . . 32

    4.9 Meander structure on Silicon substrate . . . . . . . . . . . . . . . . . 32

    4.10 Return current through Capacitors . . . . . . . . . . . . . . . . . . . 33

    4.11 Two magnetically coupled loops . . . . . . . . . . . . . . . . . . . . . 34

    4.12 Circular conductor with radius b . . . . . . . . . . . . . . . . . . . . 35

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    4.13 GSG: Symmetric . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

    4.14 GSG: Asymmetric . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

    4.15 Coupling inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

    A.1 Screen shot of INDUCTOR . . . . . . . . . . . . . . . . . . . . . . . 45

    B.1 Screen shot of TRANSFORMER . . . . . . . . . . . . . . . . . . . . 47

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    Chapter 1

    INTRODUCTION

    1.1 INTRODUCTION:-

    Monolithic inductors/transformers have found extensive applications in radio-

    frequency (RF) circuits in wireless communication systems, such as impedance

    matching, signal coupling, phase splitting and formation of large inductances on

    the order of tens of nano henries. Implemented in CMOS technology, the current

    inductors/transformers generally have low quality factors (Q), low self-resonant fre-

    quencies  f res  and large cross talk.

    The low performance of current inductors/transformers is in part due to the par-

    asitics between the devices and the lossy silicon substrate. First, the eddy currents

    induced in the silicon substrate beneath a inductor/transformer by the magnetic field

    generated in the device cause energy loss and reduce Q, this effect is especially seri-

    ous at high frequencies, because the intensity of the eddy currents is proportional to

    the rate of change in the magnetic field. Second, the parasitic capacitances between

    the inductor/transformer traces and the substrate are in shunt with the inductance

    obtained from the spiral traces, thus lowering  f res  of the inductor/transformer, these

    parasitic capacitances also enable electric coupling between the device and the sub-strate, causing further energy loss. Lastly, but not the least important,adjacent

    devices are coupled through these parasitics and their ambient (including both the

    substrate and air), hence large cross talk.

    Because spiral inductors are typically used to form transformers, the very nature

    of coupling entails even greater parasitic capacitances and eddy currents among the

    spirals, resulting in more energy loss. Therefore, to improve the performance of 

    the on-chip monolithic transformers, the parasitics due to the substrate should be

    suppressed as much as possible. One efficient approach is to drastically increase

    the thickness of the isolation layer, typically silicon dioxide or by using air as a

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    cavity, between the inductor/transformer and the silicon substrate. In doing so,

    the magnetic and electric coupling between the device and the silicon substrate and

    the coupling among devices through the substrate are greatly weakened. Another

    approach to reduce these effects is the use of glass substrate instead of silicon sub-

    strate. By using glass as a substrate quality factor is increased up to 40 percent.

    1.2 MOTIVATION:-

    Modern RF communication systems require stringent specifications for RF com-

    ponents. Despite much work , which has been done on the integration of RF systems

    into a single chip, many components remain off-chip. This is because the RF pas-

    sives with the required performance are not available in the standard silicon process.

    Many recent studies have shown that two aspects are extremely important in order

    to obtain high performance integrated passive components when the signal frequency

    is in the GHz range. One is the metal thickness and the other is how far the device is

    isolated from the lossy substrate. For these two reasons, research has been performed

    to investigate other technological options among available fabrication processes.

    Recently, Transformers/Inductors have been required in many RFIC applications

    for impedance matching/transforming, signal coupling, phase splitting (balun).Important

    specifications for inductors/transformers are their Q and self-resonance frequency.High-Q inductors are essential for many different passive and active circuits and

    can substantially reduce the phase noise or power consumption of oscillators and

    amplifiers. Also, they result in low-loss matching networks and filters as shown in

    Table 1.1.

    Table 1.1: Effect of Q on typical RF circuits

    Circuit Parameter Effect of Q

    Oscillator Phase Noise   1Q2

    Amplifier Gain   Q

    Oscillator Power Consumption  1

    Q

    Amplifier Power consumption  1

    Q

    Matching System Loss  1

    Q

    Filter Loss  1

    Q

    System Noise Figure   1Q

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    MEMS based products combine both mechanical and electronic devices on a

    monolithic microchip to produce superior performance over solid state components,

    especially for Wireless Applications. Micromachined versions of off chip components,

    including Vibrating Resonators , Switches, Capacitors, Inductors and Transformers

    could maintain or shrink the size of future Wireless phones. Next generation hand-

    sets need multiband reconfigurability and even larger number of high Q components.

    However, on-chip Transformers acquired from the conventional silicon IC technolo-

    gies do not meet the required performance of circuit designers. In order to address

    this issue, non-standard substrates such as high resistivity silicon or glass substrates,

    or sometimes substrates with insulation layers have been used to reduce the sub-

    strate loss.

    1.3 THESIS OUTLINE:-

    This thesis consists of six chapters. Chapter 1 provides an introduction to the

    research. This mainly consists of the motivation and importance of RF passive com-

    ponents in modern communication system.

    Chapter 2 presents literature review of inductors and transformers. This chapter

    discusses various topologies proposed by previous researchers as well as applicationsof RF transformers. A physics based compact model of inductor and transformer

    along with the loss mechanisms, responsible for the degradation of Q factor when

    placed above the silicon substrate is discussed.

    In chapter 3 Quality factor enhancement techniques for both the inductors and

    transformers is presented. Conventional monolithic inductors can achieve a maxi-

    mum Q-factor of 10, It poses a limitation for narrow band circuits but by fabricating

    the inductor/transformer farther away the silicon substrate using the cavity or byfabricating the inductor/transformer on high resistive substrate, higher value of 

    Quality factor and self resonance frequency is obtained.

    Chapter 4 presents the modeling of meander inductor surrounded by ground on

    both the sides, decomposing the structure into individual straight segments and then

    perform the computation of self and mutual inductance.

    Finally in chapter 5 conclusions are highlighted and some future work in order

    to continue this project are suggested.

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    Chapter 2

    LITERATURE REVIEW OF

    INDUCTOR AND

    TRANSFORMER

    2.1 WHAT IS A INDUCTOR:-

    An inductor is a component that stores energy in the form of a magnetic field.

    Maxwells equations imply that current moving through a conductor induces a mag-

    netic field. Similarly, changes in a magnetic field near a conductor induce changes in

    the current flowing inside that conductor. Key parameters in integrated inductors

    are the quality factor Q and the self-resonance frequency where Q would peak as

    the device transforms from inductive to capacitive characteristics. Resistive metal

    lines and dielectric losses in the substrate are the main contributing factors to the

    degradation of the Q factor.

    2.2 CIRCUIT MODEL OF INDUCTOR:-

    A general model that describes the performance of a planar inductor ( square coil) is

    shown in Figure 2.1.  Ls is the low-frequency inductance, Rs is the series resistance of 

    the coil, C s is the capacitance between the different windings of the inductor and in-

    cludes the fields in air and in the supporting dielectric layers,  C ox  is the capacitance

    in the oxide layer between the coil and the silicon substrate,  C  p   is the capacitance

    between the coil and the ground through the silicon substrate, and  R p   is the eddy

    current losses in the substrate[20].

    2.3 WHAT IS A TRANSFORMER:-

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    Figure 2.1: Circuit diagram of Inductor

    A Transformer is a passive device that “Transforms” or converts a given impedance,

    voltage or current to another desired value. In addition, it can also provide DC isola-

    tion, common mode rejection, and conversion of balanced impedance to unbalanced

    or vice versa. Transformers come in a variety of types, our focus is on Transform-

    ers used in RF and Microwave signal applications. Essentially, an RF Transformer

    consists of two or more windings linked by a mutual magnetic field. When one wind-

    ing, the primary has an ac voltage applied to it, a varying flux is developed, the

    amplitude of the flux is dependent on the applied current and number of turns in

    the winding. Mutual flux linked to the secondary winding induces a voltage whose

    amplitude depends on the number of turns in the secondary winding.

    2.4 TRANSFORMER APPLICATIONS:-

    Transformers are used for:-

    •  Impedance matching to achieve maximum power transfer between two devices.

    •   Voltage/current step-up or step-down.•  DC isolation between circuits while affording efficient AC transmission.

    •  Interfacing between balanced and unbalanced circuits, example: push-pull am-plifiers, ICs with balanced input such as A to D converters.

    •  Common mode rejection in balanced architectures.

    2.5 ELECTRICAL CHARACTERISTICS:-

    A monolithic integrated planar Transformer comprises two windings. Each wind-

    ing consists of an integer number of turns  N 1 ≥ 1,N 2 ≥ 1 where  N 1   is the number

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    of primary turns and  N 2  is the number of Secondary turns. The two windings are

    arranged in a single plane with conductors crossing one another .

    The   Turn Ratio (n)   of a Transformer is one of the main electrical parameters

    of interest and is defined as

    n =  N 1/N 2

    In the case of an ideal transformer, the  Turn Ratio (n) is also equivalent to

    n =  V 1/V 2 = I 2/I 1

    where  V 1   is the voltage between the primary ports,   V 2   is the voltage between the

    secondary ports.   I 1   and   I 2   is the current-flow into the related ports. Each wind-ing, the Primary and the Secondary, has a self-inductance  LP   and  LS  and they are

    inductively coupled denoted by the mutual-inductance M. The self inductance of 

    a given winding is the inductance measured at the Transformer terminals with all

    other windings open circuited.

    The strength of the magnetic coupling between the Primary and Secondary winding

    is indicated by the   Coupling Coefficient k  (k-factor) as

    k =  M P /√ 

    LP LS 

    A typical range for the k-factor achieved in monolithic transformer designs is 0.6 ≤k ≤  0.95. The phase of the voltage induced at the secondary of the Transformerdepends upon the selection of the reference terminal and basis of this Transformer

    connections are of two types:-

    •   Inverting Connection•   Noninverting connection

    For an ac signal source with the output and ground applied between terminals

    P and  P̄ , there is minimal phase shift of the signal at the secondary if the load is

    connected to terminal S(with  S̄  grounded). This is the Noninverting connection. In

    the Inverting connection, terminal S is grounded and  S̄  is connected to the load so

    that the secondary output is antiphase to the signal applied to the primary[13].

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    2.6 TRANSFORMER TOPOLOGIES:-

    There are various types of Transformer topologies:-

    •   parallel(Shibata) Transformer•  Interwound(Frlan) Transformer

    •  OverlayFinlay Transformer

    •  Concentric Spiral transformer

    A microstrip line is the simplest on-chip element for monolithic implementa-

    tion of a transmission line inductor, and the strip is normally wound into a spiral

    to reduce chip area of the component. Interwinding microstrip spiral inductors tomagnetically couple independent conductors is a logical extension of this concept,

    and results in a monolithic transformer, as shown in Figure 2.2.

    Figure 2.2: Monolithic Transformer- Physical Layout

    An early example of this type of structure is the compact spiral directional

    coupler reported by Shibata[2] in 1981. The parallel conductor (Shibata)[2] config-

    uration is made up of two conductors which are inter-wound and lie in the same

    plane. This is done to promote edge coupling between the primary and secondary

    windings which increases the coupling coefficient, k. The differences in primary

    and secondary winding lengths make the Shibata Transformer layout physically and

    electrically asymmetric, and a transformer ratio of 1:1 is not achievable. This non-

    symmetric property subsequently produces coupled coils with different inductance

    values.

    An improvement on the Shibata Transformer topology is the planar inter woundtransformer. This layout was introduced in 1989 by E. Frlan and is referred as the

    ‘Frlan Transformer’ [11]. In Frlan configuration primary and secondary windings

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    are identical and lie in the same plane. This configuration ensures that when both

    windings have the same number of turns, they are electrically identical. In addition,

    this configuration has the advantage of placing the terminals of the Transformer at

    opposite ends which makes it easier to connect the transformer to other components

    in the system. The Frlan[11] winding configuration was selected as the most suitable

    configuration for the resonant tank of the oscillator.

    Multiple conductor layers are used to fabricate an overlay or broadside coupled

    Transformer. This implementation was first introduced by Finlay[12]. In this con-

    figuration two windings are on different metal layers and are staked one on top of 

    the other. This has the advantage of high coupling coefficient, k, because magnetic

    coupling is achieved both from the edges and the flat surfaces of the metal traces.

    Thus, coupling coefficients close to 0.9 are easy to achieve with this configuration. In

    addition, a relatively smaller area is required to achieve the same inductance as theother layouts. The disadvantage of this winding configuration lies in the fact that

    the primary and secondary windings are constructed with different metals which

    have different sheet resistances. Thus, the Q-factors of the two windings will be

    different.

    A Transformer can also be implemented using concentrically wound planer spi-

    rals. The common periphery between the two windings is limited to just a single

    turn. Therefore, mutual coupling between adjacent conductors contributes mainlyto the self-inductance of each winding and not to mutual inductance between the

    windings. As a result, the concentric spiral transformer has less mutual inductance

    and more self-inductance than the Frlan and Finlay configurations, giving it a lower

    k-factor. Also there is no symmetry between windings in this configuration[11][12].

    2.6.1 ADVANTAGES OF INTEGRATED PASSIVE COMPONENTS:-

    •   Improved Performance

    –  Very high Q from 40 to 70 at 4 GHZ Inductance

    –  Reduce of capacitive effects for Inductances

    –  Less noise

    –   Low consumption

    •   Integration: Light, small, compatibility

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    •   Packaging: Substantially improved packaging efficiency

    2.7 LOSS MECHANISMS IN TRANSFORMERS

    ON SILICON SUBSTRATES:-

    Losses arise in transformers because of the finite conductivity of the metal wind-

    ings, the finite resistivity of the silicon substrate, and eddy currents in the wind-

    ings and substrate. These losses lead to reduction in quality factor, self resonant

    frequency. Hence, minimization of losses is important. To reduce these losses,

    transformers fabricated on different substrates with different dimensions have been

    studied. The following sections explain in detail about the various losses that occur

    in transformers.

    2.7.1 CONDUCTOR LOSSES:-

    Conductor losses in monolithic transformers arise because of the finite conduc-

    tivity of the metal. At low frequencies, mainly dc resistance losses due to finite

    conductivity of the metal contribute to the conductor losses[14]. At high frequen-

    cies, eddy currents resulting in conductor skin and proximity effects also contributeto the conductor losses.

    METAL LOSSES:-

    The metal losses arise because of the finite resistivity of the windings. This loss

    can be modeled as series resistance as illustrated in Figure 2.3. The dc resistance is

    directly related to the resistivity of the windings and is given as

    R = ρL

    wt  (2.7.1)

    where R is the resistance of the winding of length L, width w, thickness t, and  ρ  is

    the resistivity of the winding.

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    Figure 2.3: Illustration of magnetic fields in a Transformer

    EDDY CURRENT LOSSES:-The time-varying currents of the primary and secondary windings give rise to

    time-varying magnetic fields. Because of the close proximity of the windings, these

    magnetic fields pass through the windings and generate eddy currents as shown in

    Figure 2.4. According to Faraday-Lenzs law, these eddy currents in turn produce

    magnetic fields which oppose the applied magnetic field [5]. This decreases the ef-

    fective magnetic field. These opposing magnetic fields are strong at the center of 

    the conductor at high frequencies and so the current density in the center of the

    conductor decreases. This results in non-uniform current distributions in the metalwindings, where most of the current flows at the surface of the conductor at high

    frequencies [6]. These effects are commonly called skin effect and proximity effect.

    The depth of current penetration in a conductor depends on the frequency and

    also on the properties of the conductive material, its conductivity  σ  or resistivity  ρ

    and its permeability  µ. The depth of penetration is defined as the depth at which

    the current density is attenuated by   1e

    [21]. The depth of penetration  δ , is:

    δ  =  1√ 

    πfσµ  (2.7.2)

    The proximity effect is another form of eddy currents, in which nearby conductive

    segments experiences induced eddy currents due to the magnetic field of a separate

    conductor. Proximity effect is considered as a important loss mechanism when the

    distance between adjacent conductive segments in a spiral inductor is made verysmall.

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    Figure 2.4: Induced Eddy currents in a Transformer

    2.7.2 SUBSTRATE LOSSES:-

    Substrate losses arise in monolithic transformers because of the finite conductivity

    of the silicon substrates. The substrate losses can be divided into two categories,

    namely the electric losses, which arise because of the electrically induced conduction

    currents, and the magnetically induced eddy current losses called the magnetic losses

    [5][7][17].

    2.8 CIRCUIT MODEL OF THE TRANSFORMER:-

    •   The transformer turns are modeled by ideal inductances   L p   and   Ls. Theinductances,  L p  and  Ls  are the sum of all self inductances  Li  and mutual in-

    ductances  M i,k  of primary conductors and respectively secondary conductors.

    L p =

    Li + 2

    M i,k   (2.8.1)

    Ls =

    Li + 2

    M i,k   (2.8.2)

    The primary and secondary inductances can be extracted by using the tool

    FASTHENRY and by the following equations:

    L p =  imgZ 11

    ω  (2.8.3)

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    Ls = imgZ 22

    ω  (2.8.4)

    Figure 2.5: Circuit diagram of Transformer by O.El.Gharniti[16]

    •  The ohmic losses in the conductors are represented by the series resistances

    R p  and  Rs.

    •   CL1, CL2,  C  pp, and  C ss  are used to model the parasitic capacitive couplingbetween different winding turns.   C  pp   and   C ss   can be determined using the

    following equations:

    C  pp  = W.l p.C m1m2   (2.8.5)

    C ss = W.ls.C m1m2   (2.8.6)

    C m1m2 is the capacitance per unit area between metal layers 1 and 2,  l p  and  ls

    are the lengths of primary and secondary turns, W is width of metal traces.

    •   C sub1   and  C sub2  are used to model the parasitic capacitive coupling into thesubstrate.

    C sub1 = C sub2 = 1

    2W.l p.C sub   (2.8.7)

    C sub3 = C sub4 = 1

    2W.ls.C sub   (2.8.8)

    C sub   is the substrate capacitance per unit area.

    •  In order to model the parasitic capacitive coupling into the oxide  C ox1 to C ox4

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    is used.

    C ox1 = C ox2 =  W.l p.C ox   (2.8.9)

    C ox3 = C ox4 = W.ls.C ox   (2.8.10)

    C ox   is the oxide capacitance per unit area.

    •  To model the substrate losses  Rsub1 and Rsub1 is used. To determine Rsub1 andRsub1  the formula presented in[7] is used:

    Rsub1 =  Rsub2 =  1

    πσsublln

    2Coth

    π

    8

    W  + 6H ox + T 

    H sub

      (2.8.11)

    W  p  is the width of the primary turns, T is the thickness of metal layer,  H sub

    is the thickness of the substrate. Similarly  Rsub3 and Rsub4 can be calculated.

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    Chapter 3

    QUALITY FACTOR

    ENHANCEMENT

    TECHNIQUES FOR INDUCTOR

    AND TRANSFORMER

    3.1 INTRODUCTION:-

    In this chapter we have presented two approaches for the quality factor en-

    hancement of Inductor and Transformer: (i) By fabricating the Inductor on a high

    resistive glass substrate or high resistive Si substrate and this is equivalent to elim-

    inate the substrate underneath the spiral (ii) By fabricating the Inductor farther

    away the silicon substrate and within this distance use air, high resistive silicon and

    silicon nitride as a cavity. The simulation results are obtained by using the tool

    ASITIC. Inductors are key devices in RF circuits that, when fabricated on tradi-

    tional semiconductor substrates like silicon, suffer from poor RF performances due

    to substrate related RF losses and capacitive parasitics due to inter-spiral tracks/-

    substrate coupling. Inductor and Transformer on a glass substrate results in a high

    quality factor(Q) as well as high self resonance frequency(SRF) which show a goodprospect in various RFIC’s applications.

    3.2 PARASITIC EFFECTS IN THE SUBSTRATES:-

    When an inductor is integrated on a Silicon based technology, some undesirable

    induced effects show up. The reason being that the metallic layers are separated

    from the semiconductor substrate by a layer of silicon oxide. These effects can be

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    classified in two types, magnetically induced and electrically induced.

    3.2.1 MAGNETICALLY INDUCED PARASITIC EFFECTS

    IN THE SUBSTRATE:-One of the fundamental properties of an inductor is that generates a magnetic

    field. This alternating field penetrates into the conductive substrate and induces

    a voltage difference, which in turn generates a current as shown in Figure 3.1[18].

    This phenomenon diminishes the energy in the coil, decreasing at the same time the

    quality of the inductor.

    Figure 3.1: Magnetically induced substrate losses in a Transformer

    3.2.2 ELECTRICALLY INDUCED PARASITIC EFFECTS

    IN THE SUBSTRATE:-

    Other parasitic effect that shows up in Silicon integrated inductors is the capacita-

    tive coupling between the inductor and the substrate. In addition, ohmic losses are

    produced since there are displacement currents induced in the substrate as shownin Figure 3.2[18].

    For substrates with lossless dielectrics, the higher the dielectric constant, the

    higher the electric field concentration; therefore higher the current density at the

    edges of the transmission line(each segment is treated as a Transmission line) and

    higher the attenuation of the signal[1]. On the other hand if the dielectric constant

    of the substrate is low, then capacitive parasitics will be reduced because

    C  =  Ad

      if     is lower then C will be reduced.

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    Figure 3.2: Electrically Induced losses in a Transformer

    3.3 QUALITY FACTOR:-

    Quality (Q) factor and self-resonant frequency (SRF) originate from resonant

    circuits. They are relevant to loop inductors as the inductors exhibit finite parasitic

    capacitances.

    It is defined as the ratio of the energy stored to the total dissipation per cycle for a

    sinusoidal excitation:

    Q = 2π  Energy stored

    Energy lost per cycle  (3.3.1)

    Q =  ω.  Energy stored

    Average power loss  (3.3.2)

    Q = −ImagY 11

    RealY 11(3.3.3)

    Ideally, the quality factor should be infinite for a lossless transformer/inductor.But due to losses in the monolithic transformer/inductor, the quality factor is finite

    and low. It also depends on the frequency of operation of the transformer/inductor.

    3.4 SELF RESONANCE FREQUENCY:-

    When the inductor starts behaving like a capacitor rather than as an inductor.

    The value of the frequency where this occurs is called Self Resonance Frequency(F sr)

    of the inductor. Transformer and inductor can not be used beyond this frequency.At

    self-resonance, the magnitude of the imaginary impedance is zero (the inductive and

    capacitive parts cancel), yielding a Q of zero

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    3.5 PROCESS PARAMETERS AND DIMENSIONS:-

    The key parameters for the design of Inductors and Transformers involve the

    outer dimensions or inner dimensions, width and spacing of metal tracks, number of 

    turns, thickness of the metal and the substrate material. The inductance as well as

    its quality factor can be fine tuned by the proper selection of the above parameters.

    Process related parameters are given in Table 3.1.

    Table 3.1: Process Parameters

    PROCESS PARAMETERS VALUE UNITSUBSTRATE RESISTIVITY(ρsub) 10 Ω− cm

    OXIDE RESISTIVITY(ρ) 10E 10 Ω− cmSUBSTRATE PERMITTIVITY() 11.7   F/m

    OXIDE PERMITTIVITY() 3.9   F/mMETAL (ALUMINIUM) SHEET RESISTANCE(Rsh) 30   mΩ/sq 

    METAL (COPPER) SHEET RESISTANCE(Rsh) 30   mΩ/sq DIMENSIONS:

    OXIDE THICKNESS 1   µmOXIDE THICKNESS WITHOUT CAVITY 6   µm

    SUBSTRATE THICKNESS 230   µm

    CAVITY(High Resistive Silicon,Air,Glass)DEPTH 5   µmMETAL THICKNESS(t) 1   µm

    INNER HOLE LENGTH(Lin) 40   µmNUMBER OF TURNS(N) 4WIDTH OF SPIRAL(w) variable   µm

    SPACING BETWEEN TURNS(s) variable   µmVIA LENGTH 0.5   µm

    3.6 Q-FACTOR ENHANCEMENT USING CAVITY:-

    In this technique improvement in Quality Factor is observed by fabricating the

    inductor farther away the Silicon substrate and then within this distance(between

    the substrate and inductor) use high resistive silicon, air and silicon nitride as a cav-

    ity or by increasing the thickness of the silicon dioxide. By using these techniques

    capacitive parasitics in the substrate will be reduced.

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    Figure 3.3: Cavity(Air)

    Figure 3.4: Cavity(Air)

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    Figure 3.5: Cavity(oxide)

    Figure 3.6: Cavity(Oxide)

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    Figure 3.7: Cavity(Silicon Nitride)

    Figure 3.8: No Cavity

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    3.7 Q-FACTOR ENHANCEMENT USING COPPER:-

    One another approach to improve the Q-factor of inductor and transformer is

    the use of Copper metal instead of conventional Aluminium metal. Through these

    Tables 3.2-3.5 we have presented a comparative analysis of Inductor, fabricated us-

    ing Aluminium as a metal and Copper as a metal. When Copper is used as a metal

    provide an overall higher   Qmax   than Aluminium metallization, due to a two fold

    lower metal resistivity and a higher aspect ratio of the conductor for a given metal

    pitch[3][4].

    Table 3.2: Aluminium with Cavity

    SR.NO.

    Width/Spacing QualityFactor(Qmax)

    Self ResonanceFrequency(F sr)GHZ

    Inductance(L)nH

    1 W=S=8 4.540 16GHZ 10.0402 W=S=12 4.110 14GHZ 8.1953 W=S=16 3.611 13GHZ 8.0274 W=S=20 3.356 12GHZ 8.7785 W=S=25 2.957 10GHZ 10.3586 W=S=30 2.733 10GHZ 86.907

    Table 3.3: Copper with Cavity

    SR.NO.

    Width/Spacing QualityFactor(Qmax)

    Self ResonanceFrequency(F sr)GHZ

    Inductance(L)nH

    1 W=S=8 6.185 16GHZ 9.6182 W=S=12 5.504 14GHZ 8.0173 W=S=16 5.044 13GHZ 7.8994 W=S=20 4.580 12GHZ 8.6885 W=S=25 3.663 10GHZ 10.2196 W=S=30 2.763 10GHZ 91.789

    Table 3.4: Copper without Cavity

    SR.NO.

    Width/Spacing QualityFactor(Qmax)

    Self ResonanceFrequency(F sr)GHZ

    Inductance(L)nH

    1 W=S=8 6.519 11GHZ 12.9032 W=S=12 6.161 10GHZ 10.0793 W=S=16 6.000 9GHZ 9.1894 W=S=20 5.782 8GHZ 9.1385 W=S=25 4.800 7GHZ 10.157

    6 W=S=30 3.585 6GHZ 11.492

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    Table 3.5: Aluminium without Cavity

    SR.NO.

    Width/Spacing QualityFactor(Qmax)

    Self ResonanceFrequency(F sr)GHZ

    Inductance(L)nH

    1 W=S=8 4.642 11GHZ 13.5052 W=S=12 4.414 10GHZ 10.471

    3 W=S=16 3.853 9GHZ 9.4374 W=S=20 3.934 8GHZ 9.3585 W=S=25 3.610 7GHZ 10.1226 W=S=30 2.943 6GHZ 11.596

    3.8 Q-FACTOR ENHANCEMENT USING HIGH

    RESISTIVE SUBSTRATES:-

    Many techniques have been used to improve the Q-factor of inductors by reduc-

    ing substrate loss, especially capacitive loss. In these techniques use high resistivity

    silicon substrates, or glass or quartz to enhance the Q factor of inductor. High sub-

    strate resistivities result high Q values, whereas Q degrades quickly when resistivity

    decreases between 10 and 0.1 Ω cm, to reach values close to zero. This degradation

    is due to the energy dissipation into the substrate which can be explained by ana-

    lyzing both electric E and magnetic H fields in the substrate. These fields induce

    leakage(E) and eddy(H) currents into the substrate which densities depend on the

    resistivity. The layout of Inductor and transformer over the substrate is shown in

    Figure 3.9.

    Figure 3.9: Layout of Inductor and Transformer in ADS

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    Figure 3.10: High Resistive Si Substrate

    Figure 3.11: Inductor on Glass

    Figure 3.12: Transformer on Glass

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    3.9 LAYOUT OF INDUCTOR:-

    A typical spiral inductor surrounded with ground is shown in Figure 3.11. Quali-

    tatively, the spiral inductor consists of a number of series-connected metal segments.

    In each segment, time varying conductive current will flow due to a time-varyingvoltage impressed on the segment. Spiral inductor generally makes use of one or

    more metal layers. In the most conventional design, the spiral is build with several

    turns in the one of the metal layers and the end of the inductor connects to the out

    of the inductor with other layer.

    Figure 3.13: Layout of Inductor

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    3.10 LAYOUT OF TRANSFORMER:-

    In this structure, two parallel coils on the same metal layer are symmetrically

    interwound side by side[11][16]. Lower metal layer conductors are used to connect

    the inner terminals to other circuitry. Layout of Transformer surrounded by ground

    is shown in Figure 3.14.

    Figure 3.14: Layout of Transformer

    3.11 EXPERIMENTAL RESULTS:-

    These simulation results are obtained by using the tool ASITIC(Analysis and

    simulation of Inductors and Transformers in Integrated Circuits). Through ASITIC

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    we can model the electrical and magnetic behavior of passive metal structures re-

    siding above a lossy conductive substrate. In all these plots the Q-factor initially

    rises with frequency as the reactive component of the impedance increases, peaks,

    and then decreases due to the increasing energy dissipation at higher frequencies.

    The estimated quality factor for inductor and transformer, when fabricated on High

    resistive glass substrates is shown in Figure 3.9 and Figure 3.10. Inductors made on

    a glass substrate have shown a Q of 14.75 at 14 GHz with an inductance of 1.974

    nH and Transformers made on a glass substrate have shown a Q of 13.89 at 11 GHz

    with an inductance of 2.957 nH.

    The thickness of the oxide layer is an important parameter which influences the

    inductor/transformer performance. The measured effect of changes in the oxide

    thickness upon the component factor is illustrated in Figure 3.5 and Figure 3.6. A

    thicker oxide layer reduces the parasitic capacitance of the structure, which improvesthe inductor self-resonant frequency.

    A spiral inductor suspended approximately 5µm   above the silicon substrate is

    found to reduce the effect of substrate proximity on the performance of inductor.

    Figure 3.4 and Figure 3.5 presents the effect of air cavity on the quality factor of the

    inductor. Similarly the plot of the Q factor and inductance, when Silicon nitride is

    used as a cavity is shown in Figure 3.7. The inductors with cavity have higher Q

    and self-resonance frequency than one without any cavity as shown in Figure 3.8.

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    Chapter 4

    VERIFICATION OF SELF AND

    MUTUAL INDUCTANCE

    THROUGH FASTHENRY

    4.1 PARTIAL INDUCTANCE APPROACH:-

    There are several approaches for inductance calculation. Traditionally, the con-

    cept of partial inductance is used. Partial inductances are useful when the induced

    current return paths are unknown. In the partial inductance approach, the signal

    lines, ground and supply lines are treated equivalently, resulting in a large, densely

    coupled network representation[9]. When a multi conductor problem is described

    by a set of partial inductances, the sum of the partial self and partial mutual in-

    ductances along any closed loop path will yield the total loop inductance of the

    path. The most accurate way of extracting inductance is to divide the structure

    into smaller regions and numerically solve the magnetic field within each region to

    find the magnetic flux.

    4.2 FASTHENRY:-

    FASTHENRY was developed for the solution of Maxwell equations and ex-

    traction of inductances and resistances. FASTHENRY is a software for computing

    the frequency-dependent self and mutual inductances and resistances of a generic

    tridimensional conductive structure, in the magnetoquasistatic approximation[10]

    as explained later.

    FASTHENRY specifies every conductor as a sequence of rectilinear segmentsconnected between nodes. Every segment has a finite conductivity and the shape of 

    a parallelepiped, whose height and width can be assigned. A node is a point in the

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    3D space. The section of a segment can be divided, if required, into an arbitrary

    number of parallel filaments, the whole of which constitutes the segment itself; it is

    then assumed that every filament carries a uniform current.

    In this way is possible to model the high-frequency effects on the segments. In

    fact, when the frequency increases, the current is no longer uniformly distributed

    along the cross section of a conductor. However, in limited regions of the section,

    the current can be reasonably approximated as uniform. Therefore, being able to

    specify an arbitrary discretization of the volume of the conductors, the accuracy of 

    the results is affected accordingly and in general is better as the discretization is re-

    fined.The results are provided in form of a Maxwell impedance matrix  Z  = R + jL,

    where R is the resistance and L is the inductance[19].

    4.3 VERIFICATION OF PARTIAL INDUCTANCE

    APPROACH ON MEANDER:-

    Meander structure is composed of horizontal and vertical conductive segments.

    We decomposed the meander structure and consider only the vertical conductive

    segments surrounded by ground on both the sides and then compute the self and

    mutual inductance. Previous work done by people consider the effect of one side

    ground only but in our case we are considering the effect of both sides ground.

    Initially we are considering that the length of the horizontal conductive segment is

    negligibly small compared to that of ground. The total self inductance is equal to

    the sum of self inductance of all horizontal and vertical conductive segments. The

    simple layout of meander structure is shown in Figure 4.1.

    Figure 4.1: Layout of Meander structure surrounded with Ground

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    Ground Signal and Ground Signal Ground structure on FASTHENRY:-

    Figure 4.2: Ground Signal Ground structure

    In this section we analyze the performance of ground signal and ground signal

    ground structure. By varying the spacing between the signal and ground variation

    in the value of inductance is observed. As we increase the spacing between signal

    and ground the inductance is going to increase. The parameters of a Ground signal

    Ground structure are shown in Table 4.1. In case of ground signal ground struc-

    ture(GSG)(Figure 4.2), two cases are there:

    Table 4.1: Parameters of Ground Signal Ground structure

    Sr.No.

    Parameter Description

    1   wg   Width of the ground segment2   ws   Width of the signal conductor3   dg   Distance from the center of the ground

    segment to edge of the signal segment4   lw   Length of the signal conductor5   ds   Spacing between the two signal conduc-

    tors

    •   In first case the spacing between signal and ground is same on both the sidesi.e.   Symmetric structure.

    •  On the other hand in second case the spacing between signal and ground isnot same on both the sides i.e.   Asymmetric structure.

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    Figure 4.3: Ground Signal Structure

    Figure 4.4: Plot of self inductance by varying the  dg

    Figure 4.5: Plot of self inductance by Varying the length  lw  of the conductor

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    Figure 4.6: Ground Signal Ground- Symmetric Structure

    Figure 4.7: Ground Signal Ground- Asymmetric Structure

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    4.4 CIRCUIT DIAGRAM OF MEANDER ON

    SILICON SUBSTRATE:-

    •   Rsm  is the series resistance, which models skin effect and ohmic losses.

    Rsm =   ρ.lw.δ.(1 − e−tδ  )

    (4.4.1)

    where parameter t represent conductor thickness and  δ   is the skin depth.

    •   Lsm   is the series self Inductance, consists of positive mutual inductance andnegative mutual inductance.

    •   C ox  represents the capacitance between the meander arm and the substrate.

    Figure 4.8: Circuit diagram of meander

    Figure 4.9: Meander structure on Silicon substrate

    C ox

     =  ltotal.w.ox

    2.tox(4.4.2)

    where tox is the oxide thickness, ltotal  is the total inductor length and ox  is the

    permittivity of the oxide.

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    •   R p   and   C  p   are the coupling resistance and capacitance associated with Sisubstrate.

    C  p  =  ltotal.w.si

    2.tsi(4.4.3)

    R p  = 2.ρsi.tsi

    ltotal.w

      (4.4.4)

    where si is the permittivity of the silicon, ρsi and  ρ resistance of the conductor

    line and silicon substrate.

    4.5 MODELING OF INDUCTANCE:-

    Ampere’s law:

    ∇×   B  = µ  J  + ∂  E 

    ∂t   (4.5.1)

    where   µ   is the magnetic permeability and     is the electric permittivity of the

    material. The first term on the right-hand side represents a magnetic field gen-

    erated from a wire carrying an electric current. The second term corresponds to

    the magnetic field generated from the displacement current, which represents the ac

    current flowing between two conductors due to their capacitive coupling as shown

    in Figure 4.9. In integrated circuits, the second term is usually neglected because

    the current flowing in the conductor is much larger than the displacement current.

    This assumption is called the magnetoquasistatic[10] approximation.

    Figure 4.10: Return current through Capacitors

    now by using this assumption the integral’s form of Ampere’s law is:

        B.  dl =  µ0I    (4.5.2)Faraday’s law:  According to faraday, a steady magnetic field produces no cur-

    rent flow, but a time varying field produces an induced voltage in a closed circuit,

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    which causes a flow of current.

    ∇×   E  = −∂  B

    ∂t  (4.5.3)

    The integral form of Faraday’s law is:

        E.  dl = −∂ 

     s

     B.  ds

    ∂t  (4.5.4)

    With the help of both the two Equations 4.5.2 and 4.5.4, We can characterize the

    interaction between electric field and magnetic field and derive the expression for

    inductance. Inductance is a property of the physical layout of a conductor and is a

    measure of the ability of a conductor configuration to link magnetic flux. The flux

    linkage is the total magnetic field enclosed by a closed circuit. The inductance of acurrent-carrying loop is defined as the ratio of the total magnetic flux penetrating

    the surface of the loop and the current of the loop that produced it:

    Lij  = ψij

    I   =

     s

     B.  ds

    I   (4.5.5)

    Figure 4.11: Two magnetically coupled loops

    For two current loops in Figure 4.10, the magnetic flux produced by current  I 1

    is linked inside the area  S 2  which is enclosed by C 2. The flux linkage enclosed in  C 2

    is the following:

    ψ12 =

     s

    B1.ds   (4.5.6)

    If the C 1 consists of multiple turns  N 1, the total flux produced is N 1 times larger,

    Λ12  =  N 1ψ12. When two current carrying conductors are in proximity, their mag-

    netic flux lines interact with each other. If the currents flow in same directions,

    inductance of each conductor is increased. Currents flowing in the opposite direc-

    tion decrease each conductors inductance. The change in an isolated conductors

    inductance when in proximity to another conductor is known as their mutual induc-

    tance. The mutual inductance  M 12, between two loops is defined as the following:

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    M 12 = N 1N 2

    I 1(4.5.7)

    The self inductance,  L11, is defined from the magnetic flux produced by  I 1   en-

    closed by the contour  C 1  as the following:

    L11 = Λ11

    I 1(4.5.8)

    Figure 4.12: Circular conductor with radius b

     Bin = âφµ0r1I i2πb2

      , r1 ≤ b   (4.5.9)

     Bout = âφµ0I i2πr2

    , r2 ≥ b   (4.5.10)

    where    Bin   is the magnetic field density vector inside the conductor and    Bout   is the

    vector outside the conductor. The current in a unit length of this annular ring[Figure

    4.11] is linked by the flux that can be obtained by integrating Equation 4.5.5, through

    this we are able to derive the formula of the internal inductance per unit length.

    dφin =

       br

    Bindr =  µ0I i4πb2

    (b2 − r2) (4.5.11)

    d∧in = 2rdr

    b2  dφ (4.5.12)

    ∧in =   b0

    d∧in   (4.5.13)

    in =    b

    0

    2rdr

    b2

    µ0I i

    4πb2

    (b2

    −r2)dr   (4.5.14)

    ∧in =  2

    b2

    µ0I i4πb2

       b0

    [rb2 − r3]dr   (4.5.15)

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    =  µ0I i2πb4

    b2r2

    2  −  r

    4

    4

    b0

    (4.5.16)

    =  µ0I i2πb4

    b4

    4

      (4.5.17)

    Lin = ∧in

    I i=

      µ08π

      (4.5.18)

    Total Inductance per unit length of two wire system:

    Lin = ∧in

    I i=

      µ04π

      (4.5.19)

    4.6 SELF INDUCTANCE:-

    The total magnetic flux generated by a current can be partitioned into the por-

    tion lying outside the conductor plus the flux that lies inside the conductor. The

    storage of energy associated with the internal flux leads to internal inductance and

    that associated with the external flux is represented by external inductance[8].

    Now compute the self inductance when there is only one signal conductor sur-

    rounded by ground on both the sides as shown in Figure 4.12. Considering that the

    distance between the signal and ground is equal on both the sides.

    Total self inductance(Lself ) = lw   (Lint  +  Lext)

    Lint  =µ08π

    (1 + 0.5) = 1.5µ08π

    Due to ground:

    Bg  = 0.5µ0I i2

    πx

    Due to signal:

    Bsi =  µ0I i

    2π[rg + dg + rs − x]

    Lext  = ψx

    I i

    ψx  =

     rg+dg

    rg(BG + Bsi)dx

    ψxI i

    =

     rg+dg

    rg

    0.5µ02πx

      +  µ0

    2π[rg + dg + rs − x]

    dx

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    Figure 4.13: GSG: Symmetric

    =  µ02π

     rg+dg

    rg

    0.5

    x  +

      1

    [rg +  dg + rs − x]

    dx

    =  µ02π

      ln x0.5

    rg + dg + rs − x

    rg+dgrg

    =

      µ0

    2π ln  (rg + dg)0.5

    rs − ln  (rg)

    0.5

    rs + dg

    =  µ02π

    ln  (rg + dg)

    0.5.(rs + dg)

    rs.r0.5g

    Effect of Ground  G2:-

    Bsi =  µ0I i

    2π[0.5wg + dg + ws + dg1 − x]

    ψxI i

    =

     dg1+0.5ws

    dg1

    0.5µ02πx

      +  µ0

    2π[0.5wg + dg + ws + dg1 − x]

    dx

    =  µ02π

      ln x0.5

    0.5wg + dg + ws + dg1 − x

    dg1+0.5wsdg1

    =   µ0

    ln  (dg1 + 0.5ws)0.5.(0.5wg + dg + 0.5ws)

    (0.5wg + dg + ws)d0.5g1

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    Lself 1   =   lwµ02π

    15

    40

    +ln  (rg + dg)

    0.5.(rs + dg)

    rs.r0.5g

    − ln  (dg1 + 0.5ws)0.5.(0.5wg +  dg + 0.5ws)

    (0.5wg + dg + ws)d0.5g1

      (4.6.1)

    Similarly the effect of ground  G1  can be calculated but as the distance is equal on

    both the sides, the expression will be identical.

    Self InductanceLself 1  =  G1S 1   - Effect of ground(G2)

    Total Self Inductance = 2.Lself 1

    Compute the self inductance for Asymmetric structure, When the distance between

    the signal and the ground is not equal on both the sides as shown in Figure 4.13.

    Lint  =  µ08π

    (1 + 0.5) = 1.5µ08π

    Self Inductance due to GroundG1:-

    Lext  ==   µ02π

    ln  (rg + dg)0.5

    .(rs + dg)rs.r0.5g

    Self inductance due to GroundG2:-

    Bsi =  µ0I i

    2π[rg + dg1 + rs − x]

    ψxI i = rg+dg1rg

    0.5µ02πx   +

      µ02π[rg + dg1 + rs − x]

    dx

    =  µ02π

    ln  (rg + dg1)

    0.5.(rs + dg1)

    rs.r0.5g

    Self Inductance due to the effect of Ground  G2  on Ground  G1:-

    Bsi =

      µ0I i

    2π[0.5wg + dg1 + ws + dg2 − x]

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    Figure 4.14: GSG: Asymmetric

    ψxI i

    =

     dg2+0.5ws

    dg2

    0.5µ02πx

      +  µ0

    2π[0.5wg + dg1 + ws + dg2 − x]

    dx

    =  µ02π

      ln x0.5

    0.5wg + dg1 + ws + dg2 − x

    dg2+0.5wsdg2

    =  µ02π

    ln  (dg2 + 0.5ws)

    0.5.(0.5wg + dg1 + ws)

    (0.5wg + dg1 + 0.5ws)d0.5g2

    Self Inductance due to the effect of Ground  G1  on Ground  G2:-

    Bsi =  µ0I i

    2π[0.5wg + dg + ws + dg3 − x]

    ψxI i

    =

     dg3+0.5ws

    dg3

    0.5µ02πx

      +  µ0

    2π[0.5wg + dg + ws + dg3 − x]

    dx

    =  µ02π

      ln x0.5

    0.5wg + dg + ws + dg3 − xdg3+0.5ws

    dg3

    =  µ02π

    ln  (dg3 + 0.5ws)

    0.5.(0.5wg + dg + ws)

    (0.5wg + dg + 0.5ws)d0.5g3

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    Figure 4.15: Coupling inductance

    Lself 1   =   lwµ02π

    15

    40

    +

    ln  (rg +  dg)0.5.(rs + dg)

    rs.r0.5g

    +ln  (rg +  dg1)

    0.5.(rs + dg1)

    rs.r0.5g

    − ln  (dg2 + 0.5ws)0.5.(0.5wg + dg1 + ws)

    (0.5wg + dg1 + 0.5ws)d0.5g2

    − ln  (dg3 + 0.5ws)0.5.(0.5wg + dg + ws)

    (0.5wg + dg + 0.5ws)d0.5g3

      (4.6.2)

    4.7 MUTUAL INDUCTANCE:-The coupling inductance Lij  is proportional to the overlapping area of  S i  and S  j .

    If there are two signal conductors as shown in Figure 4.14 then:

    Due to ground:

    Bg  = µ0I i2πx

    Due to signal:

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    Bsi =  µ0I i

    2π[0.5wg + dg + ds + 1.5ws − x]

    ψx  = 1

    l  SlapBdsoverlap

    ψ

    x  = 0.5wg+dg+ws0.5wg (BG + Bsi)dx

    ψxI i

    =

     0.5wg+dg+ws

    0.5wg

      µ02πx

     +  µ0

    2π[0.5wg + dg + ds + 1.5ws − x]

    dx

    =  µ02π

     0.5wg+dg+ws

    0.5wg

    1

    x +

      1

    [0.5wg + dg + ds + 1.5ws − x]

    dx

    =  µ02π

      ln x

    0.5wg + dg + ds + 1.5ws−

    x

    0.5wg+dg+ws0.5wg

    =  µ02π

    ln(0.5wg + dg + ws)

    (ds + 0.5ws)  −   ln(0.5wg)

    (dg + ds + 1.5ws)

    =  µ02π

    ln(0.5wg + dg + ws)(dg + ds + 1.5ws)

    (ds + 0.5ws)0.5wg

    Total Mutual Inductance (M 12)=l  (L

    int  +  L

    ext)

    (M 12) =lµ02π

    1

    4 +

     ln(0.5wg + dg + ws)(dg + ds + 1.5ws)

    (ds + 0.5ws)0.5wg

    If there are three signal conductors then:

    Total Mutual Inductance = (M 12) + (M 23) + (M 13)

    Due to signal:

    Bsi =  µ0I i

    2π[0.5wg + dg + 2ds + 2.5ws − x]

    (M 13) = 0.5wg+dg+ws

    0.5wg

      µ02πx

     +  µ0

    2π[0.5wg + dg + 2ds + 2.5ws − x]

    dx

    =   µ0

     0.5wg+dg+ws

    0.5wg

    1x

     +   1[0.5wg + dg + 2ds + 2.5ws − x]

    dx

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    =  µ02π

      ln x

    0.5wg + dg + 2ds + 2.5ws − x

    0.5wg+dg+ws0.5wg

    =  µ0

    2π ln(0.5wg + dg + ws)

    (2ds + 1.5ws)   −  ln(0.5wg)

    (dg + 2ds + 2.5ws)

    =  µ02π

    ln(0.5wg + dg + ws)(dg + 2ds + 2.5ws)

    (2ds + 1.5ws)0.5wg

    Due to signal:

    Bsi =   µ0I i2π[0.5wg + dg + 2ds + 2.5ws − x]

    (M 23) =

     0.5wg+dg+2ws+ds

    0.5wg

      µ02πx

     +  µ0

    2π[0.5wg + dg + 2ds + 2.5ws − x]

    dx

    =  µ02π

     0.5wg+dg+2ws+ds

    0.5wg

    1

    x +

      1

    [0.5wg + dg + 2ds + 2.5ws − x]

    dx

    =  µ0

      ln x

    0.5wg + dg + 2ds + 2.5ws − x0.5wg+dg+2ws+ds

    0.5wg

    =  µ02π

    ln(0.5wg + dg + 2ws + ds)

    (ds + 0.5ws)  −   ln(0.5wg)

    (dg + 2ds + 2.5ws)

    =  µ02π

    ln(0.5wg + dg + 2ws + ds)(dg + 2ds + 2.5ws)

    (ds + 0.5ws)0.5wg

    Total Mutual Inductance  M =l  (Lint  + L

    ext)

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    M    =  lµ0

    1

    4

    +ln(0.5wg + dg + ws)(dg + ds + 1.5ws)

    (ds + 0.5ws)0.5wg

    +ln(0.5wg + dg + 2ws + ds)(dg + 2ds + 2.5ws)

    (ds + 0.5ws)0.5wg

    +ln(0.5wg + dg + ws)(dg + 2ds + 2.5ws)

    (2ds + 1.5ws)0.5wg

      (4.7.1)

    4.8 EXPERIMENTAL RESULTS:-

    When line spacing decreases, it is observed that the inductance of the mean-

    der coil decreases. This is because meander coil has negative mutual inductance as

    shown in Figure 4.3. The plot for symmetric structure and asymmetric structure

    is shown in Figure 4.6 and Figure 4.7. A comparison is made between derived and

    FASTHENRY for self inductance variation with increasing distance of ground plane

    dg, as shown in Figure 4.4. Initially the error is very small but as the distance

    increases error increases linearly.

    The plot for self inductance calculated from FASTHENRY as well as analytically

    by varying the length of the conductor and keeping the distance between ground

    and signal fixed is shown in Figure 4.5.

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    n7 x=-2 y=2

    n8 x=-2 y=-2

    n9 x=2 y=-2

    n10 x=2 y=3

    n11 x=-3 y=3

    n12 x=-3 y=-3

    n13 x=3 y=-3

    n14 x=3 y=4

    n15 x=-4 y=4

    n16 x=-4 y=-4

    n17 x=4 y=-4

    *Segment Declaration

    e1 n1 n2 w=0.1 h=0.1

    e2 n2 n3 w=0.1 h=0.1

    e3 n3 n4 w=0.1 h=0.1

    e4 n4 n5 w=0.1 h=0.1

    e5 n5 n6 w=0.1 h=0.1

    e6 n6 n7 w=0.1 h=0.1

    e7 n7 n8 w=0.1 h=0.1

    e8 n8 n9 w=0.1 h=0.1e9 n9 n10 w=0.1 h=0.1

    e10 n10 n11 w=0.1 h=0.1

    e11 n11 n12 w=0.1 h=0.1

    e12 n12 n13 w=0.1 h=0.1

    e13 n13 n14 w=0.1 h=0.1

    e14 n14 n15 w=0.1 h=0.1

    e15 n15 n16 w=0.1 h=0.1

    e16 n16 n17 w=0.1 h=0.1

    .external n1 n17

    *Frequency Range

    .freq fmin=1e9 fmax=1e10

    *Programme end

    .end

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    Appendix B

    FASTHENRY CODING OF

    TRANSFORMER:-

    * Transformer

    Figure B.1: Screen shot of TRANSFORMER

    .units um

    .default z=0 sigma=5.8e-7

    *Nodes Declarationn1 x=40 y=0

    n2 x=40 y=40

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    n3 x=0 y=40

    n4 x=0 y=-40

    n5 x=80 y=-40

    n6 x=80 y=80

    n7 x=-40 y=80

    n8 x=-40 y=-80

    n9 x=120 y=-80

    n10 x=120 y=120

    n11 x=-80 y=120

    n12 x=-80 y=-120

    n13 x=160 y=-120

    n14 x=160 y=160

    n15 x=-120 y=160

    n16 x=-120 y=-160n17 x=200 y=-160

    n18 x=20 y=20

    n19 x=20 y=-20

    n20 x=60 y=-20

    n21 x=60 y=60

    n22 x=-20 y=60

    n23 x=-20 y=-60n24 x=100 y=-60

    n25 x=100 y=100

    n26 x=-60 y=100

    n27 x=-60 y=-100

    n28 x=140 y=-100

    n29 x=140 y=140

    n30 x=-100 y=140

    n31 x=-100 y=-140

    n32 x=180 y=-140

    n33 x=180 y=180

    n34 x=-140 y=180

    *Segment Declaration

    e1 n1 n2 w=10 h=1

    e2 n2 n3 w=10 h=1

    e3 n3 n4 w=10 h=1

    e4 n4 n5 w=10 h=1

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    e5 n5 n6 w=10 h=1

    e6 n6 n7 w=10 h=1

    e7 n7 n8 w=10 h=1

    e8 n8 n9 w=10 h=1

    e9 n9 n10 w=10 h=1

    e10 n10 n11 w=10 h=1

    e11 n11 n12 w=10 h=1

    e12 n12 n13 w=10 h=1

    e13 n13 n14 w=10 h=1

    e14 n14 n15 w=10 h=1

    e15 n15 n16 w=10 h=1

    e16 n16 n17 w=10 h=1

    e17 n18 n19 w=10 h=1e18 n19 n20 w=10 h=1

    e19 n20 n21 w=10 h=1

    e20 n21 n22 w=10 h=1

    e21 n22 n23 w=10 h=1

    e22 n23 n24 w=10 h=1

    e23 n24 n25 w=10 h=1

    e24 n25 n26 w=10 h=1

    e25 n26 n27 w=10 h=1e26 n27 n28 w=10 h=1

    e27 n28 n29 w=10 h=1

    e28 n29 n30 w=10 h=1

    e29 n30 n31 w=10 h=1

    e30 n31 n32 w=10 h=1

    e31 n32 n33 w=10 h=1

    e32 n33 n34 w=10 h=1

    g1 x1=220 y1=180 z1=0

    + x2=220 y2=-170 z2=0

    + x3=205 y3=-170 z3=0

    +thick=2

    +seg1=20 seg2=20

    +nin1 (213,-170,0)

    +nout1 (213,180,0)

    g2 x1=-150 y1=205 z1=0

    + x2=-150 y2=190 z2=0

    49

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    + x3=210 y3=190 z3=0

    +thick=2

    +seg1=20 seg2=20

    +nin2 (30,205,0)

    +nout2 (30,190,0)

    g3 x1=-145 y1=199 z1=0

    + x2=-160 y2=199 z2=0

    + x3=-160 y3=-170 z3=0

    +thick=2

    +seg1=20 seg2=20

    +nin3 (-152.5,199,0)

    +nout3 (-152.5,-170,0)

    g4 x1=-155 y1=-170 z1=0

    + x2=-155 y2=-185 z2=0

    + x3=213 y3=-185 z3=0

    +thick=2

    +seg1=20 seg2=20

    +nin4 (29,-170,0)

    +nout4 (29,-185,0)

    .equiv n1 nin1 nin2

    .equiv n2 nin2 nin1

    .external n1 n17

    *Frequency range

    .freq fmin=1e9 fmax=1e10

    .end

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    Appendix C

    DIMENSIONS OF INDUCTOR

    LAYOUT:-

    30µm

    30µm

    30µm

    50µm

    50µm

    50µm

    50µm

    50µm

    50µm

    30µm30µm

    30µm30µm

    30µm30µm

    40µm

    335µm

    30µm

    30µm

    30µm

    20µm

    970µm

    100µm

    100µm

    1170µm

    100µm   100µm

    1170µm

    50µm

    970µm

    51

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