paging and segmentation

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Paging and Segmentation

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Page 1: Paging and Segmentation

Paging and Segmentation

Page 2: Paging and Segmentation

Logical vs. Physical Address Space• Logical address – generated by the CPU; also referred to as

virtual address.

• Physical address – address seen by the memory unit

• Logical and physical addresses are the same in compile-time and load-time; logical (virtual) and physical addresses differ in execution-time.

• The user program deals with logical addresses; it never sees the real physical addresses.

Page 3: Paging and Segmentation

Paging• Memory-management technique that permits the physical

address space of a process to be non-contiguous.

• Each process is divided into a number of small, fixed-size partitions called pages or Divide logical memory into blocks of same size called pages.

• Physical memory is divided into a large number of small, fixed-size partitions called frames.

• When a process is to be executed, its pages are loaded into any available memory frames.

• Some internal fragmentation , but no external fragmentation.

Page 4: Paging and Segmentation

Address Translation Scheme• Operating system maintains a

page table for each process– Contains the frame number for

each process page– To translate logical to physical

addresses

• A logical address is divided into:– Page number (p) – used as an

index into a page table which contains base address of each page in physical memory.

– Page offset (d) – combined with base address to define the physical memory address that is sent to the memory.

Page 5: Paging and Segmentation

• Paging Model of memory is shown:

• To run a program of size n pages, need to find n free frames and load program.

• Set up a page table to translate logical to physical addresses

Page 6: Paging and Segmentation

Address translation in paging

Page 7: Paging and Segmentation

• The following steps are needed for address Translation:

• Given a (page #, offset), find (frame #, offset).

• Assuming the size of a page/frame is 2m bytes , m bits to determine the offset within a page

• 2n > number of pages in process => n bits to hold the page number

• 2k > number of frames in memory => k bits to hold the frame number

• Logical address is nm• Physical address is simply km where k is the frame that stores

page “n”

Page 8: Paging and Segmentation

Paging Example

Page 9: Paging and Segmentation

Paging Example• Page size 4 bytes.

• Physical memory 32bytes.

• Logical address 0 maps to physical address 20 (=(5*4)+0).

• Logical address 3 maps to physical address 23 (=(5*4)+3).

• Page1 is mapped to frame6.It maps to physical address 24(=(6*4)+0)

• Logical address 13 maps to physical address 9.

Page 10: Paging and Segmentation

Page Table Implementation• Implemented as a set of registers.(if Page table is less).– Problem: If page table is large, it is not applicable.

• Page table kept in main memory. PTBR register points to the Page table. Page-table length register (PRLR) indicates size of the page table.– Problem: In this scheme every data/instruction access

requires two memory accesses. One for the page table and one for the data/instruction.

• Using Translation look aside buffer or associative registers.– Very fast, very expensive.

Page 11: Paging and Segmentation

Memory Protection• Memory protection implemented by associating protection bit

with each frame.

• Valid-invalid bit attached to each entry in the page table:– “valid” indicates that the associated page is in the process’

logical address space, and is thus a legal page– “invalid” indicates that the page is not in the process’ logical

address space

Page 12: Paging and Segmentation

Shared Pages• Shared code

– One copy of read-only (reentrant) code shared among processes (i.e., text editors, compilers, window systems).

– Shared code must appear in same location in the logical address space of all processes

• Private code and data – Each process keeps a separate copy of the code and data– The pages for the private code and data can appear anywhere in the logical address space

Page 13: Paging and Segmentation

Two-Level Page Table• A logical address (on 32-bit machine with 4K page size) is

divided into:– a page offset consisting of 12 bits.– a page number consisting of 20 bits; further divided into:

• a 10-bit level-2 page number.• a 10-bit level-1 page number.

• Thus, a logical address look likes– p1 is an index into the outer page table– p2 is the displacement within the page of the outer page

table

• Address translation scheme

Page 14: Paging and Segmentation

Advantages• Easy to allocate memory — keep a list of available frames,

and simple grab first one that’s free.

• Easy to swap — pages, frames, and often disk blocks as well, all are same size.

• No external fragmentation• Any page can be placed in any frame in physical memory

• Sharing of the common code is possible.

Page 15: Paging and Segmentation

Disadvantages• Internal fragmentation: Page size may not match size needed

by process– Wasted memory grows with larger pages

• Page tables are fairly large , so page tables are too big to fit in registers, so they must live in physical Memory.

• This table lookup adds an extra memory reference for every address translation.

Page 16: Paging and Segmentation

Segmentation• A segment can be defined as a logical grouping of instructions,

such as a subroutine, array, or a data area.

• A program is a collection of segments.

• Segmentation is t technique for managing these segments.

• Divide a process into unequal size blocks called segments.

• Each segment has a name and a length.

• Memory Management Scheme that supports user view of memory.

Page 17: Paging and Segmentation

• A segment is a logical unit such as–main program, procedure, function– local variables, global variables, common block– stack, symbol table, arrays

• Protect each entity independently• Allow each segment to grow independently• Share each segment independently

• Each of these segments are of variable length and length will be defined in the program.

Page 18: Paging and Segmentation

Segmentation Architecture• Segment Table– Maps two-dimensional user-defined addresses into one-

dimensional physical addresses. Each table entry has• Base - contains the starting physical address where the

segments reside in memory.• Limit - specifies the length of the segment.

• A logical address consists of two parts.– A segment number, s, and an offset, d.• Segment number used as index into the segment table.• The offset d is between 0 and the segment limit.• The offset is added to the base to produce the physical

address.

Page 19: Paging and Segmentation

• If the offset is not within the limit, trap to the operating system.(logical address beyond end of segment).

• Segmentation Example:

Page 20: Paging and Segmentation

Address Translation

Page 21: Paging and Segmentation

Sharing of Segments• Segments are shared when entries in the segment tables of

two different processes point to the same physical locations.

• It is possible to share only the parts of the programs.

• Subroutine packages are sharedamong many users.

Page 22: Paging and Segmentation

Advantages and Disadvantages• Advantages:

– Each segment can be• located independently• separately protected• grow independently

– Segments can be shared between processes.– Eliminate the fragmentation.

• Disadvantages: – Allocation algorithms as for memory partitions– External fragmentation, back to compaction problem.

• Solution: combine segmentation and paging.

Page 23: Paging and Segmentation

Segmentation vs. Paging• Segment is good logical unit of information– sharing, protection

• Segmentation– Break process up into logical segments

• Segments are generally of different sizes

• Page is good physical unit of information– simple memory management

• Paging– Break process up into physical pages– Pages are the same size

Page 24: Paging and Segmentation

Paging Segmentation

The main memory partitioned into frames or blocks.

The main memory partitioned into segments.

The logical address space divided into pages by compiler or MMU

The logical address space divided into segment specified by the programmer.

Suffers from internal fragmentation or page break

Suffers from external fragmentation.

Operating system maintains the page table.

Operating system maintains the segment table.

Does not supports the user view of memory

Supports the user view of memory

Processor uses the page number and displacement to calculate absolute address.

Processor uses the segment number and displacement to calculate absolute address.

Multilevel paging is possible Multilevel segmentation is possible. But no use.

Page 25: Paging and Segmentation
Page 26: Paging and Segmentation

• Similarity:– Address space can exceed size of real memory.

• Differences:– Programmer is aware of segmentation. Paging is hidden.– Segmentation maintains multiple address spaces per

process. Paging maintains one address space.– Segmentation allows procedures and data to be separately

protected. This is hard with paging.

• Segmentation easily permits tables whose size varies.

• Segmentation facilitates sharing of procedures between processes. This is hard with paging.

• Pure segmentation suffers from memory fragmentation.

Page 27: Paging and Segmentation

Thank you