overcome pi challenges on perforated power/groung planes · power integrity for heavily perforated...

Overcome PI Challenges on

Perforated Power/Ground Planes

Momentum versus traditional PI tools Agilent EEsof EDA Dr. Hany Fahmy Dr. Colin Warwick January 19, 2012

1 Copyright © 2012 Agilent Technologies, Inc.

Physical Design

High Speed Digital Design Flow

2

Pre-Layout w/Channel Sim

Design & Analysis

Pre-Layout w/Transient

Verify & Refine

Post-Layout Access Critical Nets & PDNs

Post-Layout EM Models to

Verify & Refine

Methodology Validation & Refinement

Fab

Package and PCB High Speed Digital Design

Chip I/O Design

IC Model Generation

Constraint Mgmt. Design Rules to Constraint Editor

Layout Constraint-Based Board Tool Layout

Copyright © 2012 Agilent Technologies, Inc.

3

High Frequency EM and Circuit Tools Solve SI/PI Challenges 1. Keep supply voltages arriving on chip within narrow range

despite 10’s A swing in current over 10’s ps clock edge 2. Keep synchronous switching noise (SSN) within spec: SI/PI 3. Meet EMC/EMI spec: Power & ground are the biggest

‘antenna” on the PCB

PCB

IC: packaged die

Die Voltage Regulation Module

On-pkg cap

Bulk cap Ceramic cap


PI From a Circuit Perspective

4

ADS consumes the CPM to build an end-to-end simulation including PDN target impedance, PI ripple, and SI (SSN on the SIGnal line(s))


Power Integrity for Heavily Perforated Power Ground Planes Traditional PI tools address • Large-layer count boards which have the luxury of many,

(almost) perfectly solid power and grounds • Traditional tools leverage approximation that increase speed and

capacity and are fairly accurate for solid power ground planes

New! Momentum in ADS 2011 address two new classes of problem: • Heavily perforated power and grounds typical of cost reduced,

low-layer count (2-6 layers), consumer PCBs • High frequency effects in small (low inductance) PCBs and IC

packages • The same approximations that make other tools fast also make

them fail completely in these application


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Power

Traditional Four-layer

Ground

Signal 1 Copper Core fiber glass Power Pre-preg (glue) Ground Core fiber glass Signal 2

Cost goes as ~square of number of layers (alignment, vias…)

Signal 1

Signal 1

Signal 2

Signal 2


7

Power

Signal 2

Signal 2

Power

Cost-Reduced Split Plane 2-layer board is ~quarter of cost/area of 4-layers

Ground Signal 1 Copper Core fiber glass Power Signal 1 Copper

Ground

Signal 1

Signal 1

Ground


Power Integrity for Heavily Perforated Power Ground Planes Traditional PI tools address • Large-layer count boards which have the luxury of many,

(almost) perfectly solid power and grounds • Traditional tools leverage approximation that increase speed and

capacity and are fairly accurate for solid power ground planes

New! Momentum in ADS 2011 address a new class of problem: • Heavily perforated power and grounds typical of cost reduced,

low-layer count (2-6 layers), consumer PCBs • High frequency effects in small (low inductance) PCBs and IC

packages – RF mode (quasi-static) or microwave mode (full wave)

• The same approximations that make other tools fast also make them fail completely in these application


Demo


ADS Design Flow Integration with Allegro/APD “ADFI”

APD/Allegro Momentum Export Setup

Select Critical Nets or Entire Layout Select Stackup Layers

Cookie-cut Power and Ground Planes Portion

Create Ports Export to .ads file

Import in ADS Layout “Sandbox”

Ground Ref Port Adjustments if required

Verify Layout using 3-D Preview and Simulate

Check vs spec (e.g crosstalk), visualize, and fine tune

Report fixes to physical designer who adjusts “golden” artwork in Allegro

Copyright © 2012 Agilent Technologies, Inc. 10

11

“Which EM Solver Should I Use?”

Geometry Type?

Planar / Multilayer pkg/PCB

3D

MoM* *fields are solved full 3D, full wave

Response/ Analysis

Type? FEM

Narrowband High Q

Broadband TDR impulse

FDTD

Device Complexity/

Problem Size?

Personal Preference

?

Intermediate

FEM High # Ports

High # Mesh Cells FDTD

Moderate Complexity

“I like Time Domain”

“I like Frequency Domain”

FEM FDTD

Start here


SI/PI Requires High Capacity EM: Addressing the Need in Momentum in ADS2011.01 1. Mesh - Discretizing the problem

Zij row i

column j

New Mesh generator

2. Load – Filling the matrix

3. Solve – Solving the matrix

New NlogN Matrix loader

NlogN Matrix solver (introduced in ADS2008U1)


Core simulation technology improvements

Example: PDN impedance Freq sweep 0-3 GHz Matrix size: 17.501

2005 2008 2010

solve time

load time

solve time

load time

load time

2003

Release Load Solve Storage

2005A

2008U1 2011

dense (N2) direct (N3) dense (N2)

dense (N2) iterative (NpN2) dense (N2)

dense (N2) direct (NlogN)1.5 sparse (NlogN) sparse (NlogN) direct (NlogN)1.5 sparse(NlogN)

2003A

Evolution in Performance


Surface roughness

Impulse response

-1 0 1 2 3 4 -2 5

-0.0 0.2

0.4 0.6 0.8

-0.2

1.0

time, sec

h0.Im

pRes

p h2

.ImpR

esp

-1 0 1 2 3 4 -2 5

-0.0 0.2

0.4 0.6 0.8

-0.2

1.0

time, sec

h0.Im

pRes

p h2

.ImpR

esp

New Frequency dependent dielectric loss model

New Bond wire model

New Surface roughness model

Causal substrate definition

SI/PI Requires New EM Models: Addressing the Need Momentum ADS2011.01

New Wire Via model


OOO

NEW

Usability Improvements in ADS2011 1. New Momentum simulator

interface 2. New substrate editor 3. New port editor 4. Additional port calibrations 5. Polymorphism 6. New SI/PI wizard


Power Integrity With Momentum in ADS 2011 • New mesher • NlogN matrix load • Efficient bond wire model • Efficient “wire” via model • Usability improvements: simplified setup • Net-driven set up: Momentum SI/PI analyzer wizard • Hybrid fitting/convolution feature


Why Can’t Conventional Convolution Simulator Be Used for PDN Analysis?

Must cover both:

1. Sharp dynamic below ~1 kHz (large decoupling caps.)

2. GHz bandwidth

Conventional Convolution (FFT) requires equally spaced sampling:

If we force a small step millions of taps on impulse response impractical

If we use large step doesn’t capture lower frequency structure wrong result


ADS 2011 Includes Hybrid Convolution to Address this PDN Simulation Requirement

•Equally spaced sampled •Simulated with conventional convolution

•Rational fitting with pole/residual

•Simulated with recursive convolution

• Hybrid Convolution Simulator = Regular Convolution @ High Frequency + Rational Fitting @ Low Frequency

• Implemented for SnP components


Case Studies

1.Simple Power/Ground planes

2.BGA package (DQ lines + Power/ Ground planes )

3.Full DDR module ( Power/ Ground planes)

Frequency

Simple

Medium large

Large

Area/Layers

MOCHA project[1]


Case1: Power Plane Impedance

Example: PDN impedance Freq sweep 0-3 GHz RF mode

Extracted power plane impedance

10 cm

4 cm

Intel Core2 Quad ( 4 cores ) RAM: 4 GByte

MatrixSize: 17,501 Process Size: 1257 MB Elapsed Time: 2h26m53s

Momentum 2009U1

Momentum 2011

MatrixSize: 15,042 Process Size: 1345 MB Elapsed Time: 31m56s

4.6x speed


Case2: BGA Package (MOCHA project)

8 layers

Example: BGA package VSS, VDD, DQ lines Freq sweep 0-10 GHz,200MHz step RF mode Using sheet conductor

2.3cm

1cm

MOCHA project [1]: Modeling and CHAracterization for SiP - Signal and Power Integrity Analysis

MatrixSize: 87768 Process Size: 5823MB Elapsed Time: 6h49m55s

Momentum 2009U1 without bonding wire

Momentum 2011 with bonding wire

2.4x speed

MatrixSize: 49952 Process Size: 4632 MB Elapsed Time: 2h51m6s

Intel Xeon X5482 x 2 ( 8 cores ) RAM: 32 GByte


MatrixSize: N/A Process Size: N/A Elapsed Time: N/A

Case3: DDR Module Momentum 2009U1

Momentum 2011 MatrixSize: 38,789 Process Size: 14406 MB Elapsed Time: 6h38m54s

14.2cm

2.8 cm

Intel Xeon X5530 x 2 ( 8 cores ) RAM: 64 GByte

8 layers

Example: DDR module Power/Ground Freq sweep 0-3 GHz,200MHz step RF mode Using sheet conductor

*Meshing doesn’t finish after 24 hours


‘SLOW-DANCING’ PDN FOR MEMORY CONTROLLER

PACKAGES


Proposed PDN Optimization Strategy: - PDN Resonances & FD optimization of decaps MOM + ADS Schematic - Co-SI/PI eye-sim Convolution Transient engine - EMI & P2P FDTD Simulations with Icc(t) OR CPM


Co-SI/PI Modeling OF Multi-Giga-bit EMI effects

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• Signal layer transitions: L1-2-L3 is it same like L1-2-L5? • Open-stubs of Vias • Stitching vias impact (# & Locality)

Optimizing on-PKG decaps for Minimum

coupling of Power-Noise to Data-Signals


DDR3 Package Modeling using MOM DC to 20GHz DQ nets major referencing to GND


Routing of DQ signals from Bumps-Top to Layer-3 running as Symmetric-SL sandwiched between

GND on Layers 2 & 4

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DQ signals @ Die-Bumps DQ signals on Layer-3 as Symmetric-SL

Optimizing on-PKG decaps for Minimum

Power-Noise to Signal-Coupling


Moving from Layer-3 to Layer-6 through Signal-PTH to pickup the Balls

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DQ signals on Layer-3 DQ signals on Layer-6 routed between GND on layers 5


Impact of GND-PTH stitching: Proximity & # Original-Package: PKG1 with 15-GND-PTH


Impact of GND-PTH stitching: Proximity & # New Proposal-Package:PKG2 with ONLY 3-GND-PTH


Impact of GND-PTH stitching: Proximity & # Test-case Package: PKG3 with 0-GND-PTH


FD Risk Assessment of VddQ-Noise coupling to Data-Signals

32

ON-PKG DECAPS

PACKAGE MOM S-MODEL PORTS DIE-BUMP & DECAPS & BALLS & 8-DATA SIGNALS + DQS/DQS# + DQM

AC NOISE-SOURCE SWEEPING

AMPLITUDE @ VDDQ-BUMP

MB LOADING MODEL


NOISE-COUPLING TO TOGGELLING DATA-SIGNALS 0V noise @ VddQ-Bump Cpkg

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15 GND-PTH


NOISE-COUPLING TO TOGGELLING DATA-SIGNALS 300mV noise @ VddQ-Bump

Cdie 50pF per I/O Cpkg is 4.7uF

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15 GND-PTH

100mV noise coupling at 2.57GHz



Cdie 50pF per I/O Cpkg is 1pF

36

15 GND-PTH

700mV noise coupling at 1.39GHz


ON-PKG DECAPS IMPACT THE COUPLING-FREQ AND

AMOUNT OF COUPLING




38

3 GND-PTH




39

3 GND-PTH

40mV MORE noise coupling at 2.57GHz for 3-GND-PTH than 15-GND-PTH




40

1 GND-PTH

20mV LESS noise coupling at 2.57GHz for 1-GND-PTH than 15-GND-PTH

BUT 200mV wide-band coupling around 4.7GHz


Conclusion

• Accurate modeling of Data-signals along with VddQ & VssQ is important to capture VddQ-Noise Coupling to Data-Signals

•

• MOM is well suited to Model Data-Signals + VddQ + VssQ including Return-Path-Discontinuity

• PDN Decoupling & GND-Stitching (Return-path-discontinuity) impacts the Amount of VddQ-Noise coupling as well as the Coupling-Frequency & Bandwidth of noise-coupling


Evaluate Our Products Today!

42

agilent.com/find/signal-integrity

ADS Core

pre-layout bundle

Transient Convolution

Element

Layout Element

Momentum G2 Element

pre- and post-layout bundle

EMPro

SystemVue AMI

Modeling Kit


You’re invited!

43

agilent.com/find/eesof-hsd-webcast

Introduction to EMI/EMC Challenges and Their Solution February 16, 2012 7am PT (16:00 CET) or 10am PT Webcast Series


http://www.agilent.com/find/eesof-hsd-webcast�

overcome pi challenges on perforated power/groung planes · power integrity for heavily perforated...

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