overall project objective:

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RF Triangulator: Indoor/Outdoor Location Finding 18-525 Architecture Proposal Giovanni Fonseca David Fu Amir Ghiti Stephen Roos Design Manager: Myron Kwai Overall Project Objective: Overall Project Objective: Design a Radio-Frequency indoor/outdoor Design a Radio-Frequency indoor/outdoor navigation system, utilizing the existing navigation system, utilizing the existing wireless infrastructure. wireless infrastructure. Design Stage Objective: Design Stage Objective: LVS of all functional blocks LVS of all functional blocks

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Overall Project Objective: Design a Radio-Frequency indoor/outdoor navigation system, utilizing the existing wireless infrastructure. Design Stage Objective: LVS of all functional blocks. - PowerPoint PPT Presentation

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Page 1: Overall Project Objective:

RF Triangulator: Indoor/Outdoor Location Finding 18-525 Architecture ProposalGiovanni FonsecaDavid FuAmir GhitiStephen RoosDesign Manager: Myron Kwai

Overall Project Objective:Overall Project Objective:Design a Radio-Frequency indoor/outdoor navigation Design a Radio-Frequency indoor/outdoor navigation system, utilizing the existing wireless infrastructure.system, utilizing the existing wireless infrastructure.

Design Stage Objective:Design Stage Objective:LVS of all functional blocksLVS of all functional blocks

Page 2: Overall Project Objective:

StatusStatus• Structural Verilog complete.Structural Verilog complete.• Schematics completed.Schematics completed.• Layout of basic components complete.Layout of basic components complete.• Major Layouts:Major Layouts:

• ~90% done~90% done FPU: Done, adding buffering to strengthen signalsFPU: Done, adding buffering to strengthen signals Lookup: Done, testingLookup: Done, testing Calc and Top Three: Finishing layoutsCalc and Top Three: Finishing layouts

• Global routing still needs to be doneGlobal routing still needs to be done

Page 3: Overall Project Objective:

Current Transistor countsCurrent Transistor counts•Total: 27,150 transistors*•Top Three: 6,500 trans.

3 x FPU Add/Sub Unit 1500 trans. Control Registers & Muxes: 2000 trans.

•Calc: 17,950 trans. 2 x FPU Add/Sub Unit: 1500 trans. 1 x FPU Mult/Div Unit: ~5000 trans. 1 x Logshifter: 200 trans. 1 x Comparator: 800 transistors. FSM Logic: 850 transistors 25 x 12-bit M-S En Reg: 6600 trans. total 8-1,6-1,4-1,2-1 Mux Sets: 3000 trans. total

•Lookup: 2,700 trans. Control Registers & Muxes: 2000 trans. Control Logic: 163 trans.•SRAM: 12k trans

* count not including SRAM, with SRAM: ~38k

Page 4: Overall Project Objective:

FloorplanFloorplan

Page 5: Overall Project Objective:

FPU LayoutsFPU Layouts

Multiplication & Division Layout

FASU Layout

Page 6: Overall Project Objective:

FPU WaveformsFPU Waveforms

Page 7: Overall Project Objective:

FPU WaveformsFPU Waveforms

Page 8: Overall Project Objective:

FPU WaveformsFPU Waveforms

Page 9: Overall Project Objective:

FPU WaveformsFPU Waveforms

Page 10: Overall Project Objective:

FPU WaveformsFPU Waveforms

Page 11: Overall Project Objective:

Lookup LayoutLookup Layout

Page 12: Overall Project Objective:

Lookup WaveformsLookup Waveforms

Page 13: Overall Project Objective:

Lookup WaveformsLookup Waveforms

Page 14: Overall Project Objective:

Lookup WaveformsLookup Waveforms

Page 15: Overall Project Objective:

Lookup WaveformsLookup Waveforms

Page 16: Overall Project Objective:

Top Three ProgressTop Three Progress

Page 17: Overall Project Objective:

Questions/ConcernsQuestions/Concerns

Large block simulations take a long Large block simulations take a long timetime

Much of Top Three still needs workMuch of Top Three still needs work