ota000004 sdh principle issue 2.20

8/6/2019 Ota000004 Sdh Principle Issue 2.20

1/52

HUAWEI TECHNOLOGIES CO., LTD.

All rights reserved

www.huawei.com

Internal

OTA000004 SDH

PrincipleISSUE 2.20


2/52


3/52

HUAWEI TECHNOLOGIES CO., LTD. Page 3All rights reserved

Chapter1 SDH OverviewChap

ter1 SDH Overview

Chapter2 Frame Structure & Multiplexing MethodsChapter2 Frame Structure & Multiplexing Methods

Chapter3 Overhead & PointersChapter3 Overhead & Pointers


4/52


References

SDH Principle Manual

ITU-T G.701, G.702, G.707


5/52


What is SDH?

---- Synchronous Digital Hierarchy

---- It defines frame structure, multiplexingmethod, digital rates hierarchy and interface code

pattern.

Emergence of SDH

Why did SDH emerge?

---- Need for a system to processincreasing amounts of information.

---- New standard that allows mixingequipment from different suppliers.


6/52


Advantages of SDH ( Interfaces )

PDH

Electrical interfaces

--- Only regional standards. 3 PDH

rate hierarchies for PDH: European

(2.048 Mb/s), Japanese, North American(1.544 Mb/s).

Optical interfaces

--- No standards for optical line

equipments, manufacturers develop attheir will.

SDH

Electrical interfaces

--- Can be connected with existing

PDH signals.

Optical interfaces

--- Can be connected to multiple

vendors optical transmission

equipments.


7/52HUAWEI TECHNOLOGIES CO., LTD. Page 7All rights reserved

Disadvantages of PDH (Multiplexing methods )

PDH : Asynchronous Multiplexing The location of low-rate signals in high-rate signals is neither regular nor predictable.

140 Mb/s

34 Mb/s 34 Mb/s8 Mb/s 8 Mb/s

2 Mb/s

140 Mb/s

de-multiplexer

de-multiplexer

de-multiplexer multiplexer

multiplexer

multiplexer

level by levelNot suitable for huge-volume transmission


8/52


9/52


Advantages of SDH (OAM function )

PDH

Weak Operation,

Administration &

Maintenance function.

SDH

Abundant overheadsbytes for operation,

administration and

maintenance.

About 5% of the total

bytes are being used


10/52


Advantages of SDH ( Compatibility )

package

transmit

SDHnetwork

unpacking

PDH, SDH,ATM, Ethernet

packing

STM-N STM-N package

receive ProcessingProcessing

PDH, SDH,ATM, Ethernet


11/52


Comparison between SDH and PDH

Low bandwidth utilization ratio.Low bandwidth utilization ratio.

64 E1139.264 Mbit/sE4

16 E134.368 Mbit/sE3

128 E08.448 Mbit/sE2

32 E02.048 Mbit/sE1

One 64 kbit/s64 kbit/sE0

ChannelsDigital Bit RateSignal

4032 E1, 192 E3, 64 E4STM-6410 Gbit/s9953.28Mbit/s

1008 E1, 48 E3 or 16 E4STM-162.5 Gbit/s2488.32Mbit/s

252 E1, 12 E3 or 4 E4STM-4622 Mbit/s622.08 Mbit/s

63 E1, 3 E3 or 1 E4STM-1155 Mbit/s155.52 Mbit/s

SDH CapacitySDHAbbreviatedBit Rate

PDH Hierarchy

SDH Hierarchy


12/52


Chapter1 SDH OverviewChapter1 SDH Overview




13/52


SDH Frame Structure

From ITU-T G.707:

1. One frame lasts for 125

microseconds (8000

frames/s)2. Rectangular block structure

9 rows and 270

columns(STM-1)

3. Each unit is one byte (8

bits)

4. Transmission mode: Byteby byte, row by row, from

left to right, from top to

bottom

Frame = 125 us

Bit rate of STM-1= 9*270*8*8000

123456789

270 Columns

9 rows


14/52


SDH Frame Structure

Three parts

Frame = 125 us

9

MSOH

AU-PTR Information

Payload

RSOH

123456789

270 Columns

9 rows


15/52


SDH Frame Structure

Information Payload Also known as Virtual Container level 4 (VC-4) Used to transport low speed tributary signals Contains low rate signals and Path Overhead (POH) Location: rows #1 ~ #9, columns #10 ~ #270

Information Payload Also known as Virtual Container level 4 (VC-4) Used to transport low speed tributary signals Contains low rate signals and Path Overhead (POH) Location: rows #1 ~ #9, columns #10 ~ #270

9

MSOH

AU-PTRPayload

RSOH

270 Columns

HPOH

1

package

package

low rate signal

LPOH, TU-PTR

LPOH, TU-PTR

9 rows

Data

package


16/52


SDH Frame Structure

Functions : Fulfills the section layer OAM

9

270 Columns

9 rows

Types of Section Overhead

1. RSOH monitors the regeneratorsection

2. MSOH monitors themultiplexing section

Location:

1. RSOH: rows #1 ~ #3,columns #1 ~ #92. MSOH: rows #5 ~ #9,

columns #1 ~ #9

123

56789

MSOH

AU-PTR Information

Payload

RSOH

Section OverheadSection OverheadSection OverheadSection Overhead


17/52


SDH Frame Structure

9

MSOH

AU-PTR Information

Payload

RSOH

270 Columns

9 rows4

Function:Indicates the first byte of VC4

Location:row #4, columns #1 ~ #9

J1

AU-PTRAU-PTR


18/52


SDH Multiplexing Method

SDH Multiplexing includes:

Low to high rate SDH signals ( STM-1 STM-N )PDH to SDH signals ( 2M, 34M & 140M STM-N )

Other hierarchy signals to SDH Signals ( IP STM-N ) Some terms and definitions:

Mapping

Aligning

Multiplexing


19/52


SDH Multiplexing Structure

AU-4

TU-3TUG-3

VC-3 C-3

VC-4 C-4

TU-12 VC-12 C-12

TUG-2

3

1

7

3

139264 kbit/s

34368 kbit/s

2048 kbit/s

Pointer processing

Multiplexing

Mapping

Aligning

STM-1 AUG-11 1

AUG-4

AUG-16

AUG-64

STM-4

STM-16

STM-64

1

1

1

4

4

4

Go to glossary

C-4-4cVC-4-4cAU-4-4c

1

C-4-16cVC-4-16cAU-4-16c1

C-4-64cVC-4-64cAU-4-64c1


20/52


SDH Tributary Multiplexing (140M)

140 Mbit/s to STM-N

140MRate

adaptationAdd HPOH

C4

9

1 260125 s

1

Nextpage

Mapping

VC4

1

9

125s1 261

HPO

H


21/52



AddAU-PTR

AddSOH

Aligning

AU-PTR AU-4

10 270

1

AUG-1

Multiplexing

AUG-N

1 270

RSOH

MSOH

InfoPayloadAU-PTR

9

STM-1

1270X N

9

STM-N

Add

SOH

One STM-1 frame can load only one 140Mbit/sSignal


22/52



34 Mbit/s to STM-N

34M RateAdaptation

Add LPOH

C3

1 849

125s

1 1

9

VC3

LPOH

125s1 85

Nextpage

Mapping


23/52



1stalign

Fillgap

3

86

TU-3

1

H1

H2H3

1

9Aligning

1 86

1

9

H1

H2H3

R

TUG-3

Multiplexing

POH

R R

VC-4

9

11 2613

Sameprocedureas 140M


24/52



2 Mbit/s to STM-N

2MNextpage

125s

1 4

C12

1

9

4LPOH

VC12

1

1

9

RateAdaptation

AddLPOH

AddTU-PTR

Mapping Aligning

TU12

1 4

1

9

TU-PTR


25/52



3

1 12

TUG-2

1

9

7

Multiplexing

R R

TUG-3

1 86

1

9

MultiplexingSameprocedureas 34M


26/52


Questions

What are the main parts of SDH Frame structure?

What is the transmission rate of STM-4?How to calculate?


27/52


Glossary

Mapping - A process used when tributaries are adapted into VCs by

adding POH information

Aligning - This process takes place when a pointer is included in a

Tributary Unit (TU) or an Administrative Unit (AU), to allow the 1st byte of

the VC to be located

Multiplexing - This process is used when multiple low-order path signals

are adapted into a higher-order path signal, or when high-order pathsignals are adapted into a Multiplexing Section

Back


28/52


Glossary

C = Container

VC = Virtual Container

TU = Tributary Unit

AU = Administrative Unit

TUG = Tributary Unit Group

AUG = Administrative Unit Group

STM = Synchronous Transfer Module

POH = Path Overhead

Back


29/52


Chapter1 SDH OverviewChapter1 SDH Overview




30/52


Section OverheadsA1 A1 A1 A2 A2 A2 J0

B1 E1 F1

D1 D2 D3

AU-PTR

B2 B2 B2 K1 K2

D4 D5 D6

D7 D8 D9D10 D11 D12

S1 M1 E2

RSOH

MSOH

= Media dependent bytesSTM-1


31/52


A1 and A2 Bytes

Framing Bytes Indicate the beginning of the STM-N frame

A1 = f6H (11110110), A2 = 28H (00101000)

In STM-N: (3XN) A1 bytes, (3XN) A2 bytes

STM-N STM-N STM-N STM-N STM-N STM-N

Finding frame head


32/52


A1 and A2 BytesFraming

Nextprocess

FindA1,A2

OOF

LOF

N

Y

AIS

over 3ms


33/52


D1 ~ D12 Bytes

Data Communications Channels (DCC) Bytes

RS-DCC D1 ~ D3 192 kbit/s ( 3X64 kbit/s )

MS-DCC D4 ~ D12 576 kbit/s ( 9X64kbit/s )

TMN

DCC channel

NE NE NENE

OAM Information: Operation, Administration andmaintenance


34/52


E1 and E2 Bytes

Orderwire Bytes

E1 RS Orderwire Byte RSOH orderwire message

E2 MS Orderwire Byte MSOH orderwire message

Digital telephone channelE1-RS, E2-MS

E1 and E2

NE NE NENE


35/52


B1 Byte

Bit interleaved Parity Code (BIP-8) Byte

A parity code (even parity), used to check the

transmission errors over the RS

B1 BBE is represented by RS-BBE( performance event)

Tx

2#STM-N

Rx

1#STM-NCalculate

BIP-8=

1#STM-N

2#STM-N

Calculate

BIP-8=A1

A1 00110011

A2 11001100A3 10101010A4 00001111

B 01011010

BIP-8

B1=A

STM-NB1

A

STM-NB1

Verify A1&AB1 BBE


36/52


B2 Byte

Bit interleaved Parity Code (MS BIP-24) Byte

BIP-24 is used to check the bit errors over the MSB2 BBE is represented by MS-BBE( performance event)

The mechanism of B2 is same as B1


37/52


M1 Byte

Multiplexing Section Remote Error Indication ByteA return message from Rx to Tx ,when Rx find B2 bit errors

A count of BIP-24xN (B2) bit errors

Tx generate corresponding performance event MS-FEBBE

Tx Rx

Traffic

Generate

MS-FEBBE

MS-REI

Find B2 biterrors

Generate MS-BBE

ReturnM1


38/52


K1 and K2 (b1-b5)

Automatic ProtectionSwitching (APS) bytes

Transmitting APS protocol

Used for network multiplexingprotection switch function


39/52


K2 (b6 ~ b8)

Rx detects K2 (b6-

b8)="111" generate MS-

AIS alarm

Rx detects K2 (b6-

b8)="110" generate MS-

RDI alarmGenerateMS-AIS

Start

DetectK2

(b6-b8)

ReturnMS-RDI

GenerateMS-RDI

111

110


40/52


S1 Byte

Synchronization Status Message Byte (SSMB): S1

(b5~ b8) Value indicates the sync. level

bit 5 ~ 8 Description

0000 Quality unknown (existing sync. Network)

0010 G.811 PRC

0100 SSU-A (G.812 transit)

1000 SSU-B (G.812 local)

1011 G.813 (Sync. Equipment Timing Clock)

1111 Do not use for sync (DNU).


41/52


Path Overheads

J1

B3

C2

G1

F2

H4

F3

K3

N1

VC-n Path Trace Byte

Path BIP-8

Path Signal Label

Path StatusPath User Channel

TU Multiframe Indi

Path User Channel

AP SwitchingNetwork Operator

Higher Order Path Overhead

1 2 3 4 5 6 7 8 9 10


42/52


Path trace byte: J1

> The first byte of VC-4

> User-programmable

> The received J1 should

match with the expected J1

Next

process

Detect J1

Match

HP-TIM

YN


43/52


B3 Byte

Path bit parity

code byte (even parity code)

Used to detect bit errors

Mechanism is same as B1and B2

Nextprocess

VerifyB3

correct

HP-BBE

YN


44/52


Signal label byte: C2

> Specifies the mapping type in

the VC-n

> 00 H Unequipped

02 H TUG structure

13 H ATM mapping

The received C2 should

match with the expected C2

Detect C2

00H

HP-UNEQMatch

HP-SLMNext

process

Insert AIS

downward

N Y

NY


45/52


Path Overheads

V5 J2 N2 K4

VC-12 VC-12 VC-12 VC-12

1

9

1 4

500s VC-12 multiframe

Low Order Path OverheadLow Order Path Overhead


46/52


Path Overhead Bytes

V5

> First byte of the multiframe

> Indicated by TU-PTR

Functions: Error checking, Signal Label and Path Status of VC-12 b1- b2 Error Performance Monitoring (BIP-2)

b3 Return Error detected in VC-12 (LP-REI)

b4 Return Failure declared in VC-12 (LP-RFI)

b5 ~ b7 Signal Label for VC-12 b8 Indicate Defect in VC-12 path (LP-RDI)


47/52


Pointers

Pointers

AU-PTR TU-PTR


48/52


AU-PTR


49/52


TU-PTR

VC-12 VC-12 VC-12 VC-12

V1 V2 V3 V4

1

9

500s VC-12 multiframe

TU POINTERS

11 44


50/52


Questions

Which byte is used to report the MS-AIS and MS-RDI?

What is the mechanism for R-LOF generation?

Which byte implements the RS(MS/HP) error monitoring?


51/52


SDH Overview

SDH Frame Structure & MultiplexingMethods

Overhead & Pointers

SummarySummary


52/52

ota000004 sdh principle issue 2.20

Documents