openxlr8: how to load custom fpga blocks · • review of verilog wrapper interface to...
TRANSCRIPT
WebinarBreakdown:• Introduc*ontopseudorandomnumbergenerator(LFSR)code• ReviewofVerilogwrapperinterfacetomicrocontroller• Simula*onwithMentorGraphics®ModelSim®• SynthesisusingIntel®Quartus®PrimeLite• UploadtoFPGAviatheArduinoIDE• OverviewsoKwarelibrary• RunsimplesketchtodemonstratenewFPGAhardware
OpenXLR8:HowtoLoadCustomFPGABlocks
WebinarReplayfrom
January12,2017
Presenters
JasonPecor BryanCrakerHarlieJuedes
•LaptopwithWindowsorLinux(ToolsnotsupportedonMac)
• InstalledTools:–ArduinoIDE– IntelQuartusPrimeLiteEdi*on• IncludesModelsim-IntelFPGAEdi9onandMax10FPGAsupport
• AUSBMinicableforconnecRngXLR8boardtolaptop
Pre-Requisites
YouWillNeed:
Followtheinstructionshere:http://www.aloriumtech.com/openxlr8/
• LFSRCodePackage:
h"ps://github.com/AloriumTechnology/XLR8LFSR
• ArduinoBoardLibraryURL:h"ps://raw.githubusercontent.com/AloriumTechnology/Arduino_Boards/master/package_aloriumtech_index.json
LFSRandBoardLibraryURLs
RenametoXLR8Build
MovetoArduinoLibrariesfile
• GotoSketch->IncludeLibrary->ManageLibraries…
• Searchfor“XLR8”andinstallXLR8CoreandXLR8BuildTemplate
• GotoTools->Board->BoardsManager…• Searchfor“XLR8”andinstallAloriumXLR8Boards
ArduinoIDESetup
Applica*onAccelerator&DevelopmentBoard
DesignedforArduinoDeveloperCommunity
BasedonIntel®MAX®10FPGA
ProgrammablewithArduinoIDE
WhatisXLR8?
Field-programmable
Gate Array
WhyuseFPGA?
HIGHER-PERFORMANCE
FASTERAcceleration
Offload
BoardLevelBlockDiagram
AnalogI/OPower/Reset
BarrelConnector
5VReg
3.3VReg
USB
OSC
ISP
JTAG
Op*onalEEPROM
DigitalI/O
3.3V/5VLevelShiK AnalogPreamps
3.3V/5VLevelShiK
FTDI
I2C
U169Package
FPGABlockDiagram
AVRProcessorCore
ProgramMemoryandFlash
DataMemory
ADC
TimerPWM
I2C
SPI
UART
PLL
ConfigFlash
Image1
Image0
Reconfig
XceleratorBlocks(ProgrammableFPGAFabric)
PinMuxing
ProcessorB
us
AnXceleratorBlock(XB)isanop*mizedhardwareimplementa*onofaspecificfunc*on.
CustomhardwareimplementedonthesamechipTightlyintegratedwiththemicrocontrollerXBscanaccessthesameregisterspace
Integratewiththeinstruc*onsofthemicrocontroller
XceleratorBlocks
Available XBs • Floa*ngPointMath• ServoControl•NeoPixelControl• EnhancedAnalog-to-DigitalFunc*onality
XB Roadmap •EventCountersandTimers•QuadratureEncoders/Decoders• PulseWidthModula*on(PWM)• Propor*onal-Integral-Deriva*ve(PID)control•Mul*pleUARTS
OpenXLR8
HDL
MethodologythatallowsXLR8userstodeveloptheirownXceleratorBlocksanduploadthemtotheFPGA.
Module-LevelDesignandSimulaRon
alorium_lfsr_tb.v
LFSR
Testbench
alorium_lfsr.v
LFSRModuleDesign
SimulationTestbench
• PseudorandomNumberGenerator• UsingaLinearFeedbackShiftRegister(LFSR)• 8-bit• 4-tap
IntegraRonintoXLR8
xlr8_lfsr.v
alorium_lfsr.v
xlr8_top.v
xlr8_lfsr.v
alorium_lfsr.v
xlr8_d_mem
xlr8_avr_core
xlr8_p_mem
xlr8_gpio
XLR8Wrapper
XLR8Top-LevelVerilog
XLR8CoreComponents
Synthesisxlr8_top.v
xlr8_lfsr.v
alorium_lfsr.v
xlr8_d_mem
xlr8_avr_core
xlr8_p_mem
xlr8_gpio
RPDFPGA
ProgrammingFile
xlr8_top.v
Optional–NotToday…
UploadtoFPGA
XLR8RPD
RunSketch
Let’sDiveIn!
BuildinganLFSRonanFPGA
HDL
LinearFeedbackShiftRegister(LFSR)
D Q D Q D Q D Q D Q D Q D Q D Q0 1 2 3 4 5 6 7
assign feedback = ~(lfsr_data[7] ^ lfsr_data[5] ^ lfsr_data[4] ^ lfsr_data[3]);
XNOR
SoftwareFunctionvsGeneratedAssemblyCode
• RTL=Register-TransferLevel• HDLcode• Verilog/SystemVerilog• VHDL
• TheLFSRmodule,alorium_lfsr.v
RTLfortheLFSR
• Thetestbench,alorium_lfsr_tb.v
Testbench
• StartModelsim• File->New->Library…• Createthedefault“work”libraryinsideofourprojectRTLdirectory
• Compile->Compile…• Selectalorium_lfsr.vandalorium_lfsr_tb.v
• “Compile”andthen“Done”• Openthetestbenchintheworkarea
SimulatingtheTestbench
• Selectourtestbenchsignalsandbringthemintoawaveswindow
• Hitthe“Run–all”button
SimulatingtheTestbenchContinued
• xlr8_lfsr.v• ConnectsthesignalsfromtheXLR8coretotheLFSRmodule
• Instantiatesthealorium_lfsrmodule• Controlsregisteraccess
XLR8Module
LFSRControl Address0xE0
Bit 7 6 5 4 3 2 1 0
Function Unused FreerunningMode
R/W R R R R R R R R/W
Initial 0 0 0 0 0 0 0 0
LFSRSeed Address0xE1
Bit 7 6 5 4 3 2 1 0
Function LFSRSeedData
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial 0 0 0 0 0 0 0 0
LFSRData Address0xE2
Bit 7 6 5 4 3 2 1 0
Function LFSRResultData
R/W R R R R R R R R
Initial 0 0 0 0 0 0 0 0
RegisterDefinitions
• xb_adr_pack.vh• Declaretheaddresslocationsofyourregisters
• RefertotheXLR8UserManualtofindopenregisterspace
XBAddresses
IntegrationintoXLR8
xlr8_lfsr.v
alorium_lfsr.v
xlr8_top.v
xlr8_lfsr.v
alorium_lfsr.v
xlr8_d_mem
xlr8_avr_core
xlr8_p_mem
xlr8_gpio
XLR8Wrapper
XLR8Top-LevelVerilog
XLR8CoreComponents
• xlr8_top.v• Instantiatethexlr8_lfsrmodule• Addthecontrolsignalsto“stgi_xf_io_slv_dbusout”and“stgi_xf_io_slv_out_en”
XLR8Top
• xlr8_top.qsfunderthe“quartus”directory
• Addinourmodulefilesandtheregisteraddressfile
ModifytheProjectQSFFile
• GotoSketch->IncludeLibrary->ManageLibraries…
• Searchfor“XLR8”andinstallXLR8CoreandXLR8BuildTemplate
• GotoTools->Board->BoardsManager…• Searchfor“XLR8”andinstallAloriumXLR8Boards
ArduinoIDESetup
Synthesisxlr8_top.v
xlr8_lfsr.v
alorium_lfsr.v
xlr8_d_mem
xlr8_avr_core
xlr8_p_mem
xlr8_gpio
RPDFPGA
ProgrammingFile
xlr8_top.v
Optional–NotToday…
• OpenQuartusandopenourprojectQPFfilewithFile->OpenProject…• BeginthecompilewithProcessing->StartCompilation• Aftercompilationiscompleted,File->ConvertProgrammingFiles…• OpenConversionSetupData,open“openxlr8.cof,”andGenerate
CompiletheProjectinQuartus
UploadtoFPGA
XLR8RPD
• OpentheArduinoIDE• UnderTools->BoardselectOpenXLR8• ConnectyourboardviaUSBandmakesureitisselectedinArduinounderTools->Port
• Tools->BurnBootloader
BurntheFPGAImage
• XLR8_LFSR.h• DefinesthesameregisteraddressesasintheRTL
• SetsandreadstheLFSRregisters
ArduinoLibraryfortheLFSR
• IncludetheXLR8_LFSR.h• Settheseed,enteralooptoprinttheresultoftheLFSRtoserialoutput
• Compileandrunontheboard
ArduinoLFSRExample
AssemblyCode:SoftwarevsFPGA
Q&A