ontap series 4000 overview - flynn docs/ontap s4000... · ontap series 4000 product description ......

onTAP Series 4000 Product DescriptionFlynn Systems Corporation

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B o u n d a r y S c a n T e s t S o f t w a r eonTAP® Series 4000 with ProScan

onTAP Series 4000 Product Description

©2009 Flynn Systems Corp., All Rights Reserved

PCB Design for Test and JTAG Compliance

onTAP Series 4000 Overview

onTAP Series 4000 software and hardware simplifies boundary scan test and program-ming through out your product life cycle. It enables you to easily and cost effectively design, develop, manufacture, and support your electronics with confidence. With onTAP you will design your boards for IEEE 1149 JTAG compliance, develop, debug, and implement all JTAG tests for scan and non-scan devices (DDR2, SRAM...), and program FLASH (In System Programming) all through a JTAG port and USB cable.

Flynn Systems’ 10 years of testing JTAG IEEE 1149 standards delivers this robust and powerful solution. onTAP provides expert test solutions thanks to our vast knowledge base and JTAG testing experience, easy to use control screens with graphical debug-ging, and on-call technical support.

Improve your designs, reduce your costs, and your time-to-market!

With 10 years of successful JTAG testing and thousands of projects to our name, we will help guide your design with our design-for-test (DFT) tools, while providing live technical support to ensure your designs are IEEE 1149 compliant and provide proper JTAG access ensuring the most comprehensive test coverage.

Flynn Systems and onTAP will save you time and money from the start! Low up front costs for boundary scan tools coupled with onTAP DFT guidelines, live technical sup-port, automated test generation, the highest possible fault coverage, graphical de-bugging, and pin-point diagnostics facilitate rapid fault detection and location, while significantly minimizing the need for board re-spins.

Automated Netlist-•BasedTestGeneration

The most comprehen-•sive fault coverage

Pin-leveldiagnosticsto•quickly debug boards.

ProScan graphical •interface/test environ-ment

Friendly notebook •style test development wizard

ISPConfiguresFPGAs•& CPLDs

Testmulti-diemodules•

Flash programming•

Increased program-•mingandverificationspeeds

Readers for over two •dozen CAD netlist formats

BSDLfilereaderand•syntax checker

Portable license op-•tionsandnetworklicenseoptionsavail-able.

Windows 2000, XP, •andVistacompatible.

Product Design

onTAPDESIGN FOR TESTABILITY

Prototyping

Reusable&flexibleclustertests&DTSmodels.Expert knowledge base and technical support.

onTAP JTAG TEST DEVELOPMENT & DEBUGGING

CONTINUOUS PRODUCT SUPPORT

Manufacturing

Finished Product

Highlights: Series 4000


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onTAP is designed for flexibility. That is why our models are cre-ated using the familiar C-pro-gram like DTS language, and are not project specific. All models can be saved for use from one project to the next, and can easily be altered to meet the needs of a new project or a new

device type in a family.

Flexible & Reusable Models for Tests

Modules are incresingly popular in applications, and have present-ed some difficulty for test devel-opers. Flynn Systems has created a simple, proprietary method for incorporating modules into tests, ensuring they are tested, increas-ing the test fault coverage of your application.

Flynn Systems Technical Support for more info. about modules.

Incorporating Modules

Flash Programming

onTAP Series 4000 will program your FLASH memory rapidly through the onTAP USB Cable and JTAG port.

Flynn Systems’ USB program-ming cable offers an adjustable TCK rate, and is configurable from within the software.

Flynn Systems maintains a com-prehensive library of FLASH mem-ory devices, along with models for memory devices such as DDR2, SRAM, SDRAM etc. as well as CPLDs and FPGAs and will create new models for your project.

Overview (cont.)

Test DevelopmentonTAP’s Development tool delivers rapid verification of your board design and lay-out.

When you are ready to test your design, onTAP interrogates the TAP, identifying and verifying boundary scan chain integrity.

Utilize onTAP’s organized notebook tabs to quickly develop reusable JTAG tests, in-cluding memory and cluster tests and flash programming, and reusable DTS models for flash and memory devices. Tests and models are transferable to other sites, and projects.

Gain visibility and interact directly with your board through the ProScan test/debug environment.

Manufacturing Test

Know that you have proven, comprehensive, and cost-effective test solutions when sending your board to manufacturing!

The onTAP manufacturing tool enables you to implement pre-developed, proven tests from your design team, or those made for you by Flynn Systems as a turn-key service.

ProScan enabled and returns highly precise, pin-level diagnostic messages directing you to the exact location of the faults. Program your Flash memory devices, cluster test memory devices, and configure logic. onTAP with ProScan also provides low-level pin manipulation in this environment for simple step through pin diagnosis.

Contract Test Development

Flynn Systems has been a leader in ATG vector testing for 22 years, and boundary scan testing for 10 years. We have the knowledge, experience, and foresight you need to develop a cost effective, rapid JTAG solution you can implement with out any hassles. We have delivered solutions for companies the world over. No project is too big or too small.

Support

After your designs, prototyping and test development are complete, Flynn Systems will work with you and your CM to quickly locate and fix faults ensuring board integ-rity and preventing delays in production.

When you use onTAP, you have access to over 20 CAD Netlist readers and a compre-hensive library of models such as Flash, DDR2, SRAM, as well as CPLDs, FPGAs. Flynn Systems strives to deliver the best, most affordable JTAG Solution. With that comes constant improvements and updates to our tools based on your suggestions. Use your laptop and our USB cable to develop and implement onTAP tests wherever you are.


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Design, development, and manufacturing environments often have different needs, requirements and uses for their boundary scan tools. Users in a manufacturing set-ting often need a tool to interface with third party test executives such as National Instruments LabVIEW or Teradyne ATE test equipment. Flynn Systems provides flex-ibility with the onTAP DLL.


onTAP DLL

USB Test and Programming Cable - Plug and Play

The onTAP USB test and programming cable is the link between onTAP and your ap-plication with Xilinx flying leads, Altera style cable, or custom headers.

Using high speed A-A (included) USB cables, connect the onTAP USB cable to your application. The onTAP cable TCK clock is adjustable. It automatically senses and adjusts to target I/O voltages, and interfaces to devices operating at 1.5 to 5.0 VDC. The onTAP cable self-adjusts to the target chain using the VRef voltage, allowing it to configure to many different JTAG ports, which is helpful not only in design, but manu-facturing. Through this cable, onTAP can easily handle multiple chains.

GPIO/Serializer Board

The dual purpose GPIO/Serializer board can serialize multiple chains, each with dif-ferent IO voltage levels and can also provide over 1200 GPIO drive and capture test points.

Overview (cont.)

Additional tools and accesories In Their Words

“ ... I was concerned about testability. I need not have worried. I let onTAP create an interconnect test, and it tested the board in less than a second! It was pretty amazing to watch.

This board was designed and manufactured here but was sent off site for the FGPA design...we really had no way to test the board...if the board didn't work off site, we would not have had an easy way to troubleshoot it from here. It [onTAP] surely saved my bacon.”

T. Wild, Senior Engineer, Harris RF

Customer since 2005

“Flynn Systems has excel-lentcommunication,alotofpatienceforcustomers,verygood support and always on time.onTAP Boundary Scan Software accelerates and simplifies the development of boundary-scan applications. onTAP can automatically gener-ate interconnect tests, including a check for pull-ups, pull-down resistors and mid-state shorts.Flynn Systems’ provides sup-port when needed. ThetestvectorgenerationandtestexecutionusingonTAPsoftwaresavedalotofman-hours for our company and Ireceivedpositivefeedbackfrom management.”

G.Biberdzic, Production Engineering - Automated Tests and Troubleshoot-ingEVERTZ MICROSYSTEMS LTD

Customer since 2007

DFT increases productivity, delivers cost effective JTAG solution•Delivers guaranteed results•onTAP Boundary Scan Expert Knowledge Base •10 Years of Experience with IEEE 1149•Successful,satisfiedcustomerswithprovensolutions•


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Highlights: Development

Complete system•

Highly automated test •development

CAD Netlist Based •- Over 2 Dozen CAD Netlist Readers Avail-able

Familiar notebook •style

Automaticchaindetec-•tionandverification

Netlist browser•

Netlist merge•

Flexible, reusable, reli-•able,automatictests

Flexible, reusable Flash •and memory models

Development Project •Assistant Guides You Through Test Develop-ment

ProScan graphical •debug enabled

Circuit browser•

Flash format • translators

Automatic Test Generation Delivers More Comprehensive Fault Coverage

Based on Flynn Systems years as an industry leader in the Automatic Test Generation market, onTAP is incorporates aspects of ATG to speed test development, and deliver higher, more accurate test fault coverage with its boundary scan tests. Designed to re-quire minimal user input, onTAP references the application netlist(s), collects critical test data during development, and develops a “test-to-print” solution. Any changes made to the application, must be subsequently updated and reflected in the netlist in order for onTAP to perform the most comprehensive test possible.

Intuitive & Organized Test Development

You’ll notice the intuitive and organized note book style tabs, each labeled according to the respective part of the test, collecting critical inputs and marking your progress through test development. Detailed instructions eliminate guess work when inserting the nec-essary information needed to develop the most comprehen-sive tests for your project.

Automatic JTAG Chain Detection & Verification

Identify the JTAG chain and verify the order with this fea-ture. onTAP references the netlist(s) and interrogates the chain and reports back via the attached USB cable to deter-mine the correct device order.

Manual overrides are available with a drag-and-drop tool, al-lowing users to re-order devic-es to their specifications..

Flexible, Reusable & ReliableonTAP is designed for flexibil-ity. That is why our models are created using the familiar C-program like DTS language, and are not project specific. All models can be saved for use from one project to the next, and can easily be altered to meet the needs of a new project or a new device type in a family.

DevelopmentThe onTAP Development System system includes all of the necessary software tools you need to develop and run comprehensive and reliable onTAP tests, delivering robust JTAG solutions. With over 2 dozen CAD netlist readers, a built-in netlist merge tool, and ProScan - the graphical debug environment - the onTAP Development system will speed up your project development time, and keep costs under control. These tools enable the ability to quickly and easily develop, run, and debug tests ranging from single chain applications, to multiple chain applications with multi-die modules, merged sub-assemblies, and multi-drop configurations. onTAP can accommodate unlimited circuit size


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•Boostfaultcoverage,pro-ductivity,andQ.A.

•Graphical control panelfor all JTAG test needs

•Runtests

•Configureprogrammabledevices

•ProgramFlashdevices

•Easilylocateanddiagnosefaults

•TestDetailsPage

•Pinwiggleandsinglestepfeatures allow total con-trol.

•Placemarkernever losesyour place during debug

Highlights: Manufacturing w/ ProScan

Run all pre-developed onTAP tests with the MTO. You can always re-open, re-use, re-run, and save test reports allowing the development team to adjust the tests as needed. This feature is especially helpful in situations when your netlist changes as you move through prototyping. The essential purpose of onTAP is to test to print, and program flash.

The MTO safe-guards against accidental changes to the test settings. All changes to the test must occur in the onTAP Development Environment, ensuring test integrity. Otherwise, all tests and programming functions can be performed us-ing the onTAP MTO.

With the MTO, tests are usually run on the Manufacturing screen. In addition, the ProScan debug environment is availaible to show test details in relation to the circuit netlist. Pin wiggling capability is available to manually switch pin values, which is helpful for debug purposes.

The ProScan screen shows test results overlaid on the netlist with pin-level diagnostic messages that lead you to the exact location of the faults. The built-in netlist browser allows you to drill down through the netlist to achieve greater visibility in the connections on the board, helping you better trace the problem.

Your manufcaturing test environment enables fast and easy flash programming and ca-pability to configure non-scan devices.

onTAP’s large library of DTS models facilitate easy cluster and memory testing. Because Flynn Systems DTS models are not project specific, they provide greater flexibility. These models enable you to use one basic model and make the necessary, sometimes just subtle, changes necessary for varying device types. All of these models and their changes are saved in your project folder, and can be re-used from one project to the next because they are not project specific.

Flash Programming & Non-Scan Devices

Manufacturing

Graphical Debuging & Netlist Browser


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Boost fault coverage, •productivity,andQ.A.

Graphical control panel •for all JTAG test needs

Run tests•

Easily locate and diag-•nose faults

Test Details Page•

Pin wiggle and single •step features allow total control.

Pin-leveldiagnosticmes-•sages pin-point faults

A d d a n d r e m o v e •guards

Configureprogramma-•ble devices

Program Flash devices•

Edit netlists and DTS •models

Re-compile changes and •run tests

Highlights: ProScan

Graphical Debugging

ProScan speeds the debug process by eliminating guesswork. The graphical presentation shows all pins and vectors in the test, and uses different colors to differentiate between driving and receiving values, and failures.

Pin-point opens and shorts with accurate pin-level diagnostic messages. Then use the ProScan tools to further investigate the failures.

The built-in netlist browser enables users to drill down deep in to the test, while the single step feature and pin wiggler allow users to interact on a pin level. If need be, users can set guards on pins. Once changes are made, recompile and run tests from ProScan.

ProScan is the new graphical test and debug environment that enables easier, more ef-ficient boundary scan testing and programming by localizing all your debug needs and providing accurate, pin level diagnostic messages. This debug environment included in Series 4000 development and manufacturing systems localizes critical development, test, and debug features of onTAP in one intuitive screen.

ProScan

The ProScan screen overlays the debug control panel on the netlist(s), allowing you to browse through net list(s) and view system level application signals, based on JTAG SAMPLE instruction, at any circuit loca-tion. The pin wiggler enables you to set any pin output value and to read pin input values.

There is also a built-in Netlist browser, which allows you to drill deeper, and edit the actual netlist as needed.

Netlists DTS Models & Editing

onTAP provides a full library of DTS models. However, because Flynn Systems DTS models are not project specific, and each application has its own unique attributes, ProScan provides ac-cess to the DTS editor allowing users to make minor changes to the DTS models.

Diagnostic messages appear in the top left corner of the ProScan screen, alerting you to failures in the test. From the diagnostic message box, you can locate the exact location of the failing pins and vectors by clicking on the message of interest.

Begin the debug process right away by single-stepping up to the pin, toggling the pin, and even setting guards.

Diagnostic Messages

Running Tests

ProScan is the control center that will allow you to apply any of the tests you’ve created with the Development tool.

After testing with ProScan, on-TAP generates precise pin-level diagnostics with data reports indicating all failures on the board from each specific test. The reports are printable, and make Q.A. tasks more produc-tive and accurate.


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Highlights: Licenses

Use onTAP when, •where, and how you need toPerfect for high vol-•ume manufacturing environments. Highly automated•Shareflexible,reus-•able, reliable, auto-matictestsNetwork manager, •for network licenses, managesactiveusersand support.

Design, development, and manufacturing environments often have different needs, requirements and uses for their boundary scan tools. For example, a development or design engineer may need a solution they can share amongst themselves, with their team(s), and sometimes with manufacturing. This means they need a portable or transferable license. Where as manufacturing may need a portable/transferable license, but also may need a tool to interface with third party test executives such as National Instruments LabVIEW or Teradyne ATE test equipment. Flynn Systems addresses this by enabling flexibility with onTAP licenses and a DLL plug-in.

Users may choose between a node locked, portable USB dongle based license or, a floating network license. USB dongles are secure devices linked to one specific on-TAP license, and enable users to run onTAP tests from any machine when they con-nect the dongle. The network license however, is a secure, network based, license option that enables as many users as there are active, supported licenses to sign-in and use onTAP when ever, where ever it is needed.

To run from a third party test executive, onTAP Series 4000 has a DLL plug-in which enables you to use all of your onTAP tests, including memory cluster tests and FLASH programming. The onTAP DLL can also be used with your ATE In-Circuit Test equip-ment.

onTAP Licenses & DLL

Develop, Run, Service from any Work Station

Versatile license options enable you to use onTAP’s features where ever you find yourself. The USB dongle floating license provides the flexibility and security you need to develop and run tests from any machine. Floating network licenses are available for all onTAP products.

Run with any Third Party Test Executive

DLL plug-in allows you to run all of your onTAP tests with a third party test executive: industry standard, such as LabVIEW or something your team has created. Flynn Systems will make a custom GUI for your project specifications.

DLL Application

The onTAP DLL presents a GUI in which the user may browse to an SVF file. When the Run button is selected, a test is run, test results are extracted from the TEST file and placed in the Test Results window. If failures occur, the related diagnostic messages are copied from the .FAIL file to the Diagnostic Mes-sages window.A history of test selections is maintained in a history_list.txt file in the folder containing the ontap.dll file so that previous selections appear in the Combo box next to the Browsebutton when restarting the demo. A file may be conveniently selected and run from the Combo box.

Highlights: DLL

Custom GUI interface•LabView-ready or •custom-testexecutiveready.•Perfect for high vol-•umeManufacturing envi-•ronments.Runflexible,reusable,•reliable,automatictestsUse with ATE In-Circuit •Testers.


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Expert JTAG Test DevelopmentProprietary test development procedures include:

* Design for Testability (DFT) recommendations during design and for board redesigns * Flynn Systems' onTAP-Specific Interconnect Test * Cluster test model development for testing of non-JTAG memory and flash devices * Expert evaluation of your board test results and online assistance with debug. * BSDL syntax verification to IEEE 1149.1b Boundary Scan Specification

Our test development process takes advantage of your working knowledge of your board designs and our onTAP JTAG test development expertise to produce the highest quality tests, quickly and economically.

When you send us your BSDL and CAD netlist files, plus datasheets for any non-JTAG memory and FLASH devices you want to test, we will work closely with you via email and telephone to develop your onTAP boundary scan tests. When you are ready to apply the tests to the board, we are at your service to assist you as you debug your test, and revise it as necessary to deal with unanticipated board-level and device interactions.

From our experience in developing hundreds of successful boundary scan tests with cus-tomers all over the world, we have found this methodology produces the most consistent, successful test results.

Overview of the Test Development Procedure

Step 1. You send us your board netlist, BSDLs, and datasheets for any non-JTAG devices you want to include as a cluster test. Cluster testing non-JTAG devices can boost your over-all fault coverage tremendously.

Step 2. We generate the test program and the cluster test device models for devices on your board. This step usually requires some back-and-forth with you to set jumpers and guards to deal with the various interactions between devices on your board.

Step 3. You apply the tests to the board at your facility and let us assist in your test and board debugging. We can show you how to use onTAP's diagnostic tools to get visibility into the state of each boundary cell at each scan vector, and single-step through the test. We can assist you in interpreting the diagnostics and edit/regenerate the tests as required.

Pricing and Lead Time

Pricing for this service is dependent upon the complexity of your board.For a pricing estimate, please send us:

Board netlist

BSDLfilesforallboundaryscandevicesonyourboard.

Datasheets for any non-JTAG devices that you wish to cluster test.

Test development lead time ranges depending upon the complexity of the board and the number of cluster test models required.

Highlights: Licenses

Costeffective•

Rapid, expert test •development with full technical support

Responsive technical •support available for:

Design• Development• Prototyping• Manufacturing •

Reliable tests and •servicesfortheentireproduct life cycle.


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Developing and Bringing Tests Online

Technical Support

The development and debug process generally proceeds as discussed in the Interconnect Test document, and may include interactive sessions with Tech Support to clarify and assist with intial test development. After development, if a test fails, onTAP’s debug tools may be used to determine the source of the failure. Common reasons for failure include:

Hookup issues, e.g., power and ground reference lines on the programming • cable are not attached.Boundary scan COMPLIANCE pins and TRST pins are not statically held at the • correct values.BSDL files don’t match logic devices (IDCODE failures)• Interaction with non-boundary scan logic. •

Messages within onTAP help diagnose and correct these problems, of which interaction with non-boundary scan logic is probably the most significant. In this case, onTAP’s NetlistBrowser checks the devices that interact with boundary scan pins where failures occur. If a device such as an SRAM is recognized, steps must be taken to statically guard the “output enable” pins on the SRAMs so that an SRAM’s data bus is not driving while boundary scan pins are also driving on the same nets. Worst case, if this cannot be done, then some boundary scan test pins must be tri-stated.

Identifying interactive logic, and what steps need to be taken to control it, can usually be accomplished quickly and Flynn Systems Tech Support can assist in this process. Adjusting the guards on the Guards page can usually control the offending circuits. Re-generating and re-running the test should clear up the failures in the problem area.

Highlights: Support

Telephone support •available during busi-ness hours

E-mail support always •available

Access to latest up-•dates, and builds, and new releases

Assistancegetting•projects started

Assistance running •tests, developing DTS models, programming flash

Prompt responses to •onTAP related issue

Access to Flynn •Systems library of Memory and Flash models

Guaranteed response •to issues

Inside track for spe-•cials and upcoming events

Sometimes in the initial pass, fault coverage, as reported by the TestabilitySurvey reports, is not as high as it could be. Measures that can be taken to boost fault coverage include:

On the Settings page enable the • Self-Capture option. This allows bidirectional pins, on nets that have only one boundary scan pin, to both drive and capture at the same time. This capability allows such pins and nets to be included in shorts testing and detection.On the Settings page, enable • PULLUP and PULLDOWN resistor tests.Use the Jumpers page to make resistors and buffers transparent that lie • between boundary scan pins. This allows more boundary scan pins to interact, enhancing coverage.Use physical loop backs at connectors to provide more access between • boundary scan pins.Implement memory and cluster tests to check the connectivity between • boundary scan pins and pins on non-boundary scan devices.

Boosting Fault Coverage


onTAP Series 4000 Product BriefsFlynn Systems Corporation

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• IEEE 1149.1 BSDL Syntax Checker

• Netlist-based ATG supports over two dozen CAD

netlist formats

• Intuitive,GraphicalInterfaceforDevelopment,

Debug, and Netlist Browser

• MultipleJTAGchains

• Flash Programming

• Cluster Tests (DDR2, SRAM...)

• GPIO + TAP Serializer Board

• USB Programming and Test Cable

• LabVIEW™ Ready DLL

• Automated Interconnect Tests feature onTAP

JTAGtestgeneratorandrun-timescreens

• Auto-Chain Detect

• ISP for CPLDs/FPGAs

• DifferentialI/O

• Netlistmergeformultiplenetlists

• Guards Wizard

• ExclusiveMid-StateShortsDetection

• HighlevelDTStestscriptinglanguagewithC-like

flowcontrol

ontap series 4000 overview - flynn docs/ontap s4000... · ontap series 4000 product description ......

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