october 10, 20001. 2 enabling usb 2.0 peripherals brad hosler usb engineering manager intel...

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October 10, 2000 1

October 10, 2000 2

Enabling USB 2.0 Peripherals

Enabling USB 2.0 Peripherals

Brad HoslerBrad Hosler

USB Engineering ManagerUSB Engineering ManagerIntel CorporationIntel Corporation

October 10, 2000 3

What Is Peripheral Enabling?What Is Peripheral Enabling?

Making sure that developers have:Making sure that developers have:– TrainingTraining– USB 2.0 Building BlocksUSB 2.0 Building Blocks– ToolsTools– ServicesServices

Help vendors deliver a successful and robustHelp vendors deliver a successful and robustUSB 2.0 productUSB 2.0 product

October 10, 2000 4

TrainingTraining

That’s what this Developer Conference is all aboutThat’s what this Developer Conference is all about Early developers get One-on-One interactionsEarly developers get One-on-One interactions

– Peripheral Integration LabPeripheral Integration Lab Other opportunities:Other opportunities:

– Compliance WorkshopsCompliance Workshops

October 10, 2000 5

Building Blocks: USB 2.0 MicrocontrollerBuilding Blocks: USB 2.0 Microcontroller

Concentrate on product functionConcentrate on product function

Write some firmwareWrite some firmware

MicroMicroCon-Con-trollertroller

ProductProductFunctionFunction

USB 2.0

October 10, 2000 6

Building Blocks:Discrete TransceiverBuilding Blocks:Discrete Transceiver

Transceivers with or without Serial Interface Transceivers with or without Serial Interface Engine (SIE)Engine (SIE)

Concentrate on product functionConcentrate on product function

Tran-Tran-sceiversceiver

ProductProductFunctionFunction

USB 2.0USB 2.0

October 10, 2000 7

Building Blocks:Transceiver MacrocellBuilding Blocks:Transceiver Macrocell

ASICASICASICASIC

Serial Interface EngineSerial Interface EngineSerial Interface EngineSerial Interface Engine

DeviceDeviceSpecificSpecific

LogicLogic

DeviceDeviceSpecificSpecific

LogicLogic

Endpoint Logic

Endpoint Logic

…SIE

Control Logic

USB 2.0USB 2.0Endpoint Logic

Device Device HardwareHardware

USB 2.0 USB 2.0 TransceiverTransceiver

USB 2.0 USB 2.0 TransceiverTransceiver

Defines Standard Interfacefor Transceiver Macrocell

Defines Standard Interfacefor Transceiver Macrocell

USB2 Transceiver Macrocell Interface (UTMI) specification USB2 Transceiver Macrocell Interface (UTMI) specification posted on Intel web siteposted on Intel web site– http://developer.intel.com/technology/usb/spec.htmhttp://developer.intel.com/technology/usb/spec.htm

Broad Industry supportBroad Industry support

October 10, 2000 8

Building Blocks:VHDL (IP) CoresBuilding Blocks:VHDL (IP) Cores

ASICASICASICASIC

Serial Interface EngineSerial Interface EngineSerial Interface EngineSerial Interface Engine

DeviceDeviceSpecificSpecific

LogicLogic

DeviceDeviceSpecificSpecific

LogicLogic

Endpoint Logic

Endpoint Logic

…SIE

Control Logic

USB 2.0USB 2.0Endpoint Logic

Device Device HardwareHardware

USB 2.0 USB 2.0 TransceiverTransceiver

USB 2.0 USB 2.0 TransceiverTransceiver

Tran-Tran-sceiversceiver

ProductProductFunctionFunction

USB 2.0USB 2.0

3rd Party VHDL3rd Party VHDL

October 10, 2000 9

Tools: Peripheral Developers KitTools: Peripheral Developers Kit

Provides host functionality before systemsProvides host functionality before systemsare readily availableare readily available

Peripheral Develop Kit (PDK) includes:Peripheral Develop Kit (PDK) includes:– USB 2.0 Host Controller on PCI add-in cardUSB 2.0 Host Controller on PCI add-in card– USB SW stack to allow at-speed testingUSB SW stack to allow at-speed testing

Windows 2000 stack developed by MicrosoftWindows 2000 stack developed by Microsoft– USB 2.0 Transaction generation softwareUSB 2.0 Transaction generation software

Allows single transactions to be generatedAllows single transactions to be generated

October 10, 2000 10

Tools: USB 2.0 HC PCI CardTools: USB 2.0 HC PCI Card

PCI card with 5 portsPCI card with 5 ports– Uses NEC siliconUses NEC silicon– Full EHCIFull EHCI

implementationimplementation Cards from otherCards from other

vendors will be madevendors will be madeavailable when readyavailable when ready

October 10, 2000 11

Tools: SingleTransaction ToolTools: SingleTransaction Tool

Very useful for early device debugVery useful for early device debug Doesn’t require a device to enumerateDoesn’t require a device to enumerate Any type of transaction can be generatedAny type of transaction can be generated

– Including individual parts of Control transfersIncluding individual parts of Control transfers

DemoDemo

October 10, 2000 12

Tools: PDK AvailabilityTools: PDK Availability

Available nowAvailable now

Can be ordered through the USB-IFCan be ordered through the USB-IFweb pagesweb pages

– See the developers sectionSee the developers section

October 10, 2000 13

Tools: Compliance DeviceTools: Compliance Device

USB2.0 device targeted for testing host USB2.0 device targeted for testing host controllers and hubscontrollers and hubs

Supports no-NAK INs and OUTsSupports no-NAK INs and OUTs Supports LoopbackSupports Loopback Flags gaps in Isoch streamsFlags gaps in Isoch streams

Limited availabilityLimited availabilityAdd picture here

October 10, 2000 14

Tools: Bus AnalyzersTools: Bus Analyzers

Available nowAvailable now See showcase areaSee showcase area CatalystCatalyst

– http://www.catalyst-ent.comhttp://www.catalyst-ent.com CATCCATC

– http://www.catc.comhttp://www.catc.com Crescent HeartCrescent Heart

– http://www.c-h-s.comhttp://www.c-h-s.com Data TransitData Transit

– http://www.data-transit.comhttp://www.data-transit.com

October 10, 2000 15

Services: Peripheral Integration LabServices: Peripheral Integration Lab

Integration lab at Intel’s Architecture LabsIntegration lab at Intel’s Architecture Labsin Oregonin Oregon– Multiple hosts and devices (interop testing)Multiple hosts and devices (interop testing)– Test equipment (scopes, analyzers, TDRs, etc.)Test equipment (scopes, analyzers, TDRs, etc.)– Expert help from HW and SW engineersExpert help from HW and SW engineers– Compliance testingCompliance testing

Available to anyone planning on deliveringAvailable to anyone planning on deliveringUSB 2.0 device by Q2’01USB 2.0 device by Q2’01

Contact Dan FroelichContact Dan Froelich– [email protected]@intel.com

October 10, 2000 16

SummarySummary

Building blocks, tools and services are in place Building blocks, tools and services are in place NOW for USB 2.0 peripheral developmentNOW for USB 2.0 peripheral development– USB 2.0 Building Block Vendor List on usb.orgUSB 2.0 Building Block Vendor List on usb.org

Be a market leader by getting a jumpstartBe a market leader by getting a jumpstarton the competitionon the competition

Use the Peripheral Integration Lab to do early Use the Peripheral Integration Lab to do early debug and validation of your productdebug and validation of your product